 		printf("Restricted-range key-value sort: ");
 	}
 	b40c::CompareDeviceResults(
-		h_reference_keys, sort_storage.d_keys[sort_storage.selector], num_elements, verbose, verbose); printf("\n");
+		h_reference_keys,
+		sort_storage.d_keys[sort_storage.selector],
+		num_elements,
+		true,
+		verbose); printf("\n");
 
 	// Cleanup any "pong" storage allocated by the enactor
 	if (sort_storage.d_keys[1]) cudaFree(sort_storage.d_keys[1]);


		// Common
		200,						// SM ARCH
		4,							// RADIX_BITS

		// Launch tuning policy
		10,							// LOG_SCHEDULE_GRANULARITY			The "grain" by which to divide up the problem input.  E.g., 7 implies a near-even distribution of 128-key chunks to each CTA.  Related to, but different from the upsweep/downswep tile sizes, which may be different from each other.

		//		Given prefix counts, scans/scatters keys into appropriate bins
		// 		Note: a "cycle" is a tile sub-segment up to 256 keys
		//
		b40c::partition::downsweep::SCATTER_TWO_PHASE,						// DOWNSWEEP_TWO_PHASE_SCATTER		Whether or not to perform a two-phase scatter (scatter to smem first to recover some locality before scattering to global bins)
		8,							// DOWNSWEEP_CTA_OCCUPANCY			The targeted SM occupancy to feed PTXAS in order to influence how it does register allocation
		6,							// DOWNSWEEP_LOG_THREADS			The number of threads (log) to launch per CTA.  Valid range: 5-10, subject to constraints described above
		2,							// DOWNSWEEP_LOG_LOAD_VEC_SIZE		The vector-load size (log) for each load (log).  Valid range: 0-2, subject to constraints described above
