 					identity;
 			}
 			if(HalfCapacity)
-				HalfSmemTranspose<NT, VT>(stridedData, tid, storage.data, data);
+				HalfSmemRegToThread<NT, VT>(stridedData, tid, storage.data, data);
 			else {
 				DeviceRegToShared<NT, VT>(stridedData, tid, storage.data);
 				DeviceSharedToThread<VT>(storage.data, tid, data);

}

////////////////////////////////////////////////////////////////////////////////
// CTASegReduceLoad
// Load logic for segmented reduce and interval reduce. Supports direct and
// indirect loads, and has fast- and slow-path indirect loads.

				stridedData, identity);

			if(HalfCapacity)
				HalfSmemRegToThread<NT, VT>(stridedData, tid, storage.data, data);
			else {
				DeviceRegToShared<NT, VT>(stridedData, tid, storage.data);
				DeviceSharedToThread<VT>(storage.data, tid, data);
