                                                     ctx->level_sizes[i - 1]);                      // Number of sideband elements from level i-1
         sb = !sb;
       }
-      reduceApex << <1, 4 * 32, 0, stream >> > (ctx->index_pyramid + 8,
+      reduceApex << <1, 4 * 32, 0, stream >> > (ctx->index_pyramid + 4,
                                                 ctx->sum_d,
                                                 ctx->index_sidebands[sb ? 0 : 1],
                                                 ctx->level_sizes[ctx->levels - 4]);

                                                                              scale,
                                                                              threshold);
        }
        uint32_t index_count_clamped = min(index_capacity, index_pyramid[8].x);
        if(index_count_clamped) {
          extractIndices<<<(index_count_clamped + 255) / 256, 256>>>(index_output,
                                                                     vertex_pyramid,

                                                    ctx->level_sizes[i - 1]);                    // Number of sideband elements from level i-1
        sb = !sb;
      }
      reduceApex << <1, 4 * 32, 0, stream >> > (ctx->index_pyramid + 4,
                                                ctx->sum_d,
                                                ctx->index_sidebands[sb ? 0 : 1],
                                                ctx->level_sizes[ctx->levels - 4]);
      // FIXME: Try to combine these two kernels into one, as they are independent.
      reduceApex << <1, 4 * 32, 0, ctx->indexStream >> > (ctx->vertex_pyramid + 4,
                                                ctx->sum_d + 1,
                                                ctx->vertex_sidebands[sb ? 0 : 1],
                                                ctx->level_sizes[ctx->levels - 4]);
