Video streaming web server based on fi programmable gate array
An FPGA-based web-server firmware building block is presented. It is designed to interact over the 32-bit width AXI advanced microcontroller bus architecture. The web server implements User Datagram Protocol (UDP) together with Address Resolution Protocol (ARP) and Internet Control Message Protocol (ICMP). The web server integrates completely independent dataflows to process the messages of protocol stack listed above. This provides the ability to transfer data at a speed of 700 Mbps.