SPECIFIC CAPACITANCE CALCULATION MODEL OF SiC-BASED NANOSCALE MOSFET WITH DEEP IMPURITIES AND TRAP LEVELS
The work is devoted to the investigation and calculation of the main characteristics and parameters of the physical phenomena taking place in a silicon carbide based (SiC) MOS nanoscale transistors which is a perspective material of nanoelectronics, taking into account the two-dimensional distribution of the surface potential, the new quantum-sized phenomena conditioned on a short and narrow channel. At carrying out the work, the doping impurities and the deep levels appearing in the forbidden band of SiC structures, particularly in MOS structures have been studied. The electron (hole) traps and "capture centers" in SiC crystals and SiC structures, particularly in MOS structures, the causes and mechanisms of their emergence have been studied. The modeling results show that by changing the depth of the energetic levels of traps which were created by SiC crystal doping impurities, it is possible to change the depth of modulation of MOS nanoscale transistor's channel. The paper presents the results of a theoretical investigation of the dependence of specific capacitance of nanoscale SiC MOSFET taking into account the fact that the impurities in the transistor channel are deep, and there are trapping centers for electrons in the band gap. The dependences of the carrier mobility on temperature, electric field and impurity concentration are introduced. The presence of surface states, two-dimensional potential distribution under the gate and the dependence of the threshold voltage of the length and width of the channel are also given. A new analytical model for calculating the specific capacitance of transistor with submicron channel is introduced. The software packages and algorithms for the automated calculation of the main characteristics of a SiC-based MOS nanoscale transistor have been developed by means of “Mathematica” software.