RADIATION HARDENED MEMORY CELLS FOR NANOSCALED SRAM IP-BLOCKS AND CHIPS
The most promising CMOS memory cells for radiation tolerant applications as a part of SRAM IP-blocks for ‘systems-on-chip’ were analyzed. Using RHBD methods in nanoscaled CMOS processes constructive-topological solutions of memory cells were designed and optimized. The comparative analysis of main memory cells parameters, in particular the radiation tolerance, was performed. It was determined the most promising for these applications schematics and constructive-topological solutions of memory cells.