code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015 Ash Charles, Gumstix, Inc.
 */

/*
 * TobiDuo expansion board is manufactured by Gumstix Inc.
 */

#include "omap3-overo-common-peripherals.dtsi"

#include "omap-gpmc-smsc9221.dtsi"

&gpmc {
	smsc1: ethernet@gpmc {
		reg = <5 0 0xff>;
		interrupt-parent = <&gpio6>;
		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;	/* GPIO 176 */
	};

	smsc2: ethernet@4,0 {
		compatible = "smsc,lan9221","smsc,lan9115";
		bank-width = <2>;

		gpmc,mux-add-data = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <42>;
		gpmc,cs-wr-off-ns = <36>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <12>;
		gpmc,adv-wr-off-ns = <12>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <42>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <36>;
		gpmc,rd-cycle-ns = <60>;
		gpmc,wr-cycle-ns = <54>;
		gpmc,access-ns = <36>;
		gpmc,page-burst-access-ns = <0>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,wr-data-mux-bus-ns = <18>;
		gpmc,wr-access-ns = <42>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-diffcsen;
		vddvario-supply = <&vddvario>;
		vdd33a-supply = <&vdd33a>;
		reg-io-width = <4>;
		smsc,save-mac-address;

		reg = <4 0 0xff>;
		interrupt-parent = <&gpio3>;
		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;	/* GPIO 65 */
	};
};

&lis33de {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015 Ash Charles, Gumstix, Inc.
 */

/*
 * TobiDuo expansion board is manufactured by Gumstix Inc.
 */

/dts-v1/;

#include "omap3-overo.dtsi"
#include "omap3-overo-tobiduo-common.dtsi"

/ {
	model = "OMAP35xx Gumstix Overo on TobiDuo";
	compatible = "gumstix,omap3-overo-tobiduo", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3";
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
 */

#include "omap34xx.dtsi"
#include "omap3-overo-base.dtsi"

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_2_pins
	>;

	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};

	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015
 *   Nikolaus Schaller <hns@goldelico.com>
 */

/*
 * device tree for OpenPandora 1GHz with DM3730
 */

/dts-v1/;

#include "omap36xx.dtsi"
#include "omap3-pandora-common.dtsi"

/ {
	model = "Pandora Handheld Console 1GHz";

	compatible = "openpandora,omap3-pandora-1ghz", "ti,omap3630", "ti,omap36xx", "ti,omap3";
};

&omap3_pmx_core2 {

	pinctrl-names = "default";
	pinctrl-0 = <
		&hsusb2_2_pins
		&control_pins
	>;

	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};

	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_clk.sdmmc3_clk */
			OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_ctl.sdmmc3_cmd */
			OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d3.sdmmc3_dat3 */
			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d4.sdmmc3_dat0 */
			OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d5.sdmmc3_dat1 */
			OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d6.sdmmc3_dat2 */
		>;
	};

	control_pins: pinmux_control_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* etk_d0.gpio_14 =  HP_SHUTDOWN */
			OMAP3630_CORE2_IOPAD(0x25de, PIN_OUTPUT | MUX_MODE4)		/* etk_d1.gpio_15 =  BT_SHUTDOWN */
			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 =  RESET_USB_HOST */
			OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE4)		/* etk_d7.gpio_21 =  WIFI IRQ */
			OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)		/* etk_d8.gpio_22 =  MSECURE */
			OMAP3630_CORE2_IOPAD(0x25ee, PIN_OUTPUT | MUX_MODE4)		/* etk_d9.gpio_23 =  WIFI_POWER */
			OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT | MUX_MODE4)   		/* reserved.gpio_127 = MMC2_WP */
			OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4)   		/* reserved.gpio_126 = MMC1_WP */
			OMAP3_WKUP_IOPAD(0x2a58, PIN_OUTPUT | MUX_MODE4)   		/* reserved.gpio_128 = LED_MMC1 */
			OMAP3_WKUP_IOPAD(0x2a5a, PIN_OUTPUT | MUX_MODE4)   		/* reserved.gpio_129 = LED_MMC2 */

		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015
 *   Nikolaus Schaller <hns@goldelico.com>
 */

/*
 * device tree for OpenPandora with OMAP3530
 */

/dts-v1/;

#include "omap34xx.dtsi"
#include "omap3-pandora-common.dtsi"

/ {
	model = "Pandora Handheld Console";

	compatible = "openpandora,omap3-pandora-600mhz", "ti,omap3430", "ti,omap3";
};

&omap3_pmx_core2 {

	pinctrl-names = "default";
	pinctrl-0 = <
		&hsusb2_2_pins
		&control_pins
	>;

	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};

	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_clk.sdmmc3_clk */
			OMAP3430_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_ctl.sdmmc3_cmd */
			OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d3.sdmmc3_dat3 */
			OMAP3430_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d4.sdmmc3_dat0 */
			OMAP3430_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d5.sdmmc3_dat1 */
			OMAP3430_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d6.sdmmc3_dat2 */
		>;
	};

	control_pins: pinmux_control_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* etk_d0.gpio_14 =  HP_SHUTDOWN */
			OMAP3430_CORE2_IOPAD(0x25de, PIN_OUTPUT | MUX_MODE4)		/* etk_d1.gpio_15 =  BT_SHUTDOWN */
			OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 =  RESET_USB_HOST */
			OMAP3430_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE4)		/* etk_d7.gpio_21 =  WIFI IRQ */
			OMAP3430_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)		/* etk_d8.gpio_22 =  MSECURE */
			OMAP3430_CORE2_IOPAD(0x25ee, PIN_OUTPUT | MUX_MODE4)		/* etk_d9.gpio_23 =  WIFI_POWER */
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015
 *   Nikolaus Schaller <hns@goldelico.com>
 *
 * Common device tree include for OpenPandora devices.
 */

#include <dt-bindings/input/input.h>

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	aliases {
		display0 = &lcd;
	};

	/* fixed 26MHz oscillator */
	hfclk_26m: oscillator {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <26000000>;
	};

	tv: connector {
		compatible = "connector-analog-tv";
		label = "tv";

		port {
			tv_connector_in: endpoint {
				remote-endpoint = <&venc_out>;
			};
		};
	};

	gpio-leds {

		compatible = "gpio-leds";

		pinctrl-names = "default";
		pinctrl-0 = <&led_pins>;

		led1 {
			label = "pandora::sd1";
			gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;	/* GPIO_128 */
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led2 {
			label = "pandora::sd2";
			gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;	/* GPIO_129 */
			linux,default-trigger = "mmc1";
			default-state = "off";
		};

		led3 {
			label = "pandora::bluetooth";
			gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;	/* GPIO_158 */
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led4 {
			label = "pandora::wifi";
			gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;	/* GPIO_159 */
			linux,default-trigger = "mmc2";
			default-state = "off";
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		pinctrl-names = "default";
		pinctrl-0 = <&button_pins>;

		up-button {
			label = "up";
			linux,code = <KEY_UP>;
			gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;	/* GPIO_110 */
			wakeup-source;
		};

		down-button {
			label = "down";
			linux,code = <KEY_DOWN>;
			gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;	/* GPIO_103 */
			wakeup-source;
		};

		left-button {
			label = "left";
			linux,code = <KEY_LEFT>;
			gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;	/* GPIO_96 */
			wakeup-source;
		};

		right-button {
			label = "right";
			linux,code = <KEY_RIGHT>;
			gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;	/* GPIO_98 */
			wakeup-source;
		};

		pageup-button {
			label = "game 1";
			linux,code = <KEY_PAGEUP>;
			gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;	/* GPIO_109 */
			wakeup-source;
		};

		pagedown-button {
			label = "game 3";
			linux,code = <KEY_PAGEDOWN>;
			gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;	/* GPIO_106 */
			wakeup-source;
		};

		home-button {
			label = "game 4";
			linux,code = <KEY_HOME>;
			gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;	/* GPIO_101 */
			wakeup-source;
		};

		end-button {
			label = "game 2";
			linux,code = <KEY_END>;
			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;	/* GPIO_111 */
			wakeup-source;
		};

		right-shift {
			label = "l";
			linux,code = <KEY_RIGHTSHIFT>;
			gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;	/* GPIO_102 */
			wakeup-source;
		};

		kp-plus {
			label = "l2";
			linux,code = <KEY_KPPLUS>;
			gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;	/* GPIO_97 */
			wakeup-source;
		};

		right-ctrl {
			label = "r";
			linux,code = <KEY_RIGHTCTRL>;
			gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;	/* GPIO_105 */
			wakeup-source;
		};

		kp-minus {
			label = "r2";
			linux,code = <KEY_KPMINUS>;
			gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;	/* GPIO_107 */
			wakeup-source;
		};

		left-ctrl {
			label = "ctrl";
			linux,code = <KEY_LEFTCTRL>;
			gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;	/* GPIO_104 */
			wakeup-source;
		};

		menu {
			label = "menu";
			linux,code = <KEY_MENU>;
			gpios = <&gpio4 3 GPIO_ACTIVE_LOW>;	/* GPIO_99 */
			wakeup-source;
		};

		hold {
			label = "hold";
			linux,code = <KEY_COFFEE>;
			gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;	/* GPIO_176 */
			wakeup-source;
		};

		left-alt {
			label = "alt";
			linux,code = <KEY_LEFTALT>;
			gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;	/* GPIO_100 */
			wakeup-source;
		};

		lid {
			label = "lid";
			linux,code = <0x00>;    /* SW_LID lid shut */
			linux,input-type = <0x05>;    /* EV_SW */
			gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;   /* GPIO_108 */
		};
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; /* GPIO_16 */
		vcc-supply = <&vaux2>;
		#phy-cells = <0>;
	};

	/* HS USB Host VBUS supply
	 * disabling this regulator causes current leakage, and LCD flicker
	 * on earlier (CC) board revisions, so keep it always on */
	usb_host_5v: fixed-regulator-usb_host_5v {
		compatible = "regulator-fixed";
		regulator-name = "usb_host_5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;	/* GPIO_164 */
	};

	/* wl1251 wifi+bt module */
	wlan_en: fixed-regulator-wg7210_en {
		compatible = "regulator-fixed";
		regulator-name = "vwlan";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		startup-delay-us = <50000>;
		enable-active-high;
		gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
	};

	/* wg7210 (wifi+bt module) 32k clock buffer */
	wg7210_32k: fixed-regulator-wg7210_32k {
		compatible = "regulator-fixed";
		regulator-name = "wg7210_32k";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		enable-active-high;
		gpio = <&twl_gpio 13 GPIO_ACTIVE_HIGH>;
	};
};

&omap3_pmx_core {

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_clk.sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_cmd.sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat3.sdmmc2_dat3 */
			OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT_PULLUP | MUX_MODE1)	/* sdmmc2_dat4.sdmmc2_dirdat0 */
			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT_PULLUP | MUX_MODE1)	/* sdmmc2_dat5.sdmmc2_dirdat1 */
			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT_PULLUP | MUX_MODE1)	/* sdmmc2_dat6.sdmmc2_dircmd */
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE1)		/* sdmmc2_dat7.sdmmc2_clkin */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
			OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)	/* GPIO_157 = lcd reset */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	led_pins: pinmux_leds_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2154, PIN_OUTPUT | MUX_MODE4)	/* GPIO_128 */
			OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4)	/* GPIO_129 */
			OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE4)	/* GPIO_158 */
			OMAP3_CORE1_IOPAD(0x2192, PIN_OUTPUT | MUX_MODE4)	/* GPIO_159 */
		>;
	};

	button_pins: pinmux_button_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE4)	/* GPIO_96 */
			OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE4)	/* GPIO_97 */
			OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE4)	/* GPIO_98 */
			OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE4)	/* GPIO_99 */
			OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE4)	/* GPIO_100 */
			OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE4)	/* GPIO_101 */
			OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE4)	/* GPIO_102 */
			OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE4)	/* GPIO_103 */
			OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE4)	/* GPIO_104 */
			OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE4)	/* GPIO_105 */
			OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE4)	/* GPIO_106 */
			OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE4)	/* GPIO_107 */
			OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE4)	/* GPIO_108 */
			OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT | MUX_MODE4)	/* GPIO_109 */
			OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT | MUX_MODE4)	/* GPIO_110 */
			OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT | MUX_MODE4)	/* GPIO_111 */
			OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4)	/* GPIO_176 */
		>;
	};

	penirq_pins: pinmux_penirq_pins {
		pinctrl-single,pins = <
			/* here we could enable to wakeup the cpu from suspend by a pen touch */
			OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT | MUX_MODE4)	/* GPIO_94 */
		>;
	};

};

&omap3_pmx_core2 {
	/* define in CPU specific file that includes this one
	 * use either OMAP3430_CORE2_IOPAD() or OMAP3630_CORE2_IOPAD()
	 */
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		clocks = <&hfclk_26m>;
		clock-names = "fck";

		twl_power: power {
			compatible = "ti,twl4030-power-reset";
			ti,use_poweroff;
		};

		twl_audio: audio {
			compatible = "ti,twl4030-audio";

			codec {
				ti,ramp_delay_value = <3>;
			};
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&twl_keypad {
	keypad,num-rows = <8>;
	keypad,num-columns = <6>;
	linux,keymap = <
		MATRIX_KEY(0, 0, KEY_9)
		MATRIX_KEY(0, 1, KEY_8)
		MATRIX_KEY(0, 2, KEY_I)
		MATRIX_KEY(0, 3, KEY_J)
		MATRIX_KEY(0, 4, KEY_N)
		MATRIX_KEY(0, 5, KEY_M)
		MATRIX_KEY(1, 0, KEY_0)
		MATRIX_KEY(1, 1, KEY_7)
		MATRIX_KEY(1, 2, KEY_U)
		MATRIX_KEY(1, 3, KEY_H)
		MATRIX_KEY(1, 4, KEY_B)
		MATRIX_KEY(1, 5, KEY_SPACE)
		MATRIX_KEY(2, 0, KEY_BACKSPACE)
		MATRIX_KEY(2, 1, KEY_6)
		MATRIX_KEY(2, 2, KEY_Y)
		MATRIX_KEY(2, 3, KEY_G)
		MATRIX_KEY(2, 4, KEY_V)
		MATRIX_KEY(2, 5, KEY_FN)
		MATRIX_KEY(3, 0, KEY_O)
		MATRIX_KEY(3, 1, KEY_5)
		MATRIX_KEY(3, 2, KEY_T)
		MATRIX_KEY(3, 3, KEY_F)
		MATRIX_KEY(3, 4, KEY_C)
		MATRIX_KEY(4, 0, KEY_P)
		MATRIX_KEY(4, 1, KEY_4)
		MATRIX_KEY(4, 2, KEY_R)
		MATRIX_KEY(4, 3, KEY_D)
		MATRIX_KEY(4, 4, KEY_X)
		MATRIX_KEY(5, 0, KEY_K)
		MATRIX_KEY(5, 1, KEY_3)
		MATRIX_KEY(5, 2, KEY_E)
		MATRIX_KEY(5, 3, KEY_S)
		MATRIX_KEY(5, 4, KEY_Z)
		MATRIX_KEY(6, 0, KEY_L)
		MATRIX_KEY(6, 1, KEY_2)
		MATRIX_KEY(6, 2, KEY_W)
		MATRIX_KEY(6, 3, KEY_A)
		MATRIX_KEY(6, 4, KEY_RIGHTBRACE)
		MATRIX_KEY(7, 0, KEY_ENTER)
		MATRIX_KEY(7, 1, KEY_1)
		MATRIX_KEY(7, 2, KEY_Q)
		MATRIX_KEY(7, 3, KEY_LEFTSHIFT)
		MATRIX_KEY(7, 4, KEY_LEFTBRACE )
	 >;
};

/* backup battery charger */
&charger {
	ti,bb-uvolt = <3200000>;
	ti,bb-uamp = <150>;
};

/* MMC2 */
&vmmc2 {
	regulator-min-microvolt = <1850000>;
	regulator-max-microvolt = <3150000>;
};

/* LCD */
&vaux1 {
	regulator-min-microvolt = <3000000>;
	regulator-max-microvolt = <3000000>;
};

/* USB Host PHY */
&vaux2 {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
};

/* available on expansion connector */
&vaux3 {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <2800000>;
};

/* ADS7846 and nubs */
&vaux4 {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <2800000>;
};

/* power audio DAC and LID sensor */
&vsim {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <2800000>;
	regulator-always-on;
};

&i2c2 {
	clock-frequency = <100000>;
	/* no clients so we should disable clock */
};

&i2c3 {
	clock-frequency = <100000>;

	bq27500@55 {
		compatible = "ti,bq27500";
		reg = <0x55>;
	};

};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

/*
 * Many pandora boards have been produced with defective write-protect switches
 * on either slot, so it was decided not to use this feature. If you know
 * your board has good switches, feel free to uncomment wp-gpios below.
 */
&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&vmmc1>;
	bus-width = <4>;
	cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
	/*wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;*/	/* GPIO_126 */
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	vmmc-supply = <&vmmc2>;
	bus-width = <4>;
	cd-gpios = <&twl_gpio 1 GPIO_ACTIVE_LOW>;
	/*wp-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;*/	/* GPIO_127 */
};

&mmc3 {
	vmmc-supply = <&wlan_en>;

	bus-width = <4>;
	non-removable;
	ti,non-removable;
	cap-power-off-card;

	pinctrl-names = "default";
	pinctrl-0 = <&mmc3_pins>;

	#address-cells = <1>;
	#size-cells = <0>;

	wlan: wifi@1 {
		compatible = "ti,wl1251";

		reg = <1>;

		interrupt-parent = <&gpio1>;
		interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;	/* GPIO_21 */

		ti,wl1251-has-eeprom;
	};
};

/* bluetooth*/
&uart1 {
};

/* spare (expansion connector) */
&uart2 {
};

/* console (expansion connector) */
&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};

&gpmc {
	ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		nand-bus-width = <16>;
		ti,nand-ecc-opt = "sw";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,device-width = <2>;

		#address-cells = <1>;
		#size-cells = <1>;

		/* u-boot uses mtdparts=nand:512k(xloader),1920k(uboot),128k(uboot-env),10m(boot),-(rootfs) */

		x-loader@0 {
			label = "xloader";
			reg = <0 0x80000>;
		};

		bootloaders@80000 {
			label = "uboot";
			reg = <0x80000 0x1e0000>;
		};

		bootloaders_env@260000 {
			label = "uboot-env";
			reg = <0x260000 0x20000>;
		};

		kernel@280000 {
			label = "boot";
			reg = <0x280000 0xa00000>;
		};

		filesystem@c80000 {
			label = "rootfs";
			reg = <0xc80000 0>;	/* 0 = MTDPART_SIZ_FULL */
		};
	};
};

&mcspi1 {
	tsc2046@0 {
		reg = <0>;	/* CS0 */
		compatible = "ti,tsc2046";
		spi-max-frequency = <1000000>;
		pinctrl-names = "default";
		pinctrl-0 = <&penirq_pins>;
		interrupt-parent = <&gpio3>;
		interrupts = <30 IRQ_TYPE_NONE>;	/* GPIO_94 */
		pendown-gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
		vcc-supply = <&vaux4>;

		ti,x-min = /bits/ 16 <0>;
		ti,x-max = /bits/ 16 <8000>;
		ti,y-min = /bits/ 16 <0>;
		ti,y-max = /bits/ 16 <4800>;
		ti,x-plate-ohms = /bits/ 16 <40>;
		ti,pressure-max = /bits/ 16 <255>;

		wakeup-source;
	};

	lcd: lcd@1 {
		reg = <1>;	/* CS1 */
		compatible = "tpo,td043mtea1";
		spi-max-frequency = <100000>;
		spi-cpol;
		spi-cpha;

		label = "lcd";
		reset-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;	/* GPIO_157 */
		vcc-supply = <&vaux1>;

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_out>;
			};
		};
	};

};

/* n/a - used as GPIOs */
&mcbsp1 {
};

/* audio DAC */
&mcbsp2 {
};

/* bluetooth */
&mcbsp3 {
};

/* to twl4030*/
&mcbsp4 {
};

&venc {
	status = "okay";

	vdda-supply = <&vdac>;

	port {
		venc_out: endpoint {
			remote-endpoint = <&tv_connector_in>;
			ti,channels = <2>;
		};
	};
};

&dss {
	pinctrl-names = "default";
	pinctrl-0 = < &dss_dpi_pins >;

	status = "okay";
	vdds_dsi-supply = <&vpll2>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Common file for omap dpi panels with QVGA and reset pins
 *
 * Note that the board specifc DTS file needs to specify
 * at minimum the GPIO enable-gpios for display, and
 * gpios for gpio-backlight.
 */

/ {
	aliases {
		display0 = &lcd0;
	};

	backlight0: backlight {
		compatible = "gpio-backlight";
		default-on;
	};

	/* 3.3V GPIO controlled regulator for LCD_ENVDD */
	lcd_3v3: regulator-lcd-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "lcd_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <70000>;
	};

	lcd0: display {
		compatible = "sharp,ls037v7dw01";
		label = "lcd";
		power-supply = <&lcd_3v3>;
		envdd-supply = <&lcd_3v3>;

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_out>;
			};
		};
	};
};

/* Needed to power the DPI pins */
&vpll2 {
	regulator-always-on;
};

&dss {
	status = "okay";
	port {
		dpi_out: endpoint {
			remote-endpoint = <&lcd_in>;
			data-lines = <18>;
		};
	};
};

&mcspi1 {
	tsc2046@0 {
		reg = <0>;			/* CS0 */
		compatible = "ti,tsc2046";
		spi-max-frequency = <1000000>;
		vcc-supply = <&lcd_3v3>;
		ti,x-min = /bits/ 16 <0>;
		ti,x-max = /bits/ 16 <8000>;
		ti,y-min = /bits/ 16 <0>;
		ti,y-max = /bits/ 16 <4800>;
		ti,x-plate-ohms = /bits/ 16 <40>;
		ti,pressure-max = /bits/ 16 <255>;
		ti,swap-xy;
		wakeup-source;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
 */

/ {
	tfp410: encoder {
		compatible = "ti,tfp410";

		powerdown-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;  /* gpio_54 */

		pinctrl-names = "default";
		pinctrl-0 = <&tfp410_pins>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: dvi-connector {
		compatible = "dvi-connector";
		label = "dvi";

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};

	audio_amp: audio_amp {
		compatible = "regulator-fixed";
		regulator-name = "audio_amp";
		pinctrl-names = "default";
		pinctrl-0 = <&sb_t35_audio_amp>;
		gpio = <&gpio2 29 GPIO_ACTIVE_LOW>;   /* gpio_61 */
		regulator-always-on;
	};
};

&omap3_pmx_core {
	smsc2_pins: pinmux_smsc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20b6, PIN_OUTPUT | MUX_MODE0)	/* gpmc_ncs4.gpmc_ncs4 */
			OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT_PULLUP | MUX_MODE4)	/* gpmc_wait3.gpio_65 */
		>;
	};

	tfp410_pins: pinmux_tfp410_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4)	/* gpmc_ncs3.gpio_54 */
		>;
	};

	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
		>;
	};

	sb_t35_audio_amp: pinmux_sb_t35_audio_amp {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20c8, PIN_OUTPUT | MUX_MODE4) /* gpmc_nbe1.gpio_61 */
		>;
	};
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;

	clock-frequency = <400000>;

	at24@50 {
		compatible = "atmel,24c02";
		pagesize = <16>;
		reg = <0x50>;
	};
};

&gpmc {
	ranges = <4 0 0x2d000000 0x01000000>;

	smsc2: ethernet@4,0 {
		compatible = "smsc,lan9221", "smsc,lan9115";
		pinctrl-names = "default";
		pinctrl-0 = <&smsc2_pins>;
		interrupt-parent = <&gpio3>;
		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
		reg = <4 0 0xff>;
		bank-width = <2>;
		gpmc,device-width = <1>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-diffcsen;
		gpmc,cs-on-ns = <5>;
		gpmc,cs-rd-off-ns = <150>;
		gpmc,cs-wr-off-ns = <150>;
		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <15>;
		gpmc,adv-wr-off-ns = <40>;
		gpmc,oe-on-ns = <45>;
		gpmc,oe-off-ns = <140>;
		gpmc,we-on-ns = <45>;
		gpmc,we-off-ns = <140>;
		gpmc,rd-cycle-ns = <155>;
		gpmc,wr-cycle-ns = <155>;
		gpmc,access-ns = <120>;
		gpmc,page-burst-access-ns = <20>;
		gpmc,bus-turnaround-ns = <75>;
		gpmc,cycle2cycle-delay-ns = <75>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,wr-access-ns = <0>;
		vddvario-supply = <&vddvario>;
		vdd33a-supply = <&vdd33a>;
		reg-io-width = <4>;
		smsc,save-mac-address;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Suppport for CompuLab SBC-T3517 with CM-T3517
 */

#include "omap3-cm-t3517.dts"
#include "omap3-sb-t35.dtsi"

/ {
	model = "CompuLab SBC-T3517 with CM-T3517";
	compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";

	aliases {
		display0 = &dvi0;
		display1 = &tv0;
	};

	/* Only one GPMC smsc9220 on SBC-T3517, CM-T3517 uses am35x Ethernet */
	vddvario: regulator-vddvario-sb-t35 {
		compatible = "regulator-fixed";
		regulator-name = "vddvario";
		regulator-always-on;
	};

	vdd33a: regulator-vdd33a-sb-t35 {
		compatible = "regulator-fixed";
		regulator-name = "vdd33a";
		regulator-always-on;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&sb_t35_usb_hub_pins
			&usb_hub_pins
		    >;

	mmc1_aux_pins: pinmux_mmc1_aux_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20c0, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_clk.gpio_59   */
			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_cts.gpio_144 */
		>;
	};

	sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21ec, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_98 - SB-T35 USB HUB RST */
		>;
	};
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <
		&mmc1_pins
		&mmc1_aux_pins
	>;

	wp-gpios =  <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio_59  */
	cd-gpios =  <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio_144 */
};

&dss {
	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};

&gpmc {
	ranges = <4 0 0x2d000000 0x01000000>,	/* SB-T35 SMSC9x Eth */
		 <0 0 0x00000000 0x01000000>;	/* CM-T3x NAND */
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Suppport for CompuLab SBC-T3530 with CM-T3530
 */

#include "omap3-cm-t3530.dts"
#include "omap3-sb-t35.dtsi"

/ {
	model = "CompuLab SBC-T3530 with CM-T3530";
	compatible = "compulab,omap3-sbc-t3530", "compulab,omap3-cm-t3530", "ti,omap3430", "ti,omap34xx", "ti,omap3";

	aliases {
		display0 = &dvi0;
		display1 = &tv0;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <&sb_t35_usb_hub_pins>;

	sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
		>;
	};
};

&gpmc {
	ranges = <5 0 0x2c000000 0x01000000>,	/* CM-T3x30 SMSC9x Eth */
		 <4 0 0x2d000000 0x01000000>,	/* SB-T35 SMSC9x Eth */
		 <0 0 0x00000000 0x01000000>;	/* CM-T3x NAND */
};

&mmc1 {
	cd-gpios =  <&twl_gpio 0 GPIO_ACTIVE_HIGH>;
};

&dss {
	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Suppport for CompuLab SBC-T3730 with CM-T3730
 */

#include "omap3-cm-t3730.dts"
#include "omap3-sb-t35.dtsi"

/ {
	model = "CompuLab SBC-T3730 with CM-T3730";
	compatible = "compulab,omap3-sbc-t3730", "compulab,omap3-cm-t3730", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	aliases {
		display0 = &dvi0;
		display1 = &tv0;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <&sb_t35_usb_hub_pins>;

	sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
		>;
	};
};

&gpmc {
	ranges = <5 0 0x2c000000 0x01000000>,	/* CM-T3x30 SMSC9x Eth */
		 <4 0 0x2d000000 0x01000000>,	/* SB-T35 SMSC9x Eth */
		 <0 0 0x00000000 0x01000000>;	/* CM-T3x NAND */
};

&dss {
	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015-2016 Paul Kocialkowski <contact@paulk.fr>
 */
/dts-v1/;

#include "omap36xx.dtsi"
#include <dt-bindings/input/input.h>

/ {
	model = "LG Optimus Black";
	compatible = "lg,omap3-sniper", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)	/* uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx_irtx */
		>;
	};

	dp3t_sel_pins: pinmux_dp3t_sel_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE4)	/* gpio_161 */
			OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)	/* gpio_162 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)	/* i2c1_scl */
			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)	/* i2c1_sda */
		>;
	};

	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)	/* i2c2_scl */
			OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)	/* i2c2_sda */
		>;
	};

	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl */
			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda */
		>;
	};

	lp8720_en_pin: pinmux_lp8720_en_pin {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2080, PIN_OUTPUT | MUX_MODE4)	/* gpio_37 */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT | MUX_MODE0)	/* sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0)	/* sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat3 */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT | MUX_MODE0)	/* sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT | MUX_MODE0)	/* sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0)	/* sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0)	/* sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0)	/* sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0)	/* sdmmc2_dat3 */
			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0)	/* sdmmc2_dat4 */
			OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0)	/* sdmmc2_dat5 */
			OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0)	/* sdmmc2_dat6 */
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0)	/* sdmmc2_dat7 */
		>;
	};

	usb_otg_hs_pins: pinmux_usb_otg_hs_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)	/* hsusb0_clk */
			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)	/* hsusb0_stp */
			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)	/* hsusb0_dir */
			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)	/* hsusb0_nxt */
			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)	/* hsusb0_data0 */
			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)	/* hsusb0_data1 */
			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)	/* hsusb0_data2 */
			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)	/* hsusb0_data3 */
			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)	/* hsusb0_data4 */
			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)	/* hsusb0_data5 */
			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)	/* hsusb0_data6 */
			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)	/* hsusb0_data7 */
		>;
	};
};

&omap3_pmx_wkup {
	pinctrl-names = "default";

	mmc1_cd_pin: pinmux_mmc1_cd_pin {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | MUX_MODE4)		/* gpio_10 */
		>;
	};
};

&gpio2 {
	ti,no-reset-on-init;
};

&gpio5 {
	ti,no-reset-on-init;
};

&gpio6 {
	ti,no-reset-on-init;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins &dp3t_sel_pins>;

	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		power {
			compatible = "ti,twl4030-power";
			ti,use_poweroff;
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;

	clock-frequency = <400000>;
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;

	clock-frequency = <400000>;

	lp8720@7d {
		pinctrl-names = "default";
		pinctrl-0 = <&lp8720_en_pin>;

		compatible = "ti,lp8720";
		reg = <0x7d>;

		enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* gpio_37 */

		lp8720_ldo1: ldo1 {
			regulator-min-microvolt = <3000000>;
			regulator-max-microvolt = <3000000>;
		};
	};
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins &mmc1_cd_pin>;

	vmmc-supply = <&lp8720_ldo1>;
	cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* gpio 10 */
	bus-width = <4>;
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;

	vmmc-supply = <&vmmc2>;
	ti,non-removable;
	bus-width = <8>;
};

&mmc3 {
	status = "disabled";
};

&usb_otg_hs {
	pinctrl-names = "default";
	pinctrl-0 = <&usb_otg_hs_pins>;

	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&twl_keypad {
	linux,keymap = <
		MATRIX_KEY(0x00, 0x00, KEY_VOLUMEUP)
		MATRIX_KEY(0x01, 0x00, KEY_VOLUMEDOWN)
		MATRIX_KEY(0x02, 0x00, KEY_SELECT)
	>;
};

/*
 * The TWL4030 VAUX2 and VDAC regulators power sensors that are slaves on I2C3.
 * When not powered, these sensors cause the I2C3 clock to stay low at all times,
 * making it impossible to reach other devices on I2C3.
 */

&vaux2 {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <2800000>;
	regulator-always-on;
};

&vdac {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
 */
/dts-v1/;

#include "omap34xx.dtsi"

/* Secure omaps have some devices inaccessible depending on the firmware */
&aes1_target {
	status = "disabled";
};

&aes2_target {
	status = "disabled";
};

&sham {
	status = "disabled";
};

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	/* HS USB Port 2 Power */
	hsusb2_power: hsusb2_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb2_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;	/* GPIO LEDA */
		startup-delay-us = <70000>;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;	/* gpio_162 */
		vcc-supply = <&hsusb2_power>;
		#phy-cells = <0>;
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "omap3beagle";

		/* McBSP2 is used for onboard sound, same as on beagle */
		ti,mcbsp = <&mcbsp2>;
	};

	/* Regulator to enable/switch the vcc of the Wifi module */
	mmc2_sdio_poweron: regulator-mmc2-sdio-poweron {
		compatible = "regulator-fixed";
		regulator-name = "regulator-mmc2-sdio-poweron";
		regulator-min-microvolt = <3150000>;
		regulator-max-microvolt = <3150000>;
		gpio = <&gpio5 29 GPIO_ACTIVE_LOW>;		/* gpio_157 */
		startup-delay-us = <10000>;
	};
};

&omap3_pmx_core {
	hsusbb2_pins: pinmux_hsusbb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
			OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
			OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
			OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
			OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
		>;
	};

	/* wlan GPIO output for WLAN_EN */
	wlan_gpio: pinmux_wlan_gpio {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)	/* mcbsp1_fsr gpio_157 */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_scl.i2c3_scl */
			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_sda.i2c3_sda */
		>;
	};

	mcspi1_pins: pinmux_mcspi1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)	/* mcspi1_clk.mcspi1_clk */
			OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)	/* mcspi1_simo.mcspi1_simo */
			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mcspi1_somi.mcspi1_somi */
			OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)	/* mcspi1_cs0.mcspi1_cs0 */
		>;
	};

	mcspi3_pins: pinmux_mcspi3_pins {
		pinctrl-single,pins = <
                        OMAP3_CORE1_IOPAD(0x25dc, PIN_OUTPUT | MUX_MODE1)	/* etk_d0.mcspi3_simo gpio14 INPUT | MODE1 */
                        OMAP3_CORE1_IOPAD(0x25de, PIN_INPUT_PULLUP | MUX_MODE1)	/* etk_d1.mcspi3_somi gpio15 INPUT | MODE1 */
                        OMAP3_CORE1_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE1)	/* etk_d2.mcspi3_cs0 gpio16 INPUT | MODE1 */
                        OMAP3_CORE1_IOPAD(0x25e2, PIN_INPUT | MUX_MODE1)	/* etk_d3.mcspi3_clk gpio17 INPUT | MODE1 */
		>;
	};

	mcbsp3_pins: pinmux_mcbsp3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0)	/* mcbsp3_dx.uart2_cts */
			OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0)	/* mcbsp3_dr.uart2_rts */
			OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0)	/* mcbsp3_clk.uart2_tx */
			OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0)	/* mcbsp3_fsx.uart2_rx */
		>;
	};
};

/* McBSP1: mux'ed with GPIO158 as clock for HA-DSP */
&mcbsp1 {
	status = "disabled";
};

&mcbsp2 {
	status = "okay";
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;

	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
};

&mcspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi1_pins>;
};

&mcspi3 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi3_pins>;
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&vmmc1>;
	vqmmc-supply = <&vsim>;
	cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
	bus-width = <8>;
};

// WiFi (Marvell 88W8686) on MMC2/SDIO
&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	vmmc-supply = <&mmc2_sdio_poweron>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;
};

&mmc3 {
	status = "disabled";
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};

&twl_gpio {
	ti,use-leds;
	/* pullups: BIT(1) */
	ti,pullups = <0x000002>;
	/*
	 * pulldowns:
	 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	 * BIT(15), BIT(16), BIT(17)
	 */
	ti,pulldowns = <0x03a1c4>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

&mcbsp3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp3_pins>;
};

&gpmc {
	ranges = <0 0 0x30000000 0x01000000>;	/* CS0: 16MB for NAND */

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		nand-bus-width = <16>;
		gpmc,device-width = <2>;	/* GPMC_DEVWIDTH_16BIT */
		ti,nand-ecc-opt = "sw";

		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <36>;
		gpmc,cs-wr-off-ns = <36>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <24>;
		gpmc,adv-wr-off-ns = <36>;
		gpmc,oe-on-ns = <6>;
		gpmc,oe-off-ns = <48>;
		gpmc,we-on-ns = <6>;
		gpmc,we-off-ns = <30>;
		gpmc,rd-cycle-ns = <72>;
		gpmc,wr-cycle-ns = <72>;
		gpmc,access-ns = <54>;
		gpmc,wr-access-ns = <30>;

		#address-cells = <1>;
		#size-cells = <1>;

		x-loader@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};

		bootloaders@80000 {
			label = "U-Boot";
			reg = <0x80000 0x1e0000>;
		};

		bootloaders_env@260000 {
			label = "U-Boot Env";
			reg = <0x260000 0x20000>;
		};

		kernel@280000 {
			label = "Kernel";
			reg = <0x280000 0x400000>;
		};

		filesystem@680000 {
			label = "File System";
			reg = <0x680000 0xf980000>;
		};
	};
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

&vaux2 {
	regulator-name = "vdd_ehci";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
 */

#include "omap3-tao3530.dtsi"

/ {
	model = "TI OMAP3 Thunder baseboard with TAO3530 SOM";
	compatible = "technexion,omap3-thunder", "technexion,omap3-tao3530", "ti,omap3430", "ti,omap34xx", "ti,omap3";
};

&omap3_pmx_core {
	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
		>;
	};

	lte430_pins: pinmux_lte430_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat6.gpio_138 */
		>;
	};

	backlight_pins: pinmux_backlight_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 */
		>;
	};
};

/* Needed to power the DPI pins */
&vpll2 {
	regulator-always-on;
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_dpi_pins>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};

/ {
	aliases {
		display0 = &lcd0;
	};

	lcd0: display {
		compatible = "samsung,lte430wq-f0c", "panel-dpi";
		label = "lcd";

		pinctrl-names = "default";
		pinctrl-0 = <&lte430_pins>;
		enable-gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;	/* gpio_138 */

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_out>;
			};
		};

		panel-timing {
			clock-frequency = <9000000>;
			hactive = <480>;
			vactive = <272>;
			hfront-porch = <3>;
			hback-porch = <2>;
			hsync-len = <42>;
			vback-porch = <2>;
			vfront-porch = <3>;
			vsync-len = <11>;

			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};
	};

	backlight {
		compatible = "gpio-backlight";

		pinctrl-names = "default";
		pinctrl-0 = <&backlight_pins>;
		gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>;		/* gpio_139 */

		default-on;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap36xx.dtsi"
#include "omap-zoom-common.dtsi"

/ {
	model = "TI Zoom3";
	compatible = "ti,omap3-zoom3", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	vddvario: regulator-vddvario {
		compatible = "regulator-fixed";
		regulator-name = "vddvario";
		regulator-always-on;
	};

	vdd33a: regulator-vdd33a {
		compatible = "regulator-fixed";
		regulator-name = "vdd33a";
		regulator-always-on;
	};

	wl12xx_vmmc: wl12xx_vmmc {
		pinctrl-names = "default";
		pinctrl-0 = <&wl12xx_gpio>;
		compatible = "regulator-fixed";
		regulator-name = "vwl1271";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;	/* gpio101 */
		startup-delay-us = <70000>;
		enable-active-high;
	};
};

&omap3_pmx_core {
	/* REVISIT: twl gpio0 is mmc0_cd */
	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat3.sdmmc2_dat3 */
			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat4.sdmmc2_dat4 */
			OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat5.sdmmc2_dat5 */
			OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat6.sdmmc2_dat6 */
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat7.sdmmc2_dat7 */
		>;
	};

	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE4)	/* mcbsp1_clkx.gpio_162 WLAN IRQ */
			OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3)	/* mcspi1_cs1.sdmmc3_cmd */
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0)		/* uart1_cts.uart1_cts */
			OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0)		/* uart1_rts.uart1_rts */
			OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)		/* uart1_tx.uart1_tx */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_cts.uart2_cts */
			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)		/* uart2_rts.uart2_rts */
			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)		/* uart2_rx.uart2_rx */
			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* uart3_cts_rctx.uart3_cts_rctx */
			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0)		/* uart3_rts_sd.uart3_rts_sd */
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)		/* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)		/* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	/* wl12xx GPIO output for WLAN_EN */
	wl12xx_gpio: pinmux_wl12xx_gpio {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x211a, PIN_OUTPUT| MUX_MODE4)		/* cam_d2.gpio_101 */
		>;
	};
};

&omap3_pmx_core2 {
	mmc3_2_pins: pinmux_mmc3_2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_clk.sdmmc3_clk */
			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d4.sdmmc3_dat0 */
			OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d5.sdmmc3_dat1 */
			OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d6.sdmmc3_dat2 */
			OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d3.sdmmc3_dat3 */
		>;
	};
};

&omap3_pmx_wkup {
	wlan_host_wkup: pinmux_wlan_host_wkup_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_clkout1.gpio_10 WLAN_HOST_WKUP */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;
	};
};

#include "twl4030.dtsi"

&i2c2 {
	clock-frequency = <400000>;
};

&i2c3 {
	clock-frequency = <400000>;

	/*
	 * TVP5146 Video decoder-in for analog input support.
	 */
	tvp5146@5c {
		compatible = "ti,tvp5146m2";
		reg = <0x5c>;
	};
};

&twl_gpio {
	ti,use-leds;
};

&mmc1 {
	vmmc-supply = <&vmmc1>;
	vqmmc-supply = <&vsim>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
};
/*
&mmc2 {
	vmmc-supply = <&vmmc2>;
	ti,non-removable;
	bus-width = <8>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
};
*/
&mmc3 {
	vmmc-supply = <&wl12xx_vmmc>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc3_pins &mmc3_2_pins>;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio6>;
		interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 162 */
		ref-clock-frequency = <26000000>;
	};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

&uart4 {
	status = "disabled";
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	mode = <3>;
	power = <50>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP3 SoC
 *
 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
 */

#include <dt-bindings/bus/ti-sysc.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/omap.h>

/ {
	compatible = "ti,omap3430", "ti,omap3";
	interrupt-parent = <&intc>;
	#address-cells = <1>;
	#size-cells = <1>;
	chosen { };

	aliases {
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		mmc0 = &mmc1;
		mmc1 = &mmc2;
		mmc2 = &mmc3;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0x0>;

			clocks = <&dpll1_ck>;
			clock-names = "cpu";

			clock-latency = <300000>; /* From omap-cpufreq driver */
		};
	};

	pmu@54000000 {
		compatible = "arm,cortex-a8-pmu";
		reg = <0x54000000 0x800000>;
		interrupts = <3>;
		ti,hwmods = "debugss";
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};

		iva: iva {
			compatible = "ti,iva2.2";
			ti,hwmods = "iva";

			dsp {
				compatible = "ti,omap3-c64";
			};
		};
	};

	/*
	 * XXX: Use a flat representation of the OMAP3 interconnect.
	 * The real OMAP interconnect network is quite complex.
	 * Since it will not bring real advantage to represent that in DT for
	 * the moment, just use a fake OCP bus entry to represent the whole bus
	 * hierarchy.
	 */
	ocp@68000000 {
		compatible = "ti,omap3-l3-smx", "simple-bus";
		reg = <0x68000000 0x10000>;
		interrupts = <9 10>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		l4_core: l4@48000000 {
			compatible = "ti,omap3-l4-core", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x48000000 0x1000000>;

			scm: scm@2000 {
				compatible = "ti,omap3-scm", "simple-bus";
				reg = <0x2000 0x2000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x2000 0x2000>;

				omap3_pmx_core: pinmux@30 {
					compatible = "ti,omap3-padconf",
						     "pinctrl-single";
					reg = <0x30 0x238>;
					#address-cells = <1>;
					#size-cells = <0>;
					#pinctrl-cells = <1>;
					#interrupt-cells = <1>;
					interrupt-controller;
					pinctrl-single,register-width = <16>;
					pinctrl-single,function-mask = <0xff1f>;
				};

				scm_conf: scm_conf@270 {
					compatible = "syscon", "simple-bus";
					reg = <0x270 0x330>;
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x270 0x330>;

					pbias_regulator: pbias_regulator@2b0 {
						compatible = "ti,pbias-omap3", "ti,pbias-omap";
						reg = <0x2b0 0x4>;
						syscon = <&scm_conf>;
						pbias_mmc_reg: pbias_mmc_omap2430 {
							regulator-name = "pbias_mmc_omap2430";
							regulator-min-microvolt = <1800000>;
							regulator-max-microvolt = <3000000>;
						};
					};

					scm_clocks: clocks {
						#address-cells = <1>;
						#size-cells = <0>;
					};
				};

				scm_clockdomains: clockdomains {
				};

				omap3_pmx_wkup: pinmux@a00 {
					compatible = "ti,omap3-padconf",
						     "pinctrl-single";
					reg = <0xa00 0x5c>;
					#address-cells = <1>;
					#size-cells = <0>;
					#pinctrl-cells = <1>;
					#interrupt-cells = <1>;
					interrupt-controller;
					pinctrl-single,register-width = <16>;
					pinctrl-single,function-mask = <0xff1f>;
				};
			};
		};

		aes1_target: target-module@480a6000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x480a6044 0x4>,
			      <0x480a6048 0x4>,
			      <0x480a604c 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			clocks = <&aes1_ick>;
			clock-names = "ick";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x480a6000 0x2000>;

			aes1: aes1@0 {
				compatible = "ti,omap3-aes";
				reg = <0 0x50>;
				interrupts = <0>;
				dmas = <&sdma 9 &sdma 10>;
				dma-names = "tx", "rx";
			};
		};

		aes2_target: target-module@480c5000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x480c5044 0x4>,
			      <0x480c5048 0x4>,
			      <0x480c504c 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			clocks = <&aes2_ick>;
			clock-names = "ick";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x480c5000 0x2000>;

			aes2: aes2@0 {
				compatible = "ti,omap3-aes";
				reg = <0 0x50>;
				interrupts = <0>;
				dmas = <&sdma 65 &sdma 66>;
				dma-names = "tx", "rx";
			};
		};

		prm: prm@48306000 {
			compatible = "ti,omap3-prm";
			reg = <0x48306000 0x4000>;
			interrupts = <11>;

			prm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			prm_clockdomains: clockdomains {
			};
		};

		cm: cm@48004000 {
			compatible = "ti,omap3-cm";
			reg = <0x48004000 0x4000>;

			cm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			cm_clockdomains: clockdomains {
			};
		};

		target-module@48320000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x48320000 0x4>,
			      <0x48320004 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>;
			clocks = <&wkup_32k_fck>, <&omap_32ksync_ick>;
			clock-names = "fck", "ick";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x48320000 0x1000>;

			counter32k: counter@0 {
				compatible = "ti,omap-counter32k";
				reg = <0x0 0x20>;
			};
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,omap3-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

		target-module@48056000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x48056000 0x4>,
			      <0x4805602c 0x4>,
			      <0x48056028 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
					 SYSC_OMAP2_EMUFREE |
					 SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			/* Domains (V, P, C): core, core_pwrdm, core_l3_clkdm */
			clocks = <&core_l3_ick>;
			clock-names = "ick";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x48056000 0x1000>;

			sdma: dma-controller@0 {
				compatible = "ti,omap3430-sdma", "ti,omap-sdma";
				reg = <0x0 0x1000>;
				interrupts = <12>,
					     <13>,
					     <14>,
					     <15>;
				#dma-cells = <1>;
				dma-channels = <32>;
				dma-requests = <96>;
			};
		};

		gpio1: gpio@48310000 {
			compatible = "ti,omap3-gpio";
			reg = <0x48310000 0x200>;
			interrupts = <29>;
			ti,hwmods = "gpio1";
			ti,gpio-always-on;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio2: gpio@49050000 {
			compatible = "ti,omap3-gpio";
			reg = <0x49050000 0x200>;
			interrupts = <30>;
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio3: gpio@49052000 {
			compatible = "ti,omap3-gpio";
			reg = <0x49052000 0x200>;
			interrupts = <31>;
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio4: gpio@49054000 {
			compatible = "ti,omap3-gpio";
			reg = <0x49054000 0x200>;
			interrupts = <32>;
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio5: gpio@49056000 {
			compatible = "ti,omap3-gpio";
			reg = <0x49056000 0x200>;
			interrupts = <33>;
			ti,hwmods = "gpio5";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio6: gpio@49058000 {
			compatible = "ti,omap3-gpio";
			reg = <0x49058000 0x200>;
			interrupts = <34>;
			ti,hwmods = "gpio6";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		uart1: serial@4806a000 {
			compatible = "ti,omap3-uart";
			reg = <0x4806a000 0x2000>;
			interrupts-extended = <&intc 72>;
			dmas = <&sdma 49 &sdma 50>;
			dma-names = "tx", "rx";
			ti,hwmods = "uart1";
			clock-frequency = <48000000>;
		};

		uart2: serial@4806c000 {
			compatible = "ti,omap3-uart";
			reg = <0x4806c000 0x400>;
			interrupts-extended = <&intc 73>;
			dmas = <&sdma 51 &sdma 52>;
			dma-names = "tx", "rx";
			ti,hwmods = "uart2";
			clock-frequency = <48000000>;
		};

		uart3: serial@49020000 {
			compatible = "ti,omap3-uart";
			reg = <0x49020000 0x400>;
			interrupts-extended = <&intc 74>;
			dmas = <&sdma 53 &sdma 54>;
			dma-names = "tx", "rx";
			ti,hwmods = "uart3";
			clock-frequency = <48000000>;
		};

		i2c1: i2c@48070000 {
			compatible = "ti,omap3-i2c";
			reg = <0x48070000 0x80>;
			interrupts = <56>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c1";
		};

		i2c2: i2c@48072000 {
			compatible = "ti,omap3-i2c";
			reg = <0x48072000 0x80>;
			interrupts = <57>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c2";
		};

		i2c3: i2c@48060000 {
			compatible = "ti,omap3-i2c";
			reg = <0x48060000 0x80>;
			interrupts = <61>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c3";
		};

		mailbox: mailbox@48094000 {
			compatible = "ti,omap3-mailbox";
			ti,hwmods = "mailbox";
			reg = <0x48094000 0x200>;
			interrupts = <26>;
			#mbox-cells = <1>;
			ti,mbox-num-users = <2>;
			ti,mbox-num-fifos = <2>;
			mbox_dsp: mbox-dsp {
				ti,mbox-tx = <0 0 0>;
				ti,mbox-rx = <1 0 0>;
			};
		};

		mcspi1: spi@48098000 {
			compatible = "ti,omap2-mcspi";
			reg = <0x48098000 0x100>;
			interrupts = <65>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi1";
			ti,spi-num-cs = <4>;
			dmas = <&sdma 35>,
			       <&sdma 36>,
			       <&sdma 37>,
			       <&sdma 38>,
			       <&sdma 39>,
			       <&sdma 40>,
			       <&sdma 41>,
			       <&sdma 42>;
			dma-names = "tx0", "rx0", "tx1", "rx1",
				    "tx2", "rx2", "tx3", "rx3";
		};

		mcspi2: spi@4809a000 {
			compatible = "ti,omap2-mcspi";
			reg = <0x4809a000 0x100>;
			interrupts = <66>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi2";
			ti,spi-num-cs = <2>;
			dmas = <&sdma 43>,
			       <&sdma 44>,
			       <&sdma 45>,
			       <&sdma 46>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
		};

		mcspi3: spi@480b8000 {
			compatible = "ti,omap2-mcspi";
			reg = <0x480b8000 0x100>;
			interrupts = <91>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi3";
			ti,spi-num-cs = <2>;
			dmas = <&sdma 15>,
			       <&sdma 16>,
			       <&sdma 23>,
			       <&sdma 24>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
		};

		mcspi4: spi@480ba000 {
			compatible = "ti,omap2-mcspi";
			reg = <0x480ba000 0x100>;
			interrupts = <48>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi4";
			ti,spi-num-cs = <1>;
			dmas = <&sdma 70>, <&sdma 71>;
			dma-names = "tx0", "rx0";
		};

		hdqw1w: 1w@480b2000 {
			compatible = "ti,omap3-1w";
			reg = <0x480b2000 0x1000>;
			interrupts = <58>;
			ti,hwmods = "hdq1w";
		};

		mmc1: mmc@4809c000 {
			compatible = "ti,omap3-hsmmc";
			reg = <0x4809c000 0x200>;
			interrupts = <83>;
			ti,hwmods = "mmc1";
			ti,dual-volt;
			dmas = <&sdma 61>, <&sdma 62>;
			dma-names = "tx", "rx";
			pbias-supply = <&pbias_mmc_reg>;
		};

		mmc2: mmc@480b4000 {
			compatible = "ti,omap3-hsmmc";
			reg = <0x480b4000 0x200>;
			interrupts = <86>;
			ti,hwmods = "mmc2";
			dmas = <&sdma 47>, <&sdma 48>;
			dma-names = "tx", "rx";
		};

		mmc3: mmc@480ad000 {
			compatible = "ti,omap3-hsmmc";
			reg = <0x480ad000 0x200>;
			interrupts = <94>;
			ti,hwmods = "mmc3";
			dmas = <&sdma 77>, <&sdma 78>;
			dma-names = "tx", "rx";
		};

		mmu_isp: mmu@480bd400 {
			#iommu-cells = <0>;
			compatible = "ti,omap2-iommu";
			reg = <0x480bd400 0x80>;
			interrupts = <24>;
			ti,hwmods = "mmu_isp";
			ti,#tlb-entries = <8>;
		};

		mmu_iva: mmu@5d000000 {
			#iommu-cells = <0>;
			compatible = "ti,omap2-iommu";
			reg = <0x5d000000 0x80>;
			interrupts = <28>;
			ti,hwmods = "mmu_iva";
			status = "disabled";
		};

		wdt2: wdt@48314000 {
			compatible = "ti,omap3-wdt";
			reg = <0x48314000 0x80>;
			ti,hwmods = "wd_timer2";
		};

		mcbsp1: mcbsp@48074000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x48074000 0xff>;
			reg-names = "mpu";
			interrupts = <16>, /* OCP compliant interrupt */
				     <59>, /* TX interrupt */
				     <60>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp1";
			dmas = <&sdma 31>,
			       <&sdma 32>;
			dma-names = "tx", "rx";
			clocks = <&mcbsp1_fck>;
			clock-names = "fck";
			status = "disabled";
		};

		/* Likely needs to be tagged disabled on HS devices */
		rng_target: target-module@480a0000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x480a003c 0x4>,
			      <0x480a0040 0x4>,
			      <0x480a0044 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>;
			ti,syss-mask = <1>;
			clocks = <&rng_ick>;
			clock-names = "ick";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x480a0000 0x2000>;

			rng: rng@0 {
				compatible = "ti,omap2-rng";
				reg = <0x0 0x2000>;
				interrupts = <52>;
			};
		};

		mcbsp2: mcbsp@49022000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x49022000 0xff>,
			      <0x49028000 0xff>;
			reg-names = "mpu", "sidetone";
			interrupts = <17>, /* OCP compliant interrupt */
				     <62>, /* TX interrupt */
				     <63>, /* RX interrupt */
				     <4>;  /* Sidetone */
			interrupt-names = "common", "tx", "rx", "sidetone";
			ti,buffer-size = <1280>;
			ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
			dmas = <&sdma 33>,
			       <&sdma 34>;
			dma-names = "tx", "rx";
			clocks = <&mcbsp2_fck>, <&mcbsp2_ick>;
			clock-names = "fck", "ick";
			status = "disabled";
		};

		mcbsp3: mcbsp@49024000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x49024000 0xff>,
			      <0x4902a000 0xff>;
			reg-names = "mpu", "sidetone";
			interrupts = <22>, /* OCP compliant interrupt */
				     <89>, /* TX interrupt */
				     <90>, /* RX interrupt */
				     <5>;  /* Sidetone */
			interrupt-names = "common", "tx", "rx", "sidetone";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
			dmas = <&sdma 17>,
			       <&sdma 18>;
			dma-names = "tx", "rx";
			clocks = <&mcbsp3_fck>, <&mcbsp3_ick>;
			clock-names = "fck", "ick";
			status = "disabled";
		};

		mcbsp4: mcbsp@49026000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x49026000 0xff>;
			reg-names = "mpu";
			interrupts = <23>, /* OCP compliant interrupt */
				     <54>, /* TX interrupt */
				     <55>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp4";
			dmas = <&sdma 19>,
			       <&sdma 20>;
			dma-names = "tx", "rx";
			clocks = <&mcbsp4_fck>;
			clock-names = "fck";
			#sound-dai-cells = <0>;
			status = "disabled";
		};

		mcbsp5: mcbsp@48096000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x48096000 0xff>;
			reg-names = "mpu";
			interrupts = <27>, /* OCP compliant interrupt */
				     <81>, /* TX interrupt */
				     <82>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp5";
			dmas = <&sdma 21>,
			       <&sdma 22>;
			dma-names = "tx", "rx";
			clocks = <&mcbsp5_fck>;
			clock-names = "fck";
			status = "disabled";
		};

		sham: sham@480c3000 {
			compatible = "ti,omap3-sham";
			ti,hwmods = "sham";
			reg = <0x480c3000 0x64>;
			interrupts = <49>;
			dmas = <&sdma 69>;
			dma-names = "rx";
		};

		timer1_target: target-module@48318000 {
			compatible = "ti,sysc-omap2-timer", "ti,sysc";
			reg = <0x48318000 0x4>,
			      <0x48318010 0x4>,
			      <0x48318014 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
					 SYSC_OMAP2_EMUFREE |
					 SYSC_OMAP2_ENAWAKEUP |
					 SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			clocks = <&gpt1_fck>, <&gpt1_ick>;
			clock-names = "fck", "ick";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x48318000 0x1000>;

			timer1: timer@0 {
				compatible = "ti,omap3430-timer";
				reg = <0x0 0x80>;
				clocks = <&gpt1_fck>;
				clock-names = "fck";
				interrupts = <37>;
				ti,timer-alwon;
			};
		};

		timer2_target: target-module@49032000 {
			compatible = "ti,sysc-omap2-timer", "ti,sysc";
			reg = <0x49032000 0x4>,
			      <0x49032010 0x4>,
			      <0x49032014 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
					 SYSC_OMAP2_EMUFREE |
					 SYSC_OMAP2_ENAWAKEUP |
					 SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			clocks = <&gpt2_fck>, <&gpt2_ick>;
			clock-names = "fck", "ick";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x49032000 0x1000>;

			timer2: timer@0 {
				compatible = "ti,omap3430-timer";
				reg = <0 0x400>;
				interrupts = <38>;
			};
		};

		timer3: timer@49034000 {
			compatible = "ti,omap3430-timer";
			reg = <0x49034000 0x400>;
			interrupts = <39>;
			ti,hwmods = "timer3";
		};

		timer4: timer@49036000 {
			compatible = "ti,omap3430-timer";
			reg = <0x49036000 0x400>;
			interrupts = <40>;
			ti,hwmods = "timer4";
		};

		timer5: timer@49038000 {
			compatible = "ti,omap3430-timer";
			reg = <0x49038000 0x400>;
			interrupts = <41>;
			ti,hwmods = "timer5";
			ti,timer-dsp;
		};

		timer6: timer@4903a000 {
			compatible = "ti,omap3430-timer";
			reg = <0x4903a000 0x400>;
			interrupts = <42>;
			ti,hwmods = "timer6";
			ti,timer-dsp;
		};

		timer7: timer@4903c000 {
			compatible = "ti,omap3430-timer";
			reg = <0x4903c000 0x400>;
			interrupts = <43>;
			ti,hwmods = "timer7";
			ti,timer-dsp;
		};

		timer8: timer@4903e000 {
			compatible = "ti,omap3430-timer";
			reg = <0x4903e000 0x400>;
			interrupts = <44>;
			ti,hwmods = "timer8";
			ti,timer-pwm;
			ti,timer-dsp;
		};

		timer9: timer@49040000 {
			compatible = "ti,omap3430-timer";
			reg = <0x49040000 0x400>;
			interrupts = <45>;
			ti,hwmods = "timer9";
			ti,timer-pwm;
		};

		timer10: timer@48086000 {
			compatible = "ti,omap3430-timer";
			reg = <0x48086000 0x400>;
			interrupts = <46>;
			ti,hwmods = "timer10";
			ti,timer-pwm;
		};

		timer11: timer@48088000 {
			compatible = "ti,omap3430-timer";
			reg = <0x48088000 0x400>;
			interrupts = <47>;
			ti,hwmods = "timer11";
			ti,timer-pwm;
		};

		timer12_target: target-module@48304000 {
			compatible = "ti,sysc-omap2-timer", "ti,sysc";
			reg = <0x48304000 0x4>,
			      <0x48304010 0x4>,
			      <0x48304014 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
					 SYSC_OMAP2_EMUFREE |
					 SYSC_OMAP2_ENAWAKEUP |
					 SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			clocks = <&gpt12_fck>, <&gpt12_ick>;
			clock-names = "fck", "ick";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x48304000 0x1000>;

			timer12: timer@0 {
				compatible = "ti,omap3430-timer";
				reg = <0 0x400>;
				interrupts = <95>;
				ti,timer-alwon;
				ti,timer-secure;
			};
		};

		usbhstll: usbhstll@48062000 {
			compatible = "ti,usbhs-tll";
			reg = <0x48062000 0x1000>;
			interrupts = <78>;
			ti,hwmods = "usb_tll_hs";
		};

		usbhshost: usbhshost@48064000 {
			compatible = "ti,usbhs-host";
			reg = <0x48064000 0x400>;
			ti,hwmods = "usb_host_hs";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			usbhsohci: ohci@48064400 {
				compatible = "ti,ohci-omap3";
				reg = <0x48064400 0x400>;
				interrupts = <76>;
				remote-wakeup-connected;
			};

			usbhsehci: ehci@48064800 {
				compatible = "ti,ehci-omap";
				reg = <0x48064800 0x400>;
				interrupts = <77>;
			};
		};

		gpmc: gpmc@6e000000 {
			compatible = "ti,omap3430-gpmc";
			ti,hwmods = "gpmc";
			reg = <0x6e000000 0x02d0>;
			interrupts = <20>;
			dmas = <&sdma 4>;
			dma-names = "rxtx";
			gpmc,num-cs = <8>;
			gpmc,num-waitpins = <4>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupt-controller;
			#interrupt-cells = <2>;
			gpio-controller;
			#gpio-cells = <2>;
		};

		usb_otg_target: target-module@480ab000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x480ab400 0x4>,
			      <0x480ab404 0x4>,
			      <0x480ab408 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
					 SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			/* Clock defined in the SoC specific dtsi file */
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x480ab000 0x1000>;

			usb_otg_hs: usb@0 {
				compatible = "ti,omap3-musb";
				reg = <0 0x1000>;
				interrupts = <92>, <93>;
				interrupt-names = "mc", "dma";
				multipoint = <1>;
				num-eps = <16>;
				ram-bits = <12>;
			};
		};

		dss: dss@48050000 {
			compatible = "ti,omap3-dss";
			reg = <0x48050000 0x200>;
			status = "disabled";
			ti,hwmods = "dss_core";
			clocks = <&dss1_alwon_fck>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			dispc@48050400 {
				compatible = "ti,omap3-dispc";
				reg = <0x48050400 0x400>;
				interrupts = <25>;
				ti,hwmods = "dss_dispc";
				clocks = <&dss1_alwon_fck>;
				clock-names = "fck";
			};

			dsi: encoder@4804fc00 {
				compatible = "ti,omap3-dsi";
				reg = <0x4804fc00 0x200>,
				      <0x4804fe00 0x40>,
				      <0x4804ff00 0x20>;
				reg-names = "proto", "phy", "pll";
				interrupts = <25>;
				status = "disabled";
				ti,hwmods = "dss_dsi1";
				clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
				clock-names = "fck", "sys_clk";

				#address-cells = <1>;
				#size-cells = <0>;
			};

			rfbi: encoder@48050800 {
				compatible = "ti,omap3-rfbi";
				reg = <0x48050800 0x100>;
				status = "disabled";
				ti,hwmods = "dss_rfbi";
				clocks = <&dss1_alwon_fck>, <&dss_ick>;
				clock-names = "fck", "ick";
			};

			venc: encoder@48050c00 {
				compatible = "ti,omap3-venc";
				reg = <0x48050c00 0x100>;
				status = "disabled";
				ti,hwmods = "dss_venc";
				clocks = <&dss_tv_fck>;
				clock-names = "fck";
			};
		};

		ssi: ssi-controller@48058000 {
			compatible = "ti,omap3-ssi";
			ti,hwmods = "ssi";

			status = "disabled";

			reg = <0x48058000 0x1000>,
			      <0x48059000 0x1000>;
			reg-names = "sys",
				    "gdd";

			interrupts = <71>;
			interrupt-names = "gdd_mpu";

			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			ssi_port1: ssi-port@4805a000 {
				compatible = "ti,omap3-ssi-port";

				reg = <0x4805a000 0x800>,
				      <0x4805a800 0x800>;
				reg-names = "tx",
					    "rx";

				interrupts = <67>,
					     <68>;
			};

			ssi_port2: ssi-port@4805b000 {
				compatible = "ti,omap3-ssi-port";

				reg = <0x4805b000 0x800>,
				      <0x4805b800 0x800>;
				reg-names = "tx",
					    "rx";

				interrupts = <69>,
					     <70>;
			};
		};
	};
};

#include "omap3xxx-clocks.dtsi"

/* Preferred always-on timer for clockevent. Some boards must use dmtimer12 */
&timer1_target {
	ti,no-reset-on-init;
	ti,no-idle;
	timer@0 {
		assigned-clocks = <&gpt1_fck>;
		assigned-clock-parents = <&omap_32k_fck>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap34xx.dtsi"

/ {
	model = "TI OMAP3430 SDP";
	compatible = "ti,omap3430-sdp", "ti,omap3430", "ti,omap3";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&mmc1 {
	vmmc-supply = <&vmmc1>;
	vqmmc-supply = <&vsim>;
	/*
	 * S6-3 must be in ON position for 8 bit mode to function
	 * Else, use 4 bit mode
	 */
	bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&gpmc {
	ranges = <0 0 0x10000000 0x08000000>,
		 <1 0 0x28000000 0x1000000>,	/* CS1: 16MB for NAND */
		 <2 0 0x20000000 0x1000000>;	/* CS2: 16MB for OneNAND */

	nor@0,0 {
		compatible = "cfi-flash";
		linux,mtd-name = "intel,pf48f6000m0y1be";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0 0 0x08000000>;
		bank-width = <2>;

		gpmc,mux-add-data = <2>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <186>;
		gpmc,cs-wr-off-ns = <186>;
		gpmc,adv-on-ns = <12>;
		gpmc,adv-rd-off-ns = <48>;
		gpmc,adv-wr-off-ns = <48>;
		gpmc,oe-on-ns = <54>;
		gpmc,oe-off-ns = <168>;
		gpmc,we-on-ns = <54>;
		gpmc,we-off-ns = <168>;
		gpmc,rd-cycle-ns = <186>;
		gpmc,wr-cycle-ns = <186>;
		gpmc,access-ns = <114>;
		gpmc,page-burst-access-ns = <6>;
		gpmc,bus-turnaround-ns = <12>;
		gpmc,cycle2cycle-delay-ns = <18>;
		gpmc,wr-data-mux-bus-ns = <90>;
		gpmc,wr-access-ns = <186>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-diffcsen;

		partition@0 {
			label = "bootloader-nor";
			reg = <0 0x40000>;
		};
		partition@40000 {
			label = "params-nor";
			reg = <0x40000 0x40000>;
		};
		partition@80000 {
			label = "kernel-nor";
			reg = <0x80000 0x200000>;
		};
		partition@280000 {
			label = "filesystem-nor";
			reg = <0x240000 0x7d80000>;
		};
	};

	nand@1,0 {
		compatible = "ti,omap2-nand";
		reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		linux,mtd-name = "micron,mt29f1g08abb";
		#address-cells = <1>;
		#size-cells = <1>;
		ti,nand-ecc-opt = "sw";
		nand-bus-width = <8>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <36>;
		gpmc,cs-wr-off-ns = <36>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <24>;
		gpmc,adv-wr-off-ns = <36>;
		gpmc,oe-on-ns = <6>;
		gpmc,oe-off-ns = <48>;
		gpmc,we-on-ns = <6>;
		gpmc,we-off-ns = <30>;
		gpmc,rd-cycle-ns = <72>;
		gpmc,wr-cycle-ns = <72>;
		gpmc,access-ns = <54>;
		gpmc,wr-access-ns = <30>;

		partition@0 {
			label = "xloader-nand";
			reg = <0 0x80000>;
		};
		partition@80000 {
			label = "bootloader-nand";
			reg = <0x80000 0x140000>;
		};
		partition@1c0000 {
			label = "params-nand";
			reg = <0x1c0000 0xc0000>;
		};
		partition@280000 {
			label = "kernel-nand";
			reg = <0x280000 0x500000>;
		};
		partition@780000 {
			label = "filesystem-nand";
			reg = <0x780000 0x7880000>;
		};
	};

	onenand@2,0 {
		linux,mtd-name = "samsung,kfm2g16q2m-deb8";
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "ti,omap2-onenand";
		reg = <2 0 0x20000>;	/* CS2, offset 0, IO size 4 */

		gpmc,device-width = <2>;
		gpmc,mux-add-data = <2>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <84>;
		gpmc,cs-wr-off-ns = <72>;
		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <18>;
		gpmc,adv-wr-off-ns = <18>;
		gpmc,oe-on-ns = <30>;
		gpmc,oe-off-ns = <84>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <42>;
		gpmc,rd-cycle-ns = <108>;
		gpmc,wr-cycle-ns = <96>;
		gpmc,access-ns = <78>;
		gpmc,wr-data-mux-bus-ns = <30>;

		partition@0 {
			label = "xloader-onenand";
			reg = <0 0x80000>;
		};
		partition@80000 {
			label = "bootloader-onenand";
			reg = <0x80000 0x40000>;
		};
		partition@c0000 {
			label = "params-onenand";
			reg = <0xc0000 0x20000>;
		};
		partition@e0000 {
			label = "kernel-onenand";
			reg = <0xe0000 0x200000>;
		};
		partition@2e0000 {
			label = "filesystem-onenand";
			reg = <0x2e0000 0xfd20000>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP3430 ES1 clock data
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 */
&cm_clocks {
	gfx_l3_ck: gfx_l3_ck@b10 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&l3_ick>;
		reg = <0x0b10>;
		ti,bit-shift = <0>;
	};

	gfx_l3_fck: gfx_l3_fck@b40 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clocks = <&l3_ick>;
		ti,max-div = <7>;
		reg = <0x0b40>;
		ti,index-starts-at-one;
	};

	gfx_l3_ick: gfx_l3_ick {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&gfx_l3_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	gfx_cg1_ck: gfx_cg1_ck@b00 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&gfx_l3_fck>;
		reg = <0x0b00>;
		ti,bit-shift = <1>;
	};

	gfx_cg2_ck: gfx_cg2_ck@b00 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&gfx_l3_fck>;
		reg = <0x0b00>;
		ti,bit-shift = <2>;
	};

	clock@a00 {
		compatible = "ti,clksel";
		reg = <0xa00>;
		#clock-cells = <2>;
		#address-cells = <0>;

		d2d_26m_fck: clock-d2d-26m-fck {
			#clock-cells = <0>;
			compatible = "ti,wait-gate-clock";
			clock-output-names = "d2d_26m_fck";
			clocks = <&sys_ck>;
			ti,bit-shift = <3>;
		};

		fshostusb_fck: clock-fshostusb-fck {
			#clock-cells = <0>;
			compatible = "ti,wait-gate-clock";
			clock-output-names = "fshostusb_fck";
			clocks = <&core_48m_fck>;
			ti,bit-shift = <5>;
		};

		ssi_ssr_gate_fck_3430es1: clock-ssi-ssr-gate-fck-3430es1 {
			#clock-cells = <0>;
			compatible = "ti,composite-no-wait-gate-clock";
			clock-output-names = "ssi_ssr_gate_fck_3430es1";
			clocks = <&corex2_fck>;
			ti,bit-shift = <0>;
		};
	};

	clock@a40 {
		compatible = "ti,clksel";
		reg = <0xa40>;
		#clock-cells = <2>;
		#address-cells = <0>;

		ssi_ssr_div_fck_3430es1: clock-ssi-ssr-div-fck-3430es1 {
			#clock-cells = <0>;
			compatible = "ti,composite-divider-clock";
			clock-output-names = "ssi_ssr_div_fck_3430es1";
			clocks = <&corex2_fck>;
			ti,bit-shift = <8>;
			ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
		};

		usb_l4_div_ick: clock-usb-l4-div-ick {
			#clock-cells = <0>;
			compatible = "ti,composite-divider-clock";
			clock-output-names = "usb_l4_div_ick";
			clocks = <&l4_ick>;
			ti,bit-shift = <4>;
			ti,max-div = <1>;
			ti,index-starts-at-one;
		};
	};

	ssi_ssr_fck: ssi_ssr_fck_3430es1 {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>;
	};

	ssi_sst_fck: ssi_sst_fck_3430es1 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&ssi_ssr_fck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	clock@a10 {
		compatible = "ti,clksel";
		reg = <0xa10>;
		#clock-cells = <2>;
		#address-cells = <0>;

		hsotgusb_ick_3430es1: clock-hsotgusb-ick-3430es1 {
			#clock-cells = <0>;
			compatible = "ti,omap3-no-wait-interface-clock";
			clock-output-names = "hsotgusb_ick_3430es1";
			clocks = <&core_l3_ick>;
			ti,bit-shift = <4>;
		};

		fac_ick: clock-fac-ick {
			#clock-cells = <0>;
			compatible = "ti,omap3-interface-clock";
			clock-output-names = "fac_ick";
			clocks = <&core_l4_ick>;
			ti,bit-shift = <8>;
		};

		ssi_ick: clock-ssi-ick-3430es1 {
			#clock-cells = <0>;
			compatible = "ti,omap3-no-wait-interface-clock";
			clock-output-names = "ssi_ick_3430es1";
			clocks = <&ssi_l4_ick>;
			ti,bit-shift = <0>;
		};

		usb_l4_gate_ick: clock-usb-l4-gate-ick {
			#clock-cells = <0>;
			compatible = "ti,composite-interface-clock";
			clock-output-names = "usb_l4_gate_ick";
			clocks = <&l4_ick>;
			ti,bit-shift = <5>;
		};
	};

	ssi_l4_ick: ssi_l4_ick {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&l4_ick>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	usb_l4_ick: usb_l4_ick {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&usb_l4_gate_ick>, <&usb_l4_div_ick>;
	};

	clock@e00 {
		compatible = "ti,clksel";
		reg = <0xe00>;
		#clock-cells = <2>;
		#address-cells = <0>;

		dss1_alwon_fck: clock-dss1-alwon-fck-3430es1 {
			#clock-cells = <0>;
			compatible = "ti,gate-clock";
			clock-output-names = "dss1_alwon_fck_3430es1";
			clocks = <&dpll4_m4x2_ck>;
			ti,bit-shift = <0>;
			ti,set-rate-parent;
		};
	};

	dss_ick: dss_ick_3430es1@e10 {
		#clock-cells = <0>;
		compatible = "ti,omap3-no-wait-interface-clock";
		clocks = <&l4_ick>;
		reg = <0x0e10>;
		ti,bit-shift = <0>;
	};
};

&cm_clockdomains {
	core_l3_clkdm: core_l3_clkdm {
		compatible = "ti,clockdomain";
		clocks = <&sdrc_ick>, <&hsotgusb_ick_3430es1>;
	};

	gfx_3430es1_clkdm: gfx_3430es1_clkdm {
		compatible = "ti,clockdomain";
		clocks = <&gfx_l3_ck>, <&gfx_cg1_ck>, <&gfx_cg2_ck>;
	};

	dss_clkdm: dss_clkdm {
		compatible = "ti,clockdomain";
		clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>,
			 <&dss1_alwon_fck>, <&dss_ick>;
	};

	d2d_clkdm: d2d_clkdm {
		compatible = "ti,clockdomain";
		clocks = <&d2d_26m_fck>;
	};

	core_l4_clkdm: core_l4_clkdm {
		compatible = "ti,clockdomain";
		clocks = <&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>,
			 <&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>,
			 <&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>,
			 <&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>,
			 <&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>,
			 <&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>,
			 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
			 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
			 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
			 <&fshostusb_fck>, <&fac_ick>, <&ssi_ick>;
	};
};