code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 */

/* AM43x EPOS EVM */

/dts-v1/;

#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/sound/tlv320aic31xx.h>

/ {
	model = "TI AM43x EPOS EVM";
	compatible = "ti,am43x-epos-evm","ti,am438x","ti,am43";

	aliases {
		display0 = &lcd0;
	};

	chosen {
		stdout-path = &uart0;
	};

	vmmcsd_fixed: fixedregulator-sd {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lcd0: display {
		compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
		label = "lcd";

		backlight = <&lcd_bl>;

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_out>;
			};
		};
	};

	matrix_keypad: matrix_keypad0 {
		compatible = "gpio-matrix-keypad";
		debounce-delay-ms = <5>;
		col-scan-delay-us = <2>;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&matrix_keypad_default>;
		pinctrl-1 = <&matrix_keypad_sleep>;
		wakeup-source;

		row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH		/* Bank0, pin12 */
			     &gpio0 13 GPIO_ACTIVE_HIGH		/* Bank0, pin13 */
			     &gpio0 14 GPIO_ACTIVE_HIGH		/* Bank0, pin14 */
			     &gpio0 15 GPIO_ACTIVE_HIGH>;	/* Bank0, pin15 */

		col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH		/* Bank3, pin9 */
			     &gpio3 10 GPIO_ACTIVE_HIGH		/* Bank3, pin10 */
			     &gpio2 18 GPIO_ACTIVE_HIGH		/* Bank2, pin18 */
			     &gpio2 19 GPIO_ACTIVE_HIGH>;	/* Bank2, pin19 */

		linux,keymap = <0x00000201	/* P1 */
			0x01000204	/* P4 */
			0x02000207	/* P7 */
			0x0300020a	/* NUMERIC_STAR */
			0x00010202	/* P2 */
			0x01010205	/* P5 */
			0x02010208	/* P8 */
			0x03010200	/* P0 */
			0x00020203	/* P3 */
			0x01020206	/* P6 */
			0x02020209	/* P9 */
			0x0302020b	/* NUMERIC_POUND */
			0x00030067	/* UP */
			0x0103006a	/* RIGHT */
			0x0203006c	/* DOWN */
			0x03030069>;	/* LEFT */
	};

	lcd_bl: backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
		brightness-levels = <0 51 53 56 62 75 101 152 255>;
		default-brightness-level = <8>;
	};

	sound0: sound0 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "AM43-EPOS-EVM";
		simple-audio-card,widgets =
			"Microphone", "Microphone Jack",
			"Headphone", "Headphone Jack",
			"Speaker", "Speaker";
		simple-audio-card,routing =
			"MIC1LP", "Microphone Jack",
			"MIC1RP", "Microphone Jack",
			"MIC1LP", "MICBIAS",
			"MIC1RP", "MICBIAS",
			"Headphone Jack", "HPL",
			"Headphone Jack", "HPR",
			"Speaker", "SPL",
			"Speaker", "SPR";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <&sound0_master>;
		simple-audio-card,frame-master = <&sound0_master>;
		simple-audio-card,bitclock-inversion;

		simple-audio-card,cpu {
			sound-dai = <&mcasp1>;
			system-clock-frequency = <12000000>;
		};

		sound0_master: simple-audio-card,codec {
			sound-dai = <&tlv320aic3111>;
			system-clock-frequency = <12000000>;
		};
	};

	audio_mstrclk: clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <12000000>;
	};
};

&am43xx_pinmux {
		pinctrl-names = "default";
		pinctrl-0 = <&unused_pins>;

		unused_pins: unused_pins {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x848, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x850, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x858, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x860, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x864, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x868, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x86c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x878, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x91c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x920, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x9e0, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA0c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA38, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA3c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA40, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA44, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA48, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA4c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA50, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA54, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA58, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA5c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA60, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA64, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0xA68, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA6C, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA74, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0xA78, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
			>;
		};

		cpsw_default: cpsw_default {
			pinctrl-single,pins = <
				/* Slave 1 */
				AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_crs.rmii1_crs */
				AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxerr.rmii1_rxerr */
				AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* mii1_txen.rmii1_txen */
				AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxdv.rmii1_rxdv */
				AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* mii1_txd1.rmii1_txd1 */
				AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* mii1_txd0.rmii1_txd0 */
				AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxd1.rmii1_rxd1 */
				AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxd0.rmii1_rxd0 */
				AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* rmii1_refclk.rmii1_refclk */
			>;
		};

		cpsw_sleep: cpsw_sleep {
			pinctrl-single,pins = <
				/* Slave 1 reset value */
				AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
			>;
		};

		davinci_mdio_default: davinci_mdio_default {
			pinctrl-single,pins = <
				/* MDIO */
				AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
				AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
			>;
		};

		davinci_mdio_sleep: davinci_mdio_sleep {
			pinctrl-single,pins = <
				/* MDIO reset value */
				AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			>;
		};

		i2c0_pins: pinmux_i2c0_pins {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
				AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
			>;
		};

		nand_flash_x8_default: nand_flash_x8_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a0.SELQSPIorNAND/GPIO */
				AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
				AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
				AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
				AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
				AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
				AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
				AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
				AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
				AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
				AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpmc_wpn */
				AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
				AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
				AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
				AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
				AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
			>;
		};

		nand_flash_x8_sleep: nand_flash_x8_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x840, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x800, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x804, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x808, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x80c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x810, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x814, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x818, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x81c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x870, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x874, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
			>;
		};

		ecap0_pins_default: backlight_pins_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x964, MUX_MODE0)         /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
			>;
		};

		ecap0_pins_sleep: backlight_pins_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x964, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
			>;
		};

		i2c2_pins: pinmux_i2c2_pins {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_sda.i2c2_sda */
				AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_scl.i2c2_scl */
			>;
		};

		spi0_pins_default: pinmux_spi0_pins_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0)           /* spi0_clk.spi0_clk */
				AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0)           /* spi0_d0.spi0_d0 */
				AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0)           /* spi0_d1.spi0_d1 */
				AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0)          /* spi0_cs0.spi0_cs0 */
			>;
		};

		spi0_pins_sleep: pinmux_spi0_pins_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x950, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x954, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x958, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x95c, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
			>;
		};

		spi1_pins_default: pinmux_spi1_pins_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3)           /* mcasp0_aclkx.spi1_clk */
				AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3)           /* mcasp0_fsx.spi1_d0 */
				AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3)           /* mcasp0_axr0.spi1_d1 */
				AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)          /* mcasp0_ahclkr.spi1_cs0 */
			>;
		};

		spi1_pins_sleep: pinmux_spi1_pins_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x990, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x994, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x998, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x99c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
			>;
		};

		mmc1_pins_default: pinmux_mmc1_pins_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
			>;
		};

		mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x960, DS0_PIN_OUTPUT_PULLUP | PIN_INPUT | MUX_MODE7)
			>;
		};

		matrix_keypad_default: matrix_keypad_default {
			pinctrl-single,pins = <
				 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7)          /* mii1_tx_clk.gpio3_9 */
				 AM4372_IOPAD(0x930, PIN_OUTPUT | MUX_MODE7)          /* mii1_rx_clk.gpio3_10 */
				 AM4372_IOPAD(0x934, PIN_OUTPUT | MUX_MODE7)          /* mii1_rxd3.gpio2_18 */
				 AM4372_IOPAD(0x938, PIN_OUTPUT | MUX_MODE7)          /* mii1_rxd2.gpio2_19 */
				 AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7)  /* uart1_ctsn.gpio0_12 */
				 AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7)  /* uart1_rtsn.gpio0_13 */
				 AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7)  /* uart1_rxd.gpio0_14 */
				 AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7)  /* uart1_txd.gpio0_15 */
			>;
		};

		matrix_keypad_sleep: matrix_keypad_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7)
			>;
		};

		qspi1_pins_default: qspi1_pins_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
				AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
				AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
				AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
				AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
				AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
			>;
		};

		qspi1_pins_sleep: qspi1_pins_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x888, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
				AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
			>;
		};

		pixcir_ts_pins_default: pixcir_ts_pins_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_a1.gpio1_17 */
			>;
		};

		pixcir_ts_pins_sleep: pixcir_ts_pins_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x844, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a1.gpio1_17 */
			>;
		};

		hdq_pins: pinmux_hdq_pins {
			pinctrl-single,pins = <
				AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1)    /* cam1_wen.hdq_gpio */
			>;
		};

		dss_pins: dss_pins {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
				AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
				AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
				AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
				AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
				AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
				AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
				AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
				AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
				AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
				AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
				AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
				AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
				AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
				AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
			>;
		};

		display_mux_pins: display_mux_pins {
			pinctrl-single,pins = <
				/* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
				AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
			>;
		};

		vpfe1_pins_default: vpfe1_pins_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0 */
				AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0 */
				AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0 */
				AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0 */
				AM4372_IOPAD(0x9dc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0 */
				AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0 */
				AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0 */
				AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0 */
				AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0 */
				AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0 */
				AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0 */
				AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0 */
				AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0 */
			>;
		};

		vpfe1_pins_sleep: vpfe1_pins_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			>;
		};

		uart0_pins_default: uart0_pins_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
				AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
				AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
				AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)	/* uart0_txd.uart0_txd */
			>;
		};

		uart0_pins_sleep: uart0_pins_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
				AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
				AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
			>;
		};

		usb2_phy1_default: usb2_phy1_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0xac0, PIN_INPUT_PULLDOWN | MUX_MODE0)
			>;
		};

		usb2_phy1_sleep: usb2_phy1_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0xac0, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
			>;
		};

		usb2_phy2_default: usb2_phy2_default {
			pinctrl-single,pins = <
				AM4372_IOPAD(0xac4, PIN_INPUT_PULLDOWN | MUX_MODE0)
			>;
		};

		usb2_phy2_sleep: usb2_phy2_sleep {
			pinctrl-single,pins = <
				AM4372_IOPAD(0xac4, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
			>;
		};

		mcasp1_pins: mcasp1_pins {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
				AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
				AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
				AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
			>;
		};

		mcasp1_sleep_pins: mcasp1_sleep_pins {
			pinctrl-single,pins = <
				AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
				AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
			>;
		};
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc1_pins_default>;
	pinctrl-1 = <&mmc1_pins_sleep>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&mac_sw {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	status = "okay";
};

&davinci_mdio_sw {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;

	ethphy0: ethernet-phy@16 {
		reg = <16>;
	};
};

&cpsw_port1 {
	phy-handle = <&ethphy0>;
	phy-mode = "rmii";
	phys = <&phy_gmii_sel 1 1>;
	ti,dual-emac-pvid = <1>;
};

&cpsw_port2 {
	status = "disabled";
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <100000>;

	tps65218: tps65218@24 {
		reg = <0x24>;
		compatible = "ti,tps65218";
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
		interrupt-controller;
		#interrupt-cells = <2>;

		dcdc1: regulator-dcdc1 {
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1144000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc2: regulator-dcdc2 {
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3: regulator-dcdc3 {
			regulator-name = "vdcdc3";
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
			regulator-state-disk {
				regulator-off-in-suspend;
			};
		};

		dcdc4: regulator-dcdc4 {
			regulator-name = "vdcdc4";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc5: regulator-dcdc5 {
			regulator-name = "v1_0bat";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc6: regulator-dcdc6 {
			regulator-name = "v1_8bat";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo1: regulator-ldo1 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
		};
	};

	at24@50 {
		compatible = "atmel,24c256";
		pagesize = <64>;
		reg = <0x50>;
	};

	pixcir_ts@5c {
		compatible = "pixcir,pixcir_tangoc";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&pixcir_ts_pins_default>;
		pinctrl-1 = <&pixcir_ts_pins_sleep>;

		reg = <0x5c>;
		interrupt-parent = <&gpio1>;
		interrupts = <17 IRQ_TYPE_EDGE_FALLING>;

		attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;

		touchscreen-size-x = <1024>;
		touchscreen-size-y = <600>;
	};

	tlv320aic3111: tlv320aic3111@18 {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic3111";
		reg = <0x18>;
		status = "okay";

		ai31xx-micbias-vg = <MICBIAS_2_0V>;

		/* Regulators */
		HPVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
		SPRVDD-supply = <&vbat>; /* vbat */
		SPLVDD-supply = <&vbat>; /* vbat */
		AVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
		IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
		DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
	};

	ov2659@30 {
		compatible = "ovti,ov2659";
		reg = <0x30>;

		clocks = <&audio_mstrclk>;
		clock-names = "xvclk";

		port {
			ov2659_1: endpoint {
				remote-endpoint = <&vpfe1_ep>;
				link-frequencies = /bits/ 64 <70000000>;
			};
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
	status = "okay";
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio2 {
	pinctrl-names = "default";
	pinctrl-0 = <&display_mux_pins>;
	status = "okay";

	sel-lcd-hdmi-hog {
		/*
		 * SelLCDorHDMI selects between display and audio paths:
		 * Low: HDMI display with audio via HDMI
		 * High: LCD display with analog audio via aic3111 codec
		 */
		gpio-hog;
		gpios = <1 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "SelLCDorHDMI";
	};
};

&gpio3 {
	status = "okay";
};

&elm {
	status = "okay";
};

&gpmc {
	status = "okay";	/* Disable QSPI when enabling GPMC (NAND) */
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&nand_flash_x8_default>;
	pinctrl-1 = <&nand_flash_x8_sleep>;
	ranges = <0 0 0x08000000 0x01000000>;	/* CS0 space. Min partition = 16MB */
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;	/* gpmc_wait0 */
		ti,nand-xfer-type = "prefetch-dma";
		ti,nand-ecc-opt = "bch16";
		ti,elm-id = <&elm>;
		nand-bus-width = <8>;
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
		gpmc,cs-wr-off-ns = <40>;
		gpmc,adv-on-ns = <0>;  /* cs-on-ns */
		gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
		gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
		gpmc,we-on-ns = <0>;   /* cs-on-ns */
		gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
		gpmc,oe-on-ns = <3>;  /* cs-on-ns + tRR + 2 */
		gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
		gpmc,access-ns = <30>; /* tCEA + 4*/
		gpmc,rd-cycle-ns = <40>;
		gpmc,wr-cycle-ns = <40>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		/* MTD partition table */
		/* All SPL-* partitions are sized to minimal length
		 * which can be independently programmable. For
		 * NAND flash this is equal to size of erase-block */
		#address-cells = <1>;
		#size-cells = <1>;
		partition@0 {
			label = "NAND.SPL";
			reg = <0x00000000 0x00040000>;
		};
		partition@1 {
			label = "NAND.SPL.backup1";
			reg = <0x00040000 0x00040000>;
		};
		partition@2 {
			label = "NAND.SPL.backup2";
			reg = <0x00080000 0x00040000>;
		};
		partition@3 {
			label = "NAND.SPL.backup3";
			reg = <0x000C0000 0x00040000>;
		};
		partition@4 {
			label = "NAND.u-boot-spl-os";
			reg = <0x00100000 0x00080000>;
		};
		partition@5 {
			label = "NAND.u-boot";
			reg = <0x00180000 0x00100000>;
		};
		partition@6 {
			label = "NAND.u-boot-env";
			reg = <0x00280000 0x00040000>;
		};
		partition@7 {
			label = "NAND.u-boot-env.backup1";
			reg = <0x002C0000 0x00040000>;
		};
		partition@8 {
			label = "NAND.kernel";
			reg = <0x00300000 0x00700000>;
		};
		partition@9 {
			label = "NAND.file-system";
			reg = <0x00a00000 0x1f600000>;
		};
	};
};

&epwmss0 {
	status = "okay";
};

&rtc_target {
	status = "disabled";
};

&tscadc {
	status = "okay";

	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&ecap0 {
		status = "okay";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&ecap0_pins_default>;
		pinctrl-1 = <&ecap0_pins_sleep>;
};

&spi0 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&spi0_pins_default>;
	pinctrl-1 = <&spi0_pins_sleep>;
	ti,pindir-d0-out-d1-in;
};

&spi1 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&spi1_pins_default>;
	pinctrl-1 = <&spi1_pins_sleep>;
	ti,pindir-d0-out-d1-in;
};

&usb2_phy1 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&usb2_phy1_default>;
	pinctrl-1 = <&usb2_phy1_sleep>;
};

&usb1 {
	dr_mode = "otg";
	status = "okay";
};

&usb2_phy2 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&usb2_phy2_default>;
	pinctrl-1 = <&usb2_phy2_sleep>;
};

&usb2 {
	dr_mode = "host";
	status = "okay";
};

&qspi {
	status = "disabled";	/* Disable GPMC (NAND) when enabling QSPI */
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&qspi1_pins_default>;
	pinctrl-1 = <&qspi1_pins_sleep>;

	spi-max-frequency = <48000000>;
	flash@0 {
		compatible = "mx66l51235l";
		spi-max-frequency = <48000000>;
		reg = <0>;
		spi-cpol;
		spi-cpha;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		#address-cells = <1>;
		#size-cells = <1>;

		/* MTD partition table.
		 * The ROM checks the first 512KiB
		 * for a valid file to boot(XIP).
		 */
		partition@0 {
			label = "QSPI.U_BOOT";
			reg = <0x00000000 0x00080000>;
		};
		partition@1 {
			label = "QSPI.U_BOOT.backup";
			reg = <0x00080000 0x00080000>;
		};
		partition@2 {
			label = "QSPI.U-BOOT-SPL_OS";
			reg = <0x00100000 0x00010000>;
		};
		partition@3 {
			label = "QSPI.U_BOOT_ENV";
			reg = <0x00110000 0x00010000>;
		};
		partition@4 {
			label = "QSPI.U-BOOT-ENV.backup";
			reg = <0x00120000 0x00010000>;
		};
		partition@5 {
			label = "QSPI.KERNEL";
			reg = <0x00130000 0x0800000>;
		};
		partition@6 {
			label = "QSPI.FILESYSTEM";
			reg = <0x00930000 0x36D0000>;
		};
	};
};

&hdq {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&hdq_pins>;
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_pins>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};

&vpfe1 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&vpfe1_pins_default>;
	pinctrl-1 = <&vpfe1_pins_sleep>;

	port {
		vpfe1_ep: endpoint {
			remote-endpoint = <&ov2659_1>;
			ti,am437x-vpfe-interface = <0>;
			bus-width = <8>;
			hsync-active = <0>;
			vsync-active = <0>;
		};
	};
};

&uart0 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart0_pins_default>;
	pinctrl-1 = <&uart0_pins_sleep>;
};

&mcasp1 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mcasp1_pins>;
	pinctrl-1 = <&mcasp1_sleep_pins>;

	status = "okay";

	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	/* 4 serializer */
	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
		1 2 0 0
	>;
	tx-num-evt = <32>;
	rx-num-evt = <32>;
};

&mux_synctimer32k_ck {
	assigned-clocks = <&mux_synctimer32k_ck>;
	assigned-clock-parents = <&clkdiv32k_ick>;
};

&cpu {
	cpu0-supply = <&dcdc2>;
};

&wkup_m3_ipc {
	firmware-name = "am43x-evm-scale-data.bin";
};

&pruss1_mdio {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for AM43xx clock data
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 */
&scm_clocks {
	sys_clkin_ck: clock-sys-clkin-31@40 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "sys_clkin_ck";
		clocks = <&sysboot_freq_sel_ck>, <&crystal_freq_sel_ck>;
		ti,bit-shift = <31>;
		reg = <0x0040>;
	};

	crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "crystal_freq_sel_ck";
		clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
		ti,bit-shift = <29>;
		reg = <0x0040>;
	};

	sysboot_freq_sel_ck: clock-sysboot-freq-sel-22@44e10040 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "sysboot_freq_sel_ck";
		clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
		ti,bit-shift = <22>;
		reg = <0x0040>;
	};

	adc_tsc_fck: clock-adc-tsc-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "adc_tsc_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	dcan0_fck: clock-dcan0-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "dcan0_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	dcan1_fck: clock-dcan1-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "dcan1_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	mcasp0_fck: clock-mcasp0-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "mcasp0_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	mcasp1_fck: clock-mcasp1-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "mcasp1_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	smartreflex0_fck: clock-smartreflex0-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "smartreflex0_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	smartreflex1_fck: clock-smartreflex1-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "smartreflex1_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	sha0_fck: clock-sha0-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "sha0_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	aes0_fck: clock-aes0-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "aes0_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	rng_fck: clock-rng-fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "rng_fck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	ehrpwm0_tbclk: clock-ehrpwm0-tbclk-0@664 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "ehrpwm0_tbclk";
		clocks = <&l4ls_gclk>;
		ti,bit-shift = <0>;
		reg = <0x0664>;
	};

	ehrpwm1_tbclk: clock-ehrpwm1-tbclk-1@664 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "ehrpwm1_tbclk";
		clocks = <&l4ls_gclk>;
		ti,bit-shift = <1>;
		reg = <0x0664>;
	};

	ehrpwm2_tbclk: clock-ehrpwm2-tbclk-2@664 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "ehrpwm2_tbclk";
		clocks = <&l4ls_gclk>;
		ti,bit-shift = <2>;
		reg = <0x0664>;
	};

	ehrpwm3_tbclk: clock-ehrpwm3-tbclk-4@664 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "ehrpwm3_tbclk";
		clocks = <&l4ls_gclk>;
		ti,bit-shift = <4>;
		reg = <0x0664>;
	};

	ehrpwm4_tbclk: clock-ehrpwm4-tbclk-5@664 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "ehrpwm4_tbclk";
		clocks = <&l4ls_gclk>;
		ti,bit-shift = <5>;
		reg = <0x0664>;
	};

	ehrpwm5_tbclk: clock-ehrpwm5-tbclk-6@664 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "ehrpwm5_tbclk";
		clocks = <&l4ls_gclk>;
		ti,bit-shift = <6>;
		reg = <0x0664>;
	};
};
&prcm_clocks {
	clk_32768_ck: clock-clk-32768 {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "clk_32768_ck";
		clock-frequency = <32768>;
	};

	clk_rc32k_ck: clock-clk-rc32k {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "clk_rc32k_ck";
		clock-frequency = <32768>;
	};

	virt_19200000_ck: clock-virt-19200000 {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_19200000_ck";
		clock-frequency = <19200000>;
	};

	virt_24000000_ck: clock-virt-24000000 {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_24000000_ck";
		clock-frequency = <24000000>;
	};

	virt_25000000_ck: clock-virt-25000000 {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_25000000_ck";
		clock-frequency = <25000000>;
	};

	virt_26000000_ck: clock-virt-26000000 {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_26000000_ck";
		clock-frequency = <26000000>;
	};

	tclkin_ck: clock-tclkin {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "tclkin_ck";
		clock-frequency = <26000000>;
	};

	dpll_core_ck: clock@2d20 {
		#clock-cells = <0>;
		compatible = "ti,am3-dpll-core-clock";
		clock-output-names = "dpll_core_ck";
		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
		reg = <0x2d20>, <0x2d24>, <0x2d2c>, <0x2d48>, <0x2d4c>;
	};

	dpll_core_x2_ck: clock-dpll-core-x2 {
		#clock-cells = <0>;
		compatible = "ti,am3-dpll-x2-clock";
		clock-output-names = "dpll_core_x2_ck";
		clocks = <&dpll_core_ck>;
	};

	dpll_core_m4_ck: clock-dpll-core-m4-8@2d38 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_core_m4_ck";
		clocks = <&dpll_core_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x2d38>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_core_m5_ck: clock-dpll-core-m5-8@2d3c {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_core_m5_ck";
		clocks = <&dpll_core_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x2d3c>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_core_m6_ck: clock-dpll-core-m6-8@2d40 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_core_m6_ck";
		clocks = <&dpll_core_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x2d40>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_mpu_ck: clock@2d60 {
		#clock-cells = <0>;
		compatible = "ti,am3-dpll-clock";
		clock-output-names = "dpll_mpu_ck";
		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
		reg = <0x2d60>, <0x2d64>, <0x2d6c>, <0x2d88>, <0x2d8c>;
	};

	dpll_mpu_m2_ck: clock-dpll-mpu-m2-8@2d70 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_mpu_m2_ck";
		clocks = <&dpll_mpu_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x2d70>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	mpu_periphclk: clock-mpu-periphclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "mpu_periphclk";
		clocks = <&dpll_mpu_m2_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	dpll_ddr_ck: clock@2da0 {
		#clock-cells = <0>;
		compatible = "ti,am3-dpll-clock";
		clock-output-names = "dpll_ddr_ck";
		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
		reg = <0x2da0>, <0x2da4>, <0x2dac>, <0x2dc8>, <0x2dcc>;
	};

	dpll_ddr_m2_ck: clock-dpll-ddr-m2-8@2db0 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_ddr_m2_ck";
		clocks = <&dpll_ddr_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x2db0>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_disp_ck: clock@2e20 {
		#clock-cells = <0>;
		compatible = "ti,am3-dpll-clock";
		clock-output-names = "dpll_disp_ck";
		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
		reg = <0x2e20>, <0x2e24>, <0x2e2c>, <0x2e48>, <0x2e4c>;
	};

	dpll_disp_m2_ck: clock-dpll-disp-m2-8@2e30 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_disp_m2_ck";
		clocks = <&dpll_disp_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x2e30>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
		ti,set-rate-parent;
	};

	dpll_per_ck: clock@2de0 {
		#clock-cells = <0>;
		compatible = "ti,am3-dpll-j-type-clock";
		clock-output-names = "dpll_per_ck";
		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
		reg = <0x2de0>, <0x2de4>, <0x2dec>, <0x2e08>, <0x2e0c>;
	};

	dpll_per_m2_ck: clock-dpll-per-m2-8@2df0 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_per_m2_ck";
		clocks = <&dpll_per_ck>;
		ti,max-div = <127>;
		ti,autoidle-shift = <8>;
		reg = <0x2df0>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_per_m2_div4_wkupdm_ck: clock-dpll-per-m2-div4-wkupdm {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "dpll_per_m2_div4_wkupdm_ck";
		clocks = <&dpll_per_m2_ck>;
		clock-mult = <1>;
		clock-div = <4>;
	};

	dpll_per_m2_div4_ck: clock-dpll-per-m2-div4 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "dpll_per_m2_div4_ck";
		clocks = <&dpll_per_m2_ck>;
		clock-mult = <1>;
		clock-div = <4>;
	};

	clk_24mhz: clock-clk-24mhz {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "clk_24mhz";
		clocks = <&dpll_per_m2_ck>;
		clock-mult = <1>;
		clock-div = <8>;
	};

	clkdiv32k_ck: clock-clkdiv32k {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "clkdiv32k_ck";
		clocks = <&clk_24mhz>;
		clock-mult = <1>;
		clock-div = <732>;
	};

	clkdiv32k_ick: clock-clkdiv32k-ick-8@2a38 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "clkdiv32k_ick";
		clocks = <&clkdiv32k_ck>;
		ti,bit-shift = <8>;
		reg = <0x2a38>;
	};

	sysclk_div: clock-sysclk-div {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "sysclk_div";
		clocks = <&dpll_core_m4_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	pruss_ocp_gclk: clock-pruss-ocp-gclk@4248 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "pruss_ocp_gclk";
		clocks = <&sysclk_div>, <&dpll_disp_m2_ck>;
		reg = <0x4248>;
	};

	clk_32k_tpm_ck: clock-clk-32k-tpm {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "clk_32k_tpm_ck";
		clock-frequency = <32768>;
	};

	timer1_fck: clock-timer1-fck@4200 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer1_fck";
		clocks = <&sys_clkin_ck>, <&clkdiv32k_ick>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>, <&clk_32k_tpm_ck>;
		reg = <0x4200>;
	};

	timer2_fck: clock-timer2-fck@4204 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer2_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
		reg = <0x4204>;
	};

	timer3_fck: clock-timer3-fck@4208 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer3_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
		reg = <0x4208>;
	};

	timer4_fck: clock-timer4-fck@420c {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer4_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
		reg = <0x420c>;
	};

	timer5_fck: clock-timer5-fck@4210 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer5_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
		reg = <0x4210>;
	};

	timer6_fck: clock-timer6-fck@4214 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer6_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
		reg = <0x4214>;
	};

	timer7_fck: clock-timer7-fck@4218 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer7_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>;
		reg = <0x4218>;
	};

	wdt1_fck: clock-wdt1-fck@422c {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "wdt1_fck";
		clocks = <&clk_rc32k_ck>, <&clkdiv32k_ick>;
		reg = <0x422c>;
	};

	adc_mag_fck: adc_mag_fck@424c {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clocks = <&sys_clkin_ck>, <&dpll_per_m2_ck>;
		reg = <0x424c>;
	};

	l3_gclk: clock-l3-gclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "l3_gclk";
		clocks = <&dpll_core_m4_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	dpll_core_m4_div2_ck: clock-dpll-core-m4-div2 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "dpll_core_m4_div2_ck";
		clocks = <&sysclk_div>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	l4hs_gclk: clock-l4hs-gclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "l4hs_gclk";
		clocks = <&dpll_core_m4_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	l3s_gclk: clock-l3s-gclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "l3s_gclk";
		clocks = <&dpll_core_m4_div2_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	l4ls_gclk: clock-l4ls-gclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "l4ls_gclk";
		clocks = <&dpll_core_m4_div2_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	cpsw_125mhz_gclk: clock-cpsw-125mhz-gclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "cpsw_125mhz_gclk";
		clocks = <&dpll_core_m5_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	cpsw_cpts_rft_clk: clock-cpsw-cpts-rft@4238 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "cpsw_cpts_rft_clk";
		clocks = <&sysclk_div>, <&dpll_core_m5_ck>, <&dpll_disp_m2_ck>;
		reg = <0x4238>;
	};

	dpll_clksel_mac_clk: clock-dpll-clksel-mac-2@4234 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_clksel_mac_clk";
		clocks = <&dpll_core_m5_ck>;
		reg = <0x4234>;
		ti,bit-shift = <2>;
		ti,dividers = <2>, <5>;
	};

	clk_32k_mosc_ck: clock-clk-32k-mosc {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "clk_32k_mosc_ck";
		clock-frequency = <32768>;
	};

	gpio0_dbclk_mux_ck: clock-gpio0-dbclk-mux@4240 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "gpio0_dbclk_mux_ck";
		clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&clkdiv32k_ick>, <&clk_32k_mosc_ck>, <&clk_32k_tpm_ck>;
		reg = <0x4240>;
	};

	mmc_clk: clock-mmc {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "mmc_clk";
		clocks = <&dpll_per_m2_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	gfx_fclk_clksel_ck: clock-gfx-fclk-clksel-1@423c {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "gfx_fclk_clksel_ck";
		clocks = <&sysclk_div>, <&dpll_per_m2_ck>;
		ti,bit-shift = <1>;
		reg = <0x423c>;
	};

	gfx_fck_div_ck: clock-gfx-fck-div@423c {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "gfx_fck_div_ck";
		clocks = <&gfx_fclk_clksel_ck>;
		reg = <0x423c>;
		ti,max-div = <2>;
	};

	disp_clk: clock-disp@4244 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "disp_clk";
		clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>;
		reg = <0x4244>;
		ti,set-rate-parent;
	};

	dpll_extdev_ck: clock@2e60 {
		#clock-cells = <0>;
		compatible = "ti,am3-dpll-clock";
		clock-output-names = "dpll_extdev_ck";
		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
		reg = <0x2e60>, <0x2e64>, <0x2e6c>, <0x2e88>, <0x2e8c>;
	};

	dpll_extdev_m2_ck: clock-dpll-extdev-m2-8@2e70 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_extdev_m2_ck";
		clocks = <&dpll_extdev_ck>;
		ti,max-div = <127>;
		ti,autoidle-shift = <8>;
		reg = <0x2e70>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	mux_synctimer32k_ck: clock-mux-synctimer32k@4230 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "mux_synctimer32k_ck";
		clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>, <&clkdiv32k_ick>;
		reg = <0x4230>;
	};

	timer8_fck: clock-timer8-fck@421c {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer8_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>;
		reg = <0x421c>;
	};

	timer9_fck: clock-timer9-fck@4220 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer9_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>;
		reg = <0x4220>;
	};

	timer10_fck: clock-timer10-fck@4224 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer10_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>;
		reg = <0x4224>;
	};

	timer11_fck: clock-timer11-fck@4228 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "timer11_fck";
		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>;
		reg = <0x4228>;
	};

	cpsw_50m_clkdiv: clock-cpsw-50m-clkdiv {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "cpsw_50m_clkdiv";
		clocks = <&dpll_core_m5_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	cpsw_5m_clkdiv: clock-cpsw-5m-clkdiv {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "cpsw_5m_clkdiv";
		clocks = <&cpsw_50m_clkdiv>;
		clock-mult = <1>;
		clock-div = <10>;
	};

	dpll_ddr_x2_ck: clock-dpll-ddr-x2 {
		#clock-cells = <0>;
		compatible = "ti,am3-dpll-x2-clock";
		clock-output-names = "dpll_ddr_x2_ck";
		clocks = <&dpll_ddr_ck>;
	};

	dpll_ddr_m4_ck: clock-dpll-ddr-m4-8@2db8 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_ddr_m4_ck";
		clocks = <&dpll_ddr_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x2db8>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_per_clkdcoldo: clock-dpll-per-clkdcoldo-8@2e14 {
		#clock-cells = <0>;
		compatible = "ti,fixed-factor-clock";
		clock-output-names = "dpll_per_clkdcoldo";
		clocks = <&dpll_per_ck>;
		ti,clock-mult = <1>;
		ti,clock-div = <1>;
		ti,autoidle-shift = <8>;
		reg = <0x2e14>;
		ti,invert-autoidle-bit;
	};

	dll_aging_clk_div: clock-dll-aging-clk-div@4250 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dll_aging_clk_div";
		clocks = <&sys_clkin_ck>;
		reg = <0x4250>;
		ti,dividers = <8>, <16>, <32>;
	};

	div_core_25m_ck: clock-div-core-25m {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "div_core_25m_ck";
		clocks = <&sysclk_div>;
		clock-mult = <1>;
		clock-div = <8>;
	};

	func_12m_clk: clock-func-12m {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "func_12m_clk";
		clocks = <&dpll_per_m2_ck>;
		clock-mult = <1>;
		clock-div = <16>;
	};

	vtp_clk_div: clock-vtp-clk-div {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "vtp_clk_div";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	usbphy_32khz_clkmux: clock-usbphy-32khz-clkmux@4260 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "usbphy_32khz_clkmux";
		clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>;
		reg = <0x4260>;
	};

	usb_phy0_always_on_clk32k: clock-usb-phy0-always-on-clk32k-8@2a40 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "usb_phy0_always_on_clk32k";
		clocks = <&usbphy_32khz_clkmux>;
		ti,bit-shift = <8>;
		reg = <0x2a40>;
	};

	usb_phy1_always_on_clk32k: clock-usb-phy1-always-on-clk32k-8@2a48 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "usb_phy1_always_on_clk32k";
		clocks = <&usbphy_32khz_clkmux>;
		ti,bit-shift = <8>;
		reg = <0x2a48>;
	};

	clkout1_osc_div_ck: clock-clkout1-osc-div-ck {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "clkout1_osc_div_ck";
		clocks = <&sys_clkin_ck>;
		ti,bit-shift = <20>;
		ti,max-div = <4>;
		reg = <0x4100>;
	};

	clkout1_src2_mux_ck: clock-clkout1-src2-mux-ck {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "clkout1_src2_mux_ck";
		clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>,
			 <&dpll_per_m2_ck>, <&dpll_disp_m2_ck>,
			 <&dpll_mpu_m2_ck>;
		reg = <0x4100>;
	};

	clkout1_src2_pre_div_ck: clock-clkout1-src2-pre-div-ck {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "clkout1_src2_pre_div_ck";
		clocks = <&clkout1_src2_mux_ck>;
		ti,bit-shift = <4>;
		ti,max-div = <8>;
		reg = <0x4100>;
	};

	clkout1_src2_post_div_ck: clock-clkout1-src2-post-div-ck {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "clkout1_src2_post_div_ck";
		clocks = <&clkout1_src2_pre_div_ck>;
		ti,bit-shift = <8>;
		ti,max-div = <32>;
		ti,index-power-of-two;
		reg = <0x4100>;
	};

	clkout1_mux_ck: clock-clkout1-mux-ck {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "clkout1_mux_ck";
		clocks = <&clkout1_osc_div_ck>, <&clk_rc32k_ck>,
			 <&clkout1_src2_post_div_ck>, <&dpll_extdev_m2_ck>;
		ti,bit-shift = <16>;
		reg = <0x4100>;
	};

	clkout1_ck: clock-clkout1-ck {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "clkout1_ck";
		clocks = <&clkout1_mux_ck>;
		ti,bit-shift = <23>;
		reg = <0x4100>;
	};
};

&prcm {
	wkup_cm: clock@2800 {
		compatible = "ti,omap4-cm";
		clock-output-names = "wkup_cm";
		reg = <0x2800 0x400>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x2800 0x400>;

		l3s_tsc_clkctrl: clock@120 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3s_tsc_clkctrl";
			reg = <0x120 0x4>;
			#clock-cells = <2>;
		};

		l4_wkup_aon_clkctrl: clock@228 {
			compatible = "ti,clkctrl";
			clock-output-names = "l4_wkup_aon_clkctrl";
			reg = <0x228 0xc>;
			#clock-cells = <2>;
		};

		l4_wkup_clkctrl: clock@220 {
			compatible = "ti,clkctrl";
			clock-output-names = "l4_wkup_clkctrl";
			reg = <0x220 0x4>, <0x328 0x44>;
			#clock-cells = <2>;
		};

	};

	mpu_cm: clock@8300 {
		compatible = "ti,omap4-cm";
		clock-output-names = "mpu_cm";
		reg = <0x8300 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x8300 0x100>;

		mpu_clkctrl: clock@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "mpu_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	gfx_l3_cm: clock@8400 {
		compatible = "ti,omap4-cm";
		clock-output-names = "gfx_l3_cm";
		reg = <0x8400 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x8400 0x100>;

		gfx_l3_clkctrl: clock@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "gfx_l3_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	l4_rtc_cm: clock@8500 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l4_rtc_cm";
		reg = <0x8500 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x8500 0x100>;

		l4_rtc_clkctrl: clock@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l4_rtc_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	per_cm: clock@8800 {
		compatible = "ti,omap4-cm";
		clock-output-names = "per_cm";
		reg = <0x8800 0xc00>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x8800 0xc00>;

		l3_clkctrl: clock@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3_clkctrl";
			reg = <0x20 0x3c>, <0x78 0x2c>;
			#clock-cells = <2>;
		};

		l3s_clkctrl: clock@68 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3s_clkctrl";
			reg = <0x68 0xc>, <0x220 0x4c>;
			#clock-cells = <2>;
		};

		pruss_ocp_clkctrl: clock@320 {
			compatible = "ti,clkctrl";
			clock-output-names = "pruss_ocp_clkctrl";
			reg = <0x320 0x4>;
			#clock-cells = <2>;
		};

		l4ls_clkctrl: clock@420 {
			compatible = "ti,clkctrl";
			clock-output-names = "l4ls_clkctrl";
			reg = <0x420 0x1a4>;
			#clock-cells = <2>;
		};

		emif_clkctrl: clock@720 {
			compatible = "ti,clkctrl";
			clock-output-names = "emif_clkctrl";
			reg = <0x720 0x4>;
			#clock-cells = <2>;
		};

		dss_clkctrl: clock@a20 {
			compatible = "ti,clkctrl";
			clock-output-names = "dss_clkctrl";
			reg = <0xa20 0x4>;
			#clock-cells = <2>;
		};

		cpsw_125mhz_clkctrl: clock@b20 {
			compatible = "ti,clkctrl";
			clock-output-names = "cpsw_125mhz_clkctrl";
			reg = <0xb20 0x4>;
			#clock-cells = <2>;
		};

	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
 *
 * Common PRUSS data for TI AM57xx platforms
 */

&ocp {
	pruss1_tm: target-module@4b226000 {
		compatible = "ti,sysc-pruss", "ti,sysc";
		reg = <0x4b226000 0x4>,
		      <0x4b226004 0x4>;
		reg-names = "rev", "sysc";
		ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
				 SYSC_PRUSS_SUB_MWAIT)>;
		ti,sysc-midle = <SYSC_IDLE_FORCE>,
				<SYSC_IDLE_NO>,
				<SYSC_IDLE_SMART>;
		ti,sysc-sidle = <SYSC_IDLE_FORCE>,
				<SYSC_IDLE_NO>,
				<SYSC_IDLE_SMART>;
		/* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */
		clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>;
		clock-names = "fck";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x4b200000 0x80000>;

		pruss1: pruss@0 {
			compatible = "ti,am5728-pruss";
			reg = <0x0 0x80000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			pruss1_mem: memories@0 {
				reg = <0x0 0x2000>,
				      <0x2000 0x2000>,
				      <0x10000 0x8000>;
				reg-names = "dram0", "dram1",
					    "shrdram2";
			};

			pruss1_cfg: cfg@26000 {
				compatible = "ti,pruss-cfg", "syscon";
				reg = <0x26000 0x2000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x26000 0x2000>;

				clocks {
					#address-cells = <1>;
					#size-cells = <0>;

					pruss1_iepclk_mux: iepclk-mux@30 {
						reg = <0x30>;
						#clock-cells = <0>;
						clocks = <&dpll_gmac_m3x2_ck>,  /* icss_iep_clk */
							 <&dpll_gmac_h13x2_ck>; /* icss_clk */
					};
				};
			};

			pruss1_mii_rt: mii-rt@32000 {
				compatible = "ti,pruss-mii", "syscon";
				reg = <0x32000 0x58>;
			};

			pruss1_intc: interrupt-controller@20000 {
				compatible = "ti,pruss-intc";
				reg = <0x20000 0x2000>;
				interrupt-controller;
				#interrupt-cells = <3>;
				interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "host_intr0", "host_intr1",
						  "host_intr2", "host_intr3",
						  "host_intr4", "host_intr5",
						  "host_intr6", "host_intr7";
			};

			pru1_0: pru@34000 {
				compatible = "ti,am5728-pru";
				reg = <0x34000 0x3000>,
				      <0x22000 0x400>,
				      <0x22400 0x100>;
				reg-names = "iram", "control", "debug";
				firmware-name = "am57xx-pru1_0-fw";
			};

			pru1_1: pru@38000 {
				compatible = "ti,am5728-pru";
				reg = <0x38000 0x3000>,
				      <0x24000 0x400>,
				      <0x24400 0x100>;
				reg-names = "iram", "control", "debug";
				firmware-name = "am57xx-pru1_1-fw";
			};

			pruss1_mdio: mdio@32400 {
				compatible = "ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&dpll_gmac_h13x2_ck>;
				clock-names = "fck";
				bus_freq = <1000000>;
				reg = <0x32400 0x90>;
			};
		};
	};

	pruss2_tm: target-module@4b2a6000 {
		compatible = "ti,sysc-pruss", "ti,sysc";
		reg = <0x4b2a6000 0x4>,
		      <0x4b2a6004 0x4>;
		reg-names = "rev", "sysc";
		ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
				 SYSC_PRUSS_SUB_MWAIT)>;
		ti,sysc-midle = <SYSC_IDLE_FORCE>,
				<SYSC_IDLE_NO>,
				<SYSC_IDLE_SMART>;
		ti,sysc-sidle = <SYSC_IDLE_FORCE>,
				<SYSC_IDLE_NO>,
				<SYSC_IDLE_SMART>;
		/* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */
		clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS2_CLKCTRL 0>;
		clock-names = "fck";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x4b280000 0x80000>;

		pruss2: pruss@0 {
			compatible = "ti,am5728-pruss";
			reg = <0x0 0x80000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			pruss2_mem: memories@0 {
				reg = <0x0 0x2000>,
				      <0x2000 0x2000>,
				      <0x10000 0x8000>;
				reg-names = "dram0", "dram1",
					    "shrdram2";
			};

			pruss2_cfg: cfg@26000 {
				compatible = "ti,pruss-cfg", "syscon";
				reg = <0x26000 0x2000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x26000 0x2000>;

				clocks {
					#address-cells = <1>;
					#size-cells = <0>;

					pruss2_iepclk_mux: iepclk-mux@30 {
						reg = <0x30>;
						#clock-cells = <0>;
						clocks = <&dpll_gmac_m3x2_ck>,  /* icss_iep_clk */
							 <&dpll_gmac_h13x2_ck>; /* icss_clk */
					};
				};
			};

			pruss2_mii_rt: mii-rt@32000 {
				compatible = "ti,pruss-mii", "syscon";
				reg = <0x32000 0x58>;
			};

			pruss2_intc: interrupt-controller@20000 {
				compatible = "ti,pruss-intc";
				reg = <0x20000 0x2000>;
				interrupt-controller;
				#interrupt-cells = <3>;
				interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "host_intr0", "host_intr1",
						  "host_intr2", "host_intr3",
						  "host_intr4", "host_intr5",
						  "host_intr6", "host_intr7";
			};

			pru2_0: pru@34000 {
				compatible = "ti,am5728-pru";
				reg = <0x34000 0x3000>,
				      <0x22000 0x400>,
				      <0x22400 0x100>;
				reg-names = "iram", "control", "debug";
				firmware-name = "am57xx-pru2_0-fw";
			};

			pru2_1: pru@38000 {
				compatible = "ti,am5728-pru";
				reg = <0x38000 0x3000>,
				      <0x24000 0x400>,
				      <0x24400 0x100>;
				reg-names = "iram", "control", "debug";
				firmware-name = "am57xx-pru2_1-fw";
			};

			pruss2_mdio: mdio@32400 {
				compatible = "ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&dpll_gmac_h13x2_ck>;
				clock-names = "fck";
				bus_freq = <1000000>;
				reg = <0x32400 0x90>;
			};
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
 */

#include "dra72x.dtsi"
#include "am57-pruss.dtsi"

/ {
	compatible = "ti,am5718", "ti,dra7";
};

/*
 * These modules are not present on AM5718
 *
 * ATL
 * VCP1, VCP2
 * MLB
 * ISS
 * USB3
 */

&usb3_tm {
	status = "disabled";
};

&atl_tm {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "am5718.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "dra7-mmc-iodelay.dtsi"
#include "dra72x-mmc-iodelay.dtsi"
#include "am57xx-idk-common.dtsi"
#include "dra7-ipu-dsp-common.dtsi"

/ {
	model = "TI AM5718 IDK";
	compatible = "ti,am5718-idk", "ti,am5718", "ti,dra7";

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x40000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		ipu2_memory_region: ipu2-memory@95800000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x95800000 0x0 0x3800000>;
			reusable;
			status = "okay";
		};

		dsp1_memory_region: dsp1-memory@99000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x99000000 0x0 0x4000000>;
			reusable;
			status = "okay";
		};

		ipu1_memory_region: ipu1-memory@9d000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9d000000 0x0 0x2000000>;
			reusable;
			status = "okay";
		};
	};

	leds {
		compatible = "gpio-leds";
		cpu0-led {
			label = "status0:red:cpu0";
			gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "cpu0";
		};

		usr0-led {
			label = "status0:green:usr";
			gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		heartbeat-led {
			label = "status0:blue:heartbeat";
			gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "heartbeat";
		};

		usr1-led {
			label = "status1:red:usr";
			gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		usr2-led {
			label = "status1:green:usr";
			gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		mmc0-led {
			label = "status1:blue:mmc0";
			gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "mmc0";
		};
	};

	idk-leds {
		status = "disabled";
		compatible = "gpio-leds";
		red0-led {
			label = "idk:red0";
			gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		green0-led {
			label = "idk:green0";
			gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		blue0-led {
			label = "idk:blue0";
			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red1-led {
			label = "idk:red1";
			gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		green1-led {
			label = "idk:green1";
			gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		blue1-led {
			label = "idk:blue1";
			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red2-led {
			label = "idk:red2";
			gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		green2-led {
			label = "idk:green2";
			gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		blue2-led {
			label = "idk:blue2";
			gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red3-led {
			label = "idk:red3";
			gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		green3-led {
			label = "idk:green3";
			gpios = <&gpio7 25 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		blue3-led {
			label = "idk:blue3";
			gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};
};

&extcon_usb2 {
	id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
	vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>;
};

&sn65hvs882 {
	load-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
};

&ipu2 {
	status = "okay";
	memory-region = <&ipu2_memory_region>;
};

&ipu1 {
	status = "okay";
	memory-region = <&ipu1_memory_region>;
};

&dsp1 {
	status = "okay";
	memory-region = <&dsp1_memory_region>;
};

&pcie1_rc {
	status = "okay";
	gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
};

&mmc1 {
	pinctrl-names = "default", "hs";
	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
	pinctrl-1 = <&mmc1_pins_hs>;
};

&mmc2 {
	pinctrl-names = "default", "hs", "ddr_3_3v";
	pinctrl-0 = <&mmc2_pins_default>;
	pinctrl-1 = <&mmc2_pins_hs>;
	pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
};

&pruss1_mdio {
	status = "disabled";
};

&pruss2_mdio {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
 */

#include "dra74x.dtsi"
#include "am57-pruss.dtsi"

/ {
	compatible = "ti,am5728", "ti,dra7";
};

/*
 * These modules are not present on AM5728
 *
 * EVE1, EVE2
 * ATL
 * VCP1, VCP2
 * MLB
 * ISS
 * USB3, USB4
 */

&usb3_tm {
	status = "disabled";
};

&usb4_tm {
	status = "disabled";
};

&atl_tm {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
 */

/dts-v1/;

#include "dra74x.dtsi"
#include "am57xx-commercial-grade.dtsi"
#include "dra74x-mmc-iodelay.dtsi"
#include "dra74-ipu-dsp-common.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/dra.h>

/ {
	model = "BeagleBoard.org BeagleBone AI";
	compatible = "beagle,am5729-beagleboneai", "ti,am5728",
		     "ti,dra742", "ti,dra74", "ti,dra7";

	aliases {
		rtc0 = &tps659038_rtc;
		rtc1 = &rtc;
		display0 = &hdmi_conn;
	};

	chosen {
		stdout-path = &uart1;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x40000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		ipu2_memory_region: ipu2-memory@95800000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x95800000 0x0 0x3800000>;
			reusable;
			status = "okay";
		};

		dsp1_memory_region: dsp1-memory@99000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x99000000 0x0 0x4000000>;
			reusable;
			status = "okay";
		};

		ipu1_memory_region: ipu1-memory@9d000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9d000000 0x0 0x2000000>;
			reusable;
			status = "okay";
		};

		dsp2_memory_region: dsp2-memory@9f000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9f000000 0x0 0x800000>;
			reusable;
			status = "okay";
		};

	};

	vdd_adc: gpioregulator-vdd_adc {
		compatible = "regulator-gpio";
		regulator-name = "vdd_adc";
		vin-supply = <&vdd_5v>;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
		gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
		states = <1800000 0
			3300000 1>;
	};

	vdd_5v: fixedregulator-vdd_5v {
		compatible = "regulator-fixed";
		regulator-name = "vdd_5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vtt_fixed: fixedregulator-vtt {
		/* TPS51200 */
		compatible = "regulator-fixed";
		regulator-name = "vtt_fixed";
		vin-supply = <&vdd_ddr>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
	};

	leds {
		compatible = "gpio-leds";

		led0 {
			label = "beaglebone:green:usr0";
			gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led1 {
			label = "beaglebone:green:usr1";
			gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led2 {
			label = "beaglebone:green:usr2";
			gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "cpu";
			default-state = "off";
		};

		led3 {
			label = "beaglebone:green:usr3";
			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};

		led4 {
			label = "beaglebone:green:usr4";
			gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "netdev";
			default-state = "off";
		};
	};

	hdmi_conn: connector@0 {
		compatible = "hdmi-connector";
		label = "hdmi";
		type = "a";

		port {
			hdmi_connector_in: endpoint {
				remote-endpoint = <&hdmi_encoder_out>;
			};
		};
	};

	hdmi_enc: encoder@0 {
		/* "ti,tpd12s016" software compatible with "ti,tpd12s015"
		 *  no need for individual driver
		 */
		compatible = "ti,tpd12s015";
		gpios = <0>,
			<0>,
			<&gpio7 12 GPIO_ACTIVE_HIGH>;

		ports {
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			port@0 {
				reg = <0x0>;

				hdmi_encoder_in: endpoint@0 {
					remote-endpoint = <&hdmi_out>;
				};
			};

			port@1 {
				reg = <0x1>;

				hdmi_encoder_out: endpoint@0 {
					remote-endpoint = <&hdmi_connector_in>;
				};
			};
		};
	};

	emmc_pwrseq: emmc_pwrseq {
		compatible = "mmc-pwrseq-emmc";
		reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
	};

	brcmf_pwrseq: brcmf_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>,	/* BT-REG-ON */
				<&gpio3 18 GPIO_ACTIVE_LOW>;	/* WL-REG-ON */
	};

	extcon_usb1: extcon_usb1 {
		compatible = "linux,extcon-usb-gpio";
		ti,enable-id-detection;
		id-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
	};
};

&i2c1 {
	status = "okay";
	clock-frequency = <400000>;

	tps659038: tps659038@58 {
		compatible = "ti,tps659038";
		reg = <0x58>;
		interrupt-parent = <&gpio6>;
		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;

		#interrupt-cells = <2>;
		interrupt-controller;

		ti,system-power-controller;
		ti,palmas-override-powerhold;

		tps659038_pmic {
			compatible = "ti,tps659038-pmic";

			smps12-in-supply = <&vdd_5v>;
			smps3-in-supply = <&vdd_5v>;
			smps45-in-supply = <&vdd_5v>;
			smps6-in-supply = <&vdd_5v>;
			smps7-in-supply = <&vdd_5v>;
			mps3-in-supply = <&vdd_5v>;
			smps8-in-supply = <&vdd_5v>;
			smps9-in-supply = <&vdd_5v>;
			ldo1-in-supply = <&vdd_5v>;
			ldo2-in-supply = <&vdd_5v>;
			ldo3-in-supply = <&vdd_5v>;
			ldo4-in-supply = <&vdd_5v>;
			ldo9-in-supply = <&vdd_5v>;
			ldoln-in-supply = <&vdd_5v>;
			ldousb-in-supply = <&vdd_5v>;
			ldortc-in-supply = <&vdd_5v>;

			regulators {
				vdd_mpu: smps12 {
					/* VDD_MPU */
					regulator-name = "smps12";
					regulator-min-microvolt = <850000>;
					regulator-max-microvolt = <1250000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdd_ddr: smps3 {
					/* VDD_DDR EMIF1 EMIF2 */
					regulator-name = "smps3";
					regulator-min-microvolt = <1350000>;
					regulator-max-microvolt = <1350000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdd_dspeve: smps45 {
					/* VDD_DSPEVE on AM572 */
					regulator-name = "smps45";
					regulator-min-microvolt = < 850000>;
					regulator-max-microvolt = <1250000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdd_gpu: smps6 {
					/* VDD_GPU */
					regulator-name = "smps6";
					regulator-min-microvolt = < 850000>;
					regulator-max-microvolt = <1250000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdd_core: smps7 {
					/* VDD_CORE */
					regulator-name = "smps7";
					regulator-min-microvolt = < 850000>;	/*** 1.15V */
					regulator-max-microvolt = <1150000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdd_iva: smps8 {
					/* VDD_IVAHD */				/*** 1.06V */
					regulator-name = "smps8";
				};

				vdd_3v3: smps9 {
					/* VDD_3V3 */
					regulator-name = "smps9";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdd_sd: ldo1 {
					/* VDDSHV8 - VSDMMC  */
					regulator-name = "ldo1";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <3300000>;
					regulator-boot-on;
					regulator-always-on;
				};

				vdd_1v8: ldo2 {
					/* VDDSH18V */
					regulator-name = "ldo2";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdd_1v8_phy_ldo3: ldo3 {
					/* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
					regulator-name = "ldo3";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdd_1v8_phy_ldo4: ldo4 {
					/* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
					regulator-name = "ldo4";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				/* LDO5-8 unused */

				vdd_rtc: ldo9 {
					/* VDD_RTC  */
					regulator-name = "ldo9";
					regulator-min-microvolt = < 840000>;
					regulator-max-microvolt = <1160000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdd_1v8_pll: ldoln {
					/* VDDA_1V8_PLL */
					regulator-name = "ldoln";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldousb_reg: ldousb {
					/* VDDA_3V_USB: VDDA_USBHS33 */
					regulator-name = "ldousb";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldortc_reg: ldortc {
					/* VDDA_RTC  */
					regulator-name = "ldortc";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				regen1: regen1 {
					/* VDD_3V3_ON */
					regulator-name = "regen1";
					regulator-boot-on;
					regulator-always-on;
				};

				regen2: regen2 {
					/* Needed for PMIC internal resource */
					regulator-name = "regen2";
					regulator-boot-on;
					regulator-always-on;
				};
			};
		};

		tps659038_rtc: tps659038_rtc {
			compatible = "ti,palmas-rtc";
			interrupt-parent = <&tps659038>;
			interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
			wakeup-source;
		};

		tps659038_pwr_button: tps659038_pwr_button {
			compatible = "ti,palmas-pwrbutton";
			interrupt-parent = <&tps659038>;
			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
			wakeup-source;
			ti,palmas-long-press-seconds = <12>;
		};

		tps659038_gpio: tps659038_gpio {
			compatible = "ti,palmas-gpio";
			gpio-controller;
			#gpio-cells = <2>;
		};
	};

	/* STMPE811 touch screen controller */
	stmpe811@41 {
		compatible = "st,stmpe811";
		reg = <0x41>;
		interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio2>;
		interrupt-controller;
		id = <0>;
		blocks = <0x5>;
		irq-trigger = <0x1>;
		st,mod-12b = <1>; /* 12-bit ADC */
		st,ref-sel = <0>; /* internal ADC reference */
		st,adc-freq = <1>; /* 3.25 MHz ADC clock speed */
		st,sample-time = <4>; /* ADC converstion time: 80 clocks */

		stmpe_adc {
			compatible = "st,stmpe-adc";
			st,norequest-mask = <0x00>; /* mask any channels to be used by touchscreen */
			adc0: iio-device@0 {
				#io-channel-cells = <1>;
				iio-channels = <&adc0 4>, <&adc0 1>, <&adc0 2>, <&adc0 3>, <&adc0 4>, <&adc0 5>, <&adc0 6>;
				iio-channel-names = "AIN0_P9_39", "AIN1_P9_40", "AIN2_P9_37", "AIN3_P9_38",
					"AIN4_P9_33", "AIN5_P9_36", "AIN6_P9_35";
			};
		};

		stmpe_touchscreen {
			status = "disabled";
			compatible = "st,stmpe-ts";
			/* 8 sample average control */
			st,ave-ctrl = <3>;
			/* 7 length fractional part in z */
			st,fraction-z = <7>;
			/*
			 * 50 mA typical 80 mA max touchscreen drivers
			 * current limit value
			 */
			st,i-drive = <1>;
			/* 1 ms panel driver settling time */
			st,settling = <3>;
			/* 5 ms touch detect interrupt delay */
			st,touch-det-delay = <5>;
		};

		stmpe_gpio {
			compatible = "st,stmpe-gpio";
		};

		stmpe_pwm {
			compatible = "st,stmpe-pwm";
			#pwm-cells = <2>;
		};
	};
};

&mcspi3 {
	status = "okay";
	ti,pindir-d0-out-d1-in;

	sn65hvs882: sn65hvs882@0 {
		compatible = "pisosr-gpio";
		gpio-controller;
		#gpio-cells = <2>;

		reg = <0>;
		spi-max-frequency = <1000000>;
		spi-cpol;
	};
};

&cpu0 {
	vdd-supply = <&vdd_mpu>;
	voltage-tolerance = <1>;
};

&uart1 {
	status = "okay";
};

&davinci_mdio_sw {
	reset-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;

	phy0: ethernet-phy@4 {
		reg = <4>;
		eee-broken-100tx;
		eee-broken-1000t;
	};
};

&mac_sw {
	status = "okay";
};

&cpsw_port1 {
	phy-handle = <&phy0>;
	phy-mode = "rgmii-rxid";
	ti,dual-emac-pvid = <1>;
};

&cpsw_port2 {
	status = "disabled";
};

&ocp {
	pruss1_shmem: pruss_shmem@4b200000 {
		status = "okay";
		compatible = "ti,pruss-shmem";
		reg = <0x4b200000 0x020000>;
	};

	pruss2_shmem: pruss_shmem@4b280000 {
		status = "okay";
		compatible = "ti,pruss-shmem";
		reg = <0x4b280000 0x020000>;
	};
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vdd_3v3>;
	vqmmc-supply = <&vdd_sd>;
	bus-width = <4>;
	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */

	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins_default>;
};

&mmc2 {
	status = "okay";
	vmmc-supply = <&vdd_1v8>;
	vqmmc-supply = <&vdd_1v8>;
	bus-width = <8>;
	ti,non-removable;
	non-removable;
	mmc-pwrseq = <&emmc_pwrseq>;

	ti,needs-special-reset;
	dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
	dma-names = "tx", "rx";

};

&mmc4 {
	/* DS: Default speed (DS) up to 25 MHz, including 1- and 4-bit modes (3.3 V signaling). */
	/* HS: High speed up to 50 MHz (3.3 V signaling). */
	/* SDR12: SDR up to 25 MHz (1.8 V signaling). */
	/* SDR25: SDR up to 50 MHz (1.8 V signaling). */
	/* SDR50: SDR up to 100 MHz (1.8 V signaling). */
	/* SDR104: SDR up to 208 MHz (1.8 V signaling) */
	/* DDR50: DDR up to 50 MHz (1.8 V signaling). */
	status = "okay";

	ti,needs-special-reset;
	vmmc-supply = <&vdd_3v3>;
	cap-power-off-card;
	keep-power-in-suspend;
	bus-width = <4>;
	ti,non-removable;
	non-removable;
	no-1-8-v;
	max-frequency = <24000000>;

	#address-cells = <1>;
	#size-cells = <0>;
	mmc-pwrseq = <&brcmf_pwrseq>;

	brcmf: wifi@1 {
		status = "okay";
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";

		brcm,sd-head-align = <4>;
		brcm,sd_head_align = <4>;
		brcm,sd_sgentry_align = <512>;

		interrupt-parent = <&gpio3>;
		interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
		interrupt-names = "host-wake";
	};
};

&usb2_phy1 {
	phy-supply = <&ldousb_reg>;
};

&usb2_phy2 {
	phy-supply = <&ldousb_reg>;
};

&usb1 {
	status = "okay";
	dr_mode = "otg";
};

&omap_dwc3_1 {
	extcon = <&extcon_usb1>;
};

&usb2 {
	status = "okay";
	dr_mode = "host";
};

&dss {
	status = "okay";
	vdda_video-supply = <&vdd_1v8_pll>;
};

&hdmi {
	status = "okay";
	vdda-supply = <&vdd_1v8_phy_ldo4>;

	port {
		hdmi_out: endpoint {
			remote-endpoint = <&hdmi_encoder_in>;
		};
	};
};

&bandgap {
	status = "okay";
};

&cpu_alert0 {
	temperature = <55000>; /* milliCelsius */
};

&cpu_crit {
	temperature = <85000>; /* milliCelsius */
};

&gpu_crit {
	temperature = <85000>; /* milliCelsius */
};

&core_crit {
	temperature = <85000>; /* milliCelsius */
};

&dspeve_crit {
	temperature = <85000>; /* milliCelsius */
};

&iva_crit {
	temperature = <85000>; /* milliCelsius */
};

&sata {
	status = "disabled";
};

&sata_phy {
	status = "disabled";
};

/* bluetooth */
&uart6 {
	status = "okay";
};

/* cape header stuff */
&i2c4 {
	status = "okay";
	clock-frequency = <100000>;
};

&cpu0_opp_table {
	opp_slow-500000000 {
		opp-shared;
	};
};

&ipu2 {
	status = "okay";
	memory-region = <&ipu2_memory_region>;
};

&ipu1 {
	status = "okay";
	memory-region = <&ipu1_memory_region>;
};

&dsp1 {
	status = "okay";
	memory-region = <&dsp1_memory_region>;
};

&dsp2 {
	status = "okay";
	memory-region = <&dsp2_memory_region>;
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "am57xx-idk-common.dtsi"
#include "dra74-ipu-dsp-common.dtsi"

/ {
	memory@0 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x80000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		ipu2_memory_region: ipu2-memory@95800000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x95800000 0x0 0x3800000>;
			reusable;
			status = "okay";
		};

		dsp1_memory_region: dsp1-memory@99000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x99000000 0x0 0x4000000>;
			reusable;
			status = "okay";
		};

		ipu1_memory_region: ipu1-memory@9d000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9d000000 0x0 0x2000000>;
			reusable;
			status = "okay";
		};

		dsp2_memory_region: dsp2-memory@9f000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9f000000 0x0 0x800000>;
			reusable;
			status = "okay";
		};
	};

	status-leds {
		compatible = "gpio-leds";
		cpu0-led {
			label = "status0:red:cpu0";
			gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "cpu0";
		};

		usr0-led {
			label = "status0:green:usr";
			gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		heartbeat-led {
			label = "status0:blue:heartbeat";
			gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "heartbeat";
		};

		cpu1-led {
			label = "status1:red:cpu1";
			gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "cpu1";
		};

		usr1-led {
			label = "status1:green:usr";
			gpios = <&gpio7 23 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		mmc0-led {
			label = "status1:blue:mmc0";
			gpios = <&gpio7 22 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "mmc0";
		};
	};

	idk-leds {
		status = "disabled";
		compatible = "gpio-leds";
		red0-led {
			label = "idk:red0";
			gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		green0-led {
			label = "idk:green0";
			gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		blue0-led {
			label = "idk:blue0";
			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red1-led {
			label = "idk:red1";
			gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		green1-led {
			label = "idk:green1";
			gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		blue1-led {
			label = "idk:blue1";
			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red2-led {
			label = "idk:red2";
			gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		green2-led {
			label = "idk:green2";
			gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		blue2-led {
			label = "idk:blue2";
			gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red3-led {
			label = "idk:red3";
			gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		green3-led {
			label = "idk:green3";
			gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		blue3-led {
			label = "idk:blue3";
			gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};
};

&extcon_usb2 {
	id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
	vbus-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
};

&sn65hvs882 {
	load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
};

&pcie1_rc {
	status = "okay";
	gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};

&ipu2 {
	status = "okay";
	memory-region = <&ipu2_memory_region>;
};

&ipu1 {
	status = "okay";
	memory-region = <&ipu1_memory_region>;
};

&dsp1 {
	status = "okay";
	memory-region = <&dsp1_memory_region>;
};

&dsp2 {
	status = "okay";
	memory-region = <&dsp2_memory_region>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include "am5728.dtsi"
#include "dra7-mmc-iodelay.dtsi"
#include "dra74x-mmc-iodelay.dtsi"
#include "am572x-idk-common.dtsi"

/ {
	model = "TI AM5728 IDK";
	compatible = "ti,am5728-idk", "ti,am5728", "ti,dra7";
};

&mmc1 {
	pinctrl-names = "default", "hs";
	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
	pinctrl-1 = <&mmc1_pins_hs>;
};

&mmc2 {
	pinctrl-names = "default", "hs", "ddr_3_3v";
	pinctrl-0 = <&mmc2_pins_default>;
	pinctrl-1 = <&mmc2_pins_hs>;
	pinctrl-2 = <&mmc2_pins_ddr_rev20>;
};

&pruss1_mdio {
	status = "disabled";
};

&pruss2_mdio {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
 */

#include "dra74x-p.dtsi"
#include "am57-pruss.dtsi"

/ {
	compatible = "ti,am5748", "ti,dra762", "ti,dra7";
};

/*
 * These modules are not present on AM5748
 *
 * EVE1, EVE2
 * ATL
 * VCP1, VCP2
 * MLB
 * ISS
 * USB3, USB4
 */

&usb3_tm {
	status = "disabled";
};

&usb4_tm {
	status = "disabled";
};

&atl_tm {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include "am5748.dtsi"
#include "dra7-mmc-iodelay.dtsi"
#include "dra76x-mmc-iodelay.dtsi"
#include "am572x-idk-common.dtsi"

/ {
	model = "TI AM5748 IDK";
	compatible = "ti,am5748-idk", "ti,am5748", "ti,dra762", "ti,dra7";
};

&qspi {
	spi-max-frequency = <96000000>;
	flash@0 {
		spi-max-frequency = <96000000>;
	};
};

&mmc1 {
	pinctrl-names = "default", "hs";
	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
	pinctrl-1 = <&mmc1_pins_hs>;
};

&mmc2 {
	pinctrl-names = "default", "hs", "ddr_3_3v";
	pinctrl-0 = <&mmc2_pins_default>;
	pinctrl-1 = <&mmc2_pins_default>;
	pinctrl-2 = <&mmc2_pins_default>;
};

&emif1 {
	status = "okay";
};

&pruss1_mdio {
	status = "disabled";
};

&pruss2_mdio {
	status = "disabled";
};