code:
/*
 *  BSD LICENSE
 *
 *  Copyright(c) 2014 Broadcom Corporation.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    * Redistributions of source code must retain the above copyright
 *      notice, this list of conditions and the following disclaimer.
 *    * Redistributions in binary form must reproduce the above copyright
 *      notice, this list of conditions and the following disclaimer in
 *      the documentation and/or other materials provided with the
 *      distribution.
 *    * Neither the name of Broadcom Corporation nor the names of its
 *      contributors may be used to endorse or promote products derived
 *      from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/bcm-cygnus.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,cygnus";
	model = "Broadcom Cygnus SoC";
	interrupt-parent = <&gic>;

	aliases {
		ethernet0 = &eth0;
	};

	memory@0 {
		device_type = "memory";
		reg = <0 0>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			reg = <0x0>;
		};
	};

	/include/ "bcm-cygnus-clock.dtsi"

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
	};

	core@19000000 {
		compatible = "simple-bus";
		ranges = <0x00000000 0x19000000 0x1000000>;
		#address-cells = <1>;
		#size-cells = <1>;

		timer@20200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0x20200 0x100>;
			interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
			clocks = <&periph_clk>;
		};

		gic: interrupt-controller@21000 {
			compatible = "arm,cortex-a9-gic";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x21000 0x1000>,
			      <0x20100 0x100>;
		};

		L2: cache-controller@22000 {
			compatible = "arm,pl310-cache";
			reg = <0x22000 0x1000>;
			cache-unified;
			cache-level = <2>;
		};
	};

	axi {
		compatible = "simple-bus";
		ranges;
		#address-cells = <1>;
		#size-cells = <1>;

		otp: otp@301c800 {
			compatible = "brcm,ocotp";
			reg = <0x0301c800 0x2c>;
			brcm,ocotp-size = <2048>;
			status = "disabled";
		};

		pcie_phy: pcie_phy@301d0a0 {
			compatible = "brcm,cygnus-pcie-phy";
			reg = <0x0301d0a0 0x14>;
			#address-cells = <1>;
			#size-cells = <0>;

			pcie0_phy: pcie-phy@0 {
				reg = <0>;
				#phy-cells = <0>;
			};

			pcie1_phy: pcie-phy@1 {
				reg = <1>;
				#phy-cells = <0>;
			};
		};

		pinctrl: pinctrl@301d0c8 {
			compatible = "brcm,cygnus-pinmux";
			reg = <0x0301d0c8 0x30>,
			      <0x0301d24c 0x2c>;

			spi_0: spi_0 {
				function = "spi0";
				groups = "spi0_grp";
			};

			spi_1: spi_1 {
				function = "spi1";
				groups = "spi1_grp";
			};

			spi_2: spi_2 {
				function = "spi2";
				groups = "spi2_grp";
			};
		};

		mailbox: mailbox@3024024 {
			compatible = "brcm,iproc-mailbox";
			reg = <0x03024024 0x40>;
			interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
			#interrupt-cells = <1>;
			interrupt-controller;
			#mbox-cells = <1>;
		};

		gpio_crmu: gpio@3024800 {
			compatible = "brcm,cygnus-crmu-gpio";
			reg = <0x03024800 0x50>,
			      <0x03024008 0x18>;
			ngpios = <6>;
			#gpio-cells = <2>;
			gpio-controller;
			interrupt-controller;
			interrupt-parent = <&mailbox>;
			interrupts = <0>;
		};

		mdio: mdio@18002000 {
			compatible = "brcm,iproc-mdio";
			reg = <0x18002000 0x8>;
			#size-cells = <0>;
			#address-cells = <1>;
			status = "disabled";

			gphy0: ethernet-phy@0 {
				reg = <0>;
			};

			gphy1: ethernet-phy@1 {
				reg = <1>;
			};
		};

		switch: switch@18007000 {
			compatible = "brcm,bcm11360-srab", "brcm,cygnus-srab";
			reg = <0x18007000 0x1000>;
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					phy-handle = <&gphy0>;
					phy-mode = "rgmii";
				};

				port@1 {
					reg = <1>;
					phy-handle = <&gphy1>;
					phy-mode = "rgmii";
				};

				port@8 {
					reg = <8>;
					label = "cpu";
					ethernet = <&eth0>;
					fixed-link {
						speed = <1000>;
						full-duplex;
					};
				};
			};
		};

		i2c0: i2c@18008000 {
			compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
			reg = <0x18008000 0x100>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <100000>;
			status = "disabled";
		};

		wdt0: wdt@18009000 {
			compatible = "arm,sp805" , "arm,primecell";
			reg = <0x18009000 0x1000>;
			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&axi81_clk>, <&axi81_clk>;
			clock-names = "wdog_clk", "apb_pclk";
		};

		gpio_ccm: gpio@1800a000 {
			compatible = "brcm,cygnus-ccm-gpio";
			reg = <0x1800a000 0x50>,
			      <0x0301d164 0x20>;
			ngpios = <24>;
			#gpio-cells = <2>;
			gpio-controller;
			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-controller;
		};

		i2c1: i2c@1800b000 {
			compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
			reg = <0x1800b000 0x100>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <100000>;
			status = "disabled";
		};

		pcie0: pcie@18012000 {
			compatible = "brcm,iproc-pcie";
			reg = <0x18012000 0x1000>;

			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 0>;
			interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;

			linux,pci-domain = <0>;

			bus-range = <0x00 0xff>;

			#address-cells = <3>;
			#size-cells = <2>;
			device_type = "pci";
			ranges = <0x81000000 0 0	  0x28000000 0 0x00010000>,
				 <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;

			phys = <&pcie0_phy>;
			phy-names = "pcie-phy";

			status = "disabled";

			msi-parent = <&msi0>;
			msi0: msi {
				compatible = "brcm,iproc-msi";
				msi-controller;
				interrupt-parent = <&gic>;
				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		pcie1: pcie@18013000 {
			compatible = "brcm,iproc-pcie";
			reg = <0x18013000 0x1000>;

			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 0>;
			interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;

			linux,pci-domain = <1>;

			bus-range = <0x00 0xff>;

			#address-cells = <3>;
			#size-cells = <2>;
			device_type = "pci";
			ranges = <0x81000000 0 0	  0x48000000 0 0x00010000>,
				 <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;

			phys = <&pcie1_phy>;
			phy-names = "pcie-phy";

			status = "disabled";

			msi-parent = <&msi1>;
			msi1: msi {
				compatible = "brcm,iproc-msi";
				msi-controller;
				interrupt-parent = <&gic>;
				interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		dma0: dma@18018000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x18018000 0x1000>;
			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&apb_clk>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
		};

		uart0: serial@18020000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x18020000 0x100>;
			reg-shift = <2>;
			reg-io-width = <4>;
			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&axi81_clk>;
			clock-frequency = <100000000>;
			status = "disabled";
		};

		uart1: serial@18021000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x18021000 0x100>;
			reg-shift = <2>;
			reg-io-width = <4>;
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&axi81_clk>;
			clock-frequency = <100000000>;
			status = "disabled";
		};

		uart2: serial@18022000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x18022000 0x100>;
			reg-shift = <2>;
			reg-io-width = <4>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&axi81_clk>;
			clock-frequency = <100000000>;
			status = "disabled";
		};

		uart3: serial@18023000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x18023000 0x100>;
			reg-shift = <2>;
			reg-io-width = <4>;
			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&axi81_clk>;
			clock-frequency = <100000000>;
			status = "disabled";
		};

		spi0: spi@18028000 {
			compatible = "arm,pl022", "arm,primecell";
			reg = <0x18028000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-0 = <&spi_0>;
			clocks = <&axi81_clk>, <&axi81_clk>;
			clock-names = "sspclk", "apb_pclk";
			status = "disabled";
		};

		spi1: spi@18029000 {
			compatible = "arm,pl022", "arm,primecell";
			reg = <0x18029000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-0 = <&spi_1>;
			clocks = <&axi81_clk>, <&axi81_clk>;
			clock-names = "sspclk", "apb_pclk";
			status = "disabled";
		};

		spi2: spi@1802a000 {
			compatible = "arm,pl022", "arm,primecell";
			reg = <0x1802a000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-0 = <&spi_2>;
			clocks = <&axi81_clk>, <&axi81_clk>;
			clock-names = "sspclk", "apb_pclk";
			status = "disabled";
		};

		rng: rng@18032000 {
			compatible = "brcm,iproc-rng200";
			reg = <0x18032000 0x28>;
		};

		sdhci0: sdhci@18041000 {
			compatible = "brcm,sdhci-iproc-cygnus";
			reg = <0x18041000 0x100>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&lcpll0 BCM_CYGNUS_LCPLL0_SDIO_CLK>;
			bus-width = <4>;
			sdhci,auto-cmd12;
			status = "disabled";
		};

		eth0: ethernet@18042000 {
			compatible = "brcm,amac";
			reg = <0x18042000 0x1000>,
			      <0x18110000 0x1000>;
			reg-names = "amac_base", "idm_base";
			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		sdhci1: sdhci@18043000 {
			compatible = "brcm,sdhci-iproc-cygnus";
			reg = <0x18043000 0x100>;
			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&lcpll0 BCM_CYGNUS_LCPLL0_SDIO_CLK>;
			bus-width = <4>;
			sdhci,auto-cmd12;
			status = "disabled";
		};

		nand_controller: nand-controller@18046000 {
			compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
			reg = <0x18046000 0x600>, <0xf8105408 0x600>,
			      <0x18046f00 0x20>;
			reg-names = "nand", "iproc-idm", "iproc-ext";
			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;
			#size-cells = <0>;

			brcm,nand-has-wp;
		};

		ehci0: usb@18048000 {
			compatible = "generic-ehci";
			reg = <0x18048000 0x100>;
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		ohci0: usb@18048800 {
			compatible = "generic-ohci";
			reg = <0x18048800 0x100>;
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		clcd: clcd@180a0000 {
			compatible = "arm,pl111", "arm,primecell";
			reg = <0x180a0000 0x1000>;
			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "combined";
			clocks = <&axi41_clk>, <&apb_clk>;
			clock-names = "clcdclk", "apb_pclk";
			status = "disabled";
		};

		v3d: v3d@180a2000 {
			compatible = "brcm,cygnus-v3d";
			reg = <0x180a2000 0x1000>;
			clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>;
			clock-names = "v3d_clk";
			interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		vc4: gpu {
			compatible = "brcm,cygnus-vc4";
		};

		gpio_asiu: gpio@180a5000 {
			compatible = "brcm,cygnus-asiu-gpio";
			reg = <0x180a5000 0x668>;
			ngpios = <146>;
			#gpio-cells = <2>;
			gpio-controller;

			interrupt-controller;
			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
			gpio-ranges = <&pinctrl 0 42 1>,
					<&pinctrl 1 44 3>,
					<&pinctrl 4 48 1>,
					<&pinctrl 5 50 3>,
					<&pinctrl 8 126 1>,
					<&pinctrl 9 155 1>,
					<&pinctrl 10 152 1>,
					<&pinctrl 11 154 1>,
					<&pinctrl 12 153 1>,
					<&pinctrl 13 127 3>,
					<&pinctrl 16 140 1>,
					<&pinctrl 17 145 7>,
					<&pinctrl 24 130 10>,
					<&pinctrl 34 141 4>,
					<&pinctrl 38 54 1>,
					<&pinctrl 39 56 3>,
					<&pinctrl 42 60 3>,
					<&pinctrl 45 64 3>,
					<&pinctrl 48 68 2>,
					<&pinctrl 50 84 6>,
					<&pinctrl 56 94 6>,
					<&pinctrl 62 72 1>,
					<&pinctrl 63 70 1>,
					<&pinctrl 64 80 1>,
					<&pinctrl 65 74 3>,
					<&pinctrl 68 78 1>,
					<&pinctrl 69 82 1>,
					<&pinctrl 70 156 17>,
					<&pinctrl 87 104 12>,
					<&pinctrl 99 102 2>,
					<&pinctrl 101 90 4>,
					<&pinctrl 105 116 6>,
					<&pinctrl 111 100 2>,
					<&pinctrl 113 122 4>,
					<&pinctrl 123 11 1>,
					<&pinctrl 124 38 4>,
					<&pinctrl 128 43 1>,
					<&pinctrl 129 47 1>,
					<&pinctrl 130 49 1>,
					<&pinctrl 131 53 1>,
					<&pinctrl 132 55 1>,
					<&pinctrl 133 59 1>,
					<&pinctrl 134 63 1>,
					<&pinctrl 135 67 1>,
					<&pinctrl 136 71 1>,
					<&pinctrl 137 73 1>,
					<&pinctrl 138 77 1>,
					<&pinctrl 139 79 1>,
					<&pinctrl 140 81 1>,
					<&pinctrl 141 83 1>,
					<&pinctrl 142 10 1>;
		};

		ts_adc_syscon: ts_adc_syscon@180a6000 {
			compatible = "brcm,iproc-ts-adc-syscon", "syscon";
			reg = <0x180a6000 0xc30>;
		};

		touchscreen: touchscreen@180a6000 {
			compatible = "brcm,iproc-touchscreen";
			#address-cells = <1>;
			#size-cells = <1>;
			ts_syscon = <&ts_adc_syscon>;
			clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
			clock-names = "tsc_clk";
			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		adc: adc@180a6000 {
			compatible = "brcm,iproc-static-adc";
			#io-channel-cells = <1>;
			adc-syscon = <&ts_adc_syscon>;
			clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
			clock-names = "tsc_clk";
			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		pwm: pwm@180aa500 {
			compatible = "brcm,kona-pwm";
			reg = <0x180aa500 0xc4>;
			#pwm-cells = <3>;
			clocks = <&asiu_clks BCM_CYGNUS_ASIU_PWM_CLK>;
			status = "disabled";
		};

		keypad: keypad@180ac000 {
			compatible = "brcm,bcm-keypad";
			reg = <0x180ac000 0x14c>;
			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&asiu_clks BCM_CYGNUS_ASIU_KEYPAD_CLK>;
			clock-names = "peri_clk";
			clock-frequency = <31250>;
			pull-up-enabled;
			col-debounce-filter-period = <0>;
			status-debounce-filter-period = <0>;
			row-output-enabled;
			status = "disabled";
		};
	};
};


code:
/*
 *  BSD LICENSE
 *
 *  Copyright(c) 2017 Broadcom.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    * Redistributions of source code must retain the above copyright
 *      notice, this list of conditions and the following disclaimer.
 *    * Redistributions in binary form must reproduce the above copyright
 *      notice, this list of conditions and the following disclaimer in
 *      the documentation and/or other materials provided with the
 *      distribution.
 *    * Neither the name of Broadcom Corporation nor the names of its
 *      contributors may be used to endorse or promote products derived
 *      from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	compatible = "brcm,hr2";
	model = "Broadcom Hurricane 2 SoC";
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			reg = <0x0>;
		};
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH
			      GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>;
	};

	mpcore@19000000 {
		compatible = "simple-bus";
		ranges = <0x00000000 0x19000000 0x00023000>;
		#address-cells = <1>;
		#size-cells = <1>;

		a9pll: arm_clk@0 {
			#clock-cells = <0>;
			compatible = "brcm,hr2-armpll";
			clocks = <&osc>;
			reg = <0x0 0x1000>;
		};

		timer@20200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0x20200 0x100>;
			interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
			clocks = <&periph_clk>;
		};

		twd-timer@20600 {
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0x20600 0x20>;
			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
						  IRQ_TYPE_EDGE_RISING)>;
			clocks = <&periph_clk>;
		};

		twd-watchdog@20620 {
			compatible = "arm,cortex-a9-twd-wdt";
			reg = <0x20620 0x20>;
			interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
						  IRQ_TYPE_EDGE_RISING)>;
			clocks = <&periph_clk>;
		};

		gic: interrupt-controller@21000 {
			compatible = "arm,cortex-a9-gic";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x21000 0x1000>,
			      <0x20100 0x100>;
		};

		L2: cache-controller@22000 {
			compatible = "arm,pl310-cache";
			reg = <0x22000 0x1000>;
			cache-unified;
			cache-level = <2>;
		};
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		osc: oscillator {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <25000000>;
		};

		periph_clk: periph_clk {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&a9pll>;
			clock-div = <2>;
			clock-mult = <1>;
		};
	};

	axi@18000000 {
		compatible = "simple-bus";
		ranges = <0x00000000 0x18000000 0x0011c40c>;
		#address-cells = <1>;
		#size-cells = <1>;

		uart0: serial@300 {
			compatible = "ns16550a";
			reg = <0x0300 0x100>;
			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc>;
			status = "disabled";
		};

		uart1: serial@400 {
			compatible = "ns16550a";
			reg = <0x0400 0x100>;
			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc>;
			status = "disabled";
		};

		dma@20000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x20000 0x1000>;
			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
			#dma-cells = <1>;
			status = "disabled";
		};

		amac0: ethernet@22000 {
			compatible = "brcm,nsp-amac";
			reg = <0x22000 0x1000>,
			      <0x110000 0x1000>;
			reg-names = "amac_base", "idm_base";
			interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		nand_controller: nand-controller@26000 {
			compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
			reg = <0x26000 0x600>,
			      <0x11b408 0x600>,
			      <0x026f00 0x20>;
			reg-names = "nand", "iproc-idm", "iproc-ext";
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;
			#size-cells = <0>;

			brcm,nand-has-wp;
		};

		gpiob: gpio@30000 {
			compatible = "brcm,iproc-hr2-gpio", "brcm,iproc-gpio";
			reg = <0x30000 0x50>;
			#gpio-cells = <2>;
			gpio-controller;
			ngpios = <4>;
			interrupt-controller;
			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
		};

		pwm: pwm@31000 {
			compatible = "brcm,iproc-pwm";
			reg = <0x31000 0x28>;
			clocks = <&osc>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		rng: rng@33000 {
			compatible = "brcm,bcm-nsp-rng";
			reg = <0x33000 0x14>;
		};

		qspi: spi@27200 {
			compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
			reg = <0x027200 0x184>,
			      <0x027000 0x124>,
			      <0x11c408 0x004>,
			      <0x0273a0 0x01c>;
			reg-names = "mspi", "bspi", "intr_regs",
				    "intr_status_reg";
			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "spi_lr_fullness_reached",
					  "spi_lr_session_aborted",
					  "spi_lr_impatient",
					  "spi_lr_session_done",
					  "spi_lr_overhead",
					  "mspi_done",
					  "mspi_halted";
			num-cs = <2>;
			#address-cells = <1>;
			#size-cells = <0>;

			/* partitions defined in board DTS */
		};

		ccbtimer0: timer@34000 {
			compatible = "arm,sp804";
			reg = <0x34000 0x1000>;
			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
		};

		ccbtimer1: timer@35000 {
			compatible = "arm,sp804";
			reg = <0x35000 0x1000>;
			interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
		};

		i2c0: i2c@38000 {
			compatible = "brcm,iproc-i2c";
			reg = <0x38000 0x50>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <100000>;
		};

		watchdog: watchdog@39000 {
			compatible = "arm,sp805", "arm,primecell";
			reg = <0x39000 0x1000>;
			interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
		};

		i2c1: i2c@3b000 {
			compatible = "brcm,iproc-i2c";
			reg = <0x3b000 0x50>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <100000>;
		};
	};

	pflash: nor@20000000 {
		compatible = "cfi-flash", "jedec-flash";
		reg = <0x20000000 0x04000000>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <1>;

		/* partitions defined in board DTS */
	};

	pcie0: pcie@18012000 {
		compatible = "brcm,iproc-pcie";
		reg = <0x18012000 0x1000>;

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;

		linux,pci-domain = <0>;

		bus-range = <0x00 0xff>;

		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";

		/* Note: The HW does not support I/O resources.  So,
		 * only the memory resource range is being specified.
		 */
		ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;

		status = "disabled";

		msi-parent = <&msi0>;
		msi0: msi {
			compatible = "brcm,iproc-msi";
			msi-controller;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
			brcm,pcie-msi-inten;
		};
	};

	pcie1: pcie@18013000 {
		compatible = "brcm,iproc-pcie";
		reg = <0x18013000 0x1000>;

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;

		linux,pci-domain = <1>;

		bus-range = <0x00 0xff>;

		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";

		/* Note: The HW does not support I/O resources.  So,
		 * only the memory resource range is being specified.
		 */
		ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;

		status = "disabled";

		msi-parent = <&msi1>;
		msi1: msi {
			compatible = "brcm,iproc-msi";
			msi-controller;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
			brcm,pcie-msi-inten;
		};
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Broadcom Northstar Plus Ax stepping-specific bindings.
 * Notable differences from B0+ are the secondary-boot-reg and
 * lack of DMA coherency.
 */

&cpu1 {
	secondary-boot-reg = <0xffff042c>;
};

&dma {
	/delete-property/ dma-coherent;
};

&sdio {
	/delete-property/ dma-coherent;
};

&amac0 {
	/delete-property/ dma-coherent;
};

&amac1 {
	/delete-property/ dma-coherent;
};

&amac2 {
	/delete-property/ dma-coherent;
};

&ehci0 {
	/delete-property/ dma-coherent;
};

&mailbox {
	/delete-property/ dma-coherent;
};

&xhci {
	/delete-property/ dma-coherent;
};

&ehci0 {
	/delete-property/ dma-coherent;
};

&ohci0 {
	/delete-property/ dma-coherent;
};

&i2c0 {
	/delete-property/ dma-coherent;
};

&sata {
	/delete-property/ dma-coherent;
};

&pcie0 {
	/delete-property/ dma-coherent;
};

&pcie1 {
	/delete-property/ dma-coherent;
};

&pcie2 {
	/delete-property/ dma-coherent;
};


code:
/*
 *  BSD LICENSE
 *
 *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    * Redistributions of source code must retain the above copyright
 *      notice, this list of conditions and the following disclaimer.
 *    * Redistributions in binary form must reproduce the above copyright
 *      notice, this list of conditions and the following disclaimer in
 *      the documentation and/or other materials provided with the
 *      distribution.
 *    * Neither the name of Broadcom Corporation nor the names of its
 *      contributors may be used to endorse or promote products derived
 *      from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/bcm-nsp.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,nsp";
	model = "Broadcom Northstar Plus SoC";
	interrupt-parent = <&gic>;

	aliases {
		serial0 = &uart0;
		serial1 = &uart1;
		ethernet0 = &amac0;
		ethernet1 = &amac1;
		ethernet2 = &amac2;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			reg = <0x0>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			enable-method = "brcm,bcm-nsp-smp";
			secondary-boot-reg = <0xffff0fec>;
			reg = <0x1>;
		};
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH
			      GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>;
	};

	mpcore-bus@19000000 {
		compatible = "simple-bus";
		ranges = <0x00000000 0x19000000 0x00023000>;
		#address-cells = <1>;
		#size-cells = <1>;

		a9pll: arm_clk@0 {
			#clock-cells = <0>;
			compatible = "brcm,nsp-armpll";
			clocks = <&osc>;
			reg = <0x00000 0x1000>;
		};

		timer@20200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0x20200 0x100>;
			interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
			clocks = <&periph_clk>;
		};

		twd-timer@20600 {
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0x20600 0x20>;
			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
						  IRQ_TYPE_EDGE_RISING)>;
			clocks = <&periph_clk>;
		};

		twd-watchdog@20620 {
			compatible = "arm,cortex-a9-twd-wdt";
			reg = <0x20620 0x20>;
			interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
						  IRQ_TYPE_LEVEL_HIGH)>;
			clocks = <&periph_clk>;
		};

		gic: interrupt-controller@21000 {
			compatible = "arm,cortex-a9-gic";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x21000 0x1000>,
			      <0x20100 0x100>;
		};

		L2: cache-controller@22000 {
			compatible = "arm,pl310-cache";
			reg = <0x22000 0x1000>;
			cache-unified;
			cache-level = <2>;
		};
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		osc: oscillator {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <25000000>;
		};

		iprocmed: iprocmed {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
			clock-div = <2>;
			clock-mult = <1>;
		};

		iprocslow: iprocslow {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
			clock-div = <4>;
			clock-mult = <1>;
		};

		periph_clk: periph_clk {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&a9pll>;
			clock-div = <2>;
			clock-mult = <1>;
		};
	};

	axi: axi@18000000 {
		compatible = "simple-bus";
		ranges = <0x00000000 0x18000000 0x0011c40c>;
		#address-cells = <1>;
		#size-cells = <1>;

		gpioa: gpio@20 {
			compatible = "brcm,nsp-gpio-a";
			reg = <0x0020 0x70>,
			      <0x3f1c4 0x1c>;
			#gpio-cells = <2>;
			gpio-controller;
			ngpios = <32>;
			interrupt-controller;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			gpio-ranges = <&pinctrl 0 0 32>;
		};

		uart0: serial@300 {
			compatible = "ns16550a";
			reg = <0x0300 0x100>;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc>;
			status = "disabled";
		};

		uart1: serial@400 {
			compatible = "ns16550a";
			reg = <0x0400 0x100>;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc>;
			status = "disabled";
		};

		dma: dma@20000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x20000 0x1000>;
			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&iprocslow>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			dma-coherent;
			status = "disabled";
		};

		sdio: mmc@21000 {
			compatible = "brcm,sdhci-iproc-cygnus";
			reg = <0x21000 0x100>;
			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
			sdhci,auto-cmd12;
			clocks = <&lcpll0 BCM_NSP_LCPLL0_SDIO_CLK>;
			dma-coherent;
			status = "disabled";
		};

		amac0: ethernet@22000 {
			compatible = "brcm,nsp-amac";
			reg = <0x022000 0x1000>,
			      <0x110000 0x1000>;
			reg-names = "amac_base", "idm_base";
			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
			dma-coherent;
			status = "disabled";
		};

		amac1: ethernet@23000 {
			compatible = "brcm,nsp-amac";
			reg = <0x023000 0x1000>,
			      <0x111000 0x1000>;
			reg-names = "amac_base", "idm_base";
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
			dma-coherent;
			status = "disabled";
		};

		amac2: ethernet@24000 {
			compatible = "brcm,nsp-amac";
			reg = <0x024000 0x1000>,
			      <0x112000 0x1000>;
			reg-names = "amac_base", "idm_base";
			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
			dma-coherent;
			status = "disabled";
		};

		mailbox: mailbox@25c00 {
			compatible = "brcm,iproc-fa2-mbox";
			reg = <0x25c00 0x400>;
			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
			#mbox-cells = <1>;
			brcm,rx-status-len = <32>;
			brcm,use-bcm-hdr;
			dma-coherent;
		};

		nand_controller: nand-controller@26000 {
			compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
			reg = <0x026000 0x600>,
			      <0x11b408 0x600>,
			      <0x026f00 0x20>;
			reg-names = "nand", "iproc-idm", "iproc-ext";
			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;
			#size-cells = <0>;

			brcm,nand-has-wp;
		};

		qspi: spi@27200 {
			compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
			reg = <0x027200 0x184>,
			      <0x027000 0x124>,
			      <0x11c408 0x004>,
			      <0x0273a0 0x01c>;
			reg-names = "mspi", "bspi", "intr_regs",
				    "intr_status_reg";
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "spi_lr_fullness_reached",
					  "spi_lr_session_aborted",
					  "spi_lr_impatient",
					  "spi_lr_session_done",
					  "spi_lr_overhead",
					  "mspi_done",
					  "mspi_halted";
			clocks = <&iprocmed>;
			clock-names = "iprocmed";
			num-cs = <2>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		xhci: usb@29000 {
			compatible = "generic-xhci";
			reg = <0x29000 0x1000>;
			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
			phys = <&usb3_phy>;
			phy-names = "usb3-phy";
			dma-coherent;
			status = "disabled";
		};

		ehci0: usb@2a000 {
			compatible = "generic-ehci";
			reg = <0x2a000 0x100>;
			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
			dma-coherent;
			status = "disabled";
		};

		ohci0: usb@2b000 {
			compatible = "generic-ohci";
			reg = <0x2b000 0x100>;
			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
			dma-coherent;
			status = "disabled";
		};

		crypto@2f000 {
			compatible = "brcm,spum-nsp-crypto";
			reg = <0x2f000 0x900>;
			mboxes = <&mailbox 0>;
		};

		gpiob: gpio@30000 {
			compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
			reg = <0x30000 0x50>;
			#gpio-cells = <2>;
			gpio-controller;
			ngpios = <4>;
			interrupt-controller;
			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
		};

		pwm: pwm@31000 {
			compatible = "brcm,iproc-pwm";
			reg = <0x31000 0x28>;
			clocks = <&osc>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		mdio: mdio@32000 {
			compatible = "brcm,iproc-mdio";
			reg = <0x32000 0x8>;
			#size-cells = <0>;
			#address-cells = <1>;
		};

		mdio-mux@32000 {
			compatible = "mdio-mux-mmioreg", "mdio-mux";
			reg = <0x32000 0x4>;
			mux-mask = <0x200>;
			#address-cells = <1>;
			#size-cells = <0>;
			mdio-parent-bus = <&mdio>;

			mdio_int: mdio@0 {
				reg = <0x0>;
				#address-cells = <1>;
				#size-cells = <0>;

				usb3_phy: usb3-phy@10 {
					compatible = "brcm,ns-bx-usb3-phy";
					reg = <0x10>;
					usb3-dmp-syscon = <&usb3_dmp>;
					#phy-cells = <0>;
					status = "disabled";
				};
			};

			mdio_ext: mdio@200 {
				reg = <0x200>;
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		rng: rng@33000 {
			compatible = "brcm,bcm-nsp-rng";
			reg = <0x33000 0x14>;
		};

		ccbtimer0: timer@34000 {
			compatible = "arm,sp804", "arm,primecell";
			reg = <0x34000 0x1000>;
			interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&iprocslow>;
			clock-names = "apb_pclk";
		};

		ccbtimer1: timer@35000 {
			compatible = "arm,sp804", "arm,primecell";
			reg = <0x35000 0x1000>;
			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&iprocslow>;
			clock-names = "apb_pclk";
		};

		srab: ethernet-switch@36000 {
			compatible = "brcm,nsp-srab";
			reg = <0x36000 0x1000>,
			      <0x3f308 0x8>,
			      <0x3f410 0xc>;
			reg-names = "srab", "mux_config", "sgmii_config";
			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "link_state_p0",
					  "link_state_p1",
					  "link_state_p2",
					  "link_state_p3",
					  "link_state_p4",
					  "link_state_p5",
					  "link_state_p7",
					  "link_state_p8",
					  "phy",
					  "ts",
					  "imp_sleep_timer_p5",
					  "imp_sleep_timer_p7",
					  "imp_sleep_timer_p8";
			status = "disabled";

			/* ports are defined in board DTS */
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		i2c0: i2c@38000 {
			compatible = "brcm,iproc-i2c";
			reg = <0x38000 0x50>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <100000>;
			dma-coherent;
			status = "disabled";
		};

		watchdog@39000 {
			compatible = "arm,sp805", "arm,primecell";
			reg = <0x39000 0x1000>;
			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&iprocslow>, <&iprocslow>;
			clock-names = "wdog_clk", "apb_pclk";
		};

		lcpll0: lcpll0@3f100 {
			#clock-cells = <1>;
			compatible = "brcm,nsp-lcpll0";
			reg = <0x3f100 0x14>;
			clocks = <&osc>;
			clock-output-names = "lcpll0", "pcie_phy", "sdio",
					     "ddr_phy";
		};

		genpll: genpll@3f140 {
			#clock-cells = <1>;
			compatible = "brcm,nsp-genpll";
			reg = <0x3f140 0x24>;
			clocks = <&osc>;
			clock-output-names = "genpll", "phy", "ethernetclk",
					     "usbclk", "iprocfast", "sata1",
					     "sata2";
		};

		pinctrl: pinctrl@3f1c0 {
			compatible = "brcm,nsp-pinmux";
			reg = <0x3f1c0 0x04>,
			      <0x30028 0x04>,
			      <0x3f408 0x04>;
		};

		thermal: thermal@3f2c0 {
			compatible = "brcm,ns-thermal";
			reg = <0x3f2c0 0x10>;
			#thermal-sensor-cells = <0>;
		};

		sata_phy: sata_phy@40100 {
			compatible = "brcm,iproc-nsp-sata-phy";
			reg = <0x40100 0x340>;
			reg-names = "phy";
			#address-cells = <1>;
			#size-cells = <0>;

			sata_phy0: sata-phy@0 {
				reg = <0>;
				#phy-cells = <0>;
				status = "disabled";
			};

			sata_phy1: sata-phy@1 {
				reg = <1>;
				#phy-cells = <0>;
				status = "disabled";
			};
		};

		sata: sata@41000 {
			compatible = "brcm,bcm-nsp-ahci";
			reg-names = "ahci", "top-ctrl";
			reg = <0x41000 0x1000>, <0x40020 0x1c>;
			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			dma-coherent;
			status = "disabled";

			sata0: sata-port@0 {
				reg = <0>;
				phys = <&sata_phy0>;
				phy-names = "sata-phy";
			};

			sata1: sata-port@1 {
				reg = <1>;
				phys = <&sata_phy1>;
				phy-names = "sata-phy";
			};
		};

		usb3_dmp: syscon@104000 {
			reg = <0x104000 0x1000>;
		};
	};

	pcie0: pcie@18012000 {
		compatible = "brcm,iproc-pcie";
		reg = <0x18012000 0x1000>;

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;

		linux,pci-domain = <0>;

		bus-range = <0x00 0xff>;

		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";

		/* Note: The HW does not support I/O resources.  So,
		 * only the memory resource range is being specified.
		 */
		ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;

		dma-coherent;
		status = "disabled";

		msi-parent = <&msi0>;
		msi0: msi {
			compatible = "brcm,iproc-msi";
			msi-controller;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
			brcm,pcie-msi-inten;
		};
	};

	pcie1: pcie@18013000 {
		compatible = "brcm,iproc-pcie";
		reg = <0x18013000 0x1000>;

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;

		linux,pci-domain = <1>;

		bus-range = <0x00 0xff>;

		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";

		/* Note: The HW does not support I/O resources.  So,
		 * only the memory resource range is being specified.
		 */
		ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;

		dma-coherent;
		status = "disabled";

		msi-parent = <&msi1>;
		msi1: msi {
			compatible = "brcm,iproc-msi";
			msi-controller;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
			brcm,pcie-msi-inten;
		};
	};

	pcie2: pcie@18014000 {
		compatible = "brcm,iproc-pcie";
		reg = <0x18014000 0x1000>;

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;

		linux,pci-domain = <2>;

		bus-range = <0x00 0xff>;

		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";

		/* Note: The HW does not support I/O resources.  So,
		 * only the memory resource range is being specified.
		 */
		ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;

		dma-coherent;
		status = "disabled";

		msi-parent = <&msi2>;
		msi2: msi {
			compatible = "brcm,iproc-msi";
			msi-controller;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
			brcm,pcie-msi-inten;
		};
	};

	thermal-zones {
		cpu-thermal {
			polling-delay-passive = <0>;
			polling-delay = <1000>;
			coefficients = <(-556) 418000>;
			thermal-sensors = <&thermal>;

			trips {
				cpu-crit {
					temperature     = <125000>;
					hysteresis      = <0>;
					type            = "critical";
				};
			};

			cooling-maps {
			};
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2012-2013 Broadcom Corporation

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

#include "dt-bindings/clock/bcm281xx.h"

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "BCM11351 SoC";
	compatible = "brcm,bcm11351";
	interrupt-parent = <&gic>;

	chosen {
		bootargs = "console=ttyS0,115200n8";
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			enable-method = "brcm,bcm11351-cpu-method";
			secondary-boot-reg = <0x3500417c>;
			reg = <1>;
		};
	};

	gic: interrupt-controller@3ff00100 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0x3ff01000 0x1000>,
		      <0x3ff00100 0x100>;
	};

	smc@3404c000 {
		compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
		reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
	};

	uart@3e000000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e000000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e001000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e001000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e002000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e002000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e003000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e003000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	L2: l2-cache@3ff20000 {
		compatible = "brcm,bcm11351-a2-pl310-cache";
		reg = <0x3ff20000 0x1000>;
		cache-unified;
		cache-level = <2>;
	};

	watchdog@35002f40 {
		compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
		reg = <0x35002f40 0x6c>;
	};

	timer@35006000 {
		compatible = "brcm,kona-timer";
		reg = <0x35006000 0x1000>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
	};

	gpio: gpio@35003000 {
		compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
		reg = <0x35003000 0x800>;
		interrupts =
		       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
		gpio-controller;
		interrupt-controller;
	};

	sdio1: sdio@3f180000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f180000 0x10000>;
		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
		status = "disabled";
	};

	sdio2: sdio@3f190000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f190000 0x10000>;
		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
		status = "disabled";
	};

	sdio3: sdio@3f1a0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1a0000 0x10000>;
		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
		status = "disabled";
	};

	sdio4: sdio@3f1b0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1b0000 0x10000>;
		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
		status = "disabled";
	};

	pinctrl@35004800 {
		compatible = "brcm,bcm11351-pinctrl";
		reg = <0x35004800 0x430>;
	};

	i2c@3e016000 {
		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
		reg = <0x3e016000 0x80>;
		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
		status = "disabled";
	};

	i2c@3e017000 {
		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
		reg = <0x3e017000 0x80>;
		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
		status = "disabled";
	};

	i2c@3e018000 {
		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
		reg = <0x3e018000 0x80>;
		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
		status = "disabled";
	};

	i2c@3500d000 {
		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
		reg = <0x3500d000 0x80>;
		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
		status = "disabled";
	};

	pwm: pwm@3e01a000 {
		compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm";
		reg = <0x3e01a000 0xcc>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_PWM>;
		#pwm-cells = <3>;
		status = "disabled";
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		root_ccu: root_ccu@35001000 {
			compatible = "brcm,bcm11351-root-ccu";
			reg = <0x35001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "frac_1m";
		};

		hub_ccu: hub_ccu@34000000 {
			compatible = "brcm,bcm11351-hub-ccu";
			reg = <0x34000000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "tmon_1m";
		};

		aon_ccu: aon_ccu@35002000 {
			compatible = "brcm,bcm11351-aon-ccu";
			reg = <0x35002000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "hub_timer",
					     "pmu_bsc",
					     "pmu_bsc_var";
		};

		master_ccu: master_ccu@3f001000 {
			compatible = "brcm,bcm11351-master-ccu";
			reg = <0x3f001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "sdio1",
					     "sdio2",
					     "sdio3",
					     "sdio4",
					     "usb_ic",
					     "hsic2_48m",
					     "hsic2_12m";
		};

		slave_ccu: slave_ccu@3e011000 {
			compatible = "brcm,bcm11351-slave-ccu";
			reg = <0x3e011000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "uartb",
					     "uartb2",
					     "uartb3",
					     "uartb4",
					     "ssp0",
					     "ssp2",
					     "bsc1",
					     "bsc2",
					     "bsc3",
					     "pwm";
		};

		ref_1m_clk: ref_1m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <1000000>;
		};

		ref_32k_clk: ref_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		bbl_32k_clk: bbl_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		ref_13m_clk: ref_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		var_13m_clk: var_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		dft_19_5m_clk: dft_19_5m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <19500000>;
		};

		ref_crystal_clk: ref_crystal {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <26000000>;
		};

		ref_cx40_clk: ref_cx40 {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <40000000>;
		};

		ref_52m_clk: ref_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		var_52m_clk: var_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		usb_otg_ahb_clk: usb_otg_ahb {
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
			#clock-cells = <0>;
		};

		ref_96m_clk: ref_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		var_96m_clk: var_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		ref_104m_clk: ref_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		var_104m_clk: var_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		ref_156m_clk: ref_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		var_156m_clk: var_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		ref_208m_clk: ref_208m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <208000000>;
		};

		var_208m_clk: var_208m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <208000000>;
		};

		ref_312m_clk: ref_312m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <312000000>;
		};

		var_312m_clk: var_312m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <312000000>;
		};
	};

	usbotg: usb@3f120000 {
		compatible = "snps,dwc2";
		reg = <0x3f120000 0x10000>;
		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&usb_otg_ahb_clk>;
		clock-names = "otg";
		phys = <&usbphy>;
		phy-names = "usb2-phy";
		status = "disabled";
	};

	usbphy: usb-phy@3f130000 {
		compatible = "brcm,kona-usb2-phy";
		reg = <0x3f130000 0x28>;
		#phy-cells = <0>;
		status = "disabled";
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2014 Broadcom Corporation

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>

#include "bcm21664.dtsi"

/ {
	model = "BCM21664 Garnet board";
	compatible = "brcm,bcm21664-garnet", "brcm,bcm21664";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>; /* 1 GB */
	};

	uart@3e000000 {
		status = "okay";
	};

	sdio1: sdio@3f180000 {
		max-frequency = <48000000>;
		status = "okay";
	};

	sdio2: sdio@3f190000 {
		non-removable;
		max-frequency = <48000000>;
		status = "okay";
	};

	sdio4: sdio@3f1b0000 {
		max-frequency = <48000000>;
		cd-gpios = <&gpio 91 GPIO_ACTIVE_LOW>;
		status = "okay";
	};

	usbotg: usb@3f120000 {
		status = "okay";
	};

	usbphy: usb-phy@3f130000 {
		status = "okay";
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2014 Broadcom Corporation

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

#include "dt-bindings/clock/bcm21664.h"

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "BCM21664 SoC";
	compatible = "brcm,bcm21664";
	interrupt-parent = <&gic>;

	chosen {
		bootargs = "console=ttyS0,115200n8";
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			enable-method = "brcm,bcm11351-cpu-method";
			secondary-boot-reg = <0x35004178>;
			reg = <1>;
		};
	};

	gic: interrupt-controller@3ff00100 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0x3ff01000 0x1000>,
		      <0x3ff00100 0x100>;
	};

	smc@3404e000 {
		compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
		reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
	};

	uart@3e000000 {
		compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e000000 0x118>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e001000 {
		compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e001000 0x118>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e002000 {
		compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e002000 0x118>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	L2: cache-controller@3ff20000 {
		compatible = "arm,pl310-cache";
		reg = <0x3ff20000 0x1000>;
		cache-unified;
		cache-level = <2>;
	};

	brcm,resetmgr@35001f00 {
		compatible = "brcm,bcm21664-resetmgr";
		reg = <0x35001f00 0x24>;
	};

	timer@35006000 {
		compatible = "brcm,kona-timer";
		reg = <0x35006000 0x1c>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
	};

	gpio: gpio@35003000 {
		compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
		reg = <0x35003000 0x524>;
		interrupts =
		       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
		gpio-controller;
		interrupt-controller;
	};

	sdio1: sdio@3f180000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f180000 0x801c>;
		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
		status = "disabled";
	};

	sdio2: sdio@3f190000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f190000 0x801c>;
		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
		status = "disabled";
	};

	sdio3: sdio@3f1a0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1a0000 0x801c>;
		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
		status = "disabled";
	};

	sdio4: sdio@3f1b0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1b0000 0x801c>;
		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
		status = "disabled";
	};

	i2c@3e016000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e016000 0x70>;
		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
		status = "disabled";
	};

	i2c@3e017000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e017000 0x70>;
		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
		status = "disabled";
	};

	i2c@3e018000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e018000 0x70>;
		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
		status = "disabled";
	};

	i2c@3e01c000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e01c000 0x70>;
		interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
		status = "disabled";
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/*
		 * Fixed clocks are defined before CCUs whose
		 * clocks may depend on them.
		 */

		ref_32k_clk: ref_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		bbl_32k_clk: bbl_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		ref_13m_clk: ref_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		var_13m_clk: var_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		dft_19_5m_clk: dft_19_5m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <19500000>;
		};

		ref_crystal_clk: ref_crystal {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <26000000>;
		};

		ref_52m_clk: ref_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		var_52m_clk: var_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		usb_otg_ahb_clk: usb_otg_ahb {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		ref_96m_clk: ref_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		var_96m_clk: var_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		ref_104m_clk: ref_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		var_104m_clk: var_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		ref_156m_clk: ref_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		var_156m_clk: var_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		root_ccu: root_ccu@35001000 {
			compatible = BCM21664_DT_ROOT_CCU_COMPAT;
			reg = <0x35001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "frac_1m";
		};

		aon_ccu: aon_ccu@35002000 {
			compatible = BCM21664_DT_AON_CCU_COMPAT;
			reg = <0x35002000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "hub_timer";
		};

		master_ccu: master_ccu@3f001000 {
			compatible = BCM21664_DT_MASTER_CCU_COMPAT;
			reg = <0x3f001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "sdio1",
					     "sdio2",
					     "sdio3",
					     "sdio4",
					     "sdio1_sleep",
					     "sdio2_sleep",
					     "sdio3_sleep",
					     "sdio4_sleep";
		};

		slave_ccu: slave_ccu@3e011000 {
			compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
			reg = <0x3e011000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "uartb",
					     "uartb2",
					     "uartb3",
					     "bsc1",
					     "bsc2",
					     "bsc3",
					     "bsc4";
		};
	};

	usbotg: usb@3f120000 {
		compatible = "snps,dwc2";
		reg = <0x3f120000 0x10000>;
		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&usb_otg_ahb_clk>;
		clock-names = "otg";
		phys = <&usbphy>;
		phy-names = "usb2-phy";
		status = "disabled";
	};

	usbphy: usb-phy@3f130000 {
		compatible = "brcm,kona-usb2-phy";
		reg = <0x3f130000 0x28>;
		#phy-cells = <0>;
		status = "disabled";
	};
};


code:
/*
 *  BSD LICENSE
 *
 *  Copyright(c) 2016 Broadcom.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    * Redistributions of source code must retain the above copyright
 *      notice, this list of conditions and the following disclaimer.
 *    * Redistributions in binary form must reproduce the above copyright
 *      notice, this list of conditions and the following disclaimer in
 *      the documentation and/or other materials provided with the
 *      distribution.
 *    * Neither the name of Broadcom Corporation nor the names of its
 *      contributors may be used to endorse or promote products derived
 *      from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>

#include "bcm23550.dtsi"

/ {
	model = "BCM23550 Sparrow board";
	compatible = "brcm,bcm23550-sparrow", "brcm,bcm23550";

	chosen {
		stdout-path = "/slaves@3e000000/serial@0:115200n8";
		bootargs = "console=ttyS0,115200n8";
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};
};

&uartb {
	status = "okay";
};

&usbotg {
	status = "okay";
};

&usbphy {
	status = "okay";
};

&sdio1 {
	max-frequency = <48000000>;
	status = "okay";
};

&sdio2 {
	non-removable;
	max-frequency = <48000000>;
	status = "okay";
};

&sdio4 {
	max-frequency = <48000000>;
	cd-gpios = <&gpio 91 GPIO_ACTIVE_LOW>;
	status = "okay";
};


code:
/*
 *  BSD LICENSE
 *
 *  Copyright(c) 2016 Broadcom.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    * Redistributions of source code must retain the above copyright
 *      notice, this list of conditions and the following disclaimer.
 *    * Redistributions in binary form must reproduce the above copyright
 *      notice, this list of conditions and the following disclaimer in
 *      the documentation and/or other materials provided with the
 *      distribution.
 *    * Neither the name of Broadcom Corporation nor the names of its
 *      contributors may be used to endorse or promote products derived
 *      from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

/* BCM23550 and BCM21664 have almost identical clocks */
#include "dt-bindings/clock/bcm21664.h"

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "BCM23550 SoC";
	compatible = "brcm,bcm23550";
	interrupt-parent = <&gic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			reg = <0>;
			clock-frequency = <1000000000>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			enable-method = "brcm,bcm23550";
			secondary-boot-reg = <0x35004178>;
			reg = <1>;
			clock-frequency = <1000000000>;
		};

		cpu2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			enable-method = "brcm,bcm23550";
			secondary-boot-reg = <0x35004178>;
			reg = <2>;
			clock-frequency = <1000000000>;
		};

		cpu3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			enable-method = "brcm,bcm23550";
			secondary-boot-reg = <0x35004178>;
			reg = <3>;
			clock-frequency = <1000000000>;
		};
	};

	/* Hub bus */
	hub@34000000 {
		compatible = "simple-bus";
		ranges = <0 0x34000000 0x102f83ac>;
		#address-cells = <1>;
		#size-cells = <1>;

		smc@4e000 {
			compatible = "brcm,bcm23550-smc", "brcm,kona-smc";
			reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
		};

		resetmgr: reset-controller@1001f00 {
			compatible = "brcm,bcm21664-resetmgr";
			reg = <0x01001f00 0x24>;
		};

		gpio: gpio@1003000 {
			compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio";
			reg = <0x01003000 0x524>;
			interrupts =
			       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
				GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
				GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
				GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			#interrupt-cells = <2>;
			gpio-controller;
			interrupt-controller;
		};

		timer@1006000 {
			compatible = "brcm,kona-timer";
			reg = <0x01006000 0x1c>;
			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
		};
	};

	/* Slaves bus */
	slaves@3e000000 {
		compatible = "simple-bus";
		ranges = <0 0x3e000000 0x0001c070>;
		#address-cells = <1>;
		#size-cells = <1>;

		uartb: serial@0 {
			compatible = "snps,dw-apb-uart";
			status = "disabled";
			reg = <0x00000000 0x118>;
			clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
		};

		uartb2: serial@1000 {
			compatible = "snps,dw-apb-uart";
			status = "disabled";
			reg = <0x00001000 0x118>;
			clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
		};

		uartb3: serial@2000 {
			compatible = "snps,dw-apb-uart";
			status = "disabled";
			reg = <0x00002000 0x118>;
			clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
		};

		bsc1: i2c@16000 {
			compatible = "brcm,kona-i2c";
			reg = <0x00016000 0x70>;
			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
			status = "disabled";
		};

		bsc2: i2c@17000 {
			compatible = "brcm,kona-i2c";
			reg = <0x00017000 0x70>;
			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
			status = "disabled";
		};

		bsc3: i2c@18000 {
			compatible = "brcm,kona-i2c";
			reg = <0x00018000 0x70>;
			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
			status = "disabled";
		};

		bsc4: i2c@1c000 {
			compatible = "brcm,kona-i2c";
			reg = <0x0001c000 0x70>;
			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
			status = "disabled";
		};
	};

	/* Apps bus */
	apps@3e300000 {
		compatible = "simple-bus";
		ranges = <0 0x3e300000 0x01b77000>;
		#address-cells = <1>;
		#size-cells = <1>;

		usbotg: usb@e20000 {
			compatible = "snps,dwc2";
			reg = <0x00e20000 0x10000>;
			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&usb_otg_ahb_clk>;
			clock-names = "otg";
			phys = <&usbphy>;
			phy-names = "usb2-phy";
			status = "disabled";
		};

		usbphy: usb-phy@e30000 {
			compatible = "brcm,kona-usb2-phy";
			reg = <0x00e30000 0x28>;
			#phy-cells = <0>;
			status = "disabled";
		};

		sdio1: sdio@e80000 {
			compatible = "brcm,kona-sdhci";
			reg = <0x00e80000 0x801c>;
			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
			status = "disabled";
		};

		sdio2: sdio@e90000 {
			compatible = "brcm,kona-sdhci";
			reg = <0x00e90000 0x801c>;
			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
			status = "disabled";
		};

		sdio3: sdio@ea0000 {
			compatible = "brcm,kona-sdhci";
			reg = <0x00ea0000 0x801c>;
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
			status = "disabled";
		};

		sdio4: sdio@eb0000 {
			compatible = "brcm,kona-sdhci";
			reg = <0x00eb0000 0x801c>;
			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
			status = "disabled";
		};

		cdc: cdc@1b0e000 {
			compatible = "brcm,bcm23550-cdc";
			reg = <0x01b0e000 0x78>;
		};

		gic: interrupt-controller@1b21000 {
			compatible = "arm,cortex-a9-gic";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x01b21000 0x1000>,
			      <0x01b22000 0x1000>;
		};
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/*
		 * Fixed clocks are defined before CCUs whose
		 * clocks may depend on them.
		 */

		ref_32k_clk: ref_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		bbl_32k_clk: bbl_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		ref_13m_clk: ref_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		var_13m_clk: var_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		dft_19_5m_clk: dft_19_5m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <19500000>;
		};

		ref_crystal_clk: ref_crystal {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <26000000>;
		};

		ref_52m_clk: ref_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		var_52m_clk: var_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		usb_otg_ahb_clk: usb_otg_ahb {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		ref_96m_clk: ref_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		var_96m_clk: var_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		ref_104m_clk: ref_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		var_104m_clk: var_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		ref_156m_clk: ref_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		var_156m_clk: var_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		root_ccu: root_ccu@35001000 {
			compatible = BCM21664_DT_ROOT_CCU_COMPAT;
			reg = <0x35001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "frac_1m";
		};

		aon_ccu: aon_ccu@35002000 {
			compatible = BCM21664_DT_AON_CCU_COMPAT;
			reg = <0x35002000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "hub_timer";
		};

		slave_ccu: slave_ccu@3e011000 {
			compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
			reg = <0x3e011000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "uartb",
					     "uartb2",
					     "uartb3",
					     "bsc1",
					     "bsc2",
					     "bsc3",
					     "bsc4";
		};

		master_ccu: master_ccu@3f001000 {
			compatible = BCM21664_DT_MASTER_CCU_COMPAT;
			reg = <0x3f001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "sdio1",
					     "sdio2",
					     "sdio3",
					     "sdio4",
					     "sdio1_sleep",
					     "sdio2_sleep",
					     "sdio3_sleep",
					     "sdio4_sleep";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2711.dtsi"
#include "bcm2711-rpi.dtsi"
#include "bcm283x-rpi-led-deprecated.dtsi"
#include "bcm283x-rpi-usb-peripheral.dtsi"
#include "bcm283x-rpi-wifi-bt.dtsi"

/ {
	compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
	model = "Raspberry Pi 4 Model B";

	chosen {
		/* 8250 auxiliary UART instead of pl011 */
		stdout-path = "serial1:115200n8";
	};

	sd_io_1v8_reg: regulator-sd-io-1v8 {
		compatible = "regulator-gpio";
		regulator-name = "vdd-sd-io";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
		regulator-settling-time-us = <5000>;
		gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
		states = <1800000 0x1>,
			 <3300000 0x0>;
		status = "okay";
	};

	sd_vcc_reg: regulator-sd-vcc {
		compatible = "regulator-fixed";
		regulator-name = "vcc-sd";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
	};
};

&bt {
	shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
};

&ddc0 {
	status = "okay";
};

&ddc1 {
	status = "okay";
};

&expgpio {
	gpio-line-names = "BT_ON",		/*  0 */
			  "WL_ON",
			  "PWR_LED_OFF",
			  "GLOBAL_RESET",
			  "VDD_SD_IO_SEL",
			  "CAM_GPIO",		/*  5 */
			  "SD_PWR_ON",
			  "";
};

&gpio {
	/*
	 * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
	 * the official GPU firmware DT blob.
	 *
	 * Legend:
	 * "FOO" = GPIO line named "FOO" on the schematic
	 * "FOO_N" = GPIO line named "FOO" on schematic, active low
	 */
	gpio-line-names = "ID_SDA",		/*  0 */
			  "ID_SCL",
			  "SDA1",
			  "SCL1",
			  "GPIO_GCLK",
			  "GPIO5",		/*  5 */
			  "GPIO6",
			  "SPI_CE1_N",
			  "SPI_CE0_N",
			  "SPI_MISO",
			  "SPI_MOSI",		/* 10 */
			  "SPI_SCLK",
			  "GPIO12",
			  "GPIO13",
			  /* Serial port */
			  "TXD1",
			  "RXD1",		/* 15 */
			  "GPIO16",
			  "GPIO17",
			  "GPIO18",
			  "GPIO19",
			  "GPIO20",		/* 20 */
			  "GPIO21",
			  "GPIO22",
			  "GPIO23",
			  "GPIO24",
			  "GPIO25",		/* 25 */
			  "GPIO26",
			  "GPIO27",
			  "RGMII_MDIO",
			  "RGMIO_MDC",
			  /* Used by BT module */
			  "CTS0",		/* 30 */
			  "RTS0",
			  "TXD0",
			  "RXD0",
			  /* Used by Wifi */
			  "SD1_CLK",
			  "SD1_CMD",		/* 35 */
			  "SD1_DATA0",
			  "SD1_DATA1",
			  "SD1_DATA2",
			  "SD1_DATA3",
			  /* Shared with SPI flash */
			  "PWM0_MISO",		/* 40 */
			  "PWM1_MOSI",
			  "STATUS_LED_G_CLK",
			  "SPIFLASH_CE_N",
			  "SDA0",
			  "SCL0",		/* 45 */
			  "RGMII_RXCLK",
			  "RGMII_RXCTL",
			  "RGMII_RXD0",
			  "RGMII_RXD1",
			  "RGMII_RXD2",		/* 50 */
			  "RGMII_RXD3",
			  "RGMII_TXCLK",
			  "RGMII_TXCTL",
			  "RGMII_TXD0",
			  "RGMII_TXD1",		/* 55 */
			  "RGMII_TXD2",
			  "RGMII_TXD3";
};

&hdmi0 {
	status = "okay";
};

&hdmi1 {
	status = "okay";
};

&led_act {
	gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
};

&leds {
	led_pwr: led-pwr {
		label = "PWR";
		gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
		default-state = "keep";
		linux,default-trigger = "default-on";
	};
};

&pixelvalve0 {
	status = "okay";
};

&pixelvalve1 {
	status = "okay";
};

&pixelvalve2 {
	status = "okay";
};

&pixelvalve4 {
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
	status = "okay";
};

/* EMMC2 is used to drive the SD card */
&emmc2 {
	vqmmc-supply = <&sd_io_1v8_reg>;
	vmmc-supply = <&sd_vcc_reg>;
	broken-cd;
	status = "okay";
};

&genet {
	phy-handle = <&phy1>;
	phy-mode = "rgmii-rxid";
	status = "okay";
};

&genet_mdio {
	phy1: ethernet-phy@1 {
		/* No PHY interrupt */
		reg = <0x1>;
	};
};

&pcie0 {
	pci@0,0 {
		device_type = "pci";
		#address-cells = <3>;
		#size-cells = <2>;
		ranges;

		reg = <0 0 0 0 0>;

		usb@0,0 {
			reg = <0 0 0 0 0>;
			resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
		};
	};
};

/* uart0 communicates with the BT module */
&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
	uart-has-rtscts;
};

/* uart1 is mapped to the pin header */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_gpio14>;
	status = "okay";
};

&vc4 {
	status = "okay";
};

&vec {
	status = "disabled";
};

&wifi_pwrseq {
	reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
};


code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2711-rpi-4-b.dts"

/ {
	compatible = "raspberrypi,400", "brcm,bcm2711";
	model = "Raspberry Pi 400";

	chosen {
		/* 8250 auxiliary UART instead of pl011 */
		stdout-path = "serial1:115200n8";
	};

	gpio-poweroff {
		compatible = "gpio-poweroff";
		gpios = <&expgpio 5 GPIO_ACTIVE_HIGH>;
	};
};

&expgpio {
	gpio-line-names = "BT_ON",
			  "WL_ON",
			  "PWR_LED_OFF",
			  "GLOBAL_RESET",
			  "VDD_SD_IO_SEL",
			  "GLOBAL_SHUTDOWN",
			  "SD_PWR_ON",
			  "SHUTDOWN_REQUEST";
};

&genet_mdio {
	clock-frequency = <1950000>;
};

&led_pwr {
	gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
};

&leds {
	/delete-node/ led_act;
};

&pm {
	/delete-property/ system-power-controller;
};


code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2711-rpi-cm4.dtsi"
#include "bcm283x-rpi-led-deprecated.dtsi"
#include "bcm283x-rpi-usb-host.dtsi"

/ {
	model = "Raspberry Pi Compute Module 4 IO Board";
};

&ddc0 {
	status = "okay";
};

&ddc1 {
	status = "okay";
};

&gpio {
	/*
	 * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
	 * the official GPU firmware DT blob.
	 *
	 * Legend:
	 * "FOO" = GPIO line named "FOO" on the schematic
	 * "FOO_N" = GPIO line named "FOO" on schematic, active low
	 */
	gpio-line-names = "ID_SDA",
			  "ID_SCL",
			  "SDA1",
			  "SCL1",
			  "GPIO_GCLK",
			  "GPIO5",
			  "GPIO6",
			  "SPI_CE1_N",
			  "SPI_CE0_N",
			  "SPI_MISO",
			  "SPI_MOSI",
			  "SPI_SCLK",
			  "GPIO12",
			  "GPIO13",
			  /* Serial port */
			  "TXD1",
			  "RXD1",
			  "GPIO16",
			  "GPIO17",
			  "GPIO18",
			  "GPIO19",
			  "GPIO20",
			  "GPIO21",
			  "GPIO22",
			  "GPIO23",
			  "GPIO24",
			  "GPIO25",
			  "GPIO26",
			  "GPIO27",
			  "RGMII_MDIO",
			  "RGMIO_MDC",
			  /* Used by BT module */
			  "CTS0",
			  "RTS0",
			  "TXD0",
			  "RXD0",
			  /* Used by Wifi */
			  "SD1_CLK",
			  "SD1_CMD",
			  "SD1_DATA0",
			  "SD1_DATA1",
			  "SD1_DATA2",
			  "SD1_DATA3",
			  /* Shared with SPI flash */
			  "PWM0_MISO",
			  "PWM1_MOSI",
			  "STATUS_LED_G_CLK",
			  "SPIFLASH_CE_N",
			  "SDA0",
			  "SCL0",
			  "RGMII_RXCLK",
			  "RGMII_RXCTL",
			  "RGMII_RXD0",
			  "RGMII_RXD1",
			  "RGMII_RXD2",
			  "RGMII_RXD3",
			  "RGMII_TXCLK",
			  "RGMII_TXCTL",
			  "RGMII_TXD0",
			  "RGMII_TXD1",
			  "RGMII_TXD2",
			  "RGMII_TXD3";
};

&hdmi0 {
	status = "okay";
};

&hdmi1 {
	status = "okay";
};

&genet {
	status = "okay";
};

&led_act {
	gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
};

&leds {
	led-pwr {
		label = "PWR";
		gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
		default-state = "keep";
		linux,default-trigger = "default-on";
	};
};

&pixelvalve0 {
	status = "okay";
};

&pixelvalve1 {
	status = "okay";
};

&pixelvalve2 {
	status = "okay";
};

&pixelvalve4 {
	status = "okay";
};

&vc4 {
	status = "okay";
};

&vec {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2711.dtsi"
#include "bcm2711-rpi.dtsi"
#include "bcm283x-rpi-wifi-bt.dtsi"

/ {
	compatible = "raspberrypi,4-compute-module", "brcm,bcm2711";

	chosen {
		/* 8250 auxiliary UART instead of pl011 */
		stdout-path = "serial1:115200n8";
	};

	sd_io_1v8_reg: regulator-sd-io-1v8 {
		compatible = "regulator-gpio";
		regulator-name = "vdd-sd-io";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
		regulator-settling-time-us = <5000>;
		gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
		states = <1800000 0x1>,
			 <3300000 0x0>;
		status = "okay";
	};

	sd_vcc_reg: regulator-sd-vcc {
		compatible = "regulator-fixed";
		regulator-name = "vcc-sd";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
	};
};

&bt {
	shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
};

/* EMMC2 is used to drive the eMMC */
&emmc2 {
	bus-width = <8>;
	vqmmc-supply = <&sd_io_1v8_reg>;
	vmmc-supply = <&sd_vcc_reg>;
	broken-cd;
	/* Even the IP block is limited to 100 MHz
	 * this provides a throughput gain
	 */
	mmc-hs200-1_8v;
	status = "okay";
};

&expgpio {
	gpio-line-names = "BT_ON",
			  "WL_ON",
			  "PWR_LED_OFF",
			  "ANT1",
			  "VDD_SD_IO_SEL",
			  "CAM_GPIO",
			  "SD_PWR_ON",
			  "ANT2";

	ant1: ant1-hog {
		gpio-hog;
		gpios = <3 GPIO_ACTIVE_HIGH>;
		/* internal antenna enabled */
		output-high;
		line-name = "ant1";
	};

	ant2: ant2-hog {
		gpio-hog;
		gpios = <7 GPIO_ACTIVE_HIGH>;
		/* external antenna disabled */
		output-low;
		line-name = "ant2";
	};
};

&genet {
	phy-handle = <&phy1>;
	phy-mode = "rgmii-rxid";
	status = "okay";
};

&genet_mdio {
	phy1: ethernet-phy@0 {
		/* No PHY interrupt */
		reg = <0x0>;
	};
};

/* uart0 communicates with the BT module */
&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
	uart-has-rtscts;
};

/* uart1 is mapped to the pin header */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_gpio14>;
	status = "okay";
};

&wifi_pwrseq {
	reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
};


code:
// SPDX-License-Identifier: GPL-2.0
#include "bcm2835-rpi.dtsi"

#include <dt-bindings/reset/raspberrypi,firmware-reset.h>

/ {
	/* Will be filled by the bootloader */
	memory@0 {
		device_type = "memory";
		reg = <0 0 0>;
	};

	aliases {
		emmc2bus = &emmc2bus;
		ethernet0 = &genet;
		pcie0 = &pcie0;
		blconfig = &blconfig;
	};
};

&firmware {
	firmware_clocks: clocks {
		compatible = "raspberrypi,firmware-clocks";
		#clock-cells = <1>;
	};

	expgpio: gpio {
		compatible = "raspberrypi,firmware-gpio";
		gpio-controller;
		#gpio-cells = <2>;
		status = "okay";
	};

	reset: reset {
		compatible = "raspberrypi,firmware-reset";
		#reset-cells = <1>;
	};
};

&hdmi0 {
	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
	clock-names = "hdmi", "bvb", "audio", "cec";
	wifi-2.4ghz-coexistence;
};

&hdmi1 {
	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
	clock-names = "hdmi", "bvb", "audio", "cec";
	wifi-2.4ghz-coexistence;
};

&hvs {
	clocks = <&firmware_clocks 4>;
};

&rmem {
	/*
	 * RPi4's co-processor will copy the board's bootloader configuration
	 * into memory for the OS to consume. It'll also update this node with
	 * its placement information.
	 */
	blconfig: nvram@0 {
		compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x0 0x0 0x0>;
		no-map;
		status = "disabled";
	};
};

&v3d {
	clocks = <&firmware_clocks 5>;
};

&vchiq {
	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};