code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>

/ {
	model = "Zaius BMC";
	compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";

	aliases {
		i2c15 = &i2cpcie0;
		i2c16 = &i2cpcie1;
		i2c17 = &i2cpcie2;
		i2c19 = &i2cpcie3;
		i2c20 = &i2cpcie4;
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200 earlycon";
	};

	memory@80000000 {
		reg = <0x80000000 0x40000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		flash_memory: region@98000000 {
			no-map;
			reg = <0x98000000 0x04000000>; /* 64M */
		};
	};

	onewire0 {
		compatible = "w1-gpio";
		gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
	};

	onewire1 {
		compatible = "w1-gpio";
		gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
	};

	onewire2 {
		compatible = "w1-gpio";
		gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
	};

	onewire3 {
		compatible = "w1-gpio";
		gpios = <&gpio ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		event-checkstop {
			label = "checkstop";
			gpios = <&gpio ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
			linux,code = <ASPEED_GPIO(F, 7)>;
		};

		event-pcie-e2b-present{
			label = "pcie-e2b-present";
			gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
			linux,code = <ASPEED_GPIO(E, 7)>;
		};
	};

	leds {
		compatible = "gpio-leds";

		sys_boot_status {
			label = "System boot status";
			gpios = <&gpio ASPEED_GPIO(D, 5) GPIO_ACTIVE_LOW>;
		};

		attention {
			label = "Attention";
			gpios = <&gpio ASPEED_GPIO(D, 6) GPIO_ACTIVE_LOW>;
		};

		plt_fault {
			label = "Platform fault";
			gpios = <&gpio ASPEED_GPIO(D, 7) GPIO_ACTIVE_LOW>;
		};

		hdd_fault {
			label = "Onboard drive fault";
			gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
		};
	};

	fsi: gpio-fsi {
		compatible = "fsi-master-gpio", "fsi-master";
		#address-cells = <2>;
		#size-cells = <0>;
		no-gpio-delays;

		trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>;
		enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
		clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>;
		data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>;
		mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
			<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
			<&adc 13>, <&adc 14>, <&adc 15>;
	};

	iio-hwmon-battery {
		compatible = "iio-hwmon";
		io-channels = <&adc 12>;
	};

};

&fmc {
	status = "okay";

	flash@0 {
		status = "okay";
		label = "bmc";
		m25p,fast-read;
		spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {
		status = "okay";
		label = "pnor";
		m25p,fast-read;
		spi-max-frequency = <100000000>;
	};
};

&spi2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi2ck_default
		     &pinctrl_spi2cs0_default
		     &pinctrl_spi2cs1_default
		     &pinctrl_spi2miso_default
		     &pinctrl_spi2mosi_default>;

	flash@0 {
		status = "okay";
	};
};

&uart1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd1_default
		     &pinctrl_rxd1_default>;
};

&lpc_ctrl {
	status = "okay";
	memory-region = <&flash_memory>;
	flash = <&spi1>;
};

&lpc_snoop {
	status = "okay";
	snoop-ports = <0x80>;
};

&uart5 {
	status = "okay";
};

&mac0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii1_default>;
	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
		 <&syscon ASPEED_CLK_MAC1RCLK>;
	clock-names = "MACCLK", "RCLK";
	use-ncsi;
};

&mac1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};

&i2c0 {
	status = "okay";

	eeprom@50 {
		compatible = "atmel,24c64";
		reg = <0x50>;
		pagesize = <32>;
	};

	rtc@68 {
		compatible = "nxp,pcf8523";
		reg = <0x68>;
	};

	ucd90160@64 {
		compatible = "ti,ucd90160";
		reg = <0x64>;
	};

	/* Power sequencer UCD90160 PMBUS @64h
	 * FRU AT24C64D @50h
	 * RTC PCF8523 @68h
	 * Clock buffer 9DBL04 @6dh
	 */
};

&i2c1 {
	status = "okay";

	i2c-switch@71 {
		compatible = "nxp,pca9546";
		reg = <0x71>;
		#address-cells = <1>;
		#size-cells = <0>;

		i2cpcie0: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
		};
		i2cpcie1: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;
		};
		i2cpcie2: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;
		};
		i2ctpm: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;
		};
	};

	/* MUX1 PCA9546A @71h
	 *   PCIe 0
	 *   PCIe 1
	 *   PCIe 2
	 *   TPM header
	 */
};

&i2c2 {
	status = "disabled";

	/* OCP Mezz Connector A (OOB SMBUS) */
};

&i2c3 {
	status = "disabled";

	/* OCP Mezz Connector A (PCIe slot SMBUS) */
};

&i2c4 {
	status = "okay";

	i2c-switch@71 {
		compatible = "nxp,pca9546";
		reg = <0x71>;
		#address-cells = <1>;
		#size-cells = <0>;

		i2cpcie3: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
		};
		i2cpcie4: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;
		};
	};

	/* MUX1 PCA9546A @71h
	 *   PCIe 3
	 *   PCIe 4
	 */
};

&i2c5 {
	status = "disabled";

	/* CPU0 PRM 0.7V */
	/* CPU0 PRM 1.2V CH03 */
	/* CPU0 PRM 0.8V */
	/* CPU0 PRM 1.2V CH47 */
};

&i2c6 {
	status = "disabled";

	/* CPU1 PRM 0.7V */
	/* CPU1 PRM 1.2V CH03 */
	/* CPU1 PRM 0.8V */
	/* CPU1 PRM 1.2V CH47 */
};

&i2c7 {
	status = "okay";

	pca9541a@70 {
		compatible = "nxp,pca9541";
		reg = <0x70>;

		i2c-arb {
			#address-cells = <1>;
			#size-cells = <0>;

			hotswap@54 {
				compatible = "ti,lm5066i";
				reg = <0x54>;
			};
		};

	};

	vrm@64 {
		compatible = "isil,isl68137";
		reg = <0x64>;
	};

	vrm@40 {
		compatible = "isil,isl68137";
		reg = <0x40>;
	};

	vrm@60 {
		compatible = "isil,isl68137";
		reg = <0x60>;
	};

	vrm@43 {
		compatible = "infineon,ir38064";
		reg = <0x43>;
	};

	vrm@41 {
		compatible = "isil,isl68137";
		reg = <0x41>;
	};

	/* Master selector PCA9541A @70h (other master: CPU0)
	 *   LM5066I PMBUS @10h
	 */

	/*
	 * Brick will be one of these types/addresses.  Depending
	 * on the board SKU only one is actually present and will successfully
	 * instantiate while the others will fail the probe operation.
	 * These are the PVT (and presumably beyond) addresses:
	 *    12V Quarter Brick DC/DC Converter Q54SJ12050 @6Ah
	 *    12V Quarter Brick DC/DC Converter Q54SH12050 @30h
	 */
	power-brick@6a {
		compatible = "delta,dps800";
		reg = <0x6a>;
	};
	power-brick@30 {
		compatible = "delta,dps800";
		reg = <0x30>;
	};

	/* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
	/* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
	/* CPU0 VR ISL68137 0.8V PMBUS @60h */
	/* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @43h */
	/* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */
	/* Master selector PCA9541A @70h (other master: CPU0)
	 *   LM5066I PMBUS @10h
	 */
};

&i2c8 {
	status = "okay";

	vrm@64 {
		compatible = "isil,isl68137";
		reg = <0x64>;
	};

	vrm@40 {
		compatible = "isil,isl68137";
		reg = <0x40>;
	};

	vrm@41 {
		compatible = "isil,isl68137";
		reg = <0x41>;
	};

	vrm@42 {
		compatible = "infineon,ir38064";
		reg = <0x42>;
	};

	vrm@60 {
		compatible = "isil,isl68137";
		reg = <0x60>;
	};

	/* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @64h */
	/* CPU1 VR ISL68137 1.2V CH03 PMBUS @40h */
	/* CPU1 VR ISL68137 1.2V CH47 PMBUS @41h */
	/* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
	/* CPU1 VR ISL68137 0.8V PMBUS @60h */
};

&i2c9 {
	status = "disabled";

	/* Fan board */
};

&i2c10 {
	status = "disabled";
};

&i2c11 {
	status = "disabled";

	/* GPU sideband */
};

&i2c12 {
	status = "disabled";
};

&i2c13 {
	status = "disabled";

	/* MUX PI3USB102
	 *   CPU0 debug
	 *   CPU1 debug
	 */
};

&pinctrl {
	aspeed,external-nodes = <&gfx &lhc>;

	pinctrl_gpioh_unbiased: gpioi_unbiased {
		pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7";
		bias-disable;
	};
};

&gpio {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpioh_unbiased>;

	gpio-line-names =
	/*A0-A7*/	"","cfam-reset","","","","","","",
	/*B0-B7*/	"","","","","","","","",
	/*C0-C7*/	"","","","","","","","",
	/*D0-D7*/	"fsi-enable","","","","","led-sys-boot-status","led-attention",
				"led-fault",
	/*E0-E7*/	"","","","","","","","presence-pcie-e2b",
	/*F0-F7*/	"","","","","","","","checkstop",
	/*G0-G7*/	"fsi-clock","fsi-data","","","","","","",
	/*H0-H7*/	"onewire0","onewire1","onewire2","onewire3","","","","",
	/*I0-I7*/	"","","","power-button","","","","",
	/*J0-J7*/	"","","","","","","","",
	/*K0-K7*/	"","","","","","","","",
	/*L0-L7*/	"","","","","","","","",
	/*M0-M7*/	"","","","","","","","",
	/*N0-N7*/	"","","","","","","","",
	/*O0-O7*/	"","","","","iso_u164_en","","fsi-trans","",
	/*P0-P7*/	"ncsi_mux_en_n","bmc_i2c2_sw_rst_n","","bmc_i2c5_sw_rst_n","",
				"","fsi-mux","",
	/*Q0-Q7*/	"","","","","","","","",
	/*R0-R7*/	"","","","","","","","",
	/*S0-S7*/	"","","","","","","","",
	/*T0-T7*/	"","","","","","","","",
	/*U0-U7*/	"","","","","","","","",
	/*V0-V7*/	"","","","","","","","",
	/*W0-W7*/	"","","","","","","","",
	/*X0-X7*/	"","","","","","","","",
	/*Y0-Y7*/	"","","","","","","","",
	/*Z0-Z7*/	"","","","","","","","",
	/*AA0-AA7*/	"","","led-hdd-fault","","","","","",
	/*AB0-AB7*/	"","","","","","","","",
	/*AC0-AC7*/	"","","","","","","","";

	line_iso_u146_en {
		gpio-hog;
		gpios = <ASPEED_GPIO(O, 4) GPIO_ACTIVE_HIGH>;
		output-high;
	};

	ncsi_mux_en_n {
		gpio-hog;
		gpios = <ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
		output-low;
	};

	line_bmc_i2c2_sw_rst_n {
		gpio-hog;
		gpios = <ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
		output-high;
	};

	line_bmc_i2c5_sw_rst_n {
		gpio-hog;
		gpios = <ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
		output-high;
	};
};

&vuart {
	status = "okay";
};

&gfx {
	status = "okay";
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
		&pinctrl_pwm2_default &pinctrl_pwm3_default>;

	fan@0 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
	};

	fan@1 {
		reg = <0x01>;
		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
	};

	fan@2 {
		reg = <0x02>;
		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
	};

	fan@3 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
	};
};

&ibt {
	status = "okay";
};

#include "ibm-power9-dual.dtsi"


code:
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2017 Facebook Inc.
/dts-v1/;

#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>

/ {
	model = "Portwell Neptune BMC";
	compatible = "portwell,neptune-bmc", "aspeed,ast2500";
	aliases {
		serial0 = &uart1;
		serial4 = &uart5;
	};
	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200 earlycon";
	};

	memory@80000000 {
		reg = <0x80000000 0x20000000>;
	};

	leds {
		compatible = "gpio-leds";
		postcode0 {
			label = "BMC_UP";
			gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
		postcode1 {
			label = "BMC_HB";
			gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
		postcode2 {
			label = "FAULT";
			gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
		};
		// postcode3-7 are GPIOH3-H7
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
#include "openbmc-flash-layout.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "pnor";
	};
};

&uart1 {
	// Host Console
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd1_default
		     &pinctrl_rxd1_default>;
};

&uart5 {
	// BMC Console
	status = "okay";
};

&mac0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii1_default
		     &pinctrl_mdio1_default>;
	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
		 <&syscon ASPEED_CLK_MAC1RCLK>;
	clock-names = "MACCLK", "RCLK";
};

&mac1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii2_default>;
	clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
		 <&syscon ASPEED_CLK_MAC2RCLK>;
	clock-names = "MACCLK", "RCLK";
	use-ncsi;
};

&i2c1 {
	status = "okay";
	// To PCIe slot SMBUS
};

&i2c2 {
	status = "okay";
	// To LAN I210
};

&i2c3 {
	status = "okay";
	// SMBus to COMe AB
};

&i2c4 {
	status = "okay";
	// I2C to COMe AB
};

&i2c5 {
	status = "okay";
// 	USB Debug card
	pca9555@27 {
		compatible = "nxp,pca9555";
		reg = <0x27>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&i2c6 {
	status = "okay";
	tpm@20 {
		compatible = "infineon,slb9645tt";
		reg = <0x20>;
	};
	tmp421@4e {
		compatible = "ti,tmp421";
		reg = <0x4e>;
	};
	tmp421@4f {
		compatible = "ti,tmp421";
		reg = <0x4f>;
	};
};

&i2c8 {
	status = "okay";
	eeprom@51 {
		compatible = "atmel,24c128";
		reg = <0x51>;
		pagesize = <32>;
	};
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
	fan@0 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
	};

	fan@1 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.

/dts-v1/;

#include "aspeed-g6.dtsi"

/ {
	model = "Qualcomm DC-SCM V1 BMC";
	compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600";

	aliases {
		serial4 = &uart5;
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200n8";
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};
};

&mdio3 {
	status = "okay";

	ethphy3: ethernet-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <1>;
	};
};

&mac2 {
	status = "okay";

	/* Bootloader sets up the MAC to insert delay */
	phy-mode = "rgmii";
	phy-handle = <&ethphy3>;

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii3_default>;
};

&mac3 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii4_default>;

	use-ncsi;
};

&rtc {
	status = "okay";
};

&fmc {
	status = "okay";

	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
		spi-max-frequency = <133000000>;
#include "openbmc-flash-layout-64.dtsi"
	};

	flash@1 {
		status = "okay";
		m25p,fast-read;
		label = "alt-bmc";
		spi-max-frequency = <133000000>;
#include "openbmc-flash-layout-64-alt.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bios";
		spi-max-frequency = <133000000>;
	};
};

&gpio0 {
	gpio-line-names =
	/*A0-A7*/	"","","","","","","","",
	/*B0-B7*/	"BMC_FLASH_MUX_SEL","","","","","","","",
	/*C0-C7*/	"","","","","","","","",
	/*D0-D7*/	"","","","","","","","",
	/*E0-E7*/	"","","","","","","","",
	/*F0-F7*/	"","","","","","","","",
	/*G0-G7*/	"","","","","","","","",
	/*H0-H7*/	"","","","","","","","",
	/*I0-I7*/	"","","","","","","","",
	/*J0-J7*/	"","","","","","","","",
	/*K0-K7*/	"","","","","","","","",
	/*L0-L7*/	"","","","","","","","",
	/*M0-M7*/	"","","","","","","","",
	/*N0-N7*/	"BMC_FWSPI_RST_N","","GPIO_1_BMC_3V3","","","","","",
	/*O0-O7*/	"JTAG_MUX_A","JTAG_MUX_B","","","","","","",
	/*P0-P7*/	"","","","","","","","",
	/*Q0-Q7*/	"","","","","","","","",
	/*R0-R7*/	"","","","","","","","",
	/*S0-S7*/	"","","","","","","","",
	/*T0-T7*/	"","","","","","","","",
	/*U0-U7*/	"","","","","","","","",
	/*V0-V7*/	"","","","SCMFPGA_SPARE_GPIO1_3V3",
			"SCMFPGA_SPARE_GPIO2_3V3","SCMFPGA_SPARE_GPIO3_3V3",
			"SCMFPGA_SPARE_GPIO4_3V3","SCMFPGA_SPARE_GPIO5_3V3",
	/*W0-W7*/	"","","","","","","","",
	/*X0-X7*/	"","","","","","","","",
	/*Y0-Y7*/	"","","","","","","","",
	/*Z0-Z7*/	"","","","","","","","",
	/*AA0-AA7*/	"","","","","","","","",
	/*AB0-AB7*/	"","","","","","","","",
	/*AC0-AC7*/	"","","","","","","","";
};

&gpio1 {
	gpio-line-names =
	/*A0-A7*/	"GPI_1_BMC_1V8","","","","","",
			"SCMFPGA_SPARE_GPIO1_1V8","SCMFPGA_SPARE_GPIO2_1V8",
	/*B0-B7*/	"SCMFPGA_SPARE_GPIO3_1V8","SCMFPGA_SPARE_GPIO4_1V8",
			"SCMFPGA_SPARE_GPIO5_1V8","","","","","",
	/*C0-C7*/	"","","","","","","","",
	/*D0-D7*/	"","BMC_SPI1_RST_N","BIOS_FLASH_MUX_SEL","",
			"","TPM2_PIRQ_N","TPM2_RST_N","",
	/*E0-E7*/	"","","","","","","","";
};

&i2c2 {
	status = "okay";
};

&i2c4 {
	status = "okay";
};

&i2c5 {
	status = "okay";
};

&i2c6 {
	status = "okay";
};

&i2c7 {
	status = "okay";
};

&i2c8 {
	status = "okay";
};

&i2c9 {
	status = "okay";
};

&i2c10 {
	status = "okay";
};

&i2c12 {
	status = "okay";
};

&i2c13 {
	status = "okay";
};

&i2c14 {
	status = "okay";
};

&i2c15 {
	status = "okay";
};

&vhub {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "aspeed-g4.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>

/ {
	model = "Quanta Q71L BMC";
	compatible = "quanta,q71l-bmc", "aspeed,ast2400";

	aliases {
		i2c14 = &i2c_pcie2;
		i2c15 = &i2c_pcie3;
		i2c16 = &i2c_pcie6;
		i2c17 = &i2c_pcie7;
		i2c18 = &i2c_pcie1;
		i2c19 = &i2c_pcie4;
		i2c20 = &i2c_pcie5;
		i2c21 = &i2c_pcie8;
		i2c22 = &i2c_pcie9;
		i2c23 = &i2c_pcie10;
		i2c24 = &i2c_ssd1;
		i2c25 = &i2c_ssd2;
		i2c26 = &i2c_psu4;
		i2c27 = &i2c_psu1;
		i2c28 = &i2c_psu3;
		i2c29 = &i2c_psu2;
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200 earlycon";
	};

	memory@40000000 {
		reg = <0x40000000 0x8000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		vga_memory: framebuffer@47800000 {
			no-map;
			reg = <0x47800000 0x00800000>; /* 8MB */
		};
	};

	leds {
		compatible = "gpio-leds";

		heartbeat {
			gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
		};

		power {
			gpios = <&gpio ASPEED_GPIO(B, 2) GPIO_ACTIVE_LOW>;
		};

		identify {
			gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
			<&adc 8>, <&adc 9>, <&adc 10>;
	};

	iio-hwmon-battery {
		compatible = "iio-hwmon";
		io-channels = <&adc 11>;
	};

	i2c1mux: i2cmux {
		compatible = "i2c-mux-gpio";
		#address-cells = <1>;
		#size-cells = <0>;

		/* mux-gpios = <&sgpio 10 GPIO_ACTIVE_HIGH> */
		i2c-parent = <&i2c1>;
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		label = "bmc";
		m25p,fast-read;
#include "openbmc-flash-layout.dtsi"
	};
};

&spi {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "pnor";
	};
};

&pinctrl {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_vgahs_default &pinctrl_vgavs_default
			&pinctrl_ddcclk_default &pinctrl_ddcdat_default>;
};

&p2a {
	status = "okay";
	memory-region = <&vga_memory>;
};

&ibt {
	status = "okay";
};

&lpc_ctrl {
	status = "okay";
};

&lpc_snoop {
	status = "okay";
	snoop-ports = <0x80>;
};

&mac0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii1_default>;
	use-ncsi;
};

&mac1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};

&uart1 {
	status = "okay";
};

&uart5 {
	status = "okay";
};

&i2c0 {
	status = "okay";
};

&i2c1 {
	status = "okay";

	/* temp2 inlet */
	tmp75@4c {
		compatible = "ti,tmp75";
		reg = <0x4c>;
	};

	/* temp3 */
	tmp75@4e {
		compatible = "ti,tmp75";
		reg = <0x4e>;
	};

	/* temp1 */
	tmp75@4f {
		compatible = "ti,tmp75";
		reg = <0x4f>;
	};

	/* Baseboard FRU */
	eeprom@54 {
		compatible = "atmel,24c64";
		reg = <0x54>;
	};

	/* FP FRU */
	eeprom@57 {
		compatible = "atmel,24c64";
		reg = <0x57>;
	};
};

&i2c2 {
	status = "okay";

	/* 0: PCIe Slot 2,
	 *    Slot 3,
	 *    Slot 6,
	 *    Slot 7
	 */
	i2c-switch@74 {
		compatible = "nxp,pca9546";
		reg = <0x74>;
		#address-cells = <1>;
		#size-cells = <0>;
		i2c-mux-idle-disconnect;  /* may use mux@77 next. */

		i2c_pcie2: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
		};

		i2c_pcie3: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;
		};

		i2c_pcie6: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;
		};

		i2c_pcie7: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;
		};
	};

	/* 0: PCIe Slot 1,
	 *    Slot 4,
	 *    Slot 5,
	 *    Slot 8,
	 *    Slot 9,
	 *    Slot 10,
	 *    SSD 1,
	 *    SSD 2
	 */
	i2c-switch@77 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x77>;
		i2c-mux-idle-disconnect;  /* may use mux@74 next. */

		i2c_pcie1: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
		};

		i2c_pcie4: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;
		};

		i2c_pcie5: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;
		};

		i2c_pcie8: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;
		};

		i2c_pcie9: i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <4>;
		};

		i2c_pcie10: i2c@5 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <5>;
		};

		i2c_ssd1: i2c@6 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <6>;
		};

		i2c_ssd2: i2c@7 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <7>;
		};
	};
};

&i2c3 {
	status = "okay";

	/* BIOS FRU */
	eeprom@56 {
		compatible = "atmel,24c64";
		reg = <0x56>;
	};
};

&i2c4 {
	status = "okay";
};

&i2c5 {
	status = "okay";
};

&i2c6 {
	status = "okay";
};

&i2c7 {
	status = "okay";

	/* 0: PSU4
	 *    PSU1
	 *    PSU3
	 *    PSU2
	 */
	i2c-switch@70 {
		compatible = "nxp,pca9546";
		reg = <0x70>;
		#address-cells = <1>;
		#size-cells = <0>;

		i2c_psu4: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;

			psu@59 {
				compatible = "pmbus";
				reg = <0x59>;
			};
		};

		i2c_psu1: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;

			psu@58 {
				compatible = "pmbus";
				reg = <0x58>;
			};
		};

		i2c_psu3: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;

			psu@58 {
				compatible = "pmbus";
				reg = <0x58>;
			};
		};

		i2c_psu2: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;

			psu@59 {
				compatible = "pmbus";
				reg = <0x59>;
			};
		};
	};

	/* PDB FRU */
	eeprom@52 {
		compatible = "atmel,24c64";
		reg = <0x52>;
	};
};

&i2c8 {
	status = "okay";

	/* BMC FRU */
	eeprom@50 {
		compatible = "atmel,24c64";
		reg = <0x50>;
	};
};

&vuart {
	status = "okay";
};

&wdt2 {
	status = "okay";
};

&adc {
	status = "okay";
};

&pwm_tacho {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_default
		&pinctrl_pwm1_default
		&pinctrl_pwm2_default
		&pinctrl_pwm3_default>;

	fan@0 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
	};

	fan@1 {
		reg = <0x01>;
		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
	};

	fan@2 {
		reg = <0x02>;
		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
	};

	fan@3 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
	};

	fan@4 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
	};

	fan@5 {
		reg = <0x01>;
		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
	};

	fan@6 {
		reg = <0x02>;
		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
	};

	fan@7 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
	};
};

&i2c1mux {
	i2c@0 {
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <0>;

		/* Memory Riser 1 FRU */
		eeprom@50 {
			compatible = "atmel,24c02";
			reg = <0x50>;
		};

		/* Memory Riser 2 FRU */
		eeprom@51 {
			compatible = "atmel,24c02";
			reg = <0x51>;
		};

		/* Memory Riser 3 FRU */
		eeprom@52 {
			compatible = "atmel,24c02";
			reg = <0x52>;
		};

		/* Memory Riser 4 FRU */
		eeprom@53 {
			compatible = "atmel,24c02";
			reg = <0x53>;
		};
	};

	i2c@1 {
		reg = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		/* Memory Riser 5 FRU */
		eeprom@50 {
			compatible = "atmel,24c02";
			reg = <0x50>;
		};

		/* Memory Riser 6 FRU */
		eeprom@51 {
			compatible = "atmel,24c02";
			reg = <0x51>;
		};

		/* Memory Riser 7 FRU */
		eeprom@52 {
			compatible = "atmel,24c02";
			reg = <0x52>;
		};

		/* Memory Riser 8 FRU */
		eeprom@53 {
			compatible = "atmel,24c02";
			reg = <0x53>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright 2022 Quanta Corp.
/dts-v1/;

#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>

/ {
	model = "Quanta S6Q BMC";
	compatible = "quanta,s6q-bmc", "aspeed,ast2600";

	aliases {
		// bus 0
		i2c20 = &SMB_HOST_DB2000_3V3AUX_SCL;
		i2c21 = &U12_PCA9546_CH1;
		i2c22 = &SMB_HOST_DB800_B_SCL;
		i2c23 = &SMB_HOST_DB800_C_SCL;

		// bus 1
		i2c24 = &SMB_M2_P0_1V8AUX_SCL;
		i2c25 = &SMB_M2_P1_1V8AUX_SCL;
		i2c26 = &SMB_CPU_PIROM_3V3AUX_SCL;
		i2c27 = &SMB_TEMP_3V3AUX_SCL;
		i2c28 = &SMB_IPMB_3V3AUX_SSDSB_SCL;
		i2c29 = &SMB_IPMB_3V3AUX_SCL;
		i2c31 = &SMB_FB_SCL;

		// bus 1 - Fan board
		i2c32 = &SMB_IOEXP_SCL;
		i2c33 = &SMB_PROGRAM_SCL;
		i2c34 = &SMB_FB_SCL_CH2;
		i2c35 = &SMB_FAN_SENSE_SCL;

		// bus 6
		i2c36 = &U197_PCA9546_CH0;
		i2c37 = &U197_PCA9546_CH1;
		i2c38 = &U197_PCA9546_CH2;
		i2c39 = &U197_PCA9546_CH3;

		//bus 7
		i2c40 = &SMB_OCP_SFF_3V3AUX_SCL; //OCP1
		i2c41 = &SMB_OCP_LFF_3V3AUX_SCL; //OCP2
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200n8 earlycon";
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
			<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
			<&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
			<&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>;
	};

	leds {
		compatible = "gpio-leds";

		BMC_HEARTBEAT_N {
			label = "BMC_HEARTBEAT_N";
			gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
			linux,default-trigger = "heartbeat";
		};

		BMC_LED_STATUS_AMBER_N {
			label = "BMC_LED_STATUS_AMBER_N";
			gpios = <&gpio0 ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		FM_ID_LED_N {
			label = "FM_ID_LED_N";
			gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};
};

&gpio0 {
	gpio-line-names =
	/*A0 - A7*/	"", "", "", "", "", "", "", "",
	/*B0 - B7*/	"", "", "", "", "", "", "", "",
	/*C0 - C7*/	"", "", "", "", "", "", "", "",
	/*D0 - D7*/	"", "", "", "", "", "", "", "",
	/*E0 - E7*/	"", "", "", "", "", "", "", "",
	/*F0 - F7*/	"PLTRST_N", "", "PWR_DEBUG_N", "", "", "", "", "",
	/*G0 - G7*/	"", "", "", "", "", "", "", "",
	/*H0 - H7*/	"", "", "", "", "", "", "", "",
	/*I0 - I7*/	"", "", "", "", "", "", "", "",
	/*J0 - J7*/	"", "", "", "", "", "", "", "",
	/*K0 - K7*/	"", "", "", "", "", "", "", "",
	/*L0 - L7*/	"", "", "", "", "PREQ_N", "TCK_MUX_SEL", "", "",
	/*M0 - M7*/	"", "", "", "PWRGD_SYS_PWROK", "", "PRDY_N", "", "",
	/*N0 - N7*/	"", "", "", "", "", "", "", "",
	/*O0 - O7*/	"", "", "", "", "", "", "", "",
	/*P0 - P7*/	"SYS_BMC_PWRBTN_R_N", "SYS_PWRBTN_N", "FM_MB_RST_BTN", "RST_BMC_RSTBTN_OUT_N", "", "", "", "",
	/*Q0 - Q7*/	"", "", "", "", "", "", "", "",
	/*R0 - R7*/	"", "", "", "", "", "", "", "",
	/*S0 - S7*/	"", "", "", "FP_ID_BTN_SCM_N", "", "", "", "",
	/*T0 - T7*/	"", "", "", "", "", "", "", "",
	/*U0 - U7*/	"", "", "", "", "", "", "", "",
	/*V0 - V7*/	"", "", "", "", "", "SMI", "", "",
	/*W0 - W7*/	"", "", "", "", "", "", "", "",
	/*X0 - X7*/	"", "", "", "", "", "", "", "",
	/*Y0 - Y7*/	"", "", "", "", "", "", "", "",
	/*Z0 - Z7*/	"FM_BMC_READY_N", "", "", "", "", "", "", "",
	/*AA0 - AA7*/	"", "", "", "", "", "", "", "",
	/*AB0 - AB7*/	"", "", "", "", "", "", "", "",
	/*AC0 - AC7*/	"", "", "", "", "", "", "", "";
};

&sgpiom0 {
	status = "okay";
	ngpios = <128>;
	bus-frequency = <48000>;
	gpio-line-names =
	/* SGPIO input lines */
	/*IOA0-IOA7*/	"","", "SIO_POWER_GOOD","OA1", "XDP_PRST_N","", "","", "FM_SLPS3_PLD_N","", "FM_SLPS4_PLD_N","", "FM_BIOS_POST_CMPLT_BMC_N","", "FM_ADR_TRIGGER_N","OA7",
	/*IOB0-IOB7*/	"FM_ADR_COMPLETE","", "FM_PMBUS_ALERT_B_EN","", "PSU0_PRESENT_N","", "PSU1_PRESENT_N","", "PSU0_VIN_BUF_GOOD","", "PSU01_VIN_BUF_GOOD","", "PWRGD_PS0_PWROK_R","", "PWRGD_PS1_PWROK_R","",
	/*IOC0-IOC7*/	"PWRGD_PS_PWROK_PLD_R","", "CHASSIS_INTRUSION","", "BMC_MFG_MODE","", "FM_BMC_EN_DET_R","", "FM_ME_BT_DONE","", "CPU1_PRESENCE","", "CPU2_PRESENCE","", "IRQ_PSYS_CRIT_N","",
	/*IOD0-IOD7*/	"","", "CPU1_THERMTRIP","", "CPU2_THERMTRIP","", "CPU1_MEM_THERM_EVENT","", "CPU2_MEM_THERM_EVENT","", "CPU1_VRHOT","", "CPU2_VRHOT","", "","",
	/*IOE0-IOE7*/	"","", "CPU1_MEM_VRHOT","", "CPU2_MEM_VRHOT","", "","", "PCH_BMC_THERMTRIP","", "","", "","", "","",
	/*IOF0-IOF7*/	"CPU_ERR0","", "CPU_ERR1","", "CPU_ERR2","", "","", "","", "CPU_CATERR","", "","", "","",
	/*IOG0-IOG7*/	"","", "","", "","", "","", "","", "","", "","", "","",
	/*IOH0-IOH7*/	"","", "FP_ID_BTN_R1_N","", "FP_RST_BTN_N","", "","", "","", "FP_PWR_BTN_PLD_N_R","", "","", "","",
	/*IOI0-IOI7*/	"","", "","", "","", "","", "","", "","", "","", "","",
	/*IOJ0-IOJ7*/	"","", "","", "","", "","", "","", "","", "","", "","",
	/*IOK0-IOK7*/	"","", "","", "","", "","", "","", "","", "","", "","",
	/*IOL0-IOL7*/	"","", "","", "","", "","", "","", "","", "","", "","",
	/*IOM0-IOM7*/	"","", "","", "","", "","", "","", "","", "","", "","",
	/*ION0-ION7*/	"","BMC_SW_HEARTBEAT_N_R", "","FP_LED_FAULT_N", "","FP_ID_LED_N", "","FM_BMC_RSTBTN_OUT_N", "","FM_THERMTRIP_DLY_LVC1_R_N", "","", "","RST_PCA9548_SENSOR_PLD_N", "","USB_OC1_REAR_N",
	/*IOO0-IOO7*/	"","IRQ_TPM_SPI_N", "","", "","IRQ_PCH_SCI_WHEA_R_N", "","IRQ_BMC_PCH_NMI_R", "","H_CPU_NMI_LVC1_R_N", "","", "","", "","FM_JTAG_BMC_PLD_MUX_SEL",
	/*IOP0-IOP7*/	"IP0","OP0", "","", "","", "","", "","", "","", "","", "IP7","OP7";
};

&adc0 {
	vref = <2500>;
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
		&pinctrl_adc2_default &pinctrl_adc3_default
		&pinctrl_adc4_default &pinctrl_adc5_default
		&pinctrl_adc6_default &pinctrl_adc7_default>;
};

&adc1 {
	vref = <2500>;
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
		&pinctrl_adc10_default &pinctrl_adc11_default
		&pinctrl_adc12_default &pinctrl_adc13_default
		&pinctrl_adc14_default &pinctrl_adc15_default>;
};

&mdio2 {
	status = "okay";

	ethphy2: ethernet-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0>;
	};
};

&mac2 {
	status = "okay";

	phy-mode = "rgmii";
	phy-handle = <&ethphy2>;

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii3_default>;
};

&mac3 {
	status = "okay";

	phy-mode = "rmii";
	use-ncsi;

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii4_default>;
};

&fmc {
	status = "okay";

	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
		spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-64.dtsi"
	};
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
		&pinctrl_spi2cs2_default>;
	status = "okay";

	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "spi2:0";
		spi-max-frequency = <50000000>;
	};
};

&kcs1 {
	status = "okay";
	aspeed,lpc-io-reg = <0xCA0>;
};

&kcs2 {
	status = "okay";
	aspeed,lpc-io-reg = <0xCA8>;
};

&kcs3 {
	status = "okay";
	aspeed,lpc-io-reg = <0xCA2>;
};

&emmc_controller {
	status = "okay";
};

&emmc {
	non-removable;
	bus-width = <4>;
	max-frequency = <100000000>;
};

&vhub {
	status = "okay";
};

&lpc_snoop {
	status = "okay";
	snoop-ports = <0x80>;
};

&uart1 {
	status = "okay";
};

&uart2 {
	status = "okay";
};

&uart4 {
	status = "okay";
};

&uart5 {
	status = "okay";
};

&uart_routing {
	status = "okay";
};

&i2c0 {
	status = "okay";

	U34_PWR_ADC@48 {
		compatible = "ti,ads7830";
		reg = <0x48>;
	};

	U35_PWR_ADC@4b {
		compatible = "ti,ads7830";
		reg = <0x4b>;
	};

	i2c-switch@70 {
		compatible = "nxp,pca9546";
		reg = <0x70>;
		#address-cells = <1>;
		#size-cells = <0>;
		i2c-mux-idle-disconnect;

		SMB_HOST_DB2000_3V3AUX_SCL: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
		};

		U12_PCA9546_CH1: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;
		};

		SMB_HOST_DB800_B_SCL: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;
		};

		SMB_HOST_DB800_C_SCL: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;
		};
	};
};

&i2c1 {
	status = "okay";

	i2c-switch@59 {
		compatible = "nxp,pca9848";
		reg = <0x59>;
		#address-cells = <1>;
		#size-cells = <0>;
		i2c-mux-idle-disconnect;

		SMB_M2_P0_1V8AUX_SCL: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
		};

		SMB_M2_P1_1V8AUX_SCL: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;
		};

		SMB_CPU_PIROM_3V3AUX_SCL: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;
		};

		SMB_TEMP_3V3AUX_SCL: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;

			U163_tmp75@48 {
				compatible = "ti,tmp75";
				reg = <0x48>;
			};
			U114_tmp75@49 {
				compatible = "ti,tmp75";
				reg = <0x49>;
			};
		};

		SMB_IPMB_3V3AUX_SSDSB_SCL: i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <4>;

			U4_tmp75@4c {
				compatible = "ti,tmp75";
				reg = <0x4c>;
			};
			U73_tmp75@4d {
				compatible = "ti,tmp75";
				reg = <0x4d>;
			};
		};

		SMB_IPMB_3V3AUX_SCL: i2c@5 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <5>;

			U190_fru@51 {
				compatible = "atmel,24c128";
				reg = <0x51>;
				pagesize = <32>;
			};
		};

		SMB_FB_SCL: i2c@7 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <7>;

			i2c-switch@77 {
				compatible = "nxp,pca9546";
				reg = <0x77>;
				#address-cells = <1>;
				#size-cells = <0>;
				i2c-mux-idle-disconnect;

				SMB_IOEXP_SCL: i2c@0 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;
				};

				SMB_PROGRAM_SCL: i2c@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;
				};

				SMB_FB_SCL_CH2: i2c@2 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <2>;
				};

				SMB_FAN_SENSE_SCL: i2c@3 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <3>;

					Current_Meter_U2@45 {
						compatible = "ti,ina219";
						reg = <0x45>;
						shunt-resistor = <1000>; /* = 1 mOhm */
					};

					Current_Meter_U3@44 {
						compatible = "ti,ina219";
						reg = <0x44>;
						shunt-resistor = <1000>; /* = 1 mOhm */
					};

					TEMP_sensor_U2@4b {
						compatible = "ti,tmp75";
						reg = <0x4b>;
					};
				};
			};
		};
	};
};

&i2c2 {
	status = "okay";
	bus-frequency = <400000>;

	ipmb@10 {
		compatible = "ipmb-dev";
		reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
		i2c-protocol;
	};
};

&i2c3 {
	status = "okay";

	/* MB FRU (U173) @ 0xA2 */
	mb_fru: mb_fru@51 {
		compatible = "atmel,24c128";
		reg = <0x51>;
		pagesize = <32>;
	};

	/* FP_U1 Inlet */
	FP_U1_tmp75@4a {
		compatible = "ti,tmp75";
		reg = <0x4a>;
	};

	FP_U4_fru@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};
};

&i2c4 {
	status = "okay";
};

&i2c5 {
	status = "okay";
};

&i2c6 {
	status = "okay";

	i2c-switch@77 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x77>;
		i2c-mux-idle-disconnect;

		U197_PCA9546_CH0: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
		};

		U197_PCA9546_CH1: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;

			cpu0_pvccin@60 {
				compatible = "isil,raa229004";
				reg = <0x60>;
			};

			cpu0_pvccinfaon@61 {
				compatible = "isil,isl69260";
				reg = <0x61>;
			};

			cpu0_pvccd_hv@63 {
				compatible = "isil,isl69260";
				reg = <0x63>;
			};
		};

		U197_PCA9546_CH2: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;

			cpu1_pvccin@72 {
				compatible = "isil,raa229004";
				reg = <0x72>;
			};

			cpu1_pvccinfaon@74 {
				compatible = "isil,isl69260";
				reg = <0x74>;
			};

			cpu1_pvccd_hv@76 {
				compatible = "isil,isl69260";
				reg = <0x76>;
			};
		};

		U197_PCA9546_CH3: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;
		};
	};
};

&i2c7 {
	status = "okay";

	i2c-switch@75 {
		compatible = "nxp,pca9546";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x75>;
		i2c-mux-idle-disconnect;

		SMB_OCP_SFF_3V3AUX_SCL: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
		};

		SMB_OCP_LFF_3V3AUX_SCL: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;
		};
	};
};

&i2c8 {
	status = "okay";
};

&i2c9 {
	status = "okay";
};

&i2c11 {
	status = "okay";
};

&i2c14 {
	status = "okay";

	/* SCM FRU (U19) @ 0xA2 */
	scm_fru: scm_fru@51 {
		compatible = "atmel,24c128";
		reg = <0x51>;
		pagesize = <32>;
	};

	scm_tmp75_u4@4a {
		compatible = "ti,tmp75";
		reg = <0x4a>;
	};
};

&i2c15 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2020 Super Micro Computer, Inc

/dts-v1/;

#include "aspeed-g5.dtsi"

/ {
	model = "X11SPI BMC";
	compatible = "supermicro,x11spi-bmc", "aspeed,ast2500";

	chosen {
		stdout-path = &uart5;
		bootargs = "earlycon";
	};

	memory@80000000 {
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		vga_memory: framebuffer@7f000000 {
			no-map;
			reg = <0x7f000000 0x01000000>;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
			<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
			<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
	};

};

&gpio {
    status = "okay";
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
#include "openbmc-flash-layout.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "pnor";
	};
};

&uart5 {
	status = "okay";
};

&mac0 {
    status = "okay";

    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_rmii1_default>;
    clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
           <&syscon ASPEED_CLK_MAC1RCLK>;
    clock-names = "MACCLK", "RCLK";
    use-ncsi;
};

&mac1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};

&i2c1 {
	status = "okay";
};

&i2c2 {
	status = "okay";
};

&i2c3 {
	status = "okay";
};

&i2c4 {
	status = "okay";
};

&i2c5 {
	status = "okay";
};

&i2c6 {
	status = "okay";
};

&i2c7 {
	status = "okay";
};

&i2c13 {
	status = "okay";
};

&gfx {
	status = "okay";
};

&pinctrl {
	aspeed,external-nodes = <&gfx &lhc>;
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
			 &pinctrl_pwm2_default &pinctrl_pwm3_default
			 &pinctrl_pwm4_default &pinctrl_pwm5_default
			 &pinctrl_pwm6_default &pinctrl_pwm7_default>;
};


code:
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;

#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "Tyan S7106 BMC";
	compatible = "tyan,s7106-bmc", "aspeed,ast2500";

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200 earlycon";
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		p2a_memory: region@987f0000 {
			no-map;
			reg = <0x987f0000 0x00010000>; /* 64KB */
		};

		vga_memory: framebuffer@9f000000 {
			no-map;
			reg = <0x9f000000 0x01000000>; /* 16M */
		};

		gfx_memory: framebuffer {
			size = <0x01000000>; /* 16M */
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};
	};

	leds {
		compatible = "gpio-leds";

		identify {
			gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
		};

		heartbeat {
			gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
			<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
			<&adc 12>, <&adc 13>, <&adc 14>;
	};

	iio-hwmon-battery {
		compatible = "iio-hwmon";
		io-channels = <&adc 15>;
	};
};

&fmc {
	status = "okay";
	flash@0 {
		label = "bmc";
		status = "okay";
		m25p,fast-read;
#include "openbmc-flash-layout.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {
		status = "okay";
		label = "pnor";
		m25p,fast-read;
	};
};

&uart1 {
	/* Rear RS-232 connector */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd1_default
			&pinctrl_rxd1_default>;
};

&uart2 {
	/* RS-232 connector on header */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd2_default
			&pinctrl_rxd2_default>;
};

&uart3 {
	/* Alternative to vuart to internally connect (route) to uart1
	 * when vuart cannot be used due to BIOS limitations.
	 */
	status = "okay";
};

&uart4 {
	/* Alternative to vuart to internally connect (route) to the
	 * external port usually used by uart1 when vuart cannot be
	 * used due to BIOS limitations.
	 */
	status = "okay";
};

&uart5 {
	/* BMC "debug" (console) UART; connected to RS-232 connector
	 * on header; selectable via jumpers as alternative to uart2
	 */
	status = "okay";
};

&uart_routing {
	status = "okay";
};

&vuart {
	status = "okay";

	/* We enable the VUART here, but leave it in a state that does
	 * not interfere with the SuperIO. The goal is to have both the
	 * VUART and the SuperIO available and decide at runtime whether
	 * the VUART should actually be used. For that reason, configure
	 * an "invalid" IO address and an IRQ that is not used by the
	 * BMC.
	 */

	aspeed,lpc-io-reg = <0xffff>;
	aspeed,lpc-interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
};

&lpc_ctrl {
	status = "okay";
};

&p2a {
	status = "okay";
	memory-region = <&p2a_memory>;
};

&lpc_snoop {
	status = "okay";
	snoop-ports = <0x80>;
};

&adc {
	status = "okay";
};

&vhub {
	status = "okay";
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_default
			&pinctrl_pwm1_default
			&pinctrl_pwm3_default
			&pinctrl_pwm4_default>;

	/* CPU fan #0 */
	fan@0 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
	};

	/* CPU fan #1 */
	fan@1 {
		reg = <0x01>;
		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
	};

	/* PWM group for chassis fans #1, #2, #3 and #4  */
	fan@2 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
	};

	fan@3 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
	};

	fan@4 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
	};

	fan@5 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
	};

	/* PWM group for chassis fans #5 and #6  */
	fan@6 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
	};

	fan@7 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
	};
};

&i2c0 {
	status = "okay";

	/* Hardware monitor with temperature sensors */
	nct7802@28 {
		compatible = "nuvoton,nct7802";
		reg = <0x28>;

		#address-cells = <1>;
		#size-cells = <0>;

		channel@0 { /* LTD */
			reg = <0>;
		};

		channel@1 { /* RTD1 */
			reg = <1>;
			sensor-type = "temperature";
			temperature-mode = "thermistor";
		};

		channel@2 { /* RTD2 */
			reg = <2>;
			sensor-type = "temperature";
			temperature-mode = "thermistor";
		};

		channel@3 { /* RTD3 */
			reg = <3>;
			sensor-type = "temperature";
		};
	};

	/* Also connected to:
	 * - IPMB pin header
	 * - CPU #0 memory error LED @ 0x3A
	 * - CPU #1 memory error LED @ 0x3C
	 */
};

&i2c1 {
	/* Directly connected to PCH SMBUS #0 */
	status = "okay";
};

&i2c2 {
	status = "okay";

	/* BMC EEPROM, incl. mainboard FRU */
	eeprom@50 {
		compatible = "atmel,24c256";
		reg = <0x50>;
	};

	/* Also connected to:
	 * - fan header
	 * - mini-SAS HD connector
	 * - SSATA SGPIO
	 * - via switch (BMC_SMB3_PCH_IE_SML3_EN, active low)
	 *   to PCH SMBUS #3
	 */
};

&i2c3 {
	status = "okay";

	/* PSU1 FRU @ 0xA0 */
	eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
	};

	/* PSU2 FRU @ 0xA2 */
	eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
	};

	/* PSU1 @ 0xB0 */
	power-supply@58 {
		compatible = "pmbus";
		reg = <0x58>;
	};

	/* PSU2 @ 0xB2 */
	power-supply@59 {
		compatible = "pmbus";
		reg = <0x59>;
	};

	/* Also connected to:
	 * - PCH SMBUS #1
	 */
};

&i2c4 {
	status = "okay";

	/* Connected to:
	 * - PCH SMBUS #2
	 */

	/* Connected via switch to:
	 * - CPU #0 channels ABC VDDQ @ 0x80
	 * - CPU #0 channels DEF VDDQ @ 0x81
	 * - CPU #1 channels ABC VDDQ @ 0x82
	 * - CPU #1 channels DEF VDDQ @ 0x83
	 * - CPU #0 VCCIO & VMCP @ 0x52
	 * - CPU #1 VCCIO & VMCP @ 0x53
	 * - CPU #0 VCCIN @ 0xC0
	 * - CPU #0 VSA @ 0xC2
	 * - CPU #1 VCCIN @ 0xC4
	 * - CPU #1 VSA @ 0xC6
	 * - J110
	 */
};

&i2c5 {
	status = "okay";

	/* Connected via switch (PCH_BMC_SMB_SW_P) to:
	 * - mainboard FRU @ 0xAE
	 * - XDP connector
	 * - ME debug header
	 * - clock buffer @ 0xD8
	 * - i2c4 via switch (PCH_VR_SMBUS_SW_P; controlled by PCH)
	 * - PCH SMBUS
	 */
};

&i2c6 {
	status = "okay";

	/* Connected via switch (BMC_PE_SMB_EN_1_N) to
	 * bus mux (selector BMC_PE_SMB_SW_BIT[1..0]) to:
	 * - 0,0: PCIE slot 1, SMB #1
	 * - 0,1: PCIE slot 1, SMB #2
	 * - 1,0: PCIE slot 2, SMB #1
	 * - 1,1: PCIE slot 2, SMB #2
	 */

	/* Connected via switch (BMC_PE_SMB_EN_2_N) to
	 * bus mux (selector BMC_PE_SMB_SW_BIT[1..0]) to:
	 * - 0,0: OCP0 (A) SMB
	 * - 0,1: OCP0 (C) SMB
	 * - 1,0: OCP1 (A) SMB
	 * - 1,1: NC
	 */
};

&i2c7 {
	status = "okay";

	/* Connected to:
	 * - PCH SMBUS #4
	 */
};

&i2c8 {
	status = "okay";

	/* Not connected */
};

&mac0 {
	status = "okay";
	use-ncsi;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii1_default>;
};

&mac1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};

&ibt {
	status = "okay";
};

&kcs1 {
	status = "okay";
	aspeed,lpc-io-reg = <0xca8>;
};

&kcs3 {
	status = "okay";
	aspeed,lpc-io-reg = <0xca2>;
};

/* Enable BMC VGA output to show an early (pre-BIOS) boot screen */
&gfx {
	status = "okay";
	memory-region = <&gfx_memory>;
};

/* We're following the GPIO naming as defined at
 * https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md.
 *
 * Notes on led-identify and id-button:
 * - A physical button is connected to id-button which
 *   triggers the clock on a D flip-flop. The /Q output of the
 *   flip-flop drives its D input.
 * - The flip-flop's Q output drives led-identify which is
 *   connected to LEDs.
 * - With that, every button press toggles the LED between on and off.
 *
 * Notes on power-, reset- and nmi- button and control:
 * - The -button signals can be used to monitor physical buttons.
 * - The -control signals can be used to actuate the specific
 *   operation.
 * - In hardware, the -button signals are connected to the -control
 *   signals through drivers with the -control signals being
 *   protected through diodes.
 */
&gpio {
	status = "okay";
	gpio-line-names =
	/*A0*/		"",
	/*A1*/		"",
	/*A2*/		"led-identify", /* in/out: BMC_IDLED_ON_N */
	/*A3*/		"",
	/*A4*/		"",
	/*A5*/		"",
	/*A6*/		"",
	/*A7*/		"",
	/*B0-B7*/	"","","","","","","","",
	/*C0*/		"",
	/*C1*/		"",
	/*C2*/		"",
	/*C3*/		"",
	/*C4*/		"id-button", /* in/out: BMC_IDBTN_IN_OUT_N */
	/*C5*/		"post-complete", /* in: FM_BIOS_POST_CMPLT_N */
	/*C6*/		"",
	/*C7*/		"",
	/*D0*/		"",
	/*D1*/		"",
	/*D2*/		"power-chassis-good", /* in: SYS_PWROK_BUF */
	/*D3*/		"platform-reset", /* in: SYS_PLTRST_N */
	/*D4*/		"",
	/*D5*/		"",
	/*D6*/		"",
	/*D7*/		"",
	/*E0*/		"power-button", /* in: BMC_PWBTN_IN_N */
	/*E1*/		"power-chassis-control", /* out: BMC_PWRBTN_OUT_N */
	/*E2*/		"reset-button", /* in: BMC_RSTBTN_IN_N */
	/*E3*/		"reset-control", /* out: BMC_RSTBTN_OUT_N */
	/*E4*/		"nmi-button", /* in: BMC_NMIBTN_IN_N */
	/*E5*/		"nmi-control", /* out: BMC_NMIBTN_OUT_N */
	/*E6*/		"",
	/*E7*/		"led-heartbeat", /* out: BMC_HEARTBRAT_LED_N */
	/*F0*/		"",
	/*F1*/		"clear-cmos-control", /* out: BMC_CLR_CMOS_N */
	/*F2*/		"",
	/*F3*/		"",
	/*F4*/		"led-fault", /* out: AST_HW_FAULT_N */
	/*F5*/		"",
	/*F6*/		"",
	/*F7*/		"",
	/*G0*/		"BMC_PE_SMB_EN_1_N", /* out */
	/*G1*/		"BMC_PE_SMB_EN_2_N", /* out */
	/*G2*/		"",
	/*G3*/		"",
	/*G4*/		"",
	/*G5*/		"",
	/*G6*/		"",
	/*G7*/		"",
	/*H0-H7*/	"","","","","","","","",
	/*I0-I7*/	"","","","","","","","",
	/*J0-J7*/	"","","","","","","","",
	/*K0-K7*/	"","","","","","","","",
	/*L0-L7*/	"","","","","","","","",
	/*M0-M7*/	"","","","","","","","",
	/*N0-N7*/	"","","","","","","","",
	/*O0-O7*/	"","","","","","","","",
	/*P0-P7*/	"","","","","","","","",
	/*Q0*/		"",
	/*Q1*/		"",
	/*Q2*/		"",
	/*Q3*/		"",
	/*Q4*/		"BMC_PE_SMB_SW_BIT0", /* out */
	/*Q5*/		"BMC_PE_SMB_SW_BIT1", /* out */
	/*Q6*/		"",
	/*Q7*/		"",
	/*R0-R7*/	"","","","","","","","",
	/*S0-S7*/	"","","","","","","","",
	/*T0-T7*/	"","","","","","","","",
	/*U0-U7*/	"","","","","","","","",
	/*V0-V7*/	"","","","","","","","",
	/*W0-W7*/	"","","","","","","","",
	/*X0-X7*/	"","","","","","","","",
	/*Y0-Y7*/	"","","","","","","","",
	/*Z0-Z7*/	"","","","","","","","",
	/*AA0*/		"",
	/*AA1*/		"",
	/*AA2*/		"",
	/*AA3*/		"BMC_SMB3_PCH_IE_SML3_EN", /* out */
	/*AA4*/		"",
	/*AA5*/		"",
	/*AA6*/		"",
	/*AA7*/		"",
	/*AB0-AB7*/	"","","","","","","","";
};


code:
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;

#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "Tyan S8036 BMC";
	compatible = "tyan,s8036-bmc", "aspeed,ast2500";

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200 earlycon";
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		p2a_memory: region@987f0000 {
			no-map;
			reg = <0x987f0000 0x00010000>; /* 64KB */
		};

		vga_memory: framebuffer@9f000000 {
			no-map;
			reg = <0x9f000000 0x01000000>; /* 16M */
		};

		gfx_memory: framebuffer {
			size = <0x01000000>; /* 16M */
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};
	};

	leds {
		compatible = "gpio-leds";

		identify {
			gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
		};

		heartbeat {
			gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
			<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
			<&adc 12>, <&adc 13>, <&adc 14>;
	};

	iio-hwmon-battery {
		compatible = "iio-hwmon";
		io-channels = <&adc 15>;
	};
};

&fmc {
	status = "okay";
	flash@0 {
		label = "bmc";
		status = "okay";
		m25p,fast-read;
#include "openbmc-flash-layout.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {
		status = "okay";
		label = "pnor";
		m25p,fast-read;
	};
};

&uart1 {
	/* Rear RS-232 connector */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd1_default
			&pinctrl_rxd1_default>;
};

&uart2 {
	/* RS-232 connector on header */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd2_default
			&pinctrl_rxd2_default>;
};

&uart3 {
	/* Alternative to vuart to internally connect (route) to uart1
	 * when vuart cannot be used due to BIOS limitations.
	 */
	status = "okay";
};

&uart4 {
	/* Alternative to vuart to internally connect (route) to the
	 * external port usually used by uart1 when vuart cannot be
	 * used due to BIOS limitations.
	 */
	status = "okay";
};

&uart5 {
	/* BMC "debug" (console) UART; connected to RS-232 connector
	 * on header; selectable via jumpers as alternative to uart2
	 */
	status = "okay";
};

&uart_routing {
	status = "okay";
};

&vuart {
	status = "okay";

	/* We enable the VUART here, but leave it in a state that does
	 * not interfere with the SuperIO. The goal is to have both the
	 * VUART and the SuperIO available and decide at runtime whether
	 * the VUART should actually be used. For that reason, configure
	 * an "invalid" IO address and an IRQ that is not used by the
	 * BMC.
	 */
	aspeed,lpc-io-reg = <0xffff>;
	aspeed,lpc-interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
};

&lpc_ctrl {
	status = "okay";
};

&p2a {
	status = "okay";
	memory-region = <&p2a_memory>;
};

&lpc_snoop {
	status = "okay";
	snoop-ports = <0x80>;
};

&adc {
	status = "okay";
};

&vhub {
	status = "okay";
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_default
			&pinctrl_pwm1_default
			&pinctrl_pwm3_default
			&pinctrl_pwm4_default>;

	/* CPU fan */
	fan@0 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
	};

	/* PWM group for chassis fans #1, #2, #3 and #4 */
	fan@2 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
	};

	fan@3 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
	};

	fan@4 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
	};

	fan@5 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
	};

	/* PWM group for chassis fans #5 and #6  */
	fan@6 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
	};

	fan@7 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
	};
};

&i2c0 {
	/* Directly connected to Sideband-Temperature Sensor Interface (APML) */
	status = "okay";
};

&i2c1 {
	/* Directly connected to IPMB HDR. */
	status = "okay";
};

&i2c2 {
	status = "okay";

	/* BMC EEPROM, incl. mainboard FRU */
	eeprom@50 {
		compatible = "atmel,24c256";
		reg = <0x50>;
	};
	/* Also connected to:
	 * - BCM5720
	 * - FPGA
	 * - FAN HDR
	 * - FPIO HDR
	 */
};

&i2c3 {
	status = "okay";

	/* PSU1 FRU @ 0xA0 */
	eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
	};

	/* PSU2 FRU @ 0xA2 */
	eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
	};

	/* PSU1 @ 0xB0 */
	power-supply@58 {
		compatible = "pmbus";
		reg = <0x58>;
	};

	/* PSU2 @ 0xB2 */
	power-supply@59 {
		compatible = "pmbus";
		reg = <0x59>;
	};

};

&i2c4 {
	status = "okay";
};

&i2c5 {
	status = "okay";
	/* Hardware monitor with temperature sensors */
	nct7802@28 {
		compatible = "nuvoton,nct7802";
		reg = <0x28>;
		#address-cells = <1>;
		#size-cells = <0>;

		channel@0 { /* LTD */
			reg = <0>;
			status = "okay";
		};

		channel@1 { /* RTD1 */
			reg = <1>;
			status = "okay";
			sensor-type = "temperature";
			temperature-mode = "thermistor";
		};

		channel@2 { /* RTD2 */
			reg = <2>;
			status = "okay";
			sensor-type = "temperature";
			temperature-mode = "thermistor";
		};

		channel@3 { /* RTD3 */
			reg = <3>;
			status = "okay";
			sensor-type = "temperature";
		};
	};

	/* Also connected to:
	 * - PCA9544
	 * - CLK BUFF
	 * - OCP FRU
	 */
};

&i2c6 {
	status = "okay";
	/* Connected to:
	 * - PCA9548 @0xE0
	 * - PCA9548 @0xE2
	 * - PCA9544 @0xE4
	 */
};

&i2c7 {
	status = "okay";

	/* Connected to:
	 * - PCH SMBUS #4
	 */
};

&i2c8 {
	status = "okay";

	/* Not connected */
};

&mac0 {
	status = "okay";
	use-ncsi;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii1_default>;
};

&mac1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};

&ibt {
	status = "okay";
};

&kcs1 {
	status = "okay";
	aspeed,lpc-io-reg = <0xca8>;
};

&kcs3 {
	status = "okay";
	aspeed,lpc-io-reg = <0xca2>;
};

/* Enable BMC VGA output to show an early (pre-BIOS) boot screen */
&gfx {
	status = "okay";
	memory-region = <&gfx_memory>;
};

/* We're following the GPIO naming as defined at
 * https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md.
 *
 * Notes on led-identify and id-button:
 * - A physical button is connected to id-button which
 *   triggers the clock on a D flip-flop. The /Q output of the
 *   flip-flop drives its D input.
 * - The flip-flop's Q output drives led-identify which is
 *   connected to LEDs.
 * - With that, every button press toggles the LED between on and off.
 *
 * Notes on power-, reset- and nmi- button and control:
 * - The -button signals can be used to monitor physical buttons.
 * - The -control signals can be used to actuate the specific
 *   operation.
 * - In hardware, the -button signals are connected to the -control
 *   signals through drivers with the -control signals being
 *   protected through diodes.
 */
&gpio {
	status = "okay";
	gpio-line-names =
	/*A0*/		"",
	/*A1*/		"",
	/*A2*/		"led-identify", /* in/out: BMC_CHASSIS_ID_LED_L */
	/*A3*/		"",
	/*A4*/		"",
	/*A5*/		"",
	/*A6*/		"",
	/*A7*/		"",
	/*B0-B7*/	"","","","","","","","",
	/*C0-C7*/	"","","","","","","","",
	/*D0*/		"",
	/*D1*/		"",
	/*D2*/		"power-chassis-good", /* in: PWR_GOOD_LED -- Check if this is Z3?*/
	/*D3*/		"platform-reset", /* in: RESET_LED_L */
	/*D4*/		"",
	/*D5*/		"",
	/*D6*/		"",
	/*D7*/		"",
	/*E0*/		"power-button", /* in: BMC_SYS_MON_PWR_BTN_L */
	/*E1*/		"power-chassis-control", /* out: BMC_ASSERT_PWR_BTN */
	/*E2*/		"reset-button", /* in: BMC_SYS_MOS_RST_BTN_L*/
	/*E3*/		"reset-control", /* out: BMC_ASSERT_RST_BTN */
	/*E4*/		"nmi-button", /* in: BMC_SYS_MON_NMI_BTN_L */
	/*E5*/		"nmi-control", /* out: BMC_ASSERT_NMI_BTN */
	/*E6*/		"TSI_RESERT",
	/*E7*/		"led-heartbeat", /* out: BMC_GPIOE7 */
	/*F0*/		"",
	/*F1*/		"clear-cmos-control", /* out: BMC_ASSERT_CLR_CMOS_L */
	/*F2*/		"",
	/*F3*/		"",
	/*F4*/		"led-fault", /* out: BMC_HWM_FAULT_LED_L */
	/*F5*/		"BMC_SYS_FAULT_LED_L",
	/*F6*/		"BMC_ASSERT_BIOS_WP_L",
	/*F7*/		"",
	/*G0-G7*/	"","","","","","","","",
	/*H0-H7*/	"","","","","","","","",
	/*I0-I7*/	"","","","","","","","",
	/*J0-J7*/	"","","","","","","","",
	/*K0-K7*/	"","","","","","","","",
	/*L0-L7*/	"","","","","","","","",
	/*M0-M7*/	"","","","","","","","",
	/*N0-N7*/	"","","","","","","","",
	/*O0-O7*/	"","","","","","","","",
	/*P0-P7*/	"","","","","","","","",
	/*Q0*/		"",
	/*Q1*/		"",
	/*Q2*/		"",
	/*Q3*/		"",
	/*Q4*/		"",
	/*Q5*/		"",
	/*Q6*/		"id-button", /* in: BMC_CHASSIS_ID_BTN_L */
	/*Q7*/		"",
	/*R0-R7*/	"","","","","","","","",
	/*S0-S7*/	"","","","","","","","",
	/*T0-T7*/	"","","","","","","","",
	/*U0-U7*/	"","","","","","","","",
	/*V0-V7*/	"","","","","","","","",
	/*W0-W7*/	"","","","","","","","",
	/*X0-X7*/	"","","","","","","","",
	/*Y0-Y7*/	"","","","","","","","",
	/*Z0-Z2*/	"","","",
	/*Z3*/		"post-complete", /* BMC_SYS_MON_PWROK */
	/*Z4-Z7*/	"","","","",
	/*AA0*/		"",
	/*AA1*/		"",
	/*AA2*/		"",
	/*AA3*/		"",
	/*AA4*/		"",
	/*AA5*/		"",
	/*AA6*/		"",
	/*AA7*/		"BMC_ASSERT_BMC_READY",
	/*AB0*/		"BMC_SPD_SEL",
	/*AB1-AB7*/	"","","","","","","";
};


code:
// SPDX-License-Identifier: GPL-2.0+
// Copyright (C) 2021 YADRO
/dts-v1/;

#include "aspeed-bmc-vegman.dtsi"

/ {
	model = "YADRO VEGMAN Rx20 BMC";
	compatible = "yadro,vegman-rx20-bmc", "aspeed,ast2500";

	leds {
		compatible = "gpio-leds";

		temp_alarm {
			label = "temp:red:status";
			default-state = "off";
			gpios = <&gpio ASPEED_GPIO(E, 4) GPIO_ACTIVE_LOW>;
		};

		temp_ok {
			label = "temp:green:status";
			default-state = "off";
			gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>;
		};

		psu_fault {
			label = "psu:red:status";
			default-state = "off";
			gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_LOW>;
		};

		psu_ok {
			label = "psu:green:status";
			default-state = "off";
			gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
		};
	};
};

&gpio {
	status = "okay";
	gpio-line-names =
	/*A0-A7*/	"CASE_OPEN_DNP","CASE_OPEN_FAULT_RST_DNP","BEZEL_ON_PWR_P3V3","PWM_PWRGD_EXP_EN","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","",
	/*B0-B7*/	"","","","","","","","",
	/*C0-C7*/	"","","","","","","","",
	/*D0-D7*/	"","","","","","","","",
	/*E0-E7*/	"RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","LED_TEMP_STATUS_R","LED_TEMP_STATUS_G","LED_PWR_STATUS_R","LED_PWR_STATUS_G",
	/*F0-F7*/	"NMI_OUT","CPU1_DISABLE_COD","","","SKT0_FAULT_LED_DNP","SKT1_FAULT_LED_DNP","RST_RGMII_PHYRST_DNP","",
	/*G0-G7*/	"CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","SPI_BMC_BOOT_HD","IRQ_NMI_EVENT","SPI_BMC_BOOT_WP","SPI_BMC_BOOT_WP1","",
	/*H0-H7*/	"PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS",
	/*I0-I7*/	"","","","","","","","",
	/*J0-J7*/	"","","","","","","","",
	/*K0-K7*/	"","","","","","","","",
	/*L0-L7*/	"","","","","","","","",
	/*M0-M7*/	"SEL_FLASH_SOFT","STATUS_SEL_BMC","","","BMC_WDT_P","ID_BUTTON","PS_PWROK","",
	/*N0-N7*/	"","","","","","","","",
	/*O0-O7*/	"","","","","","","","",
	/*P0-P7*/	"","","","","","","SPI_BIOS_ACTIVE_FLASH_SEL","STATUS_SEL_BIOS",
	/*Q0-Q7*/	"","","","","","","","",
	/*R0-R7*/	"_SPI_BMC_BOOT_CS1","","","","","","","",
	/*S0-S7*/	"_SPI2_BMC_CS1","RSR_A_SMBEXP_RST_INT","RSR_B_SMBEXP_RST_INT","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","",
	/*T0-T7*/	"","","","","","","","",
	/*U0-U7*/	"","","","","","","","",
	/*V0-V7*/	"","","","","","","","",
	/*W0-W7*/	"","","","","","","","",
	/*X0-X7*/	"","","","","","","","",
	/*Y0-Y7*/	"SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","",
	/*Z0-Z7*/	"FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","",
	/*AA0-AA7*/	"CPU_CLK_MUX_SEL","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE",
	/*AB0-AB7*/	"FM_CPU_BMCINIT","NMI_BUTTON","BMC_WDT_RST1","BMC_WDT_RST2","","","","",
	/*AC0-AC7*/	"","","","","","","","";
};

&sgpio {
	ngpios = <80>;
	bus-frequency = <2000000>;
	status = "okay";
	/* SGPIO lines. even: input, odd: output */
	gpio-line-names =
	/*A0-A7*/	"CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","",
	/*B0-B7*/	"CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","",
	/*C0-C7*/	"","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","",
	/*D0-D7*/	"","","","","","","","","","","","","","","","",
	/*E0-E7*/	"","","","","","","","","","","","","","","","",
	/*F0-F7*/	"SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","",
	/*G0-G7*/	"MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","",
	/*H0-H7*/	"","","","","","","","","","","","","","","","",
	/*I0-I7*/	"","","","","","","","","","","","","","","","",
	/*J0-J7*/	"","","","","","","","","","","","","","","","";
};

&i2c11 {
	/* SMB_BMC_MGMT_LVC3 */
	gpio@21 {
		compatible = "nxp,pcal9535";
		reg = <0x21>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names =
		/*IO0.0-0.7*/	"ETH3_CLK_REQ", "ETH2_CLK_REQ", "RSR_A_PCIE_X16_2_PRSNT", "RSR_B_PCIE_X16_2_PRSNT", "", "RSR_B_PCIE_X8_3_PRSNT", "RSR_B_PCIE_X8_4_PRSNT", "RSR_B_PCIE_X16_PRSNT_N",
		/*IO1.0-1.7*/	"RSR_B_PCIE_X8_2_PRSNT", "RSR_B_PCIE_X8_1_PRSNT", "NIC_1_PE_BUF_PRSNT", "RSR_A_PCIE_X16_PRSNT", "RSR_A_PCIE_X8_3_PRSNT", "RSR_A_PCIE_X8_2_PRSNT", "RSR_A_PCIE_X8_1_PRSNT_N", "";
	};
	gpio@23 {
		compatible = "nxp,pcal9535";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names =
		/*IO0.0-0.7*/	"FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "", "", "",
		/*IO1.0-1.7*/	"", "", "", "", "", "", "", "";
	};
	gpio@27 {
		compatible = "nxp,pca9698";
		reg = <0x27>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names =
		/*IO0.0-0.7*/	"PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX",
		/*IO1.0-1.7*/	"PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0",
		/*IO2.0-2.7*/	"PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "PWRGD_PVCCIN_CPU1", "PWRGD_PVCCSA_CPU1", "PWRGD_PVCCIO_CPU1",
		/*IO3.0-3.7*/	"PWRGD_PVMCP_CPU1", "PWRGD_P1V0_CPU1", "PWRGD_PVDDQ_GHJ_CPU1", "PWRGD_PVPP_GHJ_CPU1", "PWRGD_PVTT_GHJ_CPU1", "PWRGD_PVDDQ_KLM_CPU1", "PWRGD_PVPP_KLM_CPU1", "PWRGD_PVTT_KLM_CPU1",
		/*IO4.0-4.7*/	"PCH_PWR_RESET_N", "FM_BOARD_SKU_ID0", "FM_BOARD_SKU_ID1", "FM_BOARD_SKU_ID2", "FM_BOARD_SKU_ID3", "FM_BOARD_SKU_ID4", "FM_BOARD_REV_ID0", "FM_BOARD_REV_ID1";
	};
	gpio@39 {
		compatible = "nxp,pca9554";
		reg = <0x39>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names =
		/*IO0.0-0.7*/	"FAN_FAULT_0", "FAN_FAULT_1", "FAN_FAULT_2", "FAN_FAULT_3", "FAN_FAULT_4", "FAN_FAULT_5", "FAN_FAULT_6", "";
	};
};

&i2c13 {
	/* SMB_PCIE2_STBY_LVC3 */
	mux-expa@70 {
		compatible = "nxp,pca9548";
		reg = <0x70>;
		#address-cells = <1>;
		#size-cells = <0>;
		i2c-mux-idle-disconnect;

		i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;
			rsra-mux@72 {
				compatible = "nxp,pca9548";
				reg = <0x72>;
				#address-cells = <1>;
				#size-cells = <0>;

				i2c@7 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <7>;
					at24@50 {
						compatible = "atmel,24c64";
						reg = <0x50>;
						pagesize = <32>;
						size = <8192>;
						address-width = <16>;
					};
				};
			};
		};
	};
	mux-sata@71 {
		compatible = "nxp,pca9543";
		reg = <0x71>;
		#address-cells = <1>;
		#size-cells = <0>;
		i2c-mux-idle-disconnect;
	};
};

&i2c2 {
	/* SMB_PCIE_STBY_LVC3 */
	mux-expb@71 {
		compatible = "nxp,pca9548";
		reg = <0x71>;
		#address-cells = <1>;
		#size-cells = <0>;
		i2c-mux-idle-disconnect;

		i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
			rsrb-mux@72 {
				compatible = "nxp,pca9548";
				reg = <0x72>;
				#address-cells = <1>;
				#size-cells = <0>;
				i2c@7 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <7>;
					at24@50 {
						compatible = "atmel,24c64";
						reg = <0x50>;
						pagesize = <32>;
						size = <8192>;
						address-width = <16>;
					};
				};
			};
			at24@50 {
				compatible = "atmel,24c64";
				reg = <0x50>;
				pagesize = <32>;
				size = <8192>;
				address-width = <16>;
			};
		};
	};
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
			 &pinctrl_pwm2_default &pinctrl_pwm3_default
			 &pinctrl_pwm4_default &pinctrl_pwm5_default
			 &pinctrl_pwm6_default>;

	fan@0 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x00 0x07>;
	};
	fan@1 {
		reg = <0x01>;
		aspeed,fan-tach-ch = /bits/ 8 <0x01 0x08>;
	};
	fan@2 {
		reg = <0x02>;
		aspeed,fan-tach-ch = /bits/ 8 <0x02 0x09>;
	};
	fan@3 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0A>;
	};
	fan@4 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0B>;
	};
	fan@5 {
		reg = <0x05>;
		aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0C>;
	};
	fan@6 {
		reg = <0x06>;
		aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0D>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+
// Copyright (C) 2021 YADRO

#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>

/ {
	aliases {
		serial4 = &uart5;
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200 earlyprintk";
	};

	memory@80000000 {
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		video_engine_memory: jpegbuffer {
			size = <0x02000000>;	/* 32M */
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};

		ramoops@9eff0000{
			compatible = "ramoops";
			reg = <0x9eff0000 0x10000>;
			record-size = <0x2000>;
			console-size = <0x2000>;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
			<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
			<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
	};

	leds {
		compatible = "gpio-leds";

		identify {
			label = "platform:blue:indicator";
			linux,default-trigger = "heartbeat";
			gpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>;
		};

		status_amber {
			label = "platform:red:status";
			default-state = "off";
			gpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>;
		};

		status_green {
			label = "platform:green:status";
			default-state = "off";
			gpios = <&gpio ASPEED_GPIO(S, 4) GPIO_ACTIVE_LOW>;
		};

		power_fault {
			label = "platform:red:power";
			default-state = "off";
			gpios = <&gpio ASPEED_GPIO(AA, 4) GPIO_ACTIVE_LOW>;
		};

		power_ok {
			label = "platform:green:power";
			default-state = "off";
			gpios = <&gpio ASPEED_GPIO(AA, 5) GPIO_ACTIVE_LOW>;
		};
	};

	beeper {
		compatible = "pwm-beeper";
		pwms = <&timer 5 1000000 0>;
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		label = "bmc";
		m25p,fast-read;
#include "openbmc-flash-layout-64.dtsi"
	};
};

&spi2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi2ck_default
			&pinctrl_spi2miso_default
			&pinctrl_spi2mosi_default
			&pinctrl_spi2cs0_default>;
	flash@0 {
		status = "okay";
		label = "bios";
		m25p,fast-read;
	};
};

&mac0 {
	status = "okay";
	use-ncsi;

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii1_default>;
};

&mac1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;

	phy-mode = "rgmii";
	phy-handle = <&phy>;
	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		phy: ethernet-phy@1 {
			/* KSZ9131 */
			compatible = "ethernet-phy-id0022.1640";
			reg = <1>;

			micrel,led-mode = <0>;
		};
	};
};

&vhub {
	status = "okay";
};

&adc {
	status = "okay";
};

&video {
	status = "okay";
	memory-region = <&video_engine_memory>;
};

&sdmmc {
	status = "okay";
};

&sdhci1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sd2_default>;
	disable-wp;
};

&timer {
	fttmr010,pwm-outputs = <5>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_timer5_default>;
	#pwm-cells = <3>;
	status = "okay";
};

&uart1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd1_default
			&pinctrl_rxd1_default
			&pinctrl_nrts1_default
			&pinctrl_ndtr1_default
			&pinctrl_ndsr1_default
			&pinctrl_ncts1_default
			&pinctrl_ndcd1_default
			&pinctrl_nri1_default>;
};

&uart5 {
	status = "okay";
};

&vuart {
	status = "okay";
};

&kcs3 {
	aspeed,lpc-io-reg = <0xCA2>;
	status = "okay";
};

&kcs4 {
	aspeed,lpc-io-reg = <0xCA4>;
	status = "okay";
};

&lpc_snoop {
	snoop-ports = <0x80>;
	status = "okay";
};

&uart_routing {
	status = "okay";
};

&uart2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <>;
};

&uart3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <>;
};

&uart4 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <>;
};

&i2c0 {
	/* SMB_IPMB_STBY_LVC3 */
	multi-master;
	status = "okay";
};

&i2c1 {
	/* SMB_CHASSENSOR_STBY_LVC3 */
	status = "okay";
};

&i2c2 {
	/* SMB_PCIE_STBY_LVC3 */
	status = "okay";
};

&i2c3 {
	/* SMB_HOST_STBY_LVC3 */
	multi-master;
	status = "okay";
};

&i2c4 {
	/* BMC_PMBUS2_STBY */
	status = "okay";
};

&i2c5 {
	/* SMB_SMLINK0_STBY_LVC3 */
	bus-frequency = <1000000>;
	multi-master;
	status = "okay";
};

&i2c6 {
	/* SMB_TEMPSENSOR_STBY_LVC3 */
	multi-master;
	status = "okay";
};

&i2c7 {
	/* SMB_SM_PMB1_SML1_STBY_LVC3 */
	multi-master;
	status = "okay";
};

&i2c9 {
	/* SMB_BMC_ETH3_LVC3 */
	status = "okay";
};

&i2c10 {
	/* SMB_BMC_ETH2_LVC3 */
	status = "okay";
};

&i2c11 {
	/* SMB_BMC_MGMT_LVC3 */
	status = "okay";

	at24@50 {
		compatible = "atmel,24c64";
		reg = <0x50>;
		pagesize = <32>;
		size = <8192>;
		address-width = <16>;
	};
};

&i2c12 {
	/* SMB_BMC_FAULT_EXP_LVC3 */
	status = "okay";
};

&i2c13 {
	/* SMB_PCIE2_STBY_LVC3 */
	status = "okay";
};