code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
 */
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp1-clks.h>
#include <dt-bindings/reset/stm32mp1-resets.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a7";
			clock-frequency = <650000000>;
			device_type = "cpu";
			reg = <0>;
		};
	};

	arm-pmu {
		compatible = "arm,cortex-a7-pmu";
		interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>;
		interrupt-parent = <&intc>;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	intc: interrupt-controller@a0021000 {
		compatible = "arm,cortex-a7-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0xa0021000 0x1000>,
		      <0xa0022000 0x2000>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
		interrupt-parent = <&intc>;
	};

	clocks {
		clk_hse: clk-hse {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
		};

		clk_hsi: clk-hsi {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <64000000>;
		};

		clk_lse: clk-lse {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		clk_lsi: clk-lsi {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32000>;
		};

		clk_csi: clk-csi {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <4000000>;
		};
	};

	thermal-zones {
		cpu_thermal: cpu-thermal {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&dts>;

			trips {
				cpu_alert1: cpu-alert1 {
					temperature = <85000>;
					hysteresis = <0>;
					type = "passive";
				};

				cpu-crit {
					temperature = <120000>;
					hysteresis = <0>;
					type = "critical";
				};
			};

			cooling-maps {
			};
		};
	};

	booster: regulator-booster {
		compatible = "st,stm32mp1-booster";
		st,syscfg = <&syscfg>;
		status = "disabled";
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		interrupt-parent = <&intc>;
		ranges;

		timers2: timer@40000000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x40000000 0x400>;
			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM2_K>;
			clock-names = "int";
			dmas = <&dmamux1 18 0x400 0x1>,
			       <&dmamux1 19 0x400 0x1>,
			       <&dmamux1 20 0x400 0x1>,
			       <&dmamux1 21 0x400 0x1>,
			       <&dmamux1 22 0x400 0x1>;
			dma-names = "ch1", "ch2", "ch3", "ch4", "up";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@1 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <1>;
				status = "disabled";
			};

			counter {
				compatible = "st,stm32-timer-counter";
				status = "disabled";
			};
		};

		timers3: timer@40001000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x40001000 0x400>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM3_K>;
			clock-names = "int";
			dmas = <&dmamux1 23 0x400 0x1>,
			       <&dmamux1 24 0x400 0x1>,
			       <&dmamux1 25 0x400 0x1>,
			       <&dmamux1 26 0x400 0x1>,
			       <&dmamux1 27 0x400 0x1>,
			       <&dmamux1 28 0x400 0x1>;
			dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@2 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <2>;
				status = "disabled";
			};

			counter {
				compatible = "st,stm32-timer-counter";
				status = "disabled";
			};
		};

		timers4: timer@40002000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x40002000 0x400>;
			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM4_K>;
			clock-names = "int";
			dmas = <&dmamux1 29 0x400 0x1>,
			       <&dmamux1 30 0x400 0x1>,
			       <&dmamux1 31 0x400 0x1>,
			       <&dmamux1 32 0x400 0x1>;
			dma-names = "ch1", "ch2", "ch3", "ch4";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@3 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <3>;
				status = "disabled";
			};

			counter {
				compatible = "st,stm32-timer-counter";
				status = "disabled";
			};
		};

		timers5: timer@40003000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x40003000 0x400>;
			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM5_K>;
			clock-names = "int";
			dmas = <&dmamux1 55 0x400 0x1>,
			       <&dmamux1 56 0x400 0x1>,
			       <&dmamux1 57 0x400 0x1>,
			       <&dmamux1 58 0x400 0x1>,
			       <&dmamux1 59 0x400 0x1>,
			       <&dmamux1 60 0x400 0x1>;
			dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@4 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <4>;
				status = "disabled";
			};

			counter {
				compatible = "st,stm32-timer-counter";
				status = "disabled";
			};
		};

		timers6: timer@40004000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x40004000 0x400>;
			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM6_K>;
			clock-names = "int";
			dmas = <&dmamux1 69 0x400 0x1>;
			dma-names = "up";
			status = "disabled";

			timer@5 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <5>;
				status = "disabled";
			};
		};

		timers7: timer@40005000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x40005000 0x400>;
			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM7_K>;
			clock-names = "int";
			dmas = <&dmamux1 70 0x400 0x1>;
			dma-names = "up";
			status = "disabled";

			timer@6 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <6>;
				status = "disabled";
			};
		};

		timers12: timer@40006000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x40006000 0x400>;
			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM12_K>;
			clock-names = "int";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@11 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <11>;
				status = "disabled";
			};
		};

		timers13: timer@40007000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x40007000 0x400>;
			interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM13_K>;
			clock-names = "int";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@12 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <12>;
				status = "disabled";
			};
		};

		timers14: timer@40008000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x40008000 0x400>;
			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM14_K>;
			clock-names = "int";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@13 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <13>;
				status = "disabled";
			};
		};

		lptimer1: timer@40009000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-lptimer";
			reg = <0x40009000 0x400>;
			interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LPTIM1_K>;
			clock-names = "mux";
			wakeup-source;
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm-lp";
				#pwm-cells = <3>;
				status = "disabled";
			};

			trigger@0 {
				compatible = "st,stm32-lptimer-trigger";
				reg = <0>;
				status = "disabled";
			};

			counter {
				compatible = "st,stm32-lptimer-counter";
				status = "disabled";
			};
		};

		spi2: spi@4000b000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32h7-spi";
			reg = <0x4000b000 0x400>;
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI2_K>;
			resets = <&rcc SPI2_R>;
			dmas = <&dmamux1 39 0x400 0x05>,
			       <&dmamux1 40 0x400 0x05>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		i2s2: audio-controller@4000b000 {
			compatible = "st,stm32h7-i2s";
			#sound-dai-cells = <0>;
			reg = <0x4000b000 0x400>;
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&dmamux1 39 0x400 0x01>,
			       <&dmamux1 40 0x400 0x01>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		spi3: spi@4000c000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32h7-spi";
			reg = <0x4000c000 0x400>;
			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI3_K>;
			resets = <&rcc SPI3_R>;
			dmas = <&dmamux1 61 0x400 0x05>,
			       <&dmamux1 62 0x400 0x05>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		i2s3: audio-controller@4000c000 {
			compatible = "st,stm32h7-i2s";
			#sound-dai-cells = <0>;
			reg = <0x4000c000 0x400>;
			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&dmamux1 61 0x400 0x01>,
			       <&dmamux1 62 0x400 0x01>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		spdifrx: audio-controller@4000d000 {
			compatible = "st,stm32h7-spdifrx";
			#sound-dai-cells = <0>;
			reg = <0x4000d000 0x400>;
			clocks = <&rcc SPDIF_K>;
			clock-names = "kclk";
			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&dmamux1 93 0x400 0x01>,
			       <&dmamux1 94 0x400 0x01>;
			dma-names = "rx", "rx-ctrl";
			status = "disabled";
		};

		usart2: serial@4000e000 {
			compatible = "st,stm32h7-uart";
			reg = <0x4000e000 0x400>;
			interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc USART2_K>;
			wakeup-source;
			dmas = <&dmamux1 43 0x400 0x15>,
			       <&dmamux1 44 0x400 0x11>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		usart3: serial@4000f000 {
			compatible = "st,stm32h7-uart";
			reg = <0x4000f000 0x400>;
			interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc USART3_K>;
			wakeup-source;
			dmas = <&dmamux1 45 0x400 0x15>,
			       <&dmamux1 46 0x400 0x11>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		uart4: serial@40010000 {
			compatible = "st,stm32h7-uart";
			reg = <0x40010000 0x400>;
			interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc UART4_K>;
			wakeup-source;
			dmas = <&dmamux1 63 0x400 0x15>,
			       <&dmamux1 64 0x400 0x11>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		uart5: serial@40011000 {
			compatible = "st,stm32h7-uart";
			reg = <0x40011000 0x400>;
			interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc UART5_K>;
			wakeup-source;
			dmas = <&dmamux1 65 0x400 0x15>,
			       <&dmamux1 66 0x400 0x11>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		i2c1: i2c@40012000 {
			compatible = "st,stm32mp15-i2c";
			reg = <0x40012000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C1_K>;
			resets = <&rcc I2C1_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			st,syscfg-fmp = <&syscfg 0x4 0x1>;
			wakeup-source;
			i2c-analog-filter;
			status = "disabled";
		};

		i2c2: i2c@40013000 {
			compatible = "st,stm32mp15-i2c";
			reg = <0x40013000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C2_K>;
			resets = <&rcc I2C2_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			st,syscfg-fmp = <&syscfg 0x4 0x2>;
			wakeup-source;
			i2c-analog-filter;
			status = "disabled";
		};

		i2c3: i2c@40014000 {
			compatible = "st,stm32mp15-i2c";
			reg = <0x40014000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C3_K>;
			resets = <&rcc I2C3_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			st,syscfg-fmp = <&syscfg 0x4 0x4>;
			wakeup-source;
			i2c-analog-filter;
			status = "disabled";
		};

		i2c5: i2c@40015000 {
			compatible = "st,stm32mp15-i2c";
			reg = <0x40015000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C5_K>;
			resets = <&rcc I2C5_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			st,syscfg-fmp = <&syscfg 0x4 0x10>;
			wakeup-source;
			i2c-analog-filter;
			status = "disabled";
		};

		cec: cec@40016000 {
			compatible = "st,stm32-cec";
			reg = <0x40016000 0x400>;
			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc CEC_K>, <&rcc CEC>;
			clock-names = "cec", "hdmi-cec";
			status = "disabled";
		};

		dac: dac@40017000 {
			compatible = "st,stm32h7-dac-core";
			reg = <0x40017000 0x400>;
			clocks = <&rcc DAC12>;
			clock-names = "pclk";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			dac1: dac@1 {
				compatible = "st,stm32-dac";
				#io-channel-cells = <1>;
				reg = <1>;
				status = "disabled";
			};

			dac2: dac@2 {
				compatible = "st,stm32-dac";
				#io-channel-cells = <1>;
				reg = <2>;
				status = "disabled";
			};
		};

		uart7: serial@40018000 {
			compatible = "st,stm32h7-uart";
			reg = <0x40018000 0x400>;
			interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc UART7_K>;
			wakeup-source;
			dmas = <&dmamux1 79 0x400 0x15>,
			       <&dmamux1 80 0x400 0x11>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		uart8: serial@40019000 {
			compatible = "st,stm32h7-uart";
			reg = <0x40019000 0x400>;
			interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc UART8_K>;
			wakeup-source;
			dmas = <&dmamux1 81 0x400 0x15>,
			       <&dmamux1 82 0x400 0x11>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		timers1: timer@44000000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x44000000 0x400>;
			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "brk", "up", "trg-com", "cc";
			clocks = <&rcc TIM1_K>;
			clock-names = "int";
			dmas = <&dmamux1 11 0x400 0x1>,
			       <&dmamux1 12 0x400 0x1>,
			       <&dmamux1 13 0x400 0x1>,
			       <&dmamux1 14 0x400 0x1>,
			       <&dmamux1 15 0x400 0x1>,
			       <&dmamux1 16 0x400 0x1>,
			       <&dmamux1 17 0x400 0x1>;
			dma-names = "ch1", "ch2", "ch3", "ch4",
				    "up", "trig", "com";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@0 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <0>;
				status = "disabled";
			};

			counter {
				compatible = "st,stm32-timer-counter";
				status = "disabled";
			};
		};

		timers8: timer@44001000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x44001000 0x400>;
			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "brk", "up", "trg-com", "cc";
			clocks = <&rcc TIM8_K>;
			clock-names = "int";
			dmas = <&dmamux1 47 0x400 0x1>,
			       <&dmamux1 48 0x400 0x1>,
			       <&dmamux1 49 0x400 0x1>,
			       <&dmamux1 50 0x400 0x1>,
			       <&dmamux1 51 0x400 0x1>,
			       <&dmamux1 52 0x400 0x1>,
			       <&dmamux1 53 0x400 0x1>;
			dma-names = "ch1", "ch2", "ch3", "ch4",
				    "up", "trig", "com";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@7 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <7>;
				status = "disabled";
			};

			counter {
				compatible = "st,stm32-timer-counter";
				status = "disabled";
			};
		};

		usart6: serial@44003000 {
			compatible = "st,stm32h7-uart";
			reg = <0x44003000 0x400>;
			interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc USART6_K>;
			wakeup-source;
			dmas = <&dmamux1 71 0x400 0x15>,
			       <&dmamux1 72 0x400 0x11>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		spi1: spi@44004000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32h7-spi";
			reg = <0x44004000 0x400>;
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI1_K>;
			resets = <&rcc SPI1_R>;
			dmas = <&dmamux1 37 0x400 0x05>,
			       <&dmamux1 38 0x400 0x05>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		i2s1: audio-controller@44004000 {
			compatible = "st,stm32h7-i2s";
			#sound-dai-cells = <0>;
			reg = <0x44004000 0x400>;
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&dmamux1 37 0x400 0x01>,
			       <&dmamux1 38 0x400 0x01>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		spi4: spi@44005000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32h7-spi";
			reg = <0x44005000 0x400>;
			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI4_K>;
			resets = <&rcc SPI4_R>;
			dmas = <&dmamux1 83 0x400 0x05>,
			       <&dmamux1 84 0x400 0x05>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		timers15: timer@44006000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x44006000 0x400>;
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM15_K>;
			clock-names = "int";
			dmas = <&dmamux1 105 0x400 0x1>,
			       <&dmamux1 106 0x400 0x1>,
			       <&dmamux1 107 0x400 0x1>,
			       <&dmamux1 108 0x400 0x1>;
			dma-names = "ch1", "up", "trig", "com";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@14 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <14>;
				status = "disabled";
			};
		};

		timers16: timer@44007000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x44007000 0x400>;
			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM16_K>;
			clock-names = "int";
			dmas = <&dmamux1 109 0x400 0x1>,
			       <&dmamux1 110 0x400 0x1>;
			dma-names = "ch1", "up";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};
			timer@15 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <15>;
				status = "disabled";
			};
		};

		timers17: timer@44008000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-timers";
			reg = <0x44008000 0x400>;
			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "global";
			clocks = <&rcc TIM17_K>;
			clock-names = "int";
			dmas = <&dmamux1 111 0x400 0x1>,
			       <&dmamux1 112 0x400 0x1>;
			dma-names = "ch1", "up";
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				#pwm-cells = <3>;
				status = "disabled";
			};

			timer@16 {
				compatible = "st,stm32h7-timer-trigger";
				reg = <16>;
				status = "disabled";
			};
		};

		spi5: spi@44009000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32h7-spi";
			reg = <0x44009000 0x400>;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI5_K>;
			resets = <&rcc SPI5_R>;
			dmas = <&dmamux1 85 0x400 0x05>,
			       <&dmamux1 86 0x400 0x05>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		sai1: sai@4400a000 {
			compatible = "st,stm32h7-sai";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x4400a000 0x400>;
			reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>;
			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
			resets = <&rcc SAI1_R>;
			status = "disabled";

			sai1a: audio-controller@4400a004 {
				#sound-dai-cells = <0>;

				compatible = "st,stm32-sai-sub-a";
				reg = <0x4 0x20>;
				clocks = <&rcc SAI1_K>;
				clock-names = "sai_ck";
				dmas = <&dmamux1 87 0x400 0x01>;
				status = "disabled";
			};

			sai1b: audio-controller@4400a024 {
				#sound-dai-cells = <0>;
				compatible = "st,stm32-sai-sub-b";
				reg = <0x24 0x20>;
				clocks = <&rcc SAI1_K>;
				clock-names = "sai_ck";
				dmas = <&dmamux1 88 0x400 0x01>;
				status = "disabled";
			};
		};

		sai2: sai@4400b000 {
			compatible = "st,stm32h7-sai";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x4400b000 0x400>;
			reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>;
			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
			resets = <&rcc SAI2_R>;
			status = "disabled";

			sai2a: audio-controller@4400b004 {
				#sound-dai-cells = <0>;
				compatible = "st,stm32-sai-sub-a";
				reg = <0x4 0x20>;
				clocks = <&rcc SAI2_K>;
				clock-names = "sai_ck";
				dmas = <&dmamux1 89 0x400 0x01>;
				status = "disabled";
			};

			sai2b: audio-controller@4400b024 {
				#sound-dai-cells = <0>;
				compatible = "st,stm32-sai-sub-b";
				reg = <0x24 0x20>;
				clocks = <&rcc SAI2_K>;
				clock-names = "sai_ck";
				dmas = <&dmamux1 90 0x400 0x01>;
				status = "disabled";
			};
		};

		sai3: sai@4400c000 {
			compatible = "st,stm32h7-sai";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x4400c000 0x400>;
			reg = <0x4400c000 0x4>, <0x4400c3f0 0x10>;
			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
			resets = <&rcc SAI3_R>;
			status = "disabled";

			sai3a: audio-controller@4400c004 {
				#sound-dai-cells = <0>;
				compatible = "st,stm32-sai-sub-a";
				reg = <0x04 0x20>;
				clocks = <&rcc SAI3_K>;
				clock-names = "sai_ck";
				dmas = <&dmamux1 113 0x400 0x01>;
				status = "disabled";
			};

			sai3b: audio-controller@4400c024 {
				#sound-dai-cells = <0>;
				compatible = "st,stm32-sai-sub-b";
				reg = <0x24 0x20>;
				clocks = <&rcc SAI3_K>;
				clock-names = "sai_ck";
				dmas = <&dmamux1 114 0x400 0x01>;
				status = "disabled";
			};
		};

		dfsdm: dfsdm@4400d000 {
			compatible = "st,stm32mp1-dfsdm";
			reg = <0x4400d000 0x800>;
			clocks = <&rcc DFSDM_K>;
			clock-names = "dfsdm";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			dfsdm0: filter@0 {
				compatible = "st,stm32-dfsdm-adc";
				#io-channel-cells = <1>;
				reg = <0>;
				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dmamux1 101 0x400 0x01>;
				dma-names = "rx";
				status = "disabled";
			};

			dfsdm1: filter@1 {
				compatible = "st,stm32-dfsdm-adc";
				#io-channel-cells = <1>;
				reg = <1>;
				interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dmamux1 102 0x400 0x01>;
				dma-names = "rx";
				status = "disabled";
			};

			dfsdm2: filter@2 {
				compatible = "st,stm32-dfsdm-adc";
				#io-channel-cells = <1>;
				reg = <2>;
				interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dmamux1 103 0x400 0x01>;
				dma-names = "rx";
				status = "disabled";
			};

			dfsdm3: filter@3 {
				compatible = "st,stm32-dfsdm-adc";
				#io-channel-cells = <1>;
				reg = <3>;
				interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dmamux1 104 0x400 0x01>;
				dma-names = "rx";
				status = "disabled";
			};

			dfsdm4: filter@4 {
				compatible = "st,stm32-dfsdm-adc";
				#io-channel-cells = <1>;
				reg = <4>;
				interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dmamux1 91 0x400 0x01>;
				dma-names = "rx";
				status = "disabled";
			};

			dfsdm5: filter@5 {
				compatible = "st,stm32-dfsdm-adc";
				#io-channel-cells = <1>;
				reg = <5>;
				interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dmamux1 92 0x400 0x01>;
				dma-names = "rx";
				status = "disabled";
			};
		};

		dma1: dma-controller@48000000 {
			compatible = "st,stm32-dma";
			reg = <0x48000000 0x400>;
			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc DMA1>;
			resets = <&rcc DMA1_R>;
			#dma-cells = <4>;
			st,mem2mem;
			dma-requests = <8>;
		};

		dma2: dma-controller@48001000 {
			compatible = "st,stm32-dma";
			reg = <0x48001000 0x400>;
			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc DMA2>;
			resets = <&rcc DMA2_R>;
			#dma-cells = <4>;
			st,mem2mem;
			dma-requests = <8>;
		};

		dmamux1: dma-router@48002000 {
			compatible = "st,stm32h7-dmamux";
			reg = <0x48002000 0x40>;
			#dma-cells = <3>;
			dma-requests = <128>;
			dma-masters = <&dma1 &dma2>;
			dma-channels = <16>;
			clocks = <&rcc DMAMUX>;
			resets = <&rcc DMAMUX_R>;
		};

		adc: adc@48003000 {
			compatible = "st,stm32mp1-adc-core";
			reg = <0x48003000 0x400>;
			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc ADC12>, <&rcc ADC12_K>;
			clock-names = "bus", "adc";
			interrupt-controller;
			st,syscfg = <&syscfg>;
			#interrupt-cells = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			adc1: adc@0 {
				compatible = "st,stm32mp1-adc";
				#io-channel-cells = <1>;
				reg = <0x0>;
				interrupt-parent = <&adc>;
				interrupts = <0>;
				dmas = <&dmamux1 9 0x400 0x01>;
				dma-names = "rx";
				status = "disabled";
			};

			adc2: adc@100 {
				compatible = "st,stm32mp1-adc";
				#io-channel-cells = <1>;
				reg = <0x100>;
				interrupt-parent = <&adc>;
				interrupts = <1>;
				dmas = <&dmamux1 10 0x400 0x01>;
				dma-names = "rx";
				status = "disabled";
			};
		};

		sdmmc3: mmc@48004000 {
			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
			arm,primecell-periphid = <0x00253180>;
			reg = <0x48004000 0x400>;
			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SDMMC3_K>;
			clock-names = "apb_pclk";
			resets = <&rcc SDMMC3_R>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			max-frequency = <120000000>;
			status = "disabled";
		};

		usbotg_hs: usb-otg@49000000 {
			compatible = "st,stm32mp15-hsotg", "snps,dwc2";
			reg = <0x49000000 0x10000>;
			clocks = <&rcc USBO_K>;
			clock-names = "otg";
			resets = <&rcc USBO_R>;
			reset-names = "dwc2";
			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
			g-rx-fifo-size = <512>;
			g-np-tx-fifo-size = <32>;
			g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
			dr_mode = "otg";
			otg-rev = <0x200>;
			usb33d-supply = <&usb33>;
			status = "disabled";
		};

		ipcc: mailbox@4c001000 {
			compatible = "st,stm32mp1-ipcc";
			#mbox-cells = <1>;
			reg = <0x4c001000 0x400>;
			st,proc-id = <0>;
			interrupts-extended =
				<&exti 61 1>,
				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "rx", "tx";
			clocks = <&rcc IPCC>;
			wakeup-source;
			status = "disabled";
		};

		dcmi: dcmi@4c006000 {
			compatible = "st,stm32-dcmi";
			reg = <0x4c006000 0x400>;
			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
			resets = <&rcc CAMITF_R>;
			clocks = <&rcc DCMI>;
			clock-names = "mclk";
			dmas = <&dmamux1 75 0x400 0x01>;
			dma-names = "tx";
			status = "disabled";
		};

		rcc: rcc@50000000 {
			compatible = "st,stm32mp1-rcc", "syscon";
			reg = <0x50000000 0x1000>;
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		pwr_regulators: pwr@50001000 {
			compatible = "st,stm32mp1,pwr-reg";
			reg = <0x50001000 0x10>;

			reg11: reg11 {
				regulator-name = "reg11";
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1100000>;
			};

			reg18: reg18 {
				regulator-name = "reg18";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};

			usb33: usb33 {
				regulator-name = "usb33";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
			};
		};

		pwr_mcu: pwr_mcu@50001014 {
			compatible = "st,stm32mp151-pwr-mcu", "syscon";
			reg = <0x50001014 0x4>;
		};

		exti: interrupt-controller@5000d000 {
			compatible = "st,stm32mp1-exti", "syscon";
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x5000d000 0x400>;
		};

		syscfg: syscon@50020000 {
			compatible = "st,stm32mp157-syscfg", "syscon";
			reg = <0x50020000 0x400>;
			clocks = <&rcc SYSCFG>;
		};

		lptimer2: timer@50021000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-lptimer";
			reg = <0x50021000 0x400>;
			interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LPTIM2_K>;
			clock-names = "mux";
			wakeup-source;
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm-lp";
				#pwm-cells = <3>;
				status = "disabled";
			};

			trigger@1 {
				compatible = "st,stm32-lptimer-trigger";
				reg = <1>;
				status = "disabled";
			};

			counter {
				compatible = "st,stm32-lptimer-counter";
				status = "disabled";
			};
		};

		lptimer3: timer@50022000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32-lptimer";
			reg = <0x50022000 0x400>;
			interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LPTIM3_K>;
			clock-names = "mux";
			wakeup-source;
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm-lp";
				#pwm-cells = <3>;
				status = "disabled";
			};

			trigger@2 {
				compatible = "st,stm32-lptimer-trigger";
				reg = <2>;
				status = "disabled";
			};
		};

		lptimer4: timer@50023000 {
			compatible = "st,stm32-lptimer";
			reg = <0x50023000 0x400>;
			interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LPTIM4_K>;
			clock-names = "mux";
			wakeup-source;
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm-lp";
				#pwm-cells = <3>;
				status = "disabled";
			};
		};

		lptimer5: timer@50024000 {
			compatible = "st,stm32-lptimer";
			reg = <0x50024000 0x400>;
			interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LPTIM5_K>;
			clock-names = "mux";
			wakeup-source;
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm-lp";
				#pwm-cells = <3>;
				status = "disabled";
			};
		};

		vrefbuf: vrefbuf@50025000 {
			compatible = "st,stm32-vrefbuf";
			reg = <0x50025000 0x8>;
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <2500000>;
			clocks = <&rcc VREF>;
			status = "disabled";
		};

		sai4: sai@50027000 {
			compatible = "st,stm32h7-sai";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x50027000 0x400>;
			reg = <0x50027000 0x4>, <0x500273f0 0x10>;
			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
			resets = <&rcc SAI4_R>;
			status = "disabled";

			sai4a: audio-controller@50027004 {
				#sound-dai-cells = <0>;
				compatible = "st,stm32-sai-sub-a";
				reg = <0x04 0x20>;
				clocks = <&rcc SAI4_K>;
				clock-names = "sai_ck";
				dmas = <&dmamux1 99 0x400 0x01>;
				status = "disabled";
			};

			sai4b: audio-controller@50027024 {
				#sound-dai-cells = <0>;
				compatible = "st,stm32-sai-sub-b";
				reg = <0x24 0x20>;
				clocks = <&rcc SAI4_K>;
				clock-names = "sai_ck";
				dmas = <&dmamux1 100 0x400 0x01>;
				status = "disabled";
			};
		};

		dts: thermal@50028000 {
			compatible = "st,stm32-thermal";
			reg = <0x50028000 0x100>;
			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc TMPSENS>;
			clock-names = "pclk";
			#thermal-sensor-cells = <0>;
			status = "disabled";
		};

		hash1: hash@54002000 {
			compatible = "st,stm32f756-hash";
			reg = <0x54002000 0x400>;
			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc HASH1>;
			resets = <&rcc HASH1_R>;
			dmas = <&mdma1 31 0x2 0x1000A02 0x0 0x0>;
			dma-names = "in";
			dma-maxburst = <2>;
			status = "disabled";
		};

		rng1: rng@54003000 {
			compatible = "st,stm32-rng";
			reg = <0x54003000 0x400>;
			clocks = <&rcc RNG1_K>;
			resets = <&rcc RNG1_R>;
			status = "disabled";
		};

		mdma1: dma-controller@58000000 {
			compatible = "st,stm32h7-mdma";
			reg = <0x58000000 0x1000>;
			interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc MDMA>;
			resets = <&rcc MDMA_R>;
			#dma-cells = <5>;
			dma-channels = <32>;
			dma-requests = <48>;
		};

		fmc: memory-controller@58002000 {
			#address-cells = <2>;
			#size-cells = <1>;
			compatible = "st,stm32mp1-fmc2-ebi";
			reg = <0x58002000 0x1000>;
			clocks = <&rcc FMC_K>;
			resets = <&rcc FMC_R>;
			status = "disabled";

			ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
				 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
				 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
				 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
				 <4 0 0x80000000 0x10000000>; /* NAND */

			nand-controller@4,0 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "st,stm32mp1-fmc2-nfc";
				reg = <4 0x00000000 0x1000>,
				      <4 0x08010000 0x1000>,
				      <4 0x08020000 0x1000>,
				      <4 0x01000000 0x1000>,
				      <4 0x09010000 0x1000>,
				      <4 0x09020000 0x1000>;
				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
				       <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
				       <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
				dma-names = "tx", "rx", "ecc";
				status = "disabled";
			};
		};

		qspi: spi@58003000 {
			compatible = "st,stm32f469-qspi";
			reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
			reg-names = "qspi", "qspi_mm";
			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&mdma1 22 0x2 0x10100002 0x0 0x0>,
			       <&mdma1 22 0x2 0x10100008 0x0 0x0>;
			dma-names = "tx", "rx";
			clocks = <&rcc QSPI_K>;
			resets = <&rcc QSPI_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		sdmmc1: mmc@58005000 {
			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
			arm,primecell-periphid = <0x00253180>;
			reg = <0x58005000 0x1000>;
			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SDMMC1_K>;
			clock-names = "apb_pclk";
			resets = <&rcc SDMMC1_R>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			max-frequency = <120000000>;
			status = "disabled";
		};

		sdmmc2: mmc@58007000 {
			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
			arm,primecell-periphid = <0x00253180>;
			reg = <0x58007000 0x1000>;
			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SDMMC2_K>;
			clock-names = "apb_pclk";
			resets = <&rcc SDMMC2_R>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			max-frequency = <120000000>;
			status = "disabled";
		};

		crc1: crc@58009000 {
			compatible = "st,stm32f7-crc";
			reg = <0x58009000 0x400>;
			clocks = <&rcc CRC1>;
			status = "disabled";
		};

		ethernet0: ethernet@5800a000 {
			compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
			reg = <0x5800a000 0x2000>;
			reg-names = "stmmaceth";
			interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq";
			clock-names = "stmmaceth",
				      "mac-clk-tx",
				      "mac-clk-rx",
				      "eth-ck",
				      "ptp_ref",
				      "ethstp";
			clocks = <&rcc ETHMAC>,
				 <&rcc ETHTX>,
				 <&rcc ETHRX>,
				 <&rcc ETHCK_K>,
				 <&rcc ETHPTP_K>,
				 <&rcc ETHSTP>;
			st,syscon = <&syscfg 0x4>;
			snps,mixed-burst;
			snps,pbl = <2>;
			snps,en-tx-lpi-clockgating;
			snps,axi-config = <&stmmac_axi_config_0>;
			snps,tso;
			status = "disabled";

			stmmac_axi_config_0: stmmac-axi-config {
				snps,wr_osr_lmt = <0x7>;
				snps,rd_osr_lmt = <0x7>;
				snps,blen = <0 0 0 0 16 8 4>;
			};
		};

		usbh_ohci: usb@5800c000 {
			compatible = "generic-ohci";
			reg = <0x5800c000 0x1000>;
			clocks = <&usbphyc>, <&rcc USBH>;
			resets = <&rcc USBH_R>;
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		usbh_ehci: usb@5800d000 {
			compatible = "generic-ehci";
			reg = <0x5800d000 0x1000>;
			clocks = <&usbphyc>, <&rcc USBH>;
			resets = <&rcc USBH_R>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			companion = <&usbh_ohci>;
			status = "disabled";
		};

		ltdc: display-controller@5a001000 {
			compatible = "st,stm32-ltdc";
			reg = <0x5a001000 0x400>;
			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LTDC_PX>;
			clock-names = "lcd";
			resets = <&rcc LTDC_R>;
			status = "disabled";

			port {
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		iwdg2: watchdog@5a002000 {
			compatible = "st,stm32mp1-iwdg";
			reg = <0x5a002000 0x400>;
			clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
			clock-names = "pclk", "lsi";
			status = "disabled";
		};

		usbphyc: usbphyc@5a006000 {
			#address-cells = <1>;
			#size-cells = <0>;
			#clock-cells = <0>;
			compatible = "st,stm32mp1-usbphyc";
			reg = <0x5a006000 0x1000>;
			clocks = <&rcc USBPHY_K>;
			resets = <&rcc USBPHY_R>;
			vdda1v1-supply = <&reg11>;
			vdda1v8-supply = <&reg18>;
			status = "disabled";

			usbphyc_port0: usb-phy@0 {
				#phy-cells = <0>;
				reg = <0>;
			};

			usbphyc_port1: usb-phy@1 {
				#phy-cells = <1>;
				reg = <1>;
			};
		};

		usart1: serial@5c000000 {
			compatible = "st,stm32h7-uart";
			reg = <0x5c000000 0x400>;
			interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc USART1_K>;
			wakeup-source;
			status = "disabled";
		};

		spi6: spi@5c001000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "st,stm32h7-spi";
			reg = <0x5c001000 0x400>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI6_K>;
			resets = <&rcc SPI6_R>;
			dmas = <&mdma1 34 0x0 0x40008 0x0 0x0>,
			       <&mdma1 35 0x0 0x40002 0x0 0x0>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		i2c4: i2c@5c002000 {
			compatible = "st,stm32mp15-i2c";
			reg = <0x5c002000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C4_K>;
			resets = <&rcc I2C4_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			st,syscfg-fmp = <&syscfg 0x4 0x8>;
			wakeup-source;
			i2c-analog-filter;
			status = "disabled";
		};

		rtc: rtc@5c004000 {
			compatible = "st,stm32mp1-rtc";
			reg = <0x5c004000 0x400>;
			clocks = <&rcc RTCAPB>, <&rcc RTC>;
			clock-names = "pclk", "rtc_ck";
			interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		bsec: efuse@5c005000 {
			compatible = "st,stm32mp15-bsec";
			reg = <0x5c005000 0x400>;
			#address-cells = <1>;
			#size-cells = <1>;
			ts_cal1: calib@5c {
				reg = <0x5c 0x2>;
			};
			ts_cal2: calib@5e {
				reg = <0x5e 0x2>;
			};
		};

		i2c6: i2c@5c009000 {
			compatible = "st,stm32mp15-i2c";
			reg = <0x5c009000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C6_K>;
			resets = <&rcc I2C6_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			st,syscfg-fmp = <&syscfg 0x4 0x20>;
			wakeup-source;
			i2c-analog-filter;
			status = "disabled";
		};

		tamp: tamp@5c00a000 {
			compatible = "st,stm32-tamp", "syscon", "simple-mfd";
			reg = <0x5c00a000 0x400>;
		};

		/*
		 * Break node order to solve dependency probe issue between
		 * pinctrl and exti.
		 */
		pinctrl: pinctrl@50002000 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "st,stm32mp157-pinctrl";
			ranges = <0 0x50002000 0xa400>;
			interrupt-parent = <&exti>;
			st,syscfg = <&exti 0x60 0xff>;
			pins-are-numbered;

			gpioa: gpio@50002000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x0 0x400>;
				clocks = <&rcc GPIOA>;
				st,bank-name = "GPIOA";
				status = "disabled";
			};

			gpiob: gpio@50003000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x1000 0x400>;
				clocks = <&rcc GPIOB>;
				st,bank-name = "GPIOB";
				status = "disabled";
			};

			gpioc: gpio@50004000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x2000 0x400>;
				clocks = <&rcc GPIOC>;
				st,bank-name = "GPIOC";
				status = "disabled";
			};

			gpiod: gpio@50005000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x3000 0x400>;
				clocks = <&rcc GPIOD>;
				st,bank-name = "GPIOD";
				status = "disabled";
			};

			gpioe: gpio@50006000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x4000 0x400>;
				clocks = <&rcc GPIOE>;
				st,bank-name = "GPIOE";
				status = "disabled";
			};

			gpiof: gpio@50007000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x5000 0x400>;
				clocks = <&rcc GPIOF>;
				st,bank-name = "GPIOF";
				status = "disabled";
			};

			gpiog: gpio@50008000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x6000 0x400>;
				clocks = <&rcc GPIOG>;
				st,bank-name = "GPIOG";
				status = "disabled";
			};

			gpioh: gpio@50009000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x7000 0x400>;
				clocks = <&rcc GPIOH>;
				st,bank-name = "GPIOH";
				status = "disabled";
			};

			gpioi: gpio@5000a000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x8000 0x400>;
				clocks = <&rcc GPIOI>;
				st,bank-name = "GPIOI";
				status = "disabled";
			};

			gpioj: gpio@5000b000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x9000 0x400>;
				clocks = <&rcc GPIOJ>;
				st,bank-name = "GPIOJ";
				status = "disabled";
			};

			gpiok: gpio@5000c000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0xa000 0x400>;
				clocks = <&rcc GPIOK>;
				st,bank-name = "GPIOK";
				status = "disabled";
			};
		};

		pinctrl_z: pinctrl@54004000 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "st,stm32mp157-z-pinctrl";
			ranges = <0 0x54004000 0x400>;
			pins-are-numbered;
			interrupt-parent = <&exti>;
			st,syscfg = <&exti 0x60 0xff>;

			gpioz: gpio@54004000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0 0x400>;
				clocks = <&rcc GPIOZ>;
				st,bank-name = "GPIOZ";
				st,bank-ioport = <11>;
				status = "disabled";
			};
		};
	};

	mlahb: ahb {
		compatible = "st,mlahb", "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		dma-ranges = <0x00000000 0x38000000 0x10000>,
			     <0x10000000 0x10000000 0x60000>,
			     <0x30000000 0x30000000 0x60000>;

		m4_rproc: m4@10000000 {
			compatible = "st,stm32mp1-m4";
			reg = <0x10000000 0x40000>,
			      <0x30000000 0x40000>,
			      <0x38000000 0x10000>;
			resets = <&rcc MCU_R>;
			st,syscfg-holdboot = <&rcc 0x10C 0x1>;
			st,syscfg-tz = <&rcc 0x000 0x1>;
			st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
			st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
			st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;
			status = "disabled";
		};
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
 */

/dts-v1/;

#include "stm32mp151.dtsi"
#include "stm32mp15xx-dhcor-som.dtsi"
#include "stm32mp15xx-dhcor-testbench.dtsi"

/ {
	model = "DH electronics STM32MP151A DHCOR Testbench";
	compatible = "dh,stm32mp151a-dhcor-testbench",
		     "dh,stm32mp151a-dhcor-som",
		     "st,stm32mp151";
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) Protonic Holland
 * Author: David Jander <david@protonic.nl>
 */
/dts-v1/;

#include "stm32mp151a-prtt1l.dtsi"

/ {
	model = "Protonic PRTT1A";
	compatible = "prt,prtt1a", "st,stm32mp151";
};

&ethernet0 {
	phy-handle = <&phy0>;
};

&mdio0 {
	/* TI DP83TD510E */
	phy0: ethernet-phy@0 {
		compatible = "ethernet-phy-id2000.0181";
		reg = <0>;
		interrupts-extended = <&gpioa 4 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
		reset-assert-us = <10>;
		reset-deassert-us = <35>;
	};
};

&pwm5_pins_a {
	pins {
		pinmux = <STM32_PINMUX('A', 0, AF2)>; /* TIM5_CH1 */
	};
};

&pwm5_sleep_pins_a {
	pins {
		pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* TIM5_CH1 */
	};
};

&timers5 {
	status = "okay";

	pwm {
		pinctrl-0 = <&pwm5_pins_a>;
		pinctrl-1 = <&pwm5_sleep_pins_a>;
		pinctrl-names = "default", "sleep";
		status = "okay";
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) Protonic Holland
 * Author: David Jander <david@protonic.nl>
 */
/dts-v1/;

#include "stm32mp151a-prtt1l.dtsi"

/ {
	model = "Protonic PRTT1C";
	compatible = "prt,prtt1c", "st,stm32mp151";

	clock_ksz9031: clock-ksz9031 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};

	clock_sja1105: clock-sja1105 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};

	mdio0: mdio {
		compatible = "virtual,mdio-gpio";
		#address-cells = <1>;
		#size-cells = <0>;
		gpios = <&gpioc 1 GPIO_ACTIVE_HIGH
			 &gpioa 2 GPIO_ACTIVE_HIGH>;

	};

	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpiod 8 GPIO_ACTIVE_LOW>;
	};
};

&ethernet0 {
	fixed-link {
		speed = <100>;
		full-duplex;
	};
};

&gpioa {
	gpio-line-names =
		"", "", "", "PHY0_nRESET", "PHY0_nINT", "", "", "",
		"", "", "", "", "", "", "", "SPI1_nSS";
};

&gpiod {
	gpio-line-names =
		"", "", "", "", "", "", "", "",
		"WFM_RESET", "", "", "", "", "", "", "";
};

&gpioe {
	gpio-line-names =
		"SDMMC2_nRESET", "", "", "", "", "", "SPI1_nRESET", "",
		"", "", "", "", "WFM_nIRQ", "", "", "";
};

&gpiog {
	gpio-line-names =
		"", "", "", "", "", "", "", "PHY3_nINT",
		"PHY1_nINT", "PHY3_nRESET", "PHY2_nINT", "PHY2_nRESET",
		"PHY1_nRESET", "SPE1_PWR", "SPE0_PWR", "";
};

&mdio0 {
	/* All this DP83TD510E PHYs can't be probed before switch@0 is
	 * probed so we need to use compatible with PHYid
	 */
	/* TI DP83TD510E */
	t1l0_phy: ethernet-phy@6 {
		compatible = "ethernet-phy-id2000.0181";
		reg = <6>;
		interrupts-extended = <&gpioa 4 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
		reset-assert-us = <10>;
		reset-deassert-us = <35>;
	};

	/* TI DP83TD510E */
	t1l1_phy: ethernet-phy@7 {
		compatible = "ethernet-phy-id2000.0181";
		reg = <7>;
		interrupts-extended = <&gpiog 8 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpiog 12 GPIO_ACTIVE_LOW>;
		reset-assert-us = <10>;
		reset-deassert-us = <35>;
	};

	/* TI DP83TD510E */
	t1l2_phy: ethernet-phy@10 {
		compatible = "ethernet-phy-id2000.0181";
		reg = <10>;
		interrupts-extended = <&gpiog 10 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpiog 11 GPIO_ACTIVE_LOW>;
		reset-assert-us = <10>;
		reset-deassert-us = <35>;
	};

	/* Micrel KSZ9031 */
	rj45_phy: ethernet-phy@2 {
		reg = <2>;
		interrupts-extended = <&gpiog 7 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
		reset-assert-us = <10000>;
		reset-deassert-us = <1000>;

		clocks = <&clock_ksz9031>;
	};
};

&qspi {
	status = "disabled";
};

&sdmmc2 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
	non-removable;
	no-sd;
	no-sdio;
	no-1-8-v;
	st,neg-edge;
	bus-width = <8>;
	vmmc-supply = <&reg_3v3>;
	vqmmc-supply = <&reg_3v3>;
	status = "okay";
};

&sdmmc2_b4_od_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
			 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
			 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
			 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
	};
};

&sdmmc2_b4_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
			 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
			 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
			 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
			 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
	};
};

&sdmmc2_b4_sleep_pins_a {
	pins {
		pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
			 <STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */
			 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
			 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
			 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
			 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
	};
};

&sdmmc2_d47_pins_a {
	pins {
		pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
			 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
			 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
			 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
	};
};

&sdmmc2_d47_sleep_pins_a {
	pins {
		pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
			 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
			 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
			 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
	};
};

&sdmmc3 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc3_b4_pins_b>;
	pinctrl-1 = <&sdmmc3_b4_od_pins_b>;
	pinctrl-2 = <&sdmmc3_b4_sleep_pins_b>;
	non-removable;
	no-1-8-v;
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&reg_3v3>;
	vqmmc-supply = <&reg_3v3>;
	mmc-pwrseq = <&wifi_pwrseq>;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	mmc@1 {
		compatible = "prt,prtt1c-wfm200", "silabs,wf200";
		reg = <1>;
	};
};

&sdmmc3_b4_od_pins_b {
	pins1 {
		pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
			 <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
			 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
			 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
	};
};

&sdmmc3_b4_pins_b {
	pins1 {
		pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
			 <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
			 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
			 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
			 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
	};
};

&sdmmc3_b4_sleep_pins_b {
	pins {
		pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* SDMMC3_D0 */
			 <STM32_PINMUX('D', 4, ANALOG)>, /* SDMMC3_D1 */
			 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
			 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
			 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
			 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
	};
};

&spi1 {
	pinctrl-0 = <&spi1_pins_b>;
	pinctrl-names = "default";
	cs-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";

	switch@0 {
		compatible = "nxp,sja1105q";
		reg = <0>;
		spi-max-frequency = <4000000>;
		spi-rx-delay-us = <1>;
		spi-tx-delay-us = <1>;
		spi-cpha;

		reset-gpios = <&gpioe 6 GPIO_ACTIVE_LOW>;

		clocks = <&clock_sja1105>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				label = "t1l0";
				phy-mode = "rmii";
				phy-handle = <&t1l0_phy>;
			};

			port@1 {
				reg = <1>;
				label = "t1l1";
				phy-mode = "rmii";
				phy-handle = <&t1l1_phy>;
			};

			port@2 {
				reg = <2>;
				label = "t1l2";
				phy-mode = "rmii";
				phy-handle = <&t1l2_phy>;
			};

			port@3 {
				reg = <3>;
				label = "rj45";
				phy-handle = <&rj45_phy>;
				phy-mode = "rgmii-id";
			};

			port@4 {
				reg = <4>;
				label = "cpu";
				ethernet = <&ethernet0>;
				phy-mode = "rmii";

				fixed-link {
					speed = <100>;
					full-duplex;
				};
			};
		};
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) Protonic Holland
 * Author: David Jander <david@protonic.nl>
 */
/dts-v1/;

#include "stm32mp151.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxad-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	aliases {
		ethernet0 = &ethernet0;
		mdio-gpio0 = &mdio0;
		serial0 = &uart4;
	};

	led-controller-0 {
		compatible = "gpio-leds";

		led-0 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_INDICATOR;
			gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
		};

		led-1 {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_INDICATOR;
			gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "heartbeat";
		};
	};

	/* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce
	 * stmmac MDC clock without reducing system bus rate, we need to use
	 * gpio based MDIO bus.
	 */
	mdio0: mdio {
		compatible = "virtual,mdio-gpio";
		#address-cells = <1>;
		#size-cells = <0>;
		gpios = <&gpioc 1 GPIO_ACTIVE_HIGH
			 &gpioa 2 GPIO_ACTIVE_HIGH>;
	};

	reg_3v3: regulator-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&dts {
	status = "okay";
};

&ethernet0 {
	pinctrl-0 = <&ethernet0_rmii_pins_a>;
	pinctrl-1 = <&ethernet0_rmii_sleep_pins_a>;
	pinctrl-names = "default", "sleep";
	phy-mode = "rmii";
	status = "okay";
};

&ethernet0_rmii_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
			 <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
			 <STM32_PINMUX('B', 11, AF11)>; /* ETH1_RMII_TX_EN */
	};
	pins2 {
		pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
			 <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
			 <STM32_PINMUX('A', 1, AF11)>,  /* ETH1_RMII_REF_CLK input */
			 <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
	};
};

&ethernet0_rmii_sleep_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */
			 <STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */
			 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
			 <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
			 <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
			 <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
			 <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
	};
};

&iwdg2 {
	status = "okay";
};

&qspi {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
	pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
	reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	flash@0 {
		compatible = "spi-nand";
		reg = <0>;
		spi-rx-bus-width = <4>;
		spi-max-frequency = <104000000>;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

&qspi_bk1_pins_a {
	pins1 {
		bias-pull-up;
		drive-push-pull;
		slew-rate = <1>;
	};
};

&rng1 {
	status = "okay";
};

&sdmmc1 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_b4_pins_a>;
	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
	broken-cd;
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&reg_3v3>;
	vqmmc-supply = <&reg_3v3>;
	status = "okay";
};

&sdmmc1_b4_od_pins_a {
	pins1 {
		bias-pull-up;
	};
	pins2 {
		bias-pull-up;
	};
};

&sdmmc1_b4_pins_a {
	pins1 {
		bias-pull-up;
	};
	pins2 {
		bias-pull-up;
	};
};

&uart4 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&uart4_pins_a>;
	pinctrl-1 = <&uart4_sleep_pins_a>;
	pinctrl-2 = <&uart4_idle_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};

&uart4_idle_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* UART4_TX */
	};
	pins2 {
		pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
		bias-pull-up;
	};
};

&uart4_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
		bias-disable;
		drive-push-pull;
		slew-rate = <0>;
	};
	pins2 {
		pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
		bias-pull-up;
	};
};

&uart4_sleep_pins_a {
	pins {
		pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* UART4_TX */
			<STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
	};
};

&usbh_ehci {
	phys = <&usbphyc_port0>;
	phy-names = "usb";
	status = "okay";
};

&usbotg_hs {
	dr_mode = "host";
	pinctrl-0 = <&usbotg_hs_pins_a>;
	pinctrl-names = "default";
	phys = <&usbphyc_port1 0>;
	phy-names = "usb2-phy";
	status = "okay";
};

&usbphyc {
	status = "okay";
};

&usbphyc_port0 {
	phy-supply = <&reg_3v3>;
};

&usbphyc_port1 {
	phy-supply = <&reg_3v3>;
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) Protonic Holland
 * Author: David Jander <david@protonic.nl>
 */
/dts-v1/;

#include "stm32mp151a-prtt1l.dtsi"

/ {
	model = "Protonic PRTT1S";
	compatible = "prt,prtt1s", "st,stm32mp151";
};

&ethernet0 {
	phy-handle = <&phy0>;
};

&i2c1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c1_pins_a>;
	pinctrl-1 = <&i2c1_sleep_pins_a>;
	clock-frequency = <100000>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";

	humidity-sensor@40 {
		compatible = "ti,hdc1080";
		reg = <0x40>;
	};

	co2-sensor@62 {
		compatible = "sensirion,scd41";
		reg = <0x62>;
	};
};

&i2c1_pins_a {
	pins {
		pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
			 <STM32_PINMUX('D', 13, AF5)>; /* I2C1_SDA */
	};
};

&i2c1_sleep_pins_a {
	pins {
		pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
			 <STM32_PINMUX('D', 13, ANALOG)>; /* I2C1_SDA */
	};
};

&mdio0 {
	/* TI DP83TD510E */
	phy0: ethernet-phy@0 {
		compatible = "ethernet-phy-id2000.0181";
		reg = <0>;
		interrupts-extended = <&gpioa 4 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
		reset-assert-us = <10>;
		reset-deassert-us = <35>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
 */

#include "stm32mp151.dtsi"

/ {
	cpus {
		cpu1: cpu@1 {
			compatible = "arm,cortex-a7";
			clock-frequency = <650000000>;
			device_type = "cpu";
			reg = <1>;
		};
	};

	arm-pmu {
		interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>;
	};

	timer {
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
	};

	soc {
		m_can1: can@4400e000 {
			compatible = "bosch,m_can";
			reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
			reg-names = "m_can", "message_ram";
			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "int0", "int1";
			clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
			clock-names = "hclk", "cclk";
			bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
			status = "disabled";
		};

		m_can2: can@4400f000 {
			compatible = "bosch,m_can";
			reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
			reg-names = "m_can", "message_ram";
			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "int0", "int1";
			clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
			clock-names = "hclk", "cclk";
			bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
			status = "disabled";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
 *
 * DHCOM STM32MP1 variant:
 * DHCM-STM32MP153C-C065-R102-F0819-SPI-E2-CAN2-RTC-I-01D2
 * DHCOM PCB number: 587-200 or newer
 * DRC02 PCB number: 568-100 or newer
 */
/dts-v1/;

#include "stm32mp153.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xx-dhcom-som.dtsi"
#include "stm32mp15xx-dhcom-drc02.dtsi"

/ {
	model = "DH electronics STM32MP153C DHCOM DRC02";
	compatible = "dh,stm32mp153c-dhcom-drc02", "dh,stm32mp153c-dhcom-som",
		     "st,stm32mp153";
};

&cryp1 {
	status = "okay";
};

&m_can1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&m_can1_pins_a>;
	pinctrl-1 = <&m_can1_sleep_pins_a>;
	status = "okay";
};

&m_can2 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&m_can2_pins_a>;
	pinctrl-1 = <&m_can2_sleep_pins_a>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
 *
 * DHCOR STM32MP1 variant:
 * DHCR-STM32MP153C-C065-R051-V33-SPI-I-01LG
 * DHCOR PCB number: 586-100 or newer
 * DRC Compact PCB number: 627-100 or newer
 */

/dts-v1/;

#include "stm32mp153.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xx-dhcor-som.dtsi"
#include "stm32mp15xx-dhcor-drc-compact.dtsi"

/ {
	model = "DH electronics STM32MP153C DHCOR DRC Compact";
	compatible = "dh,stm32mp153c-dhcor-drc-compact",
		     "dh,stm32mp153c-dhcor-som",
		     "st,stm32mp153";
};

&m_can1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&m_can1_pins_c>;
	pinctrl-1 = <&m_can1_sleep_pins_c>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
 */

#include "stm32mp153.dtsi"

/ {
	soc {
		gpu: gpu@59000000 {
			compatible = "vivante,gc";
			reg = <0x59000000 0x800>;
			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc GPU>, <&rcc GPU_K>;
			clock-names = "bus" ,"core";
			resets = <&rcc GPU_R>;
		};

		dsi: dsi@5a000000 {
			compatible = "st,stm32-dsi";
			reg = <0x5a000000 0x800>;
			clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
			clock-names = "pclk", "ref", "px_clk";
			resets = <&rcc DSI_R>;
			reset-names = "apb";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
 */

/dts-v1/;

/* This DT is here only for backward compatibility */
#include "stm32mp157a-dhcor-avenger96.dts"


code:
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
 *
 * DHCOR STM32MP1 variant:
 * DHCR-STM32MP157A-C065-R102-V18-SPI-C-01LG
 * DHCOR PCB number: 586-100 or newer
 * Avenger96 PCB number: 588-200 or newer
 */

/dts-v1/;

#include "stm32mp157.dtsi"
#include "stm32mp15xx-dhcor-som.dtsi"
#include "stm32mp15xx-dhcor-avenger96.dtsi"

/ {
	model = "Arrow Electronics STM32MP157A Avenger96 board";
	compatible = "arrow,stm32mp157a-avenger96", "dh,stm32mp157a-dhcor-som",
		     "st,stm32mp157";
};

&m_can1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&m_can1_pins_b>;
	pinctrl-1 = <&m_can1_sleep_pins_b>;
	status = "disabled";
};

&m_can2 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&m_can2_pins_a>;
	pinctrl-1 = <&m_can2_sleep_pins_a>;
	status = "disabled";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
 */

/dts-v1/;

#include "stm32mp157a-dk1.dts"
#include "stm32mp15-scmi.dtsi"

/ {
	model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
	compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157a-dk1", "st,stm32mp157";

	reserved-memory {
		optee@de000000 {
			reg = <0xde000000 0x2000000>;
			no-map;
		};
	};
};

&cpu0 {
	clocks = <&scmi_clk CK_SCMI_MPU>;
};

&cpu1 {
	clocks = <&scmi_clk CK_SCMI_MPU>;
};

&dsi {
	clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
};

&gpioz {
	clocks = <&scmi_clk CK_SCMI_GPIOZ>;
};

&hash1 {
	clocks = <&scmi_clk CK_SCMI_HASH1>;
	resets = <&scmi_reset RST_SCMI_HASH1>;
};

&i2c4 {
	clocks = <&scmi_clk CK_SCMI_I2C4>;
	resets = <&scmi_reset RST_SCMI_I2C4>;
};

&iwdg2 {
	clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
};

&mdma1 {
	resets = <&scmi_reset RST_SCMI_MDMA>;
};

&mlahb {
	resets = <&scmi_reset RST_SCMI_MCU>;
};

&rcc {
	compatible = "st,stm32mp1-rcc-secure", "syscon";
	clock-names = "hse", "hsi", "csi", "lse", "lsi";
	clocks = <&scmi_clk CK_SCMI_HSE>,
		 <&scmi_clk CK_SCMI_HSI>,
		 <&scmi_clk CK_SCMI_CSI>,
		 <&scmi_clk CK_SCMI_LSE>,
		 <&scmi_clk CK_SCMI_LSI>;
};

&rng1 {
	clocks = <&scmi_clk CK_SCMI_RNG1>;
	resets = <&scmi_reset RST_SCMI_RNG1>;
};

&rtc {
	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
 */

/dts-v1/;

#include "stm32mp157.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include "stm32mp15xx-dkx.dtsi"

/ {
	model = "STMicroelectronics STM32MP157A-DK1 Discovery Board";
	compatible = "st,stm32mp157a-dk1", "st,stm32mp157";

	aliases {
		ethernet0 = &ethernet0;
		serial0 = &uart4;
		serial1 = &usart3;
		serial2 = &uart7;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
 * Copyright (c) 2020 Engicam srl
 * Copyright (c) 2020 Amarula Solutions(India)
 */

/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp157a-icore-stm32mp1.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1\" Open Frame";
	compatible = "engicam,icore-stm32mp1-ctouch2-of10",
		     "engicam,icore-stm32mp1", "st,stm32mp157";

	aliases {
		serial0 = &uart4;
	};

	backlight: backlight {
		compatible = "gpio-backlight";
		gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
		default-on;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	panel {
		compatible = "ampire,am-1280800n3tzqw-t00h";
		backlight = <&backlight>;
		power-supply = <&v3v3>;

		port {
			panel_in_lvds: endpoint {
				remote-endpoint = <&bridge_out>;
			};
		};
	};
};

&dsi {
	status = "okay";
	phy-dsi-supply = <&reg18>;

	ports {
		port@0 {
			reg = <0>;
			dsi_in: endpoint {
				remote-endpoint = <&ltdc_ep0_out>;
			};
		};

		port@1 {
			reg = <1>;
			dsi_out: endpoint {
				remote-endpoint = <&bridge_in>;
			};
		};
	};
};

&i2c6 {
	i2c-scl-falling-time-ns = <20>;
	i2c-scl-rising-time-ns = <185>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c6_pins_a>;
	pinctrl-1 = <&i2c6_sleep_pins_a>;
	status = "okay";

	bridge@2c {
		compatible = "ti,sn65dsi84";
		reg = <0x2c>;
		enable-gpios = <&gpiof 15 GPIO_ACTIVE_HIGH>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				bridge_in: endpoint {
					remote-endpoint = <&dsi_out>;
					data-lanes = <1 2>;
				};
			};

			port@2 {
				reg = <2>;
				bridge_out: endpoint {
					remote-endpoint = <&panel_in_lvds>;
				};
			};
		};
	};
};

&ltdc {
	status = "okay";

	port {
		ltdc_ep0_out: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&dsi_in>;
		};
	};
};

&sdmmc1 {
	bus-width = <4>;
	disable-wp;
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_b4_pins_a>;
	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
	st,neg-edge;
	vmmc-supply = <&v3v3>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&uart4_pins_a>;
	pinctrl-1 = <&uart4_sleep_pins_a>;
	pinctrl-2 = <&uart4_idle_pins_a>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
 * Copyright (c) 2020 Engicam srl
 * Copyright (c) 2020 Amarula Solutions(India)
 */

/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp157a-icore-stm32mp1.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Engicam i.Core STM32MP1 C.TOUCH 2.0";
	compatible = "engicam,icore-stm32mp1-ctouch2",
		     "engicam,icore-stm32mp1", "st,stm32mp157";

	aliases {
		serial0 = &uart4;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&sdmmc1 {
	bus-width = <4>;
	disable-wp;
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_b4_pins_a>;
	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
	st,neg-edge;
	vmmc-supply = <&v3v3>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&uart4_pins_a>;
	pinctrl-1 = <&uart4_sleep_pins_a>;
	pinctrl-2 = <&uart4_idle_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
 * Copyright (c) 2020 Engicam srl
 * Copyright (c) 2020 Amarula Solutions(India)
 */

/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp157a-icore-stm32mp1.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit";
	compatible = "engicam,icore-stm32mp1-edimm2.2",
		     "engicam,icore-stm32mp1", "st,stm32mp157";

	aliases {
		serial0 = &uart4;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	backlight: backlight {
		compatible = "gpio-backlight";
		gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
		default-on;
	};

	panel {
		compatible = "yes-optoelectronics,ytc700tlag-05-201c";
		backlight = <&backlight>;
		power-supply = <&v3v3>;

		port {
			panel_out_bridge: endpoint {
				remote-endpoint = <&bridge_out_panel>;
			};
		};
	};
};

&dsi {
	status = "okay";
	phy-dsi-supply = <&reg18>;

	ports {
		port@0 {
			reg = <0>;
			dsi_in_ltdc: endpoint {
				remote-endpoint = <&ltdc_out_dsi>;
			};
		};

		port@1 {
			reg = <1>;
			dsi_out_bridge: endpoint {
				remote-endpoint = <&bridge_in_dsi>;
			};
		};
	};
};

&i2c6 {
	i2c-scl-falling-time-ns = <20>;
	i2c-scl-rising-time-ns = <185>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c6_pins_a>;
	pinctrl-1 = <&i2c6_sleep_pins_a>;
	status = "okay";

	bridge@2c {
		compatible = "ti,sn65dsi84";
		reg = <0x2c>;
		enable-gpios = <&gpiof 15 GPIO_ACTIVE_HIGH>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				bridge_in_dsi: endpoint {
					remote-endpoint = <&dsi_out_bridge>;
					data-lanes = <1 2>;
				};
			};

			port@2 {
				reg = <2>;
				bridge_out_panel: endpoint {
					remote-endpoint = <&panel_out_bridge>;
				};
			};
		};
	};
};

&ltdc {
	status = "okay";

	port {
		ltdc_out_dsi: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&dsi_in_ltdc>;
		};
	};
};

&sdmmc1 {
	bus-width = <4>;
	disable-wp;
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_b4_pins_a>;
	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
	st,neg-edge;
	vmmc-supply = <&v3v3>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&uart4_pins_a>;
	pinctrl-1 = <&uart4_sleep_pins_a>;
	pinctrl-2 = <&uart4_idle_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
 * Copyright (c) 2020 Engicam srl
 * Copyright (c) 2020 Amarula Solutions(India)
 */

/ {
	compatible = "engicam,icore-stm32mp1", "st,stm32mp157";

	memory@c0000000 {
		device_type = "memory";
		reg = <0xc0000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		mcuram2: mcuram2@10000000 {
			compatible = "shared-dma-pool";
			reg = <0x10000000 0x40000>;
			no-map;
		};

		vdev0vring0: vdev0vring0@10040000 {
			compatible = "shared-dma-pool";
			reg = <0x10040000 0x1000>;
			no-map;
		};

		vdev0vring1: vdev0vring1@10041000 {
			compatible = "shared-dma-pool";
			reg = <0x10041000 0x1000>;
			no-map;
		};

		vdev0buffer: vdev0buffer@10042000 {
			compatible = "shared-dma-pool";
			reg = <0x10042000 0x4000>;
			no-map;
		};

		mcuram: mcuram@30000000 {
			compatible = "shared-dma-pool";
			reg = <0x30000000 0x40000>;
			no-map;
		};

		retram: retram@38000000 {
			compatible = "shared-dma-pool";
			reg = <0x38000000 0x10000>;
			no-map;
		};
	};

	vddcore: regulator-vddcore {
		compatible = "regulator-fixed";
		regulator-name = "vddcore";
		regulator-min-microvolt = <1200000>;
		regulator-max-microvolt = <1200000>;
		regulator-always-on;
	};

	vdd: regulator-vdd {
		compatible = "regulator-fixed";
		regulator-name = "vdd";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	vdd_usb: regulator-vdd-usb {
		compatible = "regulator-fixed";
		regulator-name = "vdd_usb";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	vdda: regulator-vdda {
		compatible = "regulator-fixed";
		regulator-name = "vdda";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	vdd_ddr: regulator-vdd-ddr {
		compatible = "regulator-fixed";
		regulator-name = "vdd_ddr";
		regulator-min-microvolt = <1350000>;
		regulator-max-microvolt = <1350000>;
		regulator-always-on;
	};

	vtt_ddr: regulator-vtt-ddr {
		compatible = "regulator-fixed";
		regulator-name = "vtt_ddr";
		regulator-min-microvolt = <675000>;
		regulator-max-microvolt = <675000>;
		regulator-always-on;
		vin-supply = <&vdd>;
	};

	vref_ddr: regulator-vref-ddr {
		compatible = "regulator-fixed";
		regulator-name = "vref_ddr";
		regulator-min-microvolt = <675000>;
		regulator-max-microvolt = <675000>;
		regulator-always-on;
		vin-supply = <&vdd>;
	};

	vdd_sd: regulator-vdd-sd {
		compatible = "regulator-fixed";
		regulator-name = "vdd_sd";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	v3v3: regulator-v3v3 {
		compatible = "regulator-fixed";
		regulator-name = "v3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	v2v8: regulator-v2v8 {
		compatible = "regulator-fixed";
		regulator-name = "v2v8";
		regulator-min-microvolt = <2800000>;
		regulator-max-microvolt = <2800000>;
		regulator-always-on;
		vin-supply = <&v3v3>;
	};

	v1v8: regulator-v1v8 {
		compatible = "regulator-fixed";
		regulator-name = "v1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		vin-supply = <&v3v3>;
	};
};

&dts {
	status = "okay";
};

&i2c2 {
	i2c-scl-falling-time-ns = <20>;
	i2c-scl-rising-time-ns = <185>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c2_pins_a>;
	pinctrl-1 = <&i2c2_sleep_pins_a>;
	status = "okay";
};

&ipcc {
	status = "okay";
};

&iwdg2{
	timeout-sec = <32>;
	status = "okay";
};

&m4_rproc{
	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
			<&vdev0vring1>, <&vdev0buffer>;
	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
	mbox-names = "vq0", "vq1", "shutdown";
	interrupt-parent = <&exti>;
	interrupts = <68 1>;
	status = "okay";
};

&rng1 {
	status = "okay";
};

&rtc{
	status = "okay";
};

&vrefbuf {
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <2500000>;
	vdda-supply = <&vdd>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2020 Manivannan Sadhasivam
 */

/dts-v1/;
#include "stm32mp157a-stinger96.dtsi"

/ {
	model = "Shiratech STM32MP157A IoT Box";
	compatible = "shiratech,stm32mp157a-iot-box", "st,stm32mp157";

	wlan_pwr: regulator-wlan {
		compatible = "regulator-fixed";

		regulator-name = "wl-reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;

		gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&i2c2 {
	ccs811@5b {
		compatible = "ams,ccs811";
		reg = <0x5b>;
		wakeup-gpios = <&gpioa 12 GPIO_ACTIVE_LOW>;
		reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
	};
};

/* WiFi */
&sdmmc2 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc2_b4_pins_a>;
	pinctrl-1 = <&sdmmc2_b4_od_pins_b>;
	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
	broken-cd;
	non-removable;
	st,neg-edge;
	bus-width = <1>;
	vmmc-supply = <&wlan_pwr>;
	status = "okay";

	#address-cells = <1>;
	#size-cells = <0>;
	brcmf: bcrmf@1 {
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
	};
};

/* Bluetooth */
&uart4 {
	/* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
	/delete-property/st,hw-flow-ctrl;
	cts-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
	rts-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";

	bluetooth {
		shutdown-gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
		compatible = "brcm,bcm43438-bt";
		max-speed = <115200>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
 * Copyright (c) 2020 Engicam srl
 * Copyright (c) 2020 Amarula Solutions(India)
 */

/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp157a-microgea-stm32mp1.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 7\" Open Frame";
	compatible = "engicam,microgea-stm32mp1-microdev2.0-of7",
		     "engicam,microgea-stm32mp1", "st,stm32mp157";

	aliases {
		serial0 = &uart4;
		serial1 = &uart8;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	backlight: backlight {
		compatible = "gpio-backlight";
		gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
		default-on;
	};

	lcd_3v3: regulator-lcd-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "lcd_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpiof 10 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
		power-supply = <&panel_pwr>;
	};

	panel_pwr: regulator-panel-pwr {
		compatible = "regulator-fixed";
		regulator-name = "panel_pwr";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpiob 10 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
	};

	panel {
		compatible = "auo,b101aw03";
		backlight = <&backlight>;
		enable-gpios = <&gpiof 2 GPIO_ACTIVE_HIGH>;
		power-supply = <&lcd_3v3>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&ltdc_ep0_out>;
			};
		};
	};
};

&i2c2 {
	i2c-scl-falling-time-ns = <20>;
	i2c-scl-rising-time-ns = <185>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c2_pins_a>;
	pinctrl-1 = <&i2c2_sleep_pins_a>;
	status = "okay";
};

&ltdc {
	pinctrl-names = "default";
	pinctrl-0 = <&ltdc_pins>;
	status = "okay";

	port {
		ltdc_ep0_out: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&panel_in>;
		};
	};
};

&pinctrl {
	ltdc_pins: ltdc-0 {
		pins {
			pinmux = <STM32_PINMUX('G', 10, AF14)>,	/* LTDC_B2 */
				 <STM32_PINMUX('H', 12, AF14)>,	/* LTDC_R6 */
				 <STM32_PINMUX('H', 11, AF14)>,	/* LTDC_R5 */
				 <STM32_PINMUX('D', 10, AF14)>,	/* LTDC_B3 */
				 <STM32_PINMUX('D', 9, AF14)>,	/* LTDC_B0 */
				 <STM32_PINMUX('E', 5, AF14)>,	/* LTDC_G0 */
				 <STM32_PINMUX('E', 6, AF14)>,	/* LTDC_G1 */
				 <STM32_PINMUX('E', 13, AF14)>,	/* LTDC_DE */
				 <STM32_PINMUX('E', 15, AF14)>,	/* LTDC_R7 */
				 <STM32_PINMUX('G', 7, AF14)>,	/* LTDC_CLK */
				 <STM32_PINMUX('G', 12, AF14)>,	/* LTDC_B1 */
				 <STM32_PINMUX('H', 2, AF14)>,	/* LTDC_R0 */
				 <STM32_PINMUX('H', 3, AF14)>,	/* LTDC_R1 */
				 <STM32_PINMUX('H', 8, AF14)>,	/* LTDC_R2 */
				 <STM32_PINMUX('H', 9, AF14)>,	/* LTDC_R3 */
				 <STM32_PINMUX('H', 10, AF14)>,	/* LTDC_R4 */
				 <STM32_PINMUX('H', 13, AF14)>,	/* LTDC_G2 */
				 <STM32_PINMUX('H', 14, AF14)>,	/* LTDC_G3 */
				 <STM32_PINMUX('H', 15, AF14)>,	/* LTDC_G4 */
				 <STM32_PINMUX('I', 0, AF14)>,	/* LTDC_G5 */
				 <STM32_PINMUX('I', 1, AF14)>,	/* LTDC_G6 */
				 <STM32_PINMUX('I', 2, AF14)>,	/* LTDC_G7 */
				 <STM32_PINMUX('I', 4, AF14)>,	/* LTDC_B4 */
				 <STM32_PINMUX('I', 5, AF14)>,	/* LTDC_B5 */
				 <STM32_PINMUX('B', 8, AF14)>,	/* LTDC_B6 */
				 <STM32_PINMUX('I', 7, AF14)>,	/* LTDC_B7 */
				 <STM32_PINMUX('I', 9, AF14)>,	/* LTDC_VSYNC */
				 <STM32_PINMUX('I', 10, AF14)>;	/* LTDC_HSYNC */
			bias-disable;
			drive-push-pull;
			slew-rate = <3>;
		};
	};
};

&sdmmc1 {
	bus-width = <4>;
	disable-wp;
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_b4_pins_a>;
	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
	st,neg-edge;
	vmmc-supply = <&vdd>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&uart4_pins_a>;
	pinctrl-1 = <&uart4_sleep_pins_a>;
	pinctrl-2 = <&uart4_idle_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};

/* J31: RS323 */
&uart8 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart8_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
 * Copyright (c) 2020 Engicam srl
 * Copyright (c) 2020 Amarula Solutions(India)
 */

/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp157a-microgea-stm32mp1.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 Carrier Board";
	compatible = "engicam,microgea-stm32mp1-microdev2.0",
		     "engicam,microgea-stm32mp1", "st,stm32mp157";

	aliases {
		serial0 = &uart4;
		serial1 = &uart8;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&sdmmc1 {
	bus-width = <4>;
	disable-wp;
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_b4_pins_a>;
	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
	st,neg-edge;
	vmmc-supply = <&vdd>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&uart4_pins_a>;
	pinctrl-1 = <&uart4_sleep_pins_a>;
	pinctrl-2 = <&uart4_idle_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};

/* J31: RS323 */
&uart8 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart8_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
 * Copyright (c) 2020 Engicam srl
 * Copyright (c) 2020 Amarula Solutions(India)
 */

/ {
	compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";

	memory@c0000000 {
		device_type = "memory";
		reg = <0xc0000000 0x10000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		mcuram2: mcuram2@10000000 {
			compatible = "shared-dma-pool";
			reg = <0x10000000 0x40000>;
			no-map;
		};

		vdev0vring0: vdev0vring0@10040000 {
			compatible = "shared-dma-pool";
			reg = <0x10040000 0x1000>;
			no-map;
		};

		vdev0vring1: vdev0vring1@10041000 {
			compatible = "shared-dma-pool";
			reg = <0x10041000 0x1000>;
			no-map;
		};

		vdev0buffer: vdev0buffer@10042000 {
			compatible = "shared-dma-pool";
			reg = <0x10042000 0x4000>;
			no-map;
		};

		mcuram: mcuram@30000000 {
			compatible = "shared-dma-pool";
			reg = <0x30000000 0x40000>;
			no-map;
		};

		retram: retram@38000000 {
			compatible = "shared-dma-pool";
			reg = <0x38000000 0x10000>;
			no-map;
		};
	};

	vin: regulator-vin {
		compatible = "regulator-fixed";
		regulator-name = "vin";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	vddcore: regulator-vddcore {
		compatible = "regulator-fixed";
		regulator-name = "vddcore";
		regulator-min-microvolt = <1200000>;
		regulator-max-microvolt = <1200000>;
		regulator-always-on;
		vin-supply = <&vin>;
	};

	vdd: regulator-vdd {
		compatible = "regulator-fixed";
		regulator-name = "vdd";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		vin-supply = <&vin>;
	};

	vddq_ddr: regulator-vddq-ddr {
		compatible = "regulator-fixed";
		regulator-name = "vddq_ddr";
		regulator-min-microvolt = <1350000>;
		regulator-max-microvolt = <1350000>;
		regulator-always-on;
		vin-supply = <&vin>;
	};
};

&dts {
	status = "okay";
};

&fmc {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&fmc_pins_a>;
	pinctrl-1 = <&fmc_sleep_pins_a>;
	status = "okay";

	nand-controller@4,0 {
		status = "okay";

		nand@0 {
			reg = <0>;
			nand-on-flash-bbt;
			#address-cells = <1>;
			#size-cells = <1>;
		};
	};
};

&ipcc {
	status = "okay";
};

&iwdg2{
	timeout-sec = <32>;
	status = "okay";
};

&m4_rproc{
	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
			<&vdev0vring1>, <&vdev0buffer>;
	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
	mbox-names = "vq0", "vq1", "shutdown";
	interrupt-parent = <&exti>;
	interrupts = <68 1>;
	status = "okay";
};

&rng1 {
	status = "okay";
};

&rtc{
	status = "okay";
};

&vrefbuf {
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <2500000>;
	vdda-supply = <&vdd>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2020 Manivannan Sadhasivam
 */

/dts-v1/;
#include "stm32mp157a-stinger96.dtsi"

/ {
	model = "Shiratech STM32MP157A Stinger96 board";
	compatible = "shiratech,stm32mp157a-stinger96", "st,stm32mp157";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2020 Manivannan Sadhasivam
 */

/dts-v1/;

#include "stm32mp157.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mfd/st,stpmic1.h>

/ {
	aliases {
		mmc0 = &sdmmc1;
		serial0 = &uart4;
		serial1 = &uart7;
		serial2 = &usart2;
		spi0 = &spi4;
	};

	chosen {
		stdout-path = "serial1:115200n8";
	};

	memory@c0000000 {
		device_type = "memory";
		reg = <0xc0000000 0x10000000>;
	};

	led {
		compatible = "gpio-leds";

		led1 {
			label = "green:user1";
			gpios = <&gpioa 13 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led2 {
			label = "green:user2";
			gpios = <&gpioh 3 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led3 {
			label = "green:user3";
			gpios = <&gpioh 2 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};

		led4 {
			label = "green:user4";
			gpios = <&gpiof 12 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "none";
			default-state = "off";
			panic-indicator;
		};
	};

	sd_switch: regulator-sd_switch {
		compatible = "regulator-gpio";
		regulator-name = "sd_switch";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <2900000>;
		regulator-type = "voltage";
		regulator-always-on;

		gpios = <&gpioa 8 GPIO_ACTIVE_HIGH>;
		gpios-states = <0>;
		states = <1800000 0x1>,
			 <2900000 0x0>;
	};
};

/* Only headless mode is supported */
&gpu {
	status = "disabled";
};

/* LS-I2C0 */
&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins_a>;
	i2c-scl-rising-time-ns = <1000>;
	i2c-scl-falling-time-ns = <300>;
	status = "okay";
	/delete-property/dmas;
	/delete-property/dma-names;
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4_pins_a>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";
	/delete-property/dmas;
	/delete-property/dma-names;

	pmic: stpmic@33 {
		compatible = "st,stpmic1";
		reg = <0x33>;
		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
		status = "okay";

		regulators {
			compatible = "st,stpmic1-regulators";

			ldo1-supply = <&v3v3>;
			ldo2-supply = <&v3v3>;
			ldo3-supply = <&vdd_ddr>;
			ldo5-supply = <&v3v3>;
			ldo6-supply = <&v3v3>;
			pwr_sw1-supply = <&bst_out>;
			pwr_sw2-supply = <&bst_out>;

			vddcore: buck1 {
				regulator-name = "vddcore";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			vdd_ddr: buck2 {
				regulator-name = "vdd_ddr";
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1500000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			vdd: buck3 {
				regulator-name = "vdd";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				st,mask-reset;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			v3v3: buck4 {
				regulator-name = "v3v3";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				regulator-over-current-protection;
				regulator-initial-mode = <0>;
			};

			vdda: ldo1 {
				regulator-name = "vdda";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO1 0>;
			};

			v2v9: ldo2 {
				regulator-name = "v2v9";
				regulator-min-microvolt = <2900000>;
				regulator-max-microvolt = <2900000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO2 0>;
			};

			vtt_ddr: ldo3 {
				regulator-name = "vtt_ddr";
				regulator-min-microvolt = <500000>;
				regulator-max-microvolt = <750000>;
				regulator-always-on;
				regulator-over-current-protection;
			};

			vdd_usb: ldo4 {
				regulator-name = "vdd_usb";
				interrupts = <IT_CURLIM_LDO4 0>;
			};

			vdd_sd: ldo5 {
				regulator-name = "vdd_sd";
				regulator-min-microvolt = <2900000>;
				regulator-max-microvolt = <2900000>;
				interrupts = <IT_CURLIM_LDO5 0>;
				regulator-boot-on;
			};

			v1v8: ldo6 {
				regulator-name = "v1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO6 0>;
			};

			vref_ddr: vref_ddr {
				regulator-name = "vref_ddr";
				regulator-always-on;
			};

			bst_out: boost {
				regulator-name = "bst_out";
				interrupts = <IT_OCP_BOOST 0>;
			};

			vbus_otg: pwr_sw1 {
				regulator-name = "vbus_otg";
				interrupts = <IT_OCP_OTG 0>;
				regulator-active-discharge = <1>;
			};

			vbus_sw: pwr_sw2 {
				regulator-name = "vbus_sw";
				interrupts = <IT_OCP_SWOUT 0>;
				regulator-active-discharge = <1>;
			};
		};

		onkey {
			compatible = "st,stpmic1-onkey";
			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
			interrupt-names = "onkey-falling", "onkey-rising";
			status = "okay";
		};

		watchdog {
			compatible = "st,stpmic1-wdt";
			status = "disabled";
		};
	};
};

&iwdg2 {
	timeout-sec = <32>;
	status = "okay";
};

&pwr_regulators {
	vdd-supply = <&vdd>;
	vdd_3v3_usbfs-supply = <&vdd_usb>;
};

&rng1 {
	status = "okay";
};

&rtc {
	status = "okay";
};

&sdmmc1 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
	broken-cd;
	disable-wp;
	st,sig-dir;
	st,neg-edge;
	st,use-ckin;
	bus-width = <4>;
	vmmc-supply = <&vdd_sd>;
	vqmmc-supply = <&sd_switch>;
	status = "okay";
};

/* LS-SPI0 */
&spi4 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi4_pins_a>;
	cs-gpios = <&gpioe 11 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

/* BG96 */
&usart2 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&usart2_pins_b>;
	pinctrl-1 = <&usart2_sleep_pins_b>;
	st,hw-flow-ctrl;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};

/* LS-UART0 */
&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins_c>;
	st,hw-flow-ctrl;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};

/* Debug console */
&uart7 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart7_pins_b>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};

&usbh_ehci {
	phys = <&usbphyc_port0>;
	phy-names = "usb";
	status = "okay";
};

&usbotg_hs {
	dr_mode = "peripheral";
	pinctrl-0 = <&usbotg_hs_pins_a>;
	pinctrl-names = "default";
	phy-names = "usb2-phy";
	phys = <&usbphyc_port1 0>;
	vbus-supply = <&vbus_otg>;
	status = "okay";
};

&usbphyc {
	status = "okay";
};

&usbphyc_port0 {
	phy-supply = <&vdd_usb>;
};

&usbphyc_port1 {
	phy-supply = <&vdd_usb>;
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
 *
 * DHCOM STM32MP1 variant:
 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E2-CAN2-SDR104-RTC-WBT-T-DSI-I-01D2
 * DHCOM PCB number: 587-200 or newer
 * PDK2 PCB number: 516-400 or newer
 */
/dts-v1/;

#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xx-dhcom-som.dtsi"
#include "stm32mp15xx-dhcom-pdk2.dtsi"

/ {
	model = "DH electronics STM32MP157C DHCOM Premium Developer Kit (2)";
	compatible = "dh,stm32mp157c-dhcom-pdk2", "dh,stm32mp157c-dhcom-som",
		     "st,stm32mp157";
};

&cryp1 {
	status = "okay";
};

&m_can1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&m_can1_pins_a>;
	pinctrl-1 = <&m_can1_sleep_pins_a>;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
 *
 * DHCOM STM32MP1 variant:
 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E-CAN2-SD-RTC-T-DSI-I-01D2
 * DHCOM PCB number: 587-200 or newer
 * PicoITX PCB number: 487-600 or newer
 */
/dts-v1/;

#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xx-dhcom-som.dtsi"
#include "stm32mp15xx-dhcom-picoitx.dtsi"

/ {
	model = "DH electronics STM32MP157C DHCOM PicoITX";
	compatible = "dh,stm32mp157c-dhcom-picoitx", "dh,stm32mp157c-dhcom-som",
		     "st,stm32mp157";
};

&cryp1 {
	status = "okay";
};

&m_can1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&m_can1_pins_a>;
	pinctrl-1 = <&m_can1_sleep_pins_a>;
	status = "okay";
};

&m_can2 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&m_can2_pins_a>;
	pinctrl-1 = <&m_can2_sleep_pins_a>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
 */

/dts-v1/;

#include "stm32mp157c-dk2.dts"
#include "stm32mp15-scmi.dtsi"

/ {
	model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
	compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157c-dk2", "st,stm32mp157";

	reserved-memory {
		optee@de000000 {
			reg = <0xde000000 0x2000000>;
			no-map;
		};
	};
};

&cpu0 {
	clocks = <&scmi_clk CK_SCMI_MPU>;
};

&cpu1 {
	clocks = <&scmi_clk CK_SCMI_MPU>;
};

&cryp1 {
	clocks = <&scmi_clk CK_SCMI_CRYP1>;
	resets = <&scmi_reset RST_SCMI_CRYP1>;
};

&dsi {
	phy-dsi-supply = <&scmi_reg18>;
	clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
};

&gpioz {
	clocks = <&scmi_clk CK_SCMI_GPIOZ>;
};

&hash1 {
	clocks = <&scmi_clk CK_SCMI_HASH1>;
	resets = <&scmi_reset RST_SCMI_HASH1>;
};

&i2c4 {
	clocks = <&scmi_clk CK_SCMI_I2C4>;
	resets = <&scmi_reset RST_SCMI_I2C4>;
};

&iwdg2 {
	clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
};

&mdma1 {
	resets = <&scmi_reset RST_SCMI_MDMA>;
};

&mlahb {
	resets = <&scmi_reset RST_SCMI_MCU>;
};

&rcc {
	compatible = "st,stm32mp1-rcc-secure", "syscon";
	clock-names = "hse", "hsi", "csi", "lse", "lsi";
	clocks = <&scmi_clk CK_SCMI_HSE>,
		 <&scmi_clk CK_SCMI_HSI>,
		 <&scmi_clk CK_SCMI_CSI>,
		 <&scmi_clk CK_SCMI_LSE>,
		 <&scmi_clk CK_SCMI_LSI>;
};

&rng1 {
	clocks = <&scmi_clk CK_SCMI_RNG1>;
	resets = <&scmi_reset RST_SCMI_RNG1>;
};

&rtc {
	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
 */

/dts-v1/;

#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include "stm32mp15xx-dkx.dtsi"

/ {
	model = "STMicroelectronics STM32MP157C-DK2 Discovery Board";
	compatible = "st,stm32mp157c-dk2", "st,stm32mp157";

	aliases {
		ethernet0 = &ethernet0;
		serial0 = &uart4;
		serial1 = &usart3;
		serial2 = &uart7;
		serial3 = &usart2;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&cryp1 {
	status = "okay";
};

&dsi {
	status = "okay";
	phy-dsi-supply = <&reg18>;

	ports {
		port@0 {
			reg = <0>;
			dsi_in: endpoint {
				remote-endpoint = <&ltdc_ep1_out>;
			};
		};

		port@1 {
			reg = <1>;
			dsi_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};

	panel@0 {
		compatible = "orisetech,otm8009a";
		reg = <0>;
		reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
		power-supply = <&v3v3>;
		status = "okay";

		port {
			panel_in: endpoint {
				remote-endpoint = <&dsi_out>;
			};
		};
	};
};

&i2c1 {
	touchscreen@38 {
		compatible = "focaltech,ft6236";
		reg = <0x38>;
		interrupts = <2 2>;
		interrupt-parent = <&gpiof>;
		interrupt-controller;
		touchscreen-size-x = <480>;
		touchscreen-size-y = <800>;
		status = "okay";
	};
};

&ltdc {
	status = "okay";

	port {
		ltdc_ep1_out: endpoint@1 {
			reg = <1>;
			remote-endpoint = <&dsi_in>;
		};
	};
};

&usart2 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&usart2_pins_c>;
	pinctrl-1 = <&usart2_sleep_pins_c>;
	pinctrl-2 = <&usart2_idle_pins_c>;
	status = "disabled";
};