code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * arch/arm/probes/kprobes/test-thumb.c
 *
 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/opcodes.h>
#include <asm/probes.h>

#include "test-core.h"

#define TEST_ISA "16"

#define DONT_TEST_IN_ITBLOCK(tests)			\
	kprobe_test_flags |= TEST_FLAG_NO_ITBLOCK;	\
	tests						\
	kprobe_test_flags &= ~TEST_FLAG_NO_ITBLOCK;

#define CONDITION_INSTRUCTIONS(cc_pos, tests)		\
	kprobe_test_cc_position = cc_pos;		\
	DONT_TEST_IN_ITBLOCK(tests)			\
	kprobe_test_cc_position = 0;

#define TEST_ITBLOCK(code)				\
	kprobe_test_flags |= TEST_FLAG_FULL_ITBLOCK;	\
	TESTCASE_START(code)				\
	TEST_ARG_END("")				\
	"50:	nop			\n\t"		\
	"1:	"code"			\n\t"		\
	"	mov r1, #0x11		\n\t"		\
	"	mov r2, #0x22		\n\t"		\
	"	mov r3, #0x33		\n\t"		\
	"2:	nop			\n\t"		\
	TESTCASE_END					\
	kprobe_test_flags &= ~TEST_FLAG_FULL_ITBLOCK;

#define TEST_THUMB_TO_ARM_INTERWORK_P(code1, reg, val, code2)	\
	TESTCASE_START(code1 #reg code2)			\
	TEST_ARG_PTR(reg, val)					\
	TEST_ARG_REG(14, 99f+1)					\
	TEST_ARG_MEM(15, 3f)					\
	TEST_ARG_END("")					\
	"	nop			\n\t" /* To align 1f */	\
	"50:	nop			\n\t"			\
	"1:	"code1 #reg code2"	\n\t"			\
	"	bx	lr		\n\t"			\
	".arm				\n\t"			\
	"3:	adr	lr, 2f+1	\n\t"			\
	"	bx	lr		\n\t"			\
	".thumb				\n\t"			\
	"2:	nop			\n\t"			\
	TESTCASE_END

void kprobe_thumb16_test_cases(void)
{
	kprobe_test_flags = TEST_FLAG_NARROW_INSTR;

	TEST_GROUP("Shift (immediate), add, subtract, move, and compare")

	TEST_R(    "lsls	r7, r",0,VAL1,", #5")
	TEST_R(    "lsls	r0, r",7,VAL2,", #11")
	TEST_R(    "lsrs	r7, r",0,VAL1,", #5")
	TEST_R(    "lsrs	r0, r",7,VAL2,", #11")
	TEST_R(    "asrs	r7, r",0,VAL1,", #5")
	TEST_R(    "asrs	r0, r",7,VAL2,", #11")
	TEST_RR(   "adds	r2, r",0,VAL1,", r",7,VAL2,"")
	TEST_RR(   "adds	r5, r",7,VAL2,", r",0,VAL2,"")
	TEST_RR(   "subs	r2, r",0,VAL1,", r",7,VAL2,"")
	TEST_RR(   "subs	r5, r",7,VAL2,", r",0,VAL2,"")
	TEST_R(    "adds	r7, r",0,VAL1,", #5")
	TEST_R(    "adds	r0, r",7,VAL2,", #2")
	TEST_R(    "subs	r7, r",0,VAL1,", #5")
	TEST_R(    "subs	r0, r",7,VAL2,", #2")
	TEST(      "movs.n	r0, #0x5f")
	TEST(      "movs.n	r7, #0xa0")
	TEST_R(    "cmp.n	r",0,0x5e, ", #0x5f")
	TEST_R(    "cmp.n	r",5,0x15f,", #0x5f")
	TEST_R(    "cmp.n	r",7,0xa0, ", #0xa0")
	TEST_R(    "adds.n	r",0,VAL1,", #0x5f")
	TEST_R(    "adds.n	r",7,VAL2,", #0xa0")
	TEST_R(    "subs.n	r",0,VAL1,", #0x5f")
	TEST_R(    "subs.n	r",7,VAL2,", #0xa0")

	TEST_GROUP("16-bit Thumb data-processing instructions")

#define DATA_PROCESSING16(op,val)			\
	TEST_RR(   op"	r",0,VAL1,", r",7,val,"")	\
	TEST_RR(   op"	r",7,VAL2,", r",0,val,"")

	DATA_PROCESSING16("ands",0xf00f00ff)
	DATA_PROCESSING16("eors",0xf00f00ff)
	DATA_PROCESSING16("lsls",11)
	DATA_PROCESSING16("lsrs",11)
	DATA_PROCESSING16("asrs",11)
	DATA_PROCESSING16("adcs",VAL2)
	DATA_PROCESSING16("sbcs",VAL2)
	DATA_PROCESSING16("rors",11)
	DATA_PROCESSING16("tst",0xf00f00ff)
	TEST_R("rsbs	r",0,VAL1,", #0")
	TEST_R("rsbs	r",7,VAL2,", #0")
	DATA_PROCESSING16("cmp",0xf00f00ff)
	DATA_PROCESSING16("cmn",0xf00f00ff)
	DATA_PROCESSING16("orrs",0xf00f00ff)
	DATA_PROCESSING16("muls",VAL2)
	DATA_PROCESSING16("bics",0xf00f00ff)
	DATA_PROCESSING16("mvns",VAL2)

	TEST_GROUP("Special data instructions and branch and exchange")

	TEST_RR(  "add	r",0, VAL1,", r",7,VAL2,"")
	TEST_RR(  "add	r",3, VAL2,", r",8,VAL3,"")
	TEST_RR(  "add	r",8, VAL3,", r",0,VAL1,"")
	TEST_R(   "add	sp"        ", r",8,-8,  "")
	TEST_R(   "add	r",14,VAL1,", pc")
	TEST_BF_R("add	pc"        ", r",0,2f-1f-8,"")
	TEST_UNSUPPORTED(__inst_thumb16(0x44ff) "	@ add pc, pc")

	TEST_RR(  "cmp	r",3,VAL1,", r",8,VAL2,"")
	TEST_RR(  "cmp	r",8,VAL2,", r",0,VAL1,"")
	TEST_R(   "cmp	sp"       ", r",8,-8,  "")

	TEST_R(   "mov	r0, r",7,VAL2,"")
	TEST_R(   "mov	r3, r",8,VAL3,"")
	TEST_R(   "mov	r8, r",0,VAL1,"")
	TEST_P(   "mov	sp, r",8,-8,  "")
	TEST(     "mov	lr, pc")
	TEST_BF_R("mov	pc, r",0,2f,  "")

	TEST_BF_R("bx	r",0, 2f+1,"")
	TEST_BF_R("bx	r",14,2f+1,"")
	TESTCASE_START("bx	pc")
		TEST_ARG_REG(14, 99f+1)
		TEST_ARG_END("")
		"	nop			\n\t" /* To align the bx pc*/
		"50:	nop			\n\t"
		"1:	bx	pc		\n\t"
		"	bx	lr		\n\t"
		".arm				\n\t"
		"	adr	lr, 2f+1	\n\t"
		"	bx	lr		\n\t"
		".thumb				\n\t"
		"2:	nop			\n\t"
	TESTCASE_END

	TEST_BF_R("blx	r",0, 2f+1,"")
	TEST_BB_R("blx	r",14,2f+1,"")
	TEST_UNSUPPORTED(__inst_thumb16(0x47f8) "	@ blx pc")

	TEST_GROUP("Load from Literal Pool")

	TEST_X( "ldr	r0, 3f",
		".align					\n\t"
		"3:	.word	"__stringify(VAL1))
	TEST_X( "ldr	r7, 3f",
		".space 128				\n\t"
		".align					\n\t"
		"3:	.word	"__stringify(VAL2))

	TEST_GROUP("16-bit Thumb Load/store instructions")

	TEST_RPR("str	r",0, VAL1,", [r",1, 24,", r",2,  48,"]")
	TEST_RPR("str	r",7, VAL2,", [r",6, 24,", r",5,  48,"]")
	TEST_RPR("strh	r",0, VAL1,", [r",1, 24,", r",2,  48,"]")
	TEST_RPR("strh	r",7, VAL2,", [r",6, 24,", r",5,  48,"]")
	TEST_RPR("strb	r",0, VAL1,", [r",1, 24,", r",2,  48,"]")
	TEST_RPR("strb	r",7, VAL2,", [r",6, 24,", r",5,  48,"]")
	TEST_PR( "ldrsb	r0, [r",1, 24,", r",2,  48,"]")
	TEST_PR( "ldrsb	r7, [r",6, 24,", r",5,  50,"]")
	TEST_PR( "ldr	r0, [r",1, 24,", r",2,  48,"]")
	TEST_PR( "ldr	r7, [r",6, 24,", r",5,  48,"]")
	TEST_PR( "ldrh	r0, [r",1, 24,", r",2,  48,"]")
	TEST_PR( "ldrh	r7, [r",6, 24,", r",5,  50,"]")
	TEST_PR( "ldrb	r0, [r",1, 24,", r",2,  48,"]")
	TEST_PR( "ldrb	r7, [r",6, 24,", r",5,  50,"]")
	TEST_PR( "ldrsh	r0, [r",1, 24,", r",2,  48,"]")
	TEST_PR( "ldrsh	r7, [r",6, 24,", r",5,  50,"]")

	TEST_RP("str	r",0, VAL1,", [r",1, 24,", #120]")
	TEST_RP("str	r",7, VAL2,", [r",6, 24,", #120]")
	TEST_P( "ldr	r0, [r",1, 24,", #120]")
	TEST_P( "ldr	r7, [r",6, 24,", #120]")
	TEST_RP("strb	r",0, VAL1,", [r",1, 24,", #30]")
	TEST_RP("strb	r",7, VAL2,", [r",6, 24,", #30]")
	TEST_P( "ldrb	r0, [r",1, 24,", #30]")
	TEST_P( "ldrb	r7, [r",6, 24,", #30]")
	TEST_RP("strh	r",0, VAL1,", [r",1, 24,", #60]")
	TEST_RP("strh	r",7, VAL2,", [r",6, 24,", #60]")
	TEST_P( "ldrh	r0, [r",1, 24,", #60]")
	TEST_P( "ldrh	r7, [r",6, 24,", #60]")

	TEST_R( "str	r",0, VAL1,", [sp, #0]")
	TEST_R( "str	r",7, VAL2,", [sp, #160]")
	TEST(   "ldr	r0, [sp, #0]")
	TEST(   "ldr	r7, [sp, #160]")

	TEST_RP("str	r",0, VAL1,", [r",0, 24,"]")
	TEST_P( "ldr	r0, [r",0, 24,"]")

	TEST_GROUP("Generate PC-/SP-relative address")

	TEST("add	r0, pc, #4")
	TEST("add	r7, pc, #1020")
	TEST("add	r0, sp, #4")
	TEST("add	r7, sp, #1020")

	TEST_GROUP("Miscellaneous 16-bit instructions")

	TEST_UNSUPPORTED( "cpsie	i")
	TEST_UNSUPPORTED( "cpsid	i")
	TEST_UNSUPPORTED( "setend	le")
	TEST_UNSUPPORTED( "setend	be")

	TEST("add	sp, #"__stringify(TEST_MEMORY_SIZE)) /* Assumes TEST_MEMORY_SIZE < 0x400 */
	TEST("sub	sp, #0x7f*4")

DONT_TEST_IN_ITBLOCK(
	TEST_BF_R(  "cbnz	r",0,0, ", 2f")
	TEST_BF_R(  "cbz	r",2,-1,", 2f")
	TEST_BF_RX( "cbnz	r",4,1, ", 2f", SPACE_0x20)
	TEST_BF_RX( "cbz	r",7,0, ", 2f", SPACE_0x40)
)
	TEST_R("sxth	r0, r",7, HH1,"")
	TEST_R("sxth	r7, r",0, HH2,"")
	TEST_R("sxtb	r0, r",7, HH1,"")
	TEST_R("sxtb	r7, r",0, HH2,"")
	TEST_R("uxth	r0, r",7, HH1,"")
	TEST_R("uxth	r7, r",0, HH2,"")
	TEST_R("uxtb	r0, r",7, HH1,"")
	TEST_R("uxtb	r7, r",0, HH2,"")
	TEST_R("rev	r0, r",7, VAL1,"")
	TEST_R("rev	r7, r",0, VAL2,"")
	TEST_R("rev16	r0, r",7, VAL1,"")
	TEST_R("rev16	r7, r",0, VAL2,"")
	TEST_UNSUPPORTED(__inst_thumb16(0xba80) "")
	TEST_UNSUPPORTED(__inst_thumb16(0xbabf) "")
	TEST_R("revsh	r0, r",7, VAL1,"")
	TEST_R("revsh	r7, r",0, VAL2,"")

#define TEST_POPPC(code, offset)	\
	TESTCASE_START(code)		\
	TEST_ARG_PTR(13, offset)	\
	TEST_ARG_END("")		\
	TEST_BRANCH_F(code)		\
	TESTCASE_END

	TEST("push	{r0}")
	TEST("push	{r7}")
	TEST("push	{r14}")
	TEST("push	{r0-r7,r14}")
	TEST("push	{r0,r2,r4,r6,r14}")
	TEST("push	{r1,r3,r5,r7}")
	TEST("pop	{r0}")
	TEST("pop	{r7}")
	TEST("pop	{r0,r2,r4,r6}")
	TEST_POPPC("pop	{pc}",15*4)
	TEST_POPPC("pop	{r0-r7,pc}",7*4)
	TEST_POPPC("pop	{r1,r3,r5,r7,pc}",11*4)
	TEST_THUMB_TO_ARM_INTERWORK_P("pop	{pc}	@ ",13,15*4,"")
	TEST_THUMB_TO_ARM_INTERWORK_P("pop	{r0-r7,pc}	@ ",13,7*4,"")

	TEST_UNSUPPORTED("bkpt.n	0")
	TEST_UNSUPPORTED("bkpt.n	255")

	TEST_SUPPORTED("yield")
	TEST("sev")
	TEST("nop")
	TEST("wfi")
	TEST_SUPPORTED("wfe")
	TEST_UNSUPPORTED(__inst_thumb16(0xbf50) "") /* Unassigned hints */
	TEST_UNSUPPORTED(__inst_thumb16(0xbff0) "") /* Unassigned hints */

#define TEST_IT(code, code2)			\
	TESTCASE_START(code)			\
	TEST_ARG_END("")			\
	"50:	nop			\n\t"	\
	"1:	"code"			\n\t"	\
	"	"code2"			\n\t"	\
	"2:	nop			\n\t"	\
	TESTCASE_END

DONT_TEST_IN_ITBLOCK(
	TEST_IT("it	eq","moveq r0,#0")
	TEST_IT("it	vc","movvc r0,#0")
	TEST_IT("it	le","movle r0,#0")
	TEST_IT("ite	eq","moveq r0,#0\n\t  movne r1,#1")
	TEST_IT("itet	vc","movvc r0,#0\n\t  movvs r1,#1\n\t  movvc r2,#2")
	TEST_IT("itete	le","movle r0,#0\n\t  movgt r1,#1\n\t  movle r2,#2\n\t  movgt r3,#3")
	TEST_IT("itttt	le","movle r0,#0\n\t  movle r1,#1\n\t  movle r2,#2\n\t  movle r3,#3")
	TEST_IT("iteee	le","movle r0,#0\n\t  movgt r1,#1\n\t  movgt r2,#2\n\t  movgt r3,#3")
)

	TEST_GROUP("Load and store multiple")

	TEST_P("ldmia	r",4, 16*4,"!, {r0,r7}")
	TEST_P("ldmia	r",7, 16*4,"!, {r0-r6}")
	TEST_P("stmia	r",4, 16*4,"!, {r0,r7}")
	TEST_P("stmia	r",0, 16*4,"!, {r0-r7}")

	TEST_GROUP("Conditional branch and Supervisor Call instructions")

CONDITION_INSTRUCTIONS(8,
	TEST_BF("beq	2f")
	TEST_BB("bne	2b")
	TEST_BF("bgt	2f")
	TEST_BB("blt	2b")
)
	TEST_UNSUPPORTED(__inst_thumb16(0xde00) "")
	TEST_UNSUPPORTED(__inst_thumb16(0xdeff) "")
	TEST_UNSUPPORTED("svc	#0x00")
	TEST_UNSUPPORTED("svc	#0xff")

	TEST_GROUP("Unconditional branch")

	TEST_BF(  "b	2f")
	TEST_BB(  "b	2b")
	TEST_BF_X("b	2f", SPACE_0x400)
	TEST_BB_X("b	2b", SPACE_0x400)

	TEST_GROUP("Testing instructions in IT blocks")

	TEST_ITBLOCK("subs.n r0, r0")

	verbose("\n");
}

void kprobe_thumb32_test_cases(void)
{
	kprobe_test_flags = 0;

	TEST_GROUP("Load/store multiple")

	TEST_UNSUPPORTED("rfedb	sp")
	TEST_UNSUPPORTED("rfeia	sp")
	TEST_UNSUPPORTED("rfedb	sp!")
	TEST_UNSUPPORTED("rfeia	sp!")

	TEST_P(   "stmia	r",0, 16*4,", {r0,r8}")
	TEST_P(   "stmia	r",4, 16*4,", {r0-r12,r14}")
	TEST_P(   "stmia	r",7, 16*4,"!, {r8-r12,r14}")
	TEST_P(   "stmia	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")

	TEST_P(   "ldmia	r",0, 16*4,", {r0,r8}")
	TEST_P(   "ldmia	r",4, 0,   ", {r0-r12,r14}")
	TEST_BF_P("ldmia	r",5, 8*4, "!, {r6-r12,r15}")
	TEST_P(   "ldmia	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
	TEST_BF_P("ldmia	r",14,14*4,"!, {r4,pc}")

	TEST_P(   "stmdb	r",0, 16*4,", {r0,r8}")
	TEST_P(   "stmdb	r",4, 16*4,", {r0-r12,r14}")
	TEST_P(   "stmdb	r",5, 16*4,"!, {r8-r12,r14}")
	TEST_P(   "stmdb	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")

	TEST_P(   "ldmdb	r",0, 16*4,", {r0,r8}")
	TEST_P(   "ldmdb	r",4, 16*4,", {r0-r12,r14}")
	TEST_BF_P("ldmdb	r",5, 16*4,"!, {r6-r12,r15}")
	TEST_P(   "ldmdb	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
	TEST_BF_P("ldmdb	r",14,16*4,"!, {r4,pc}")

	TEST_P(   "stmdb	r",13,16*4,"!, {r3-r12,lr}")
	TEST_P(	  "stmdb	r",13,16*4,"!, {r3-r12}")
	TEST_P(   "stmdb	r",2, 16*4,", {r3-r12,lr}")
	TEST_P(   "stmdb	r",13,16*4,"!, {r2-r12,lr}")
	TEST_P(   "stmdb	r",0, 16*4,", {r0-r12}")
	TEST_P(   "stmdb	r",0, 16*4,", {r0-r12,lr}")

	TEST_BF_P("ldmia	r",13,5*4, "!, {r3-r12,pc}")
	TEST_P(	  "ldmia	r",13,5*4, "!, {r3-r12}")
	TEST_BF_P("ldmia	r",2, 5*4, "!, {r3-r12,pc}")
	TEST_BF_P("ldmia	r",13,4*4, "!, {r2-r12,pc}")
	TEST_P(   "ldmia	r",0, 16*4,", {r0-r12}")
	TEST_P(   "ldmia	r",0, 16*4,", {r0-r12,lr}")

	TEST_THUMB_TO_ARM_INTERWORK_P("ldmia	r",0,14*4,", {r12,pc}")
	TEST_THUMB_TO_ARM_INTERWORK_P("ldmia	r",13,2*4,", {r0-r12,pc}")

	TEST_UNSUPPORTED(__inst_thumb32(0xe88f0101) "	@ stmia	pc, {r0,r8}")
	TEST_UNSUPPORTED(__inst_thumb32(0xe92f5f00) "	@ stmdb	pc!, {r8-r12,r14}")
	TEST_UNSUPPORTED(__inst_thumb32(0xe8bdc000) "	@ ldmia	r13!, {r14,pc}")
	TEST_UNSUPPORTED(__inst_thumb32(0xe93ec000) "	@ ldmdb	r14!, {r14,pc}")
	TEST_UNSUPPORTED(__inst_thumb32(0xe8a73f00) "	@ stmia	r7!, {r8-r12,sp}")
	TEST_UNSUPPORTED(__inst_thumb32(0xe8a79f00) "	@ stmia	r7!, {r8-r12,pc}")
	TEST_UNSUPPORTED(__inst_thumb32(0xe93e2010) "	@ ldmdb	r14!, {r4,sp}")

	TEST_GROUP("Load/store double or exclusive, table branch")

	TEST_P(  "ldrd	r0, r1, [r",1, 24,", #-16]")
	TEST(    "ldrd	r12, r14, [sp, #16]")
	TEST_P(  "ldrd	r1, r0, [r",7, 24,", #-16]!")
	TEST(    "ldrd	r14, r12, [sp, #16]!")
	TEST_P(  "ldrd	r1, r0, [r",7, 24,"], #16")
	TEST(    "ldrd	r7, r8, [sp], #-16")

	TEST_X( "ldrd	r12, r14, 3f",
		".align 3				\n\t"
		"3:	.word	"__stringify(VAL1)"	\n\t"
		"	.word	"__stringify(VAL2))

	TEST_UNSUPPORTED(__inst_thumb32(0xe9ffec04) "	@ ldrd	r14, r12, [pc, #16]!")
	TEST_UNSUPPORTED(__inst_thumb32(0xe8ffec04) "	@ ldrd	r14, r12, [pc], #16")
	TEST_UNSUPPORTED(__inst_thumb32(0xe9d4d800) "	@ ldrd	sp, r8, [r4]")
	TEST_UNSUPPORTED(__inst_thumb32(0xe9d4f800) "	@ ldrd	pc, r8, [r4]")
	TEST_UNSUPPORTED(__inst_thumb32(0xe9d47d00) "	@ ldrd	r7, sp, [r4]")
	TEST_UNSUPPORTED(__inst_thumb32(0xe9d47f00) "	@ ldrd	r7, pc, [r4]")

	TEST_RRP("strd	r",0, VAL1,", r",1, VAL2,", [r",1, 24,", #-16]")
	TEST_RR( "strd	r",12,VAL2,", r",14,VAL1,", [sp, #16]")
	TEST_RRP("strd	r",1, VAL1,", r",0, VAL2,", [r",7, 24,", #-16]!")
	TEST_RR( "strd	r",14,VAL2,", r",12,VAL1,", [sp, #16]!")
	TEST_RRP("strd	r",1, VAL1,", r",0, VAL2,", [r",7, 24,"], #16")
	TEST_RR( "strd	r",7, VAL2,", r",8, VAL1,", [sp], #-16")
	TEST_RRP("strd	r",6, VAL1,", r",7, VAL2,", [r",13, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!")
	TEST_UNSUPPORTED("strd r6, r7, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")
	TEST_RRP("strd	r",4, VAL1,", r",5, VAL2,", [r",14, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!")
	TEST_UNSUPPORTED(__inst_thumb32(0xe9efec04) "	@ strd	r14, r12, [pc, #16]!")
	TEST_UNSUPPORTED(__inst_thumb32(0xe8efec04) "	@ strd	r14, r12, [pc], #16")

	TEST_RX("tbb	[pc, r",0, (9f-(1f+4)),"]",
		"9:			\n\t"
		".byte	(2f-1b-4)>>1	\n\t"
		".byte	(3f-1b-4)>>1	\n\t"
		"3:	mvn	r0, r0	\n\t"
		"2:	nop		\n\t")

	TEST_RX("tbb	[pc, r",4, (9f-(1f+4)+1),"]",
		"9:			\n\t"
		".byte	(2f-1b-4)>>1	\n\t"
		".byte	(3f-1b-4)>>1	\n\t"
		"3:	mvn	r0, r0	\n\t"
		"2:	nop		\n\t")

	TEST_RRX("tbb	[r",1,9f,", r",2,0,"]",
		"9:			\n\t"
		".byte	(2f-1b-4)>>1	\n\t"
		".byte	(3f-1b-4)>>1	\n\t"
		"3:	mvn	r0, r0	\n\t"
		"2:	nop		\n\t")

	TEST_RX("tbh	[pc, r",7, (9f-(1f+4))>>1,", lsl #1]",
		"9:			\n\t"
		".short	(2f-1b-4)>>1	\n\t"
		".short	(3f-1b-4)>>1	\n\t"
		"3:	mvn	r0, r0	\n\t"
		"2:	nop		\n\t")

	TEST_RX("tbh	[pc, r",12, ((9f-(1f+4))>>1)+1,", lsl #1]",
		"9:			\n\t"
		".short	(2f-1b-4)>>1	\n\t"
		".short	(3f-1b-4)>>1	\n\t"
		"3:	mvn	r0, r0	\n\t"
		"2:	nop		\n\t")

	TEST_RRX("tbh	[r",1,9f, ", r",14,1,", lsl #1]",
		"9:			\n\t"
		".short	(2f-1b-4)>>1	\n\t"
		".short	(3f-1b-4)>>1	\n\t"
		"3:	mvn	r0, r0	\n\t"
		"2:	nop		\n\t")

	TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01f) "	@ tbh [r1, pc]")
	TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01d) "	@ tbh [r1, sp]")
	TEST_UNSUPPORTED(__inst_thumb32(0xe8ddf012) "	@ tbh [sp, r2]")

	TEST_UNSUPPORTED("strexb	r0, r1, [r2]")
	TEST_UNSUPPORTED("strexh	r0, r1, [r2]")
	TEST_UNSUPPORTED("strexd	r0, r1, r2, [r2]")
	TEST_UNSUPPORTED("ldrexb	r0, [r1]")
	TEST_UNSUPPORTED("ldrexh	r0, [r1]")
	TEST_UNSUPPORTED("ldrexd	r0, r1, [r1]")

	TEST_GROUP("Data-processing (shifted register) and (modified immediate)")

#define _DATA_PROCESSING32_DNM(op,s,val)					\
	TEST_RR(op s".w	r0,  r",1, VAL1,", r",2, val, "")			\
	TEST_RR(op s"	r1,  r",1, VAL1,", r",2, val, ", lsl #3")		\
	TEST_RR(op s"	r2,  r",3, VAL1,", r",2, val, ", lsr #4")		\
	TEST_RR(op s"	r3,  r",3, VAL1,", r",2, val, ", asr #5")		\
	TEST_RR(op s"	r4,  r",5, VAL1,", r",2, N(val),", asr #6")		\
	TEST_RR(op s"	r5,  r",5, VAL1,", r",2, val, ", ror #7")		\
	TEST_RR(op s"	r8,  r",9, VAL1,", r",10,val, ", rrx")			\
	TEST_R( op s"	r0,  r",11,VAL1,", #0x00010001")			\
	TEST_R( op s"	r11, r",0, VAL1,", #0xf5000000")			\
	TEST_R( op s"	r7,  r",8, VAL2,", #0x000af000")

#define DATA_PROCESSING32_DNM(op,val)		\
	_DATA_PROCESSING32_DNM(op,"",val)	\
	_DATA_PROCESSING32_DNM(op,"s",val)

#define DATA_PROCESSING32_NM(op,val)					\
	TEST_RR(op".w	r",1, VAL1,", r",2, val, "")			\
	TEST_RR(op"	r",1, VAL1,", r",2, val, ", lsl #3")		\
	TEST_RR(op"	r",3, VAL1,", r",2, val, ", lsr #4")		\
	TEST_RR(op"	r",3, VAL1,", r",2, val, ", asr #5")		\
	TEST_RR(op"	r",5, VAL1,", r",2, N(val),", asr #6")		\
	TEST_RR(op"	r",5, VAL1,", r",2, val, ", ror #7")		\
	TEST_RR(op"	r",9, VAL1,", r",10,val, ", rrx")		\
	TEST_R( op"	r",11,VAL1,", #0x00010001")			\
	TEST_R( op"	r",0, VAL1,", #0xf5000000")			\
	TEST_R( op"	r",8, VAL2,", #0x000af000")

#define _DATA_PROCESSING32_DM(op,s,val)				\
	TEST_R( op s".w	r0,  r",14, val, "")			\
	TEST_R( op s"	r1,  r",12, val, ", lsl #3")		\
	TEST_R( op s"	r2,  r",11, val, ", lsr #4")		\
	TEST_R( op s"	r3,  r",10, val, ", asr #5")		\
	TEST_R( op s"	r4,  r",9, N(val),", asr #6")		\
	TEST_R( op s"	r5,  r",8, val, ", ror #7")		\
	TEST_R( op s"	r8,  r",7,val, ", rrx")			\
	TEST(   op s"	r0,  #0x00010001")			\
	TEST(   op s"	r11, #0xf5000000")			\
	TEST(   op s"	r7,  #0x000af000")			\
	TEST(   op s"	r4,  #0x00005a00")

#define DATA_PROCESSING32_DM(op,val)		\
	_DATA_PROCESSING32_DM(op,"",val)	\
	_DATA_PROCESSING32_DM(op,"s",val)

	DATA_PROCESSING32_DNM("and",0xf00f00ff)
	DATA_PROCESSING32_NM("tst",0xf00f00ff)
	DATA_PROCESSING32_DNM("bic",0xf00f00ff)
	DATA_PROCESSING32_DNM("orr",0xf00f00ff)
	DATA_PROCESSING32_DM("mov",VAL2)
	DATA_PROCESSING32_DNM("orn",0xf00f00ff)
	DATA_PROCESSING32_DM("mvn",VAL2)
	DATA_PROCESSING32_DNM("eor",0xf00f00ff)
	DATA_PROCESSING32_NM("teq",0xf00f00ff)
	DATA_PROCESSING32_DNM("add",VAL2)
	DATA_PROCESSING32_NM("cmn",VAL2)
	DATA_PROCESSING32_DNM("adc",VAL2)
	DATA_PROCESSING32_DNM("sbc",VAL2)
	DATA_PROCESSING32_DNM("sub",VAL2)
	DATA_PROCESSING32_NM("cmp",VAL2)
	DATA_PROCESSING32_DNM("rsb",VAL2)

	TEST_RR("pkhbt	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR("pkhbt	r14,r",12, HH1,", r",10,HH2,", lsl #2")
	TEST_RR("pkhtb	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR("pkhtb	r14,r",12, HH1,", r",10,HH2,", asr #2")

	TEST_UNSUPPORTED(__inst_thumb32(0xea170f0d) "	@ tst.w r7, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xea170f0f) "	@ tst.w r7, pc")
	TEST_UNSUPPORTED(__inst_thumb32(0xea1d0f07) "	@ tst.w sp, r7")
	TEST_UNSUPPORTED(__inst_thumb32(0xea1f0f07) "	@ tst.w pc, r7")
	TEST_UNSUPPORTED(__inst_thumb32(0xf01d1f08) "	@ tst sp, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf01f1f08) "	@ tst pc, #0x00080008")

	TEST_UNSUPPORTED(__inst_thumb32(0xea970f0d) "	@ teq.w r7, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xea970f0f) "	@ teq.w r7, pc")
	TEST_UNSUPPORTED(__inst_thumb32(0xea9d0f07) "	@ teq.w sp, r7")
	TEST_UNSUPPORTED(__inst_thumb32(0xea9f0f07) "	@ teq.w pc, r7")
	TEST_UNSUPPORTED(__inst_thumb32(0xf09d1f08) "	@ tst sp, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf09f1f08) "	@ tst pc, #0x00080008")

	TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0d) "	@ cmn.w r7, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0f) "	@ cmn.w r7, pc")
	TEST_P("cmn.w	sp, r",7,0,"")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb1f0f07) "	@ cmn.w pc, r7")
	TEST(  "cmn	sp, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf11f1f08) "	@ cmn pc, #0x00080008")

	TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0d) "	@ cmp.w r7, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0f) "	@ cmp.w r7, pc")
	TEST_P("cmp.w	sp, r",7,0,"")
	TEST_UNSUPPORTED(__inst_thumb32(0xebbf0f07) "	@ cmp.w pc, r7")
	TEST(  "cmp	sp, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf1bf1f08) "	@ cmp pc, #0x00080008")

	TEST_UNSUPPORTED(__inst_thumb32(0xea5f070d) "	@ movs.w r7, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xea5f070f) "	@ movs.w r7, pc")
	TEST_UNSUPPORTED(__inst_thumb32(0xea5f0d07) "	@ movs.w sp, r7")
	TEST_UNSUPPORTED(__inst_thumb32(0xea4f0f07) "	@ mov.w  pc, r7")
	TEST_UNSUPPORTED(__inst_thumb32(0xf04f1d08) "	@ mov sp, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf04f1f08) "	@ mov pc, #0x00080008")

	TEST_R("add.w	r0, sp, r",1, 4,"")
	TEST_R("adds	r0, sp, r",1, 4,", asl #3")
	TEST_R("add	r0, sp, r",1, 4,", asl #4")
	TEST_R("add	r0, sp, r",1, 16,", ror #1")
	TEST_R("add.w	sp, sp, r",1, 4,"")
	TEST_R("add	sp, sp, r",1, 4,", asl #3")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb0d1d01) "	@ add sp, sp, r1, asl #4")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d71) "	@ add sp, sp, r1, ror #1")
	TEST(  "add.w	r0, sp, #24")
	TEST(  "add.w	sp, sp, #24")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0f01) "	@ add pc, sp, r1")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000f) "	@ add r0, sp, pc")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000d) "	@ add r0, sp, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0f) "	@ add sp, sp, pc")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0d) "	@ add sp, sp, sp")

	TEST_R("sub.w	r0, sp, r",1, 4,"")
	TEST_R("subs	r0, sp, r",1, 4,", asl #3")
	TEST_R("sub	r0, sp, r",1, 4,", asl #4")
	TEST_R("sub	r0, sp, r",1, 16,", ror #1")
	TEST_R("sub.w	sp, sp, r",1, 4,"")
	TEST_R("sub	sp, sp, r",1, 4,", asl #3")
	TEST_UNSUPPORTED(__inst_thumb32(0xebad1d01) "	@ sub sp, sp, r1, asl #4")
	TEST_UNSUPPORTED(__inst_thumb32(0xebad0d71) "	@ sub sp, sp, r1, ror #1")
	TEST_UNSUPPORTED(__inst_thumb32(0xebad0f01) "	@ sub pc, sp, r1")
	TEST(  "sub.w	r0, sp, #24")
	TEST(  "sub.w	sp, sp, #24")

	TEST_UNSUPPORTED(__inst_thumb32(0xea02010f) "	@ and r1, r2, pc")
	TEST_UNSUPPORTED(__inst_thumb32(0xea0f0103) "	@ and r1, pc, r3")
	TEST_UNSUPPORTED(__inst_thumb32(0xea020f03) "	@ and pc, r2, r3")
	TEST_UNSUPPORTED(__inst_thumb32(0xea02010d) "	@ and r1, r2, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xea0d0103) "	@ and r1, sp, r3")
	TEST_UNSUPPORTED(__inst_thumb32(0xea020d03) "	@ and sp, r2, r3")
	TEST_UNSUPPORTED(__inst_thumb32(0xf00d1108) "	@ and r1, sp, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf00f1108) "	@ and r1, pc, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf0021d08) "	@ and sp, r8, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf0021f08) "	@ and pc, r8, #0x00080008")

	TEST_UNSUPPORTED(__inst_thumb32(0xeb02010f) "	@ add r1, r2, pc")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb0f0103) "	@ add r1, pc, r3")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb020f03) "	@ add pc, r2, r3")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb02010d) "	@ add r1, r2, sp")
	TEST_SUPPORTED(  __inst_thumb32(0xeb0d0103) "	@ add r1, sp, r3")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb020d03) "	@ add sp, r2, r3")
	TEST_SUPPORTED(  __inst_thumb32(0xf10d1108) "	@ add r1, sp, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf10d1f08) "	@ add pc, sp, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf10f1108) "	@ add r1, pc, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf1021d08) "	@ add sp, r8, #0x00080008")
	TEST_UNSUPPORTED(__inst_thumb32(0xf1021f08) "	@ add pc, r8, #0x00080008")

	TEST_UNSUPPORTED(__inst_thumb32(0xeaa00000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xeaf00000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb200000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xeb800000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xebe00000) "")

	TEST_UNSUPPORTED(__inst_thumb32(0xf0a00000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xf0c00000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xf0f00000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xf1200000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xf1800000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xf1e00000) "")

	TEST_GROUP("Coprocessor instructions")

	TEST_UNSUPPORTED(__inst_thumb32(0xec000000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xeff00000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xfff00000) "")

	TEST_GROUP("Data-processing (plain binary immediate)")

	TEST_R("addw	r0,  r",1, VAL1,", #0x123")
	TEST(  "addw	r14, sp, #0xf5a")
	TEST(  "addw	sp, sp, #0x20")
	TEST(  "addw	r7,  pc, #0x888")
	TEST_UNSUPPORTED(__inst_thumb32(0xf20f1f20) "	@ addw pc, pc, #0x120")
	TEST_UNSUPPORTED(__inst_thumb32(0xf20d1f20) "	@ addw pc, sp, #0x120")
	TEST_UNSUPPORTED(__inst_thumb32(0xf20f1d20) "	@ addw sp, pc, #0x120")
	TEST_UNSUPPORTED(__inst_thumb32(0xf2001d20) "	@ addw sp, r0, #0x120")

	TEST_R("subw	r0,  r",1, VAL1,", #0x123")
	TEST(  "subw	r14, sp, #0xf5a")
	TEST(  "subw	sp, sp, #0x20")
	TEST(  "subw	r7,  pc, #0x888")
	TEST_UNSUPPORTED(__inst_thumb32(0xf2af1f20) "	@ subw pc, pc, #0x120")
	TEST_UNSUPPORTED(__inst_thumb32(0xf2ad1f20) "	@ subw pc, sp, #0x120")
	TEST_UNSUPPORTED(__inst_thumb32(0xf2af1d20) "	@ subw sp, pc, #0x120")
	TEST_UNSUPPORTED(__inst_thumb32(0xf2a01d20) "	@ subw sp, r0, #0x120")

	TEST("movw	r0, #0")
	TEST("movw	r0, #0xffff")
	TEST("movw	lr, #0xffff")
	TEST_UNSUPPORTED(__inst_thumb32(0xf2400d00) "	@ movw sp, #0")
	TEST_UNSUPPORTED(__inst_thumb32(0xf2400f00) "	@ movw pc, #0")

	TEST_R("movt	r",0, VAL1,", #0")
	TEST_R("movt	r",0, VAL2,", #0xffff")
	TEST_R("movt	r",14,VAL1,", #0xffff")
	TEST_UNSUPPORTED(__inst_thumb32(0xf2c00d00) "	@ movt sp, #0")
	TEST_UNSUPPORTED(__inst_thumb32(0xf2c00f00) "	@ movt pc, #0")

	TEST_R(     "ssat	r0, #24, r",0,   VAL1,"")
	TEST_R(     "ssat	r14, #24, r",12, VAL2,"")
	TEST_R(     "ssat	r0, #24, r",0,   VAL1,", lsl #8")
	TEST_R(     "ssat	r14, #24, r",12, VAL2,", asr #8")
	TEST_UNSUPPORTED(__inst_thumb32(0xf30c0d17) "	@ ssat	sp, #24, r12")
	TEST_UNSUPPORTED(__inst_thumb32(0xf30c0f17) "	@ ssat	pc, #24, r12")
	TEST_UNSUPPORTED(__inst_thumb32(0xf30d0c17) "	@ ssat	r12, #24, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xf30f0c17) "	@ ssat	r12, #24, pc")

	TEST_R(     "usat	r0, #24, r",0,   VAL1,"")
	TEST_R(     "usat	r14, #24, r",12, VAL2,"")
	TEST_R(     "usat	r0, #24, r",0,   VAL1,", lsl #8")
	TEST_R(     "usat	r14, #24, r",12, VAL2,", asr #8")
	TEST_UNSUPPORTED(__inst_thumb32(0xf38c0d17) "	@ usat	sp, #24, r12")
	TEST_UNSUPPORTED(__inst_thumb32(0xf38c0f17) "	@ usat	pc, #24, r12")
	TEST_UNSUPPORTED(__inst_thumb32(0xf38d0c17) "	@ usat	r12, #24, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xf38f0c17) "	@ usat	r12, #24, pc")

	TEST_R(     "ssat16	r0, #12, r",0,   HH1,"")
	TEST_R(     "ssat16	r14, #12, r",12, HH2,"")
	TEST_UNSUPPORTED(__inst_thumb32(0xf32c0d0b) "	@ ssat16	sp, #12, r12")
	TEST_UNSUPPORTED(__inst_thumb32(0xf32c0f0b) "	@ ssat16	pc, #12, r12")
	TEST_UNSUPPORTED(__inst_thumb32(0xf32d0c0b) "	@ ssat16	r12, #12, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xf32f0c0b) "	@ ssat16	r12, #12, pc")

	TEST_R(     "usat16	r0, #12, r",0,   HH1,"")
	TEST_R(     "usat16	r14, #12, r",12, HH2,"")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0d0b) "	@ usat16	sp, #12, r12")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0f0b) "	@ usat16	pc, #12, r12")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3ad0c0b) "	@ usat16	r12, #12, sp")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3af0c0b) "	@ usat16	r12, #12, pc")

	TEST_R(     "sbfx	r0, r",0  , VAL1,", #0, #31")
	TEST_R(     "sbfx	r14, r",12, VAL2,", #8, #16")
	TEST_R(     "sbfx	r4, r",10,  VAL1,", #16, #15")
	TEST_UNSUPPORTED(__inst_thumb32(0xf34c2d0f) "	@ sbfx	sp, r12, #8, #16")
	TEST_UNSUPPORTED(__inst_thumb32(0xf34c2f0f) "	@ sbfx	pc, r12, #8, #16")
	TEST_UNSUPPORTED(__inst_thumb32(0xf34d2c0f) "	@ sbfx	r12, sp, #8, #16")
	TEST_UNSUPPORTED(__inst_thumb32(0xf34f2c0f) "	@ sbfx	r12, pc, #8, #16")

	TEST_R(     "ubfx	r0, r",0  , VAL1,", #0, #31")
	TEST_R(     "ubfx	r14, r",12, VAL2,", #8, #16")
	TEST_R(     "ubfx	r4, r",10,  VAL1,", #16, #15")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2d0f) "	@ ubfx	sp, r12, #8, #16")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2f0f) "	@ ubfx	pc, r12, #8, #16")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3cd2c0f) "	@ ubfx	r12, sp, #8, #16")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3cf2c0f) "	@ ubfx	r12, pc, #8, #16")

	TEST_R(     "bfc	r",0, VAL1,", #4, #20")
	TEST_R(     "bfc	r",14,VAL2,", #4, #20")
	TEST_R(     "bfc	r",7, VAL1,", #0, #31")
	TEST_R(     "bfc	r",8, VAL2,", #0, #31")
	TEST_UNSUPPORTED(__inst_thumb32(0xf36f0d1e) "	@ bfc	sp, #0, #31")
	TEST_UNSUPPORTED(__inst_thumb32(0xf36f0f1e) "	@ bfc	pc, #0, #31")

	TEST_RR(    "bfi	r",0, VAL1,", r",0  , VAL2,", #0, #31")
	TEST_RR(    "bfi	r",12,VAL1,", r",14 , VAL2,", #4, #20")
	TEST_UNSUPPORTED(__inst_thumb32(0xf36e1d17) "	@ bfi	sp, r14, #4, #20")
	TEST_UNSUPPORTED(__inst_thumb32(0xf36e1f17) "	@ bfi	pc, r14, #4, #20")
	TEST_UNSUPPORTED(__inst_thumb32(0xf36d1e17) "	@ bfi	r14, sp, #4, #20")

	TEST_GROUP("Branches and miscellaneous control")

CONDITION_INSTRUCTIONS(22,
	TEST_BF("beq.w	2f")
	TEST_BB("bne.w	2b")
	TEST_BF("bgt.w	2f")
	TEST_BB("blt.w	2b")
	TEST_BF_X("bpl.w	2f", SPACE_0x1000)
)

	TEST_UNSUPPORTED("msr	cpsr, r0")
	TEST_UNSUPPORTED("msr	cpsr_f, r1")
	TEST_UNSUPPORTED("msr	spsr, r2")

	TEST_UNSUPPORTED("cpsie.w	i")
	TEST_UNSUPPORTED("cpsid.w	i")
	TEST_UNSUPPORTED("cps	0x13")

	TEST_SUPPORTED("yield.w")
	TEST("sev.w")
	TEST("nop.w")
	TEST("wfi.w")
	TEST_SUPPORTED("wfe.w")
	TEST_UNSUPPORTED("dbg.w	#0")

	TEST_UNSUPPORTED("clrex")
	TEST_UNSUPPORTED("dsb")
	TEST_UNSUPPORTED("dmb")
	TEST_UNSUPPORTED("isb")

	TEST_UNSUPPORTED("bxj	r0")

	TEST_UNSUPPORTED("subs	pc, lr, #4")

	TEST_RMASKED("mrs	r",0,~PSR_IGNORE_BITS,", cpsr")
	TEST_RMASKED("mrs	r",14,~PSR_IGNORE_BITS,", cpsr")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8d00) "	@ mrs	sp, spsr")
	TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8f00) "	@ mrs	pc, spsr")
	TEST_UNSUPPORTED("mrs	r0, spsr")
	TEST_UNSUPPORTED("mrs	lr, spsr")

	TEST_UNSUPPORTED(__inst_thumb32(0xf7f08000) " @ smc #0")

	TEST_UNSUPPORTED(__inst_thumb32(0xf7f0a000) " @ undefeined")

	TEST_BF(  "b.w	2f")
	TEST_BB(  "b.w	2b")
	TEST_BF_X("b.w	2f", SPACE_0x1000)

	TEST_BF(  "bl.w	2f")
	TEST_BB(  "bl.w	2b")
	TEST_BB_X("bl.w	2b", SPACE_0x1000)

	TEST_X(	"blx	__dummy_arm_subroutine",
		".arm				\n\t"
		".align				\n\t"
		".type __dummy_arm_subroutine, %%function \n\t"
		"__dummy_arm_subroutine:	\n\t"
		"mov	r0, pc			\n\t"
		"bx	lr			\n\t"
		".thumb				\n\t"
	)
	TEST(	"blx	__dummy_arm_subroutine")

	TEST_GROUP("Store single data item")

#define SINGLE_STORE(size)							\
	TEST_RP( "str"size"	r",0, VAL1,", [r",11,-1024,", #1024]")		\
	TEST_RP( "str"size"	r",14,VAL2,", [r",1, -1024,", #1080]")		\
	TEST_RP( "str"size"	r",0, VAL1,", [r",11,256,  ", #-120]")		\
	TEST_RP( "str"size"	r",14,VAL2,", [r",1, 256,  ", #-128]")		\
	TEST_RP( "str"size"	r",0, VAL1,", [r",11,24,  "], #120")		\
	TEST_RP( "str"size"	r",14,VAL2,", [r",1, 24,  "], #128")		\
	TEST_RP( "str"size"	r",0, VAL1,", [r",11,24,  "], #-120")		\
	TEST_RP( "str"size"	r",14,VAL2,", [r",1, 24,  "], #-128")		\
	TEST_RP( "str"size"	r",0, VAL1,", [r",11,24,   ", #120]!")		\
	TEST_RP( "str"size"	r",14,VAL2,", [r",1, 24,   ", #128]!")		\
	TEST_RP( "str"size"	r",0, VAL1,", [r",11,256,  ", #-120]!")		\
	TEST_RP( "str"size"	r",14,VAL2,", [r",1, 256,  ", #-128]!")		\
	TEST_RPR("str"size".w	r",0, VAL1,", [r",1, 0,", r",2, 4,"]")		\
	TEST_RPR("str"size"	r",14,VAL2,", [r",10,0,", r",11,4,", lsl #1]")	\
	TEST_UNSUPPORTED("str"size"	r0, [r13, r1]")				\
	TEST_R(  "str"size".w	r",7, VAL1,", [sp, #24]")			\
	TEST_RP( "str"size".w	r",0, VAL2,", [r",0,0, "]")			\
	TEST_RP( "str"size"	r",6, VAL1,", [r",13, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!") \
	TEST_UNSUPPORTED("str"size"	r6, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")			\
	TEST_RP( "str"size"	r",4, VAL2,", [r",12, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!") \
	TEST_UNSUPPORTED("str"size"t	r0, [r1, #4]")

	SINGLE_STORE("b")
	SINGLE_STORE("h")
	SINGLE_STORE("")

	TEST_UNSUPPORTED(__inst_thumb32(0xf801000d) "	@ strb	r0, [r1, r13]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf821000d) "	@ strh	r0, [r1, r13]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf841000d) "	@ str	r0, [r1, r13]")

	TEST("str	sp, [sp]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf8cfe000) "	@ str	r14, [pc]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf8cef000) "	@ str	pc, [r14]")

	TEST_GROUP("Advanced SIMD element or structure load/store instructions")

	TEST_UNSUPPORTED(__inst_thumb32(0xf9000000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xf92fffff) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xf9800000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xf9efffff) "")

	TEST_GROUP("Load single data item and memory hints")

#define SINGLE_LOAD(size)						\
	TEST_P( "ldr"size"	r0, [r",11,-1024, ", #1024]")		\
	TEST_P( "ldr"size"	r14, [r",1, -1024,", #1080]")		\
	TEST_P( "ldr"size"	r0, [r",11,256,   ", #-120]")		\
	TEST_P( "ldr"size"	r14, [r",1, 256,  ", #-128]")		\
	TEST_P( "ldr"size"	r0, [r",11,24,   "], #120")		\
	TEST_P( "ldr"size"	r14, [r",1, 24,  "], #128")		\
	TEST_P( "ldr"size"	r0, [r",11,24,   "], #-120")		\
	TEST_P( "ldr"size"	r14, [r",1,24,   "], #-128")		\
	TEST_P( "ldr"size"	r0, [r",11,24,    ", #120]!")		\
	TEST_P( "ldr"size"	r14, [r",1, 24,   ", #128]!")		\
	TEST_P( "ldr"size"	r0, [r",11,256,   ", #-120]!")		\
	TEST_P( "ldr"size"	r14, [r",1, 256,  ", #-128]!")		\
	TEST_PR("ldr"size".w	r0, [r",1, 0,", r",2, 4,"]")		\
	TEST_PR("ldr"size"	r14, [r",10,0,", r",11,4,", lsl #1]")	\
	TEST_X( "ldr"size".w	r0, 3f",				\
		".align 3				\n\t"		\
		"3:	.word	"__stringify(VAL1))			\
	TEST_X( "ldr"size".w	r14, 3f",				\
		".align 3				\n\t"		\
		"3:	.word	"__stringify(VAL2))			\
	TEST(   "ldr"size".w	r7, 3b")				\
	TEST(   "ldr"size".w	r7, [sp, #24]")				\
	TEST_P( "ldr"size".w	r0, [r",0,0, "]")			\
	TEST_UNSUPPORTED("ldr"size"t	r0, [r1, #4]")

	SINGLE_LOAD("b")
	SINGLE_LOAD("sb")
	SINGLE_LOAD("h")
	SINGLE_LOAD("sh")
	SINGLE_LOAD("")

	TEST_BF_P("ldr	pc, [r",14, 15*4,"]")
	TEST_P(   "ldr	sp, [r",14, 13*4,"]")
	TEST_BF_R("ldr	pc, [sp, r",14, 15*4,"]")
	TEST_R(   "ldr	sp, [sp, r",14, 13*4,"]")
	TEST_THUMB_TO_ARM_INTERWORK_P("ldr	pc, [r",0,0,", #15*4]")
	TEST_SUPPORTED("ldr	sp, 99f")
	TEST_SUPPORTED("ldr	pc, 99f")

	TEST_UNSUPPORTED(__inst_thumb32(0xf854700d) "	@ ldr	r7, [r4, sp]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf854700f) "	@ ldr	r7, [r4, pc]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf814700d) "	@ ldrb	r7, [r4, sp]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf814700f) "	@ ldrb	r7, [r4, pc]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf89fd004) "	@ ldrb	sp, 99f")
	TEST_UNSUPPORTED(__inst_thumb32(0xf814d008) "	@ ldrb	sp, [r4, r8]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf894d000) "	@ ldrb	sp, [r4]")

	TEST_UNSUPPORTED(__inst_thumb32(0xf8600000) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xf9ffffff) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xf9500000) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xf95fffff) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xf8000800) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xf97ffaff) "") /* Unallocated space */

	TEST(   "pli	[pc, #4]")
	TEST(   "pli	[pc, #-4]")
	TEST(   "pld	[pc, #4]")
	TEST(   "pld	[pc, #-4]")

	TEST_P( "pld	[r",0,-1024,", #1024]")
	TEST(   __inst_thumb32(0xf8b0f400) "	@ pldw	[r0, #1024]")
	TEST_P( "pli	[r",4, 0b,", #1024]")
	TEST_P( "pld	[r",7, 120,", #-120]")
	TEST(   __inst_thumb32(0xf837fc78) "	@ pldw	[r7, #-120]")
	TEST_P( "pli	[r",11,120,", #-120]")
	TEST(   "pld	[sp, #0]")

	TEST_PR("pld	[r",7, 24, ", r",0, 16,"]")
	TEST_PR("pld	[r",8, 24, ", r",12,16,", lsl #3]")
	TEST_SUPPORTED(__inst_thumb32(0xf837f000) "	@ pldw	[r7, r0]")
	TEST_SUPPORTED(__inst_thumb32(0xf838f03c) "	@ pldw	[r8, r12, lsl #3]");
	TEST_RR("pli	[r",12,0b,", r",0, 16,"]")
	TEST_RR("pli	[r",0, 0b,", r",12,16,", lsl #3]")
	TEST_R( "pld	[sp, r",1, 16,"]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf817f00d) "  @pld	[r7, sp]")
	TEST_UNSUPPORTED(__inst_thumb32(0xf817f00f) "  @pld	[r7, pc]")

	TEST_GROUP("Data-processing (register)")

#define SHIFTS32(op)					\
	TEST_RR(op"	r0,  r",1, VAL1,", r",2, 3, "")	\
	TEST_RR(op"	r14, r",12,VAL2,", r",11,10,"")

	SHIFTS32("lsl")
	SHIFTS32("lsls")
	SHIFTS32("lsr")
	SHIFTS32("lsrs")
	SHIFTS32("asr")
	SHIFTS32("asrs")
	SHIFTS32("ror")
	SHIFTS32("rors")

	TEST_UNSUPPORTED(__inst_thumb32(0xfa01ff02) "	@ lsl	pc, r1, r2")
	TEST_UNSUPPORTED(__inst_thumb32(0xfa01fd02) "	@ lsl	sp, r1, r2")
	TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff002) "	@ lsl	r0, pc, r2")
	TEST_UNSUPPORTED(__inst_thumb32(0xfa0df002) "	@ lsl	r0, sp, r2")
	TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00f) "	@ lsl	r0, r1, pc")
	TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00d) "	@ lsl	r0, r1, sp")

	TEST_RR(    "sxtah	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "sxtah	r14,r",12, HH2,", r",10,HH1,", ror #8")
	TEST_R(     "sxth	r8, r",7,  HH1,"")

	TEST_UNSUPPORTED(__inst_thumb32(0xfa0fff87) "	@ sxth	pc, r7");
	TEST_UNSUPPORTED(__inst_thumb32(0xfa0ffd87) "	@ sxth	sp, r7");
	TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88f) "	@ sxth	r8, pc");
	TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88d) "	@ sxth	r8, sp");

	TEST_RR(    "uxtah	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "uxtah	r14,r",12, HH2,", r",10,HH1,", ror #8")
	TEST_R(     "uxth	r8, r",7,  HH1,"")

	TEST_RR(    "sxtab16	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "sxtab16	r14,r",12, HH2,", r",10,HH1,", ror #8")
	TEST_R(     "sxtb16	r8, r",7,  HH1,"")

	TEST_RR(    "uxtab16	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "uxtab16	r14,r",12, HH2,", r",10,HH1,", ror #8")
	TEST_R(     "uxtb16	r8, r",7,  HH1,"")

	TEST_RR(    "sxtab	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "sxtab	r14,r",12, HH2,", r",10,HH1,", ror #8")
	TEST_R(     "sxtb	r8, r",7,  HH1,"")

	TEST_RR(    "uxtab	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "uxtab	r14,r",12, HH2,", r",10,HH1,", ror #8")
	TEST_R(     "uxtb	r8, r",7,  HH1,"")

	TEST_UNSUPPORTED(__inst_thumb32(0xfa6000f0) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xfa7fffff) "")

#define PARALLEL_ADD_SUB(op)					\
	TEST_RR(  op"add16	r0, r",0,  HH1,", r",1, HH2,"")	\
	TEST_RR(  op"add16	r14, r",12,HH2,", r",10,HH1,"")	\
	TEST_RR(  op"asx	r0, r",0,  HH1,", r",1, HH2,"")	\
	TEST_RR(  op"asx	r14, r",12,HH2,", r",10,HH1,"")	\
	TEST_RR(  op"sax	r0, r",0,  HH1,", r",1, HH2,"")	\
	TEST_RR(  op"sax	r14, r",12,HH2,", r",10,HH1,"")	\
	TEST_RR(  op"sub16	r0, r",0,  HH1,", r",1, HH2,"")	\
	TEST_RR(  op"sub16	r14, r",12,HH2,", r",10,HH1,"")	\
	TEST_RR(  op"add8	r0, r",0,  HH1,", r",1, HH2,"")	\
	TEST_RR(  op"add8	r14, r",12,HH2,", r",10,HH1,"")	\
	TEST_RR(  op"sub8	r0, r",0,  HH1,", r",1, HH2,"")	\
	TEST_RR(  op"sub8	r14, r",12,HH2,", r",10,HH1,"")

	TEST_GROUP("Parallel addition and subtraction, signed")

	PARALLEL_ADD_SUB("s")
	PARALLEL_ADD_SUB("q")
	PARALLEL_ADD_SUB("sh")

	TEST_GROUP("Parallel addition and subtraction, unsigned")

	PARALLEL_ADD_SUB("u")
	PARALLEL_ADD_SUB("uq")
	PARALLEL_ADD_SUB("uh")

	TEST_GROUP("Miscellaneous operations")

	TEST_RR("qadd	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR("qadd	lr, r",9, VAL2,", r",8, VAL1,"")
	TEST_RR("qsub	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR("qsub	lr, r",9, VAL2,", r",8, VAL1,"")
	TEST_RR("qdadd	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR("qdadd	lr, r",9, VAL2,", r",8, VAL1,"")
	TEST_RR("qdsub	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR("qdsub	lr, r",9, VAL2,", r",8, VAL1,"")

	TEST_R("rev.w	r0, r",0,   VAL1,"")
	TEST_R("rev	r14, r",12, VAL2,"")
	TEST_R("rev16.w	r0, r",0,   VAL1,"")
	TEST_R("rev16	r14, r",12, VAL2,"")
	TEST_R("rbit	r0, r",0,   VAL1,"")
	TEST_R("rbit	r14, r",12, VAL2,"")
	TEST_R("revsh.w	r0, r",0,   VAL1,"")
	TEST_R("revsh	r14, r",12, VAL2,"")

	TEST_UNSUPPORTED(__inst_thumb32(0xfa9cff8c) "	@ rev	pc, r12");
	TEST_UNSUPPORTED(__inst_thumb32(0xfa9cfd8c) "	@ rev	sp, r12");
	TEST_UNSUPPORTED(__inst_thumb32(0xfa9ffe8f) "	@ rev	r14, pc");
	TEST_UNSUPPORTED(__inst_thumb32(0xfa9dfe8d) "	@ rev	r14, sp");

	TEST_RR("sel	r0, r",0,  VAL1,", r",1, VAL2,"")
	TEST_RR("sel	r14, r",12,VAL1,", r",10, VAL2,"")

	TEST_R("clz	r0, r",0, 0x0,"")
	TEST_R("clz	r7, r",14,0x1,"")
	TEST_R("clz	lr, r",7, 0xffffffff,"")

	TEST_UNSUPPORTED(__inst_thumb32(0xfa80f030) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xfab0f000) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */

	TEST_GROUP("Multiply, multiply accumulate, and absolute difference operations")

	TEST_RR(    "mul	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR(    "mul	r7, r",8, VAL2,", r",9, VAL2,"")
	TEST_UNSUPPORTED(__inst_thumb32(0xfb08ff09) "	@ mul	pc, r8, r9")
	TEST_UNSUPPORTED(__inst_thumb32(0xfb08fd09) "	@ mul	sp, r8, r9")
	TEST_UNSUPPORTED(__inst_thumb32(0xfb0ff709) "	@ mul	r7, pc, r9")
	TEST_UNSUPPORTED(__inst_thumb32(0xfb0df709) "	@ mul	r7, sp, r9")
	TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70f) "	@ mul	r7, r8, pc")
	TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70d) "	@ mul	r7, r8, sp")

	TEST_RRR(   "mla	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
	TEST_RRR(   "mla	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
	TEST_UNSUPPORTED(__inst_thumb32(0xfb08af09) "	@ mla	pc, r8, r9, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb08ad09) "	@ mla	sp, r8, r9, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb0fa709) "	@ mla	r7, pc, r9, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb0da709) "	@ mla	r7, sp, r9, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70f) "	@ mla	r7, r8, pc, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70d) "	@ mla	r7, r8, sp, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb08d709) "	@ mla	r7, r8, r9, sp");

	TEST_RRR(   "mls	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
	TEST_RRR(   "mls	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")

	TEST_RRR(   "smlabb	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
	TEST_RRR(   "smlabb	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
	TEST_RRR(   "smlatb	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
	TEST_RRR(   "smlatb	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
	TEST_RRR(   "smlabt	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
	TEST_RRR(   "smlabt	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
	TEST_RRR(   "smlatt	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
	TEST_RRR(   "smlatt	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
	TEST_RR(    "smulbb	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR(    "smulbb	r7, r",8, VAL3,", r",9, VAL1,"")
	TEST_RR(    "smultb	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR(    "smultb	r7, r",8, VAL3,", r",9, VAL1,"")
	TEST_RR(    "smulbt	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR(    "smulbt	r7, r",8, VAL3,", r",9, VAL1,"")
	TEST_RR(    "smultt	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR(    "smultt	r7, r",8, VAL3,", r",9, VAL1,"")

	TEST_RRR(   "smlad	r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
	TEST_RRR(   "smlad	r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
	TEST_RRR(   "smladx	r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
	TEST_RRR(   "smladx	r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
	TEST_RR(    "smuad	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "smuad	r14, r",12,HH2,", r",10,HH1,"")
	TEST_RR(    "smuadx	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "smuadx	r14, r",12,HH2,", r",10,HH1,"")

	TEST_RRR(   "smlawb	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
	TEST_RRR(   "smlawb	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
	TEST_RRR(   "smlawt	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
	TEST_RRR(   "smlawt	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
	TEST_RR(    "smulwb	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR(    "smulwb	r7, r",8, VAL3,", r",9, VAL1,"")
	TEST_RR(    "smulwt	r0, r",1, VAL1,", r",2, VAL2,"")
	TEST_RR(    "smulwt	r7, r",8, VAL3,", r",9, VAL1,"")

	TEST_RRR(   "smlsd	r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
	TEST_RRR(   "smlsd	r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
	TEST_RRR(   "smlsdx	r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
	TEST_RRR(   "smlsdx	r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
	TEST_RR(    "smusd	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "smusd	r14, r",12,HH2,", r",10,HH1,"")
	TEST_RR(    "smusdx	r0, r",0,  HH1,", r",1, HH2,"")
	TEST_RR(    "smusdx	r14, r",12,HH2,", r",10,HH1,"")

	TEST_RRR(   "smmla	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
	TEST_RRR(   "smmla	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
	TEST_RRR(   "smmlar	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
	TEST_RRR(   "smmlar	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
	TEST_RR(    "smmul	r0, r",0,  VAL1,", r",1, VAL2,"")
	TEST_RR(    "smmul	r14, r",12,VAL2,", r",10,VAL1,"")
	TEST_RR(    "smmulr	r0, r",0,  VAL1,", r",1, VAL2,"")
	TEST_RR(    "smmulr	r14, r",12,VAL2,", r",10,VAL1,"")

	TEST_RRR(   "smmls	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
	TEST_RRR(   "smmls	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
	TEST_RRR(   "smmlsr	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
	TEST_RRR(   "smmlsr	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")

	TEST_RRR(   "usada8	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL3,"")
	TEST_RRR(   "usada8	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"")
	TEST_RR(    "usad8	r0, r",0,  VAL1,", r",1, VAL2,"")
	TEST_RR(    "usad8	r14, r",12,VAL2,", r",10,VAL1,"")

	TEST_UNSUPPORTED(__inst_thumb32(0xfb00f010) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xfb0fff1f) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xfb70f010) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xfb700010) "") /* Unallocated space */
	TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */

	TEST_GROUP("Long multiply, long multiply accumulate, and divide")

	TEST_RR(   "smull	r0, r1, r",2, VAL1,", r",3, VAL2,"")
	TEST_RR(   "smull	r7, r8, r",9, VAL2,", r",10, VAL1,"")
	TEST_UNSUPPORTED(__inst_thumb32(0xfb89f80a) "	@ smull	pc, r8, r9, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb89d80a) "	@ smull	sp, r8, r9, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb897f0a) "	@ smull	r7, pc, r9, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb897d0a) "	@ smull	r7, sp, r9, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb8f780a) "	@ smull	r7, r8, pc, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb8d780a) "	@ smull	r7, r8, sp, r10");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb89780f) "	@ smull	r7, r8, r9, pc");
	TEST_UNSUPPORTED(__inst_thumb32(0xfb89780d) "	@ smull	r7, r8, r9, sp");

	TEST_RR(   "umull	r0, r1, r",2, VAL1,", r",3, VAL2,"")
	TEST_RR(   "umull	r7, r8, r",9, VAL2,", r",10, VAL1,"")

	TEST_RRRR( "smlal	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
	TEST_RRRR( "smlal	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)

	TEST_RRRR( "smlalbb	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
	TEST_RRRR( "smlalbb	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
	TEST_RRRR( "smlalbt	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
	TEST_RRRR( "smlalbt	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
	TEST_RRRR( "smlaltb	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
	TEST_RRRR( "smlaltb	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
	TEST_RRRR( "smlaltt	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
	TEST_RRRR( "smlaltt	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)

	TEST_RRRR( "smlald	r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
	TEST_RRRR( "smlald	r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
	TEST_RRRR( "smlaldx	r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
	TEST_RRRR( "smlaldx	r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)

	TEST_RRRR( "smlsld	r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
	TEST_RRRR( "smlsld	r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
	TEST_RRRR( "smlsldx	r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
	TEST_RRRR( "smlsldx	r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)

	TEST_RRRR( "umlal	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
	TEST_RRRR( "umlal	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
	TEST_RRRR( "umaal	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
	TEST_RRRR( "umaal	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)

	TEST_GROUP("Coprocessor instructions")

	TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "")
	TEST_UNSUPPORTED(__inst_thumb32(0xffffffff) "")

	TEST_GROUP("Testing instructions in IT blocks")

	TEST_ITBLOCK("sub.w	r0, r0")

	verbose("\n");
}


code:
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_UPROBES)		+= core.o actions-arm.o

repo_name: angery/linux

path: arch/arm/probes/uprobes/Makefile


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Rabin Vincent <rabin at rab.in>
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/stddef.h>
#include <linux/wait.h>
#include <linux/uprobes.h>
#include <linux/module.h>

#include "../decode.h"
#include "../decode-arm.h"
#include "core.h"

static int uprobes_substitute_pc(unsigned long *pinsn, u32 oregs)
{
	probes_opcode_t insn = __mem_to_opcode_arm(*pinsn);
	probes_opcode_t temp;
	probes_opcode_t mask;
	int freereg;
	u32 free = 0xffff;
	u32 regs;

	for (regs = oregs; regs; regs >>= 4, insn >>= 4) {
		if ((regs & 0xf) == REG_TYPE_NONE)
			continue;

		free &= ~(1 << (insn & 0xf));
	}

	/* No PC, no problem */
	if (free & (1 << 15))
		return 15;

	if (!free)
		return -1;

	/*
	 * fls instead of ffs ensures that for "ldrd r0, r1, [pc]" we would
	 * pick LR instead of R1.
	 */
	freereg = free = fls(free) - 1;

	temp = __mem_to_opcode_arm(*pinsn);
	insn = temp;
	regs = oregs;
	mask = 0xf;

	for (; regs; regs >>= 4, mask <<= 4, free <<= 4, temp >>= 4) {
		if ((regs & 0xf) == REG_TYPE_NONE)
			continue;

		if ((temp & 0xf) != 15)
			continue;

		insn &= ~mask;
		insn |= free & mask;
	}

	*pinsn = __opcode_to_mem_arm(insn);
	return freereg;
}

static void uprobe_set_pc(struct arch_uprobe *auprobe,
			  struct arch_uprobe_task *autask,
			  struct pt_regs *regs)
{
	u32 pcreg = auprobe->pcreg;

	autask->backup = regs->uregs[pcreg];
	regs->uregs[pcreg] = regs->ARM_pc + 8;
}

static void uprobe_unset_pc(struct arch_uprobe *auprobe,
			    struct arch_uprobe_task *autask,
			    struct pt_regs *regs)
{
	/* PC will be taken care of by common code */
	regs->uregs[auprobe->pcreg] = autask->backup;
}

static void uprobe_aluwrite_pc(struct arch_uprobe *auprobe,
			       struct arch_uprobe_task *autask,
			       struct pt_regs *regs)
{
	u32 pcreg = auprobe->pcreg;

	alu_write_pc(regs->uregs[pcreg], regs);
	regs->uregs[pcreg] = autask->backup;
}

static void uprobe_write_pc(struct arch_uprobe *auprobe,
			    struct arch_uprobe_task *autask,
			    struct pt_regs *regs)
{
	u32 pcreg = auprobe->pcreg;

	load_write_pc(regs->uregs[pcreg], regs);
	regs->uregs[pcreg] = autask->backup;
}

enum probes_insn
decode_pc_ro(probes_opcode_t insn, struct arch_probes_insn *asi,
	     const struct decode_header *d)
{
	struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
						   asi);
	struct decode_emulate *decode = (struct decode_emulate *) d;
	u32 regs = decode->header.type_regs.bits >> DECODE_TYPE_BITS;
	int reg;

	reg = uprobes_substitute_pc(&auprobe->ixol[0], regs);
	if (reg == 15)
		return INSN_GOOD;

	if (reg == -1)
		return INSN_REJECTED;

	auprobe->pcreg = reg;
	auprobe->prehandler = uprobe_set_pc;
	auprobe->posthandler = uprobe_unset_pc;

	return INSN_GOOD;
}

enum probes_insn
decode_wb_pc(probes_opcode_t insn, struct arch_probes_insn *asi,
	     const struct decode_header *d, bool alu)
{
	struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
						   asi);
	enum probes_insn ret = decode_pc_ro(insn, asi, d);

	if (((insn >> 12) & 0xf) == 15)
		auprobe->posthandler = alu ? uprobe_aluwrite_pc
					   : uprobe_write_pc;

	return ret;
}

enum probes_insn
decode_rd12rn16rm0rs8_rwflags(probes_opcode_t insn,
			      struct arch_probes_insn *asi,
			      const struct decode_header *d)
{
	return decode_wb_pc(insn, asi, d, true);
}

enum probes_insn
decode_ldr(probes_opcode_t insn, struct arch_probes_insn *asi,
	   const struct decode_header *d)
{
	return decode_wb_pc(insn, asi, d, false);
}

enum probes_insn
uprobe_decode_ldmstm(probes_opcode_t insn,
		     struct arch_probes_insn *asi,
		     const struct decode_header *d)
{
	struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
						   asi);
	unsigned reglist = insn & 0xffff;
	int rn = (insn >> 16) & 0xf;
	int lbit = insn & (1 << 20);
	unsigned used = reglist | (1 << rn);

	if (rn == 15)
		return INSN_REJECTED;

	if (!(used & (1 << 15)))
		return INSN_GOOD;

	if (used & (1 << 14))
		return INSN_REJECTED;

	/* Use LR instead of PC */
	insn ^= 0xc000;

	auprobe->pcreg = 14;
	auprobe->ixol[0] = __opcode_to_mem_arm(insn);

	auprobe->prehandler = uprobe_set_pc;
	if (lbit)
		auprobe->posthandler = uprobe_write_pc;
	else
		auprobe->posthandler = uprobe_unset_pc;

	return INSN_GOOD;
}

const union decode_action uprobes_probes_actions[] = {
	[PROBES_PRELOAD_IMM] = {.handler = probes_simulate_nop},
	[PROBES_PRELOAD_REG] = {.handler = probes_simulate_nop},
	[PROBES_BRANCH_IMM] = {.handler = simulate_blx1},
	[PROBES_MRS] = {.handler = simulate_mrs},
	[PROBES_BRANCH_REG] = {.handler = simulate_blx2bx},
	[PROBES_CLZ] = {.handler = probes_simulate_nop},
	[PROBES_SATURATING_ARITHMETIC] = {.handler = probes_simulate_nop},
	[PROBES_MUL1] = {.handler = probes_simulate_nop},
	[PROBES_MUL2] = {.handler = probes_simulate_nop},
	[PROBES_SWP] = {.handler = probes_simulate_nop},
	[PROBES_LDRSTRD] = {.decoder = decode_pc_ro},
	[PROBES_LOAD_EXTRA] = {.decoder = decode_pc_ro},
	[PROBES_LOAD] = {.decoder = decode_ldr},
	[PROBES_STORE_EXTRA] = {.decoder = decode_pc_ro},
	[PROBES_STORE] = {.decoder = decode_pc_ro},
	[PROBES_MOV_IP_SP] = {.handler = simulate_mov_ipsp},
	[PROBES_DATA_PROCESSING_REG] = {
		.decoder = decode_rd12rn16rm0rs8_rwflags},
	[PROBES_DATA_PROCESSING_IMM] = {
		.decoder = decode_rd12rn16rm0rs8_rwflags},
	[PROBES_MOV_HALFWORD] = {.handler = probes_simulate_nop},
	[PROBES_SEV] = {.handler = probes_simulate_nop},
	[PROBES_WFE] = {.handler = probes_simulate_nop},
	[PROBES_SATURATE] = {.handler = probes_simulate_nop},
	[PROBES_REV] = {.handler = probes_simulate_nop},
	[PROBES_MMI] = {.handler = probes_simulate_nop},
	[PROBES_PACK] = {.handler = probes_simulate_nop},
	[PROBES_EXTEND] = {.handler = probes_simulate_nop},
	[PROBES_EXTEND_ADD] = {.handler = probes_simulate_nop},
	[PROBES_MUL_ADD_LONG] = {.handler = probes_simulate_nop},
	[PROBES_MUL_ADD] = {.handler = probes_simulate_nop},
	[PROBES_BITFIELD] = {.handler = probes_simulate_nop},
	[PROBES_BRANCH] = {.handler = simulate_bbl},
	[PROBES_LDMSTM] = {.decoder = uprobe_decode_ldmstm}
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Rabin Vincent <rabin at rab.in>
 */

#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/errno.h>
#include <linux/highmem.h>
#include <linux/sched.h>
#include <linux/uprobes.h>
#include <linux/notifier.h>

#include <asm/opcodes.h>
#include <asm/traps.h>

#include "../decode.h"
#include "../decode-arm.h"
#include "core.h"

#define UPROBE_TRAP_NR	UINT_MAX

bool is_swbp_insn(uprobe_opcode_t *insn)
{
	return (__mem_to_opcode_arm(*insn) & 0x0fffffff) ==
		(UPROBE_SWBP_ARM_INSN & 0x0fffffff);
}

int set_swbp(struct arch_uprobe *auprobe, struct mm_struct *mm,
	     unsigned long vaddr)
{
	return uprobe_write_opcode(auprobe, mm, vaddr,
		   __opcode_to_mem_arm(auprobe->bpinsn));
}

bool arch_uprobe_ignore(struct arch_uprobe *auprobe, struct pt_regs *regs)
{
	if (!auprobe->asi.insn_check_cc(regs->ARM_cpsr)) {
		regs->ARM_pc += 4;
		return true;
	}

	return false;
}

bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
{
	probes_opcode_t opcode;

	if (!auprobe->simulate)
		return false;

	opcode = __mem_to_opcode_arm(*(unsigned int *) auprobe->insn);

	auprobe->asi.insn_singlestep(opcode, &auprobe->asi, regs);

	return true;
}

unsigned long
arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr,
				  struct pt_regs *regs)
{
	unsigned long orig_ret_vaddr;

	orig_ret_vaddr = regs->ARM_lr;
	/* Replace the return addr with trampoline addr */
	regs->ARM_lr = trampoline_vaddr;
	return orig_ret_vaddr;
}

int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
			     unsigned long addr)
{
	unsigned int insn;
	unsigned int bpinsn;
	enum probes_insn ret;

	/* Thumb not yet support */
	if (addr & 0x3)
		return -EINVAL;

	insn = __mem_to_opcode_arm(*(unsigned int *)auprobe->insn);
	auprobe->ixol[0] = __opcode_to_mem_arm(insn);
	auprobe->ixol[1] = __opcode_to_mem_arm(UPROBE_SS_ARM_INSN);

	ret = arm_probes_decode_insn(insn, &auprobe->asi, false,
				     uprobes_probes_actions, NULL);
	switch (ret) {
	case INSN_REJECTED:
		return -EINVAL;

	case INSN_GOOD_NO_SLOT:
		auprobe->simulate = true;
		break;

	case INSN_GOOD:
	default:
		break;
	}

	bpinsn = UPROBE_SWBP_ARM_INSN & 0x0fffffff;
	if (insn >= 0xe0000000)
		bpinsn |= 0xe0000000;  /* Unconditional instruction */
	else
		bpinsn |= insn & 0xf0000000;  /* Copy condition from insn */

	auprobe->bpinsn = bpinsn;

	return 0;
}

void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
			   void *src, unsigned long len)
{
	void *xol_page_kaddr = kmap_atomic(page);
	void *dst = xol_page_kaddr + (vaddr & ~PAGE_MASK);

	preempt_disable();

	/* Initialize the slot */
	memcpy(dst, src, len);

	/* flush caches (dcache/icache) */
	flush_uprobe_xol_access(page, vaddr, dst, len);

	preempt_enable();

	kunmap_atomic(xol_page_kaddr);
}

int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
{
	struct uprobe_task *utask = current->utask;

	if (auprobe->prehandler)
		auprobe->prehandler(auprobe, &utask->autask, regs);

	utask->autask.saved_trap_no = current->thread.trap_no;
	current->thread.trap_no = UPROBE_TRAP_NR;
	regs->ARM_pc = utask->xol_vaddr;

	return 0;
}

int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
{
	struct uprobe_task *utask = current->utask;

	WARN_ON_ONCE(current->thread.trap_no != UPROBE_TRAP_NR);

	current->thread.trap_no = utask->autask.saved_trap_no;
	regs->ARM_pc = utask->vaddr + 4;

	if (auprobe->posthandler)
		auprobe->posthandler(auprobe, &utask->autask, regs);

	return 0;
}

bool arch_uprobe_xol_was_trapped(struct task_struct *t)
{
	if (t->thread.trap_no != UPROBE_TRAP_NR)
		return true;

	return false;
}

void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
{
	struct uprobe_task *utask = current->utask;

	current->thread.trap_no = utask->autask.saved_trap_no;
	instruction_pointer_set(regs, utask->vaddr);
}

int arch_uprobe_exception_notify(struct notifier_block *self,
				 unsigned long val, void *data)
{
	return NOTIFY_DONE;
}

static int uprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
{
	unsigned long flags;

	local_irq_save(flags);
	instr &= 0x0fffffff;
	if (instr == (UPROBE_SWBP_ARM_INSN & 0x0fffffff))
		uprobe_pre_sstep_notifier(regs);
	else if (instr == (UPROBE_SS_ARM_INSN & 0x0fffffff))
		uprobe_post_sstep_notifier(regs);
	local_irq_restore(flags);

	return 0;
}

unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
{
	return instruction_pointer(regs);
}

static struct undef_hook uprobes_arm_break_hook = {
	.instr_mask	= 0x0fffffff,
	.instr_val	= (UPROBE_SWBP_ARM_INSN & 0x0fffffff),
	.cpsr_mask	= (PSR_T_BIT | MODE_MASK),
	.cpsr_val	= USR_MODE,
	.fn		= uprobe_trap_handler,
};

static struct undef_hook uprobes_arm_ss_hook = {
	.instr_mask	= 0x0fffffff,
	.instr_val	= (UPROBE_SS_ARM_INSN & 0x0fffffff),
	.cpsr_mask	= (PSR_T_BIT | MODE_MASK),
	.cpsr_val	= USR_MODE,
	.fn		= uprobe_trap_handler,
};

static int arch_uprobes_init(void)
{
	register_undef_hook(&uprobes_arm_break_hook);
	register_undef_hook(&uprobes_arm_ss_hook);

	return 0;
}
device_initcall(arch_uprobes_init);


code:
/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2012 Rabin Vincent <rabin at rab.in>
 */

#ifndef __ARM_KERNEL_UPROBES_H
#define __ARM_KERNEL_UPROBES_H

enum probes_insn uprobe_decode_ldmstm(probes_opcode_t insn,
				      struct arch_probes_insn *asi,
				      const struct decode_header *d);

enum probes_insn decode_ldr(probes_opcode_t insn,
			    struct arch_probes_insn *asi,
			    const struct decode_header *d);

enum probes_insn
decode_rd12rn16rm0rs8_rwflags(probes_opcode_t insn,
			      struct arch_probes_insn *asi,
			      const struct decode_header *d);

enum probes_insn
decode_wb_pc(probes_opcode_t insn, struct arch_probes_insn *asi,
	     const struct decode_header *d, bool alu);

enum probes_insn
decode_pc_ro(probes_opcode_t insn, struct arch_probes_insn *asi,
	     const struct decode_header *d);

extern const union decode_action uprobes_probes_actions[];

#endif


code:
# SPDX-License-Identifier: GPL-2.0
#
# linux/arch/arm/tools/Makefile
#
# Copyright (C) 2001 Russell King
#

gen := arch/$(ARCH)/include/generated
kapi := $(gen)/asm
uapi := $(gen)/uapi/asm
syshdr := $(srctree)/scripts/syscallhdr.sh
sysnr := $(srctree)/$(src)/syscallnr.sh
systbl := $(srctree)/scripts/syscalltbl.sh
syscall := $(src)/syscall.tbl

gen-y := $(gen)/calls-oabi.S
gen-y += $(gen)/calls-eabi.S
kapi-hdrs-y := $(kapi)/unistd-nr.h
kapi-hdrs-y += $(kapi)/mach-types.h
uapi-hdrs-y += $(uapi)/unistd-oabi.h
uapi-hdrs-y += $(uapi)/unistd-eabi.h

targets += $(addprefix ../../../,$(gen-y) $(kapi-hdrs-y) $(uapi-hdrs-y))

PHONY += kapi uapi

kapi:	$(kapi-hdrs-y) $(gen-y)

uapi:	$(uapi-hdrs-y)

# Create output directory if not already present
$(shell mkdir -p $(kapi) $(uapi))

quiet_cmd_gen_mach = GEN     $@
      cmd_gen_mach = $(AWK) -f $(real-prereqs) > $@

$(kapi)/mach-types.h: $(src)/gen-mach-types $(src)/mach-types FORCE
	$(call if_changed,gen_mach)

quiet_cmd_syshdr = SYSHDR  $@
      cmd_syshdr = $(CONFIG_SHELL) $(syshdr) --abis common,$* \
		   --offset __NR_SYSCALL_BASE $< $@

quiet_cmd_systbl = SYSTBL  $@
      cmd_systbl = $(CONFIG_SHELL) $(systbl) --abis common,$* $< $@

quiet_cmd_sysnr  = SYSNR   $@
      cmd_sysnr  = $(CONFIG_SHELL) $(sysnr) $< $@

$(uapi)/unistd-%.h: $(syscall) $(syshdr) FORCE
	$(call if_changed,syshdr)

$(kapi)/unistd-nr.h: $(syscall) $(sysnr) FORCE
	$(call if_changed,sysnr)

$(gen)/calls-%.S: $(syscall) $(systbl) FORCE
	$(call if_changed,systbl)

path: arch/arm/tools/Makefile


code:
#!/bin/awk
# SPDX-License-Identifier: GPL-2.0
#
# Awk script to generate include/generated/mach-types.h
#
BEGIN	{ nr = 0 }
/^#/	{ next }
/^[ 	]*$/ { next }

NF == 4 {
	  machine_is[nr] = "machine_is_"$1;
	  config[nr] = "CONFIG_"$2;
	  mach_type[nr] = "MACH_TYPE_"$3;
	  num[nr] = $4; nr++
	}

NF == 3 {
	  machine_is[nr] = "machine_is_"$1;
	  config[nr] = "CONFIG_"$2;
	  mach_type[nr] = "MACH_TYPE_"$3;
	  num[nr] = ""; nr++
	}

END	{
	  printf("/*\n");
	  printf(" * This was automagically generated from %s!\n", FILENAME);
	  printf(" * Do NOT edit\n");
	  printf(" */\n\n");
	  printf("#ifndef __ASM_ARM_MACH_TYPE_H\n");
	  printf("#define __ASM_ARM_MACH_TYPE_H\n\n");
	  printf("#ifndef __ASSEMBLY__\n");
	  printf("/* The type of machine we're running on */\n");
	  printf("extern unsigned int __machine_arch_type;\n");
	  printf("#endif\n\n");

	  printf("/* see arch/arm/kernel/arch.c for a description of these */\n");
	  for (i = 0; i < nr; i++)
	    if (num[i] ~ /..*/)
	      printf("#define %-30s %d\n", mach_type[i], num[i]);

	  printf("\n");

	  for (i = 0; i < nr; i++)
	    if (num[i] ~ /..*/) {
	      printf("#ifdef %s\n", config[i]);
	      printf("# ifdef machine_arch_type\n");
	      printf("#  undef machine_arch_type\n");
	      printf("#  define machine_arch_type\t__machine_arch_type\n");
	      printf("# else\n");
	      printf("#  define machine_arch_type\t%s\n", mach_type[i]);
	      printf("# endif\n");
	      printf("# define %s()\t(machine_arch_type == %s)\n", machine_is[i], mach_type[i]);
	      printf("#else\n");
	      printf("# define %s()\t(0)\n", machine_is[i]);
	      printf("#endif\n\n");
	    }

	  printf("/*\n * These have not yet been registered\n */\n");
	  for (i = 0; i < nr; i++)
	    if (num[i] !~ /..*/)
	      printf("/* #define %-30s <<not registered>> */\n", mach_type[i]);

	  for (i = 0; i < nr; i++)
	    if (num[i] !~ /..*/) {
	      printf("#define %s()\t(0)\n", machine_is[i]);
	    }

	  printf("\n#ifndef machine_arch_type\n");
	  printf("#define machine_arch_type\t__machine_arch_type\n");
	  printf("#endif\n\n");
	  printf("#endif\n");
	}

path: arch/arm/tools/gen-mach-types


code:
# Database of machine macros and numbers
#
# This file is linux/arch/arm/tools/mach-types
#
# Up to date versions of this file can be obtained from:
#
#   http://www.arm.linux.org.uk/developer/machines/download.php
#
# Please do not send patches to this file; it is automatically generated!
# To add an entry into this database, please see Documentation/arm/arm.rst,
# or visit:
#
#   http://www.arm.linux.org.uk/developer/machines/?action=new
#
# This is a cut-down version of the file; it contains only machines that
# are merged into mainline or have been edited in the machine database
# within the last 12 months.  References to machine_is_NAME() do not count!
#
# Last update: Sun Oct 30 20:21:01 2016
#
# machine_is_xxx	CONFIG_xxxx		MACH_TYPE_xxx		number
#
ebsa110			ARCH_EBSA110		EBSA110			0
riscpc			ARCH_RPC		RISCPC			1
ebsa285			ARCH_EBSA285		EBSA285			4
netwinder		ARCH_NETWINDER		NETWINDER		5
cats			ARCH_CATS		CATS			6
shark			ARCH_SHARK		SHARK			15
brutus			SA1100_BRUTUS		BRUTUS			16
personal_server		ARCH_PERSONAL_SERVER	PERSONAL_SERVER		17
l7200			ARCH_L7200		L7200			19
pleb			SA1100_PLEB		PLEB			20
integrator		ARCH_INTEGRATOR		INTEGRATOR		21
h3600			SA1100_H3600		H3600			22
p720t			ARCH_P720T		P720T			24
assabet			SA1100_ASSABET		ASSABET			25
lart			SA1100_LART		LART			27
graphicsclient		SA1100_GRAPHICSCLIENT	GRAPHICSCLIENT		29
xp860			SA1100_XP860		XP860			30
cerf			SA1100_CERF		CERF			31
nanoengine		SA1100_NANOENGINE	NANOENGINE		32
jornada720		SA1100_JORNADA720	JORNADA720		48
edb7211			ARCH_EDB7211		EDB7211			50
pfs168			SA1100_PFS168		PFS168			52
flexanet		SA1100_FLEXANET		FLEXANET		54
simpad			SA1100_SIMPAD		SIMPAD			87
lubbock			ARCH_LUBBOCK		LUBBOCK			89
clep7212		ARCH_CLEP7212		CLEP7212		91
shannon			SA1100_SHANNON		SHANNON			97
consus			SA1100_CONSUS		CONSUS			105
aaed2000		ARCH_AAED2000		AAED2000		106
cdb89712		ARCH_CDB89712		CDB89712		107
graphicsmaster		SA1100_GRAPHICSMASTER	GRAPHICSMASTER		108
adsbitsy		SA1100_ADSBITSY		ADSBITSY		109
pxa_idp			ARCH_PXA_IDP		PXA_IDP			110
pt_system3		SA1100_PT_SYSTEM3	PT_SYSTEM3		112
autcpu12		ARCH_AUTCPU12		AUTCPU12		118
h3100			SA1100_H3100		H3100			136
collie			SA1100_COLLIE		COLLIE			146
badge4			SA1100_BADGE4		BADGE4			148
fortunet		ARCH_FORTUNET		FORTUNET		152
mx1ads			ARCH_MX1ADS		MX1ADS			160
h7201			ARCH_H7201		H7201			161
h7202			ARCH_H7202		H7202			162
iq80321			ARCH_IQ80321		IQ80321			169
ks8695			ARCH_KS8695		KS8695			180
smdk2410		ARCH_SMDK2410		SMDK2410		193
ceiva			ARCH_CEIVA		CEIVA			200
voiceblue		MACH_VOICEBLUE		VOICEBLUE		218
h5400			ARCH_H5400		H5400			220
omap_innovator		MACH_OMAP_INNOVATOR	OMAP_INNOVATOR		234
ixdp2400		ARCH_IXDP2400		IXDP2400		242
ixdp2800		ARCH_IXDP2800		IXDP2800		243
ixdp425			ARCH_IXDP425		IXDP425			245
hackkit			SA1100_HACKKIT		HACKKIT			254
ixcdp1100		ARCH_IXCDP1100		IXCDP1100		260
at91rm9200dk		ARCH_AT91RM9200DK	AT91RM9200DK		262
cintegrator		ARCH_CINTEGRATOR	CINTEGRATOR		275
viper			ARCH_VIPER		VIPER			283
adi_coyote		ARCH_ADI_COYOTE		ADI_COYOTE		290
ixdp2401		ARCH_IXDP2401		IXDP2401		299
ixdp2801		ARCH_IXDP2801		IXDP2801		300
iq31244			ARCH_IQ31244		IQ31244			327
bast			ARCH_BAST		BAST			331
h1940			ARCH_H1940		H1940			347
enp2611			ARCH_ENP2611		ENP2611			356
s3c2440			ARCH_S3C2440		S3C2440			362
gumstix			ARCH_GUMSTIX		GUMSTIX			373
omap_h2			MACH_OMAP_H2		OMAP_H2			382
e740			MACH_E740		E740			384
iq80331			ARCH_IQ80331		IQ80331			385
versatile_pb		ARCH_VERSATILE_PB	VERSATILE_PB		387
kev7a400		MACH_KEV7A400		KEV7A400		388
lpd7a400		MACH_LPD7A400		LPD7A400		389
lpd7a404		MACH_LPD7A404		LPD7A404		390
csb337			MACH_CSB337		CSB337			399
mainstone		MACH_MAINSTONE		MAINSTONE		406
lite300			MACH_LITE300		LITE300			408
xcep			MACH_XCEP		XCEP			413
arcom_vulcan		MACH_ARCOM_VULCAN	ARCOM_VULCAN		414
nomadik			MACH_NOMADIK		NOMADIK			420
corgi			MACH_CORGI		CORGI			423
poodle			MACH_POODLE		POODLE			424
armcore			MACH_ARMCORE		ARMCORE			438
mx31ads			MACH_MX31ADS		MX31ADS			447
himalaya		MACH_HIMALAYA		HIMALAYA		448
edb9312			MACH_EDB9312		EDB9312			451
omap_generic		MACH_OMAP_GENERIC	OMAP_GENERIC		452
edb9301			MACH_EDB9301		EDB9301			462
edb9315			MACH_EDB9315		EDB9315			463
vr1000			MACH_VR1000		VR1000			475
omap_perseus2		MACH_OMAP_PERSEUS2	OMAP_PERSEUS2		491
e800			MACH_E800		E800			496
e750			MACH_E750		E750			497
scb9328			MACH_SCB9328		SCB9328			508
omap_h3			MACH_OMAP_H3		OMAP_H3			509
omap_h4			MACH_OMAP_H4		OMAP_H4			510
omap_osk		MACH_OMAP_OSK		OMAP_OSK		515
tosa			MACH_TOSA		TOSA			520
avila			MACH_AVILA		AVILA			526
edb9302			MACH_EDB9302		EDB9302			538
husky			MACH_HUSKY		HUSKY			543
shepherd		MACH_SHEPHERD		SHEPHERD		545
h4700			MACH_H4700		H4700			562
rx3715			MACH_RX3715		RX3715			592
nslu2			MACH_NSLU2		NSLU2			597
e400			MACH_E400		E400			598
ixdpg425		MACH_IXDPG425		IXDPG425		604
versatile_ab		MACH_VERSATILE_AB	VERSATILE_AB		606
edb9307			MACH_EDB9307		EDB9307			607
kb9200			MACH_KB9200		KB9200			612
sx1			MACH_SX1		SX1			613
ixdp465			MACH_IXDP465		IXDP465			618
ixdp2351		MACH_IXDP2351		IXDP2351		619
cm4008			MACH_CM4008		CM4008			624
iq80332			MACH_IQ80332		IQ80332			629
gtwx5715		MACH_GTWX5715		GTWX5715		641
csb637			MACH_CSB637		CSB637			648
n30			MACH_N30		N30			656
nec_mp900		MACH_NEC_MP900		NEC_MP900		659
kafa			MACH_KAFA		KAFA			662
cm41xx			MACH_CM41XX		CM41XX			672
ts72xx			MACH_TS72XX		TS72XX			673
otom			MACH_OTOM		OTOM			680
nexcoder_2440		MACH_NEXCODER_2440	NEXCODER_2440		681
eco920			MACH_ECO920		ECO920			702
roadrunner		MACH_ROADRUNNER		ROADRUNNER		704
at91rm9200ek		MACH_AT91RM9200EK	AT91RM9200EK		705
spitz			MACH_SPITZ		SPITZ			713
adssphere		MACH_ADSSPHERE		ADSSPHERE		723
colibri			MACH_COLIBRI		COLIBRI			729
gateway7001		MACH_GATEWAY7001	GATEWAY7001		731
pcm027			MACH_PCM027		PCM027			732
anubis			MACH_ANUBIS		ANUBIS			734
akita			MACH_AKITA		AKITA			744
e330			MACH_E330		E330			753
nokia770		MACH_NOKIA770		NOKIA770		755
carmeva			MACH_CARMEVA		CARMEVA			769
edb9315a		MACH_EDB9315A		EDB9315A		772
stargate2		MACH_STARGATE2		STARGATE2		774
intelmote2		MACH_INTELMOTE2		INTELMOTE2		775
trizeps4		MACH_TRIZEPS4		TRIZEPS4		776
pnx4008			MACH_PNX4008		PNX4008			782
cpuat91			MACH_CPUAT91		CPUAT91			787
iq81340sc		MACH_IQ81340SC		IQ81340SC		799
iq81340mc		MACH_IQ81340MC		IQ81340MC		801
se4200			MACH_SE4200		SE4200			809
micro9			MACH_MICRO9		MICRO9			811
micro9l			MACH_MICRO9L		MICRO9L			812
omap_palmte		MACH_OMAP_PALMTE	OMAP_PALMTE		817
realview_eb		MACH_REALVIEW_EB	REALVIEW_EB		827
borzoi			MACH_BORZOI		BORZOI			831
palmld			MACH_PALMLD		PALMLD			835
ixdp28x5		MACH_IXDP28X5		IXDP28X5		838
omap_palmtt		MACH_OMAP_PALMTT	OMAP_PALMTT		839
arcom_zeus		MACH_ARCOM_ZEUS		ARCOM_ZEUS		841
osiris			MACH_OSIRIS		OSIRIS			842
palmte2			MACH_PALMTE2		PALMTE2			844
mx27ads			MACH_MX27ADS		MX27ADS			846
at91sam9261ek		MACH_AT91SAM9261EK	AT91SAM9261EK		848
loft			MACH_LOFT		LOFT			849
mx21ads			MACH_MX21ADS		MX21ADS			851
ams_delta		MACH_AMS_DELTA		AMS_DELTA		862
nas100d			MACH_NAS100D		NAS100D			865
magician		MACH_MAGICIAN		MAGICIAN		875
cm4002			MACH_CM4002		CM4002			876
nxdkn			MACH_NXDKN		NXDKN			880
palmtx			MACH_PALMTX		PALMTX			885
s3c2413			MACH_S3C2413		S3C2413			887
wg302v2			MACH_WG302V2		WG302V2			890
omap_2430sdp		MACH_OMAP_2430SDP	OMAP_2430SDP		900
davinci_evm		MACH_DAVINCI_EVM	DAVINCI_EVM		901
palmz72			MACH_PALMZ72		PALMZ72			904
nxdb500			MACH_NXDB500		NXDB500			905
apf9328			MACH_APF9328		APF9328			906
palmt5			MACH_PALMT5		PALMT5			917
palmtc			MACH_PALMTC		PALMTC			918
omap_apollon		MACH_OMAP_APOLLON	OMAP_APOLLON		919
ateb9200		MACH_ATEB9200		ATEB9200		923
n35			MACH_N35		N35			927
logicpd_pxa270		MACH_LOGICPD_PXA270	LOGICPD_PXA270		930
nxeb500hmi		MACH_NXEB500HMI		NXEB500HMI		941
espresso		MACH_ESPRESSO		ESPRESSO		949
rx1950			MACH_RX1950		RX1950			952
gesbc9312		MACH_GESBC9312		GESBC9312		958
picotux2xx		MACH_PICOTUX2XX		PICOTUX2XX		963
dsmg600			MACH_DSMG600		DSMG600			964
omap_fsample		MACH_OMAP_FSAMPLE	OMAP_FSAMPLE		970
snapper_cl15		MACH_SNAPPER_CL15	SNAPPER_CL15		986
omap_palmz71		MACH_OMAP_PALMZ71	OMAP_PALMZ71		993
smdk2412		MACH_SMDK2412		SMDK2412		1009
smdk2413		MACH_SMDK2413		SMDK2413		1022
aml_m5900		MACH_AML_M5900		AML_M5900		1024
balloon3		MACH_BALLOON3		BALLOON3		1029
ecbat91			MACH_ECBAT91		ECBAT91			1072
onearm			MACH_ONEARM		ONEARM			1075
smdk2443		MACH_SMDK2443		SMDK2443		1084
fsg			MACH_FSG		FSG			1091
at91sam9260ek		MACH_AT91SAM9260EK	AT91SAM9260EK		1099
glantank		MACH_GLANTANK		GLANTANK		1100
n2100			MACH_N2100		N2100			1101
im42xx			MACH_IM42XX		IM42XX			1105
qt2410			MACH_QT2410		QT2410			1108
kixrp435		MACH_KIXRP435		KIXRP435		1109
cc9p9360dev		MACH_CC9P9360DEV	CC9P9360DEV		1114
edb9302a		MACH_EDB9302A		EDB9302A		1127
edb9307a		MACH_EDB9307A		EDB9307A		1128
omap_3430sdp		MACH_OMAP_3430SDP	OMAP_3430SDP		1138
vstms			MACH_VSTMS		VSTMS			1140
micro9m			MACH_MICRO9M		MICRO9M			1169
bug			MACH_BUG		BUG			1179
at91sam9263ek		MACH_AT91SAM9263EK	AT91SAM9263EK		1202
em7210			MACH_EM7210		EM7210			1212
vpac270			MACH_VPAC270		VPAC270			1227
treo680			MACH_TREO680		TREO680			1230
zylonite		MACH_ZYLONITE		ZYLONITE		1233
mx31lite		MACH_MX31LITE		MX31LITE		1236
mioa701			MACH_MIOA701		MIOA701			1257
armadillo5x0		MACH_ARMADILLO5X0	ARMADILLO5X0		1260
cc9p9360js		MACH_CC9P9360JS		CC9P9360JS		1264
smdk6400		MACH_SMDK6400		SMDK6400		1270
nokia_n800		MACH_NOKIA_N800		NOKIA_N800		1271
ep80219			MACH_EP80219		EP80219			1281
goramo_mlr		MACH_GORAMO_MLR		GORAMO_MLR		1292
em_x270			MACH_EM_X270		EM_X270			1297
neo1973_gta02		MACH_NEO1973_GTA02	NEO1973_GTA02		1304
at91sam9rlek		MACH_AT91SAM9RLEK	AT91SAM9RLEK		1326
colibri320		MACH_COLIBRI320		COLIBRI320		1340
cam60			MACH_CAM60		CAM60			1351
at91eb01		MACH_AT91EB01		AT91EB01		1354
db88f5281		MACH_DB88F5281		DB88F5281		1358
csb726			MACH_CSB726		CSB726			1359
davinci_dm6467_evm	MACH_DAVINCI_DM6467_EVM	DAVINCI_DM6467_EVM	1380
davinci_dm355_evm	MACH_DAVINCI_DM355_EVM	DAVINCI_DM355_EVM	1381
littleton		MACH_LITTLETON		LITTLETON		1388
im4004			MACH_IM4004		IM4004			1400
realview_pb11mp		MACH_REALVIEW_PB11MP	REALVIEW_PB11MP		1407
mx27_3ds		MACH_MX27_3DS		MX27_3DS		1430
halibut			MACH_HALIBUT		HALIBUT			1439
trout			MACH_TROUT		TROUT			1440
tct_hammer		MACH_TCT_HAMMER		TCT_HAMMER		1460
herald			MACH_HERALD		HERALD			1461
sim_one			MACH_SIM_ONE		SIM_ONE			1476
jive			MACH_JIVE		JIVE			1490
sam9_l9260		MACH_SAM9_L9260		SAM9_L9260		1501
realview_pb1176		MACH_REALVIEW_PB1176	REALVIEW_PB1176		1504
yl9200			MACH_YL9200		YL9200			1507
rd88f5182		MACH_RD88F5182		RD88F5182		1508
kurobox_pro		MACH_KUROBOX_PRO	KUROBOX_PRO		1509
mx31_3ds		MACH_MX31_3DS		MX31_3DS		1511
qong			MACH_QONG		QONG			1524
omap2evm		MACH_OMAP2EVM		OMAP2EVM		1534
omap3evm		MACH_OMAP3EVM		OMAP3EVM		1535
dns323			MACH_DNS323		DNS323			1542
omap3_beagle		MACH_OMAP3_BEAGLE	OMAP3_BEAGLE		1546
nokia_n810		MACH_NOKIA_N810		NOKIA_N810		1548
pcm038			MACH_PCM038		PCM038			1551
sg310			MACH_SG310		SG310			1564
ts209			MACH_TS209		TS209			1565
at91cap9adk		MACH_AT91CAP9ADK	AT91CAP9ADK		1566
mx31moboard		MACH_MX31MOBOARD	MX31MOBOARD		1574
vision_ep9307		MACH_VISION_EP9307	VISION_EP9307		1578
terastation_pro2	MACH_TERASTATION_PRO2	TERASTATION_PRO2	1584
linkstation_pro		MACH_LINKSTATION_PRO	LINKSTATION_PRO		1585
e350			MACH_E350		E350			1596
ts409			MACH_TS409		TS409			1601
rsi_ews			MACH_RSI_EWS		RSI_EWS			1609
cm_x300			MACH_CM_X300		CM_X300			1616
at91sam9g20ek		MACH_AT91SAM9G20EK	AT91SAM9G20EK		1624
smdk6410		MACH_SMDK6410		SMDK6410		1626
u300			MACH_U300		U300			1627
wrt350n_v2		MACH_WRT350N_V2		WRT350N_V2		1633
omap_ldp		MACH_OMAP_LDP		OMAP_LDP		1639
mx35_3ds		MACH_MX35_3DS		MX35_3DS		1645
neuros_osd2		MACH_NEUROS_OSD2	NEUROS_OSD2		1647
trizeps4wl		MACH_TRIZEPS4WL		TRIZEPS4WL		1649
ts78xx			MACH_TS78XX		TS78XX			1652
sffsdr			MACH_SFFSDR		SFFSDR			1657
pcm037			MACH_PCM037		PCM037			1673
db88f6281_bp		MACH_DB88F6281_BP	DB88F6281_BP		1680
rd88f6192_nas		MACH_RD88F6192_NAS	RD88F6192_NAS		1681
rd88f6281		MACH_RD88F6281		RD88F6281		1682
db78x00_bp		MACH_DB78X00_BP		DB78X00_BP		1683
smdk2416		MACH_SMDK2416		SMDK2416		1685
wbd111			MACH_WBD111		WBD111			1690
mv2120			MACH_MV2120		MV2120			1693
mx51_3ds		MACH_MX51_3DS		MX51_3DS		1696
imx27lite		MACH_IMX27LITE		IMX27LITE		1701
usb_a9260		MACH_USB_A9260		USB_A9260		1709
usb_a9263		MACH_USB_A9263		USB_A9263		1710
qil_a9260		MACH_QIL_A9260		QIL_A9260		1711
kzm_arm11_01		MACH_KZM_ARM11_01	KZM_ARM11_01		1722
nokia_n810_wimax	MACH_NOKIA_N810_WIMAX	NOKIA_N810_WIMAX	1727
sapphire		MACH_SAPPHIRE		SAPPHIRE		1729
stmp37xx		MACH_STMP37XX		STMP37XX		1732
stmp378x		MACH_STMP378X		STMP378X		1733
ezx_a780		MACH_EZX_A780		EZX_A780		1740
ezx_e680		MACH_EZX_E680		EZX_E680		1741
ezx_a1200		MACH_EZX_A1200		EZX_A1200		1742
ezx_e6			MACH_EZX_E6		EZX_E6			1743
ezx_e2			MACH_EZX_E2		EZX_E2			1744
ezx_a910		MACH_EZX_A910		EZX_A910		1745
edmini_v2		MACH_EDMINI_V2		EDMINI_V2		1756
zipit2			MACH_ZIPIT2		ZIPIT2			1757
omap3_pandora		MACH_OMAP3_PANDORA	OMAP3_PANDORA		1761
mss2			MACH_MSS2		MSS2			1766
lb88rc8480		MACH_LB88RC8480		LB88RC8480		1769
mx25_3ds		MACH_MX25_3DS		MX25_3DS		1771
omap3530_lv_som		MACH_OMAP3530_LV_SOM	OMAP3530_LV_SOM		1773
davinci_da830_evm	MACH_DAVINCI_DA830_EVM	DAVINCI_DA830_EVM	1781
dove_db			MACH_DOVE_DB		DOVE_DB			1788
overo			MACH_OVERO		OVERO			1798
at2440evb		MACH_AT2440EVB		AT2440EVB		1799
neocore926		MACH_NEOCORE926		NEOCORE926		1800
wnr854t			MACH_WNR854T		WNR854T			1801
rd88f5181l_ge		MACH_RD88F5181L_GE	RD88F5181L_GE		1812
rd88f5181l_fxo		MACH_RD88F5181L_FXO	RD88F5181L_FXO		1818
stamp9g20		MACH_STAMP9G20		STAMP9G20		1824
smdkc100		MACH_SMDKC100		SMDKC100		1826
tavorevb		MACH_TAVOREVB		TAVOREVB		1827
saar			MACH_SAAR		SAAR			1828
at91sam9m10g45ek	MACH_AT91SAM9M10G45EK	AT91SAM9M10G45EK	1830
usb_a9g20		MACH_USB_A9G20		USB_A9G20		1841
mxlads			MACH_MXLADS		MXLADS			1851
linkstation_mini	MACH_LINKSTATION_MINI	LINKSTATION_MINI	1858
afeb9260		MACH_AFEB9260		AFEB9260		1859
imx27ipcam		MACH_IMX27IPCAM		IMX27IPCAM		1871
bk3			MACH_BK3		BK3			1880
rd88f6183ap_ge		MACH_RD88F6183AP_GE	RD88F6183AP_GE		1894
realview_pba8		MACH_REALVIEW_PBA8	REALVIEW_PBA8		1897
realview_pbx		MACH_REALVIEW_PBX	REALVIEW_PBX		1901
micro9s			MACH_MICRO9S		MICRO9S			1902
rut100			MACH_RUT100		RUT100			1908
g3evm			MACH_G3EVM		G3EVM			1919
w90p910evb		MACH_W90P910EVB		W90P910EVB		1921
w90p950evb		MACH_W90P950EVB		W90P950EVB		1923
w90n960evb		MACH_W90N960EVB		W90N960EVB		1924
mv88f6281gtw_ge		MACH_MV88F6281GTW_GE	MV88F6281GTW_GE		1932
ncp			MACH_NCP		NCP			1933
davinci_dm365_evm	MACH_DAVINCI_DM365_EVM	DAVINCI_DM365_EVM	1939
centro			MACH_CENTRO		CENTRO			1944
nokia_rx51		MACH_NOKIA_RX51		NOKIA_RX51		1955
omap_zoom2		MACH_OMAP_ZOOM2		OMAP_ZOOM2		1967
cpuat9260		MACH_CPUAT9260		CPUAT9260		1973
eukrea_cpuimx27		MACH_EUKREA_CPUIMX27	EUKREA_CPUIMX27		1975
acs5k			MACH_ACS5K		ACS5K			1982
snapper_9260		MACH_SNAPPER_9260	SNAPPER_9260		1987
dsm320			MACH_DSM320		DSM320			1988
exeda			MACH_EXEDA		EXEDA			1994
mini2440		MACH_MINI2440		MINI2440		1999
colibri300		MACH_COLIBRI300		COLIBRI300		2000
linkstation_ls_hgl	MACH_LINKSTATION_LS_HGL	LINKSTATION_LS_HGL	2005
cpuat9g20		MACH_CPUAT9G20		CPUAT9G20		2031
smdk6440		MACH_SMDK6440		SMDK6440		2032
nas4220b		MACH_NAS4220B		NAS4220B		2038
zylonite2		MACH_ZYLONITE2		ZYLONITE2		2042
aspenite		MACH_ASPENITE		ASPENITE		2043
ttc_dkb			MACH_TTC_DKB		TTC_DKB			2045
pcm043			MACH_PCM043		PCM043			2072
sheevaplug		MACH_SHEEVAPLUG		SHEEVAPLUG		2097
avengers_lite		MACH_AVENGERS_LITE	AVENGERS_LITE		2104
mx51_babbage		MACH_MX51_BABBAGE	MX51_BABBAGE		2125
rd78x00_masa		MACH_RD78X00_MASA	RD78X00_MASA		2135
dm355_leopard		MACH_DM355_LEOPARD	DM355_LEOPARD		2138
ts219			MACH_TS219		TS219			2139
pca100			MACH_PCA100		PCA100			2149
davinci_da850_evm	MACH_DAVINCI_DA850_EVM	DAVINCI_DA850_EVM	2157
at91sam9g10ek		MACH_AT91SAM9G10EK	AT91SAM9G10EK		2159
omap_4430sdp		MACH_OMAP_4430SDP	OMAP_4430SDP		2160
magx_zn5		MACH_MAGX_ZN5		MAGX_ZN5		2162
omap3_torpedo		MACH_OMAP3_TORPEDO	OMAP3_TORPEDO		2178
anw6410			MACH_ANW6410		ANW6410			2183
imx27_visstrim_m10	MACH_IMX27_VISSTRIM_M10	IMX27_VISSTRIM_M10	2187
portuxg20		MACH_PORTUXG20		PORTUXG20		2191
smdkc110		MACH_SMDKC110		SMDKC110		2193
omap3517evm		MACH_OMAP3517EVM	OMAP3517EVM		2200
netspace_v2		MACH_NETSPACE_V2	NETSPACE_V2		2201
netspace_max_v2		MACH_NETSPACE_MAX_V2	NETSPACE_MAX_V2		2202
d2net_v2		MACH_D2NET_V2		D2NET_V2		2203
net2big_v2		MACH_NET2BIG_V2		NET2BIG_V2		2204
net5big_v2		MACH_NET5BIG_V2		NET5BIG_V2		2206
inetspace_v2		MACH_INETSPACE_V2	INETSPACE_V2		2208
at91sam9g45ekes		MACH_AT91SAM9G45EKES	AT91SAM9G45EKES		2212
spear600		MACH_SPEAR600		SPEAR600		2236
spear300		MACH_SPEAR300		SPEAR300		2237
lilly1131		MACH_LILLY1131		LILLY1131		2239
hmt			MACH_HMT		HMT			2254
vexpress		MACH_VEXPRESS		VEXPRESS		2272
d2net			MACH_D2NET		D2NET			2282
bigdisk			MACH_BIGDISK		BIGDISK			2283
at91sam9g20ek_2mmc	MACH_AT91SAM9G20EK_2MMC	AT91SAM9G20EK_2MMC	2288
bcmring			MACH_BCMRING		BCMRING			2289
mahimahi		MACH_MAHIMAHI		MAHIMAHI		2304
smdk6442		MACH_SMDK6442		SMDK6442		2324
openrd_base		MACH_OPENRD_BASE	OPENRD_BASE		2325
devkit8000		MACH_DEVKIT8000		DEVKIT8000		2330
mx51_efikamx		MACH_MX51_EFIKAMX	MX51_EFIKAMX		2336
cm_t35			MACH_CM_T35		CM_T35			2341
net2big			MACH_NET2BIG		NET2BIG			2342
igep0020		MACH_IGEP0020		IGEP0020		2344
nuc932evb		MACH_NUC932EVB		NUC932EVB		2356
openrd_client		MACH_OPENRD_CLIENT	OPENRD_CLIENT		2361
u8500			MACH_U8500		U8500			2368
mx51_efikasb		MACH_MX51_EFIKASB	MX51_EFIKASB		2370
marvell_jasper		MACH_MARVELL_JASPER	MARVELL_JASPER		2382
flint			MACH_FLINT		FLINT			2383
tavorevb3		MACH_TAVOREVB3		TAVOREVB3		2384
touchbook		MACH_TOUCHBOOK		TOUCHBOOK		2393
raumfeld_rc		MACH_RAUMFELD_RC	RAUMFELD_RC		2413
raumfeld_connector	MACH_RAUMFELD_CONNECTOR	RAUMFELD_CONNECTOR	2414
raumfeld_speaker	MACH_RAUMFELD_SPEAKER	RAUMFELD_SPEAKER	2415
tnetv107x		MACH_TNETV107X		TNETV107X		2418
smdkv210		MACH_SMDKV210		SMDKV210		2456
omap_zoom3		MACH_OMAP_ZOOM3		OMAP_ZOOM3		2464
omap_3630sdp		MACH_OMAP_3630SDP	OMAP_3630SDP		2465
smartq7			MACH_SMARTQ7		SMARTQ7			2479
g4evm			MACH_G4EVM		G4EVM			2493
omapl138_hawkboard	MACH_OMAPL138_HAWKBOARD	OMAPL138_HAWKBOARD	2495
ts41x			MACH_TS41X		TS41X			2502
phy3250			MACH_PHY3250		PHY3250			2511
mini6410		MACH_MINI6410		MINI6410		2520
mx28evk			MACH_MX28EVK		MX28EVK			2531
smartq5			MACH_SMARTQ5		SMARTQ5			2534
davinci_dm6467tevm	MACH_DAVINCI_DM6467TEVM	DAVINCI_DM6467TEVM	2548
mxt_td60		MACH_MXT_TD60		MXT_TD60		2550
capc7117		MACH_CAPC7117		CAPC7117		2612
icontrol		MACH_ICONTROL		ICONTROL		2624
gplugd			MACH_GPLUGD		GPLUGD			2625
qsd8x50a_st1_5		MACH_QSD8X50A_ST1_5	QSD8X50A_ST1_5		2627
mx23evk			MACH_MX23EVK		MX23EVK			2629
ap4evb			MACH_AP4EVB		AP4EVB			2630
mityomapl138		MACH_MITYOMAPL138	MITYOMAPL138		2650
guruplug		MACH_GURUPLUG		GURUPLUG		2659
spear310		MACH_SPEAR310		SPEAR310		2660
spear320		MACH_SPEAR320		SPEAR320		2661
aquila			MACH_AQUILA		AQUILA			2676
esata_sheevaplug	MACH_ESATA_SHEEVAPLUG	ESATA_SHEEVAPLUG	2678
msm7x30_surf		MACH_MSM7X30_SURF	MSM7X30_SURF		2679
terastation_wxl		MACH_TERASTATION_WXL	TERASTATION_WXL		2697
msm7x25_surf		MACH_MSM7X25_SURF	MSM7X25_SURF		2703
msm7x25_ffa		MACH_MSM7X25_FFA	MSM7X25_FFA		2704
msm7x27_surf		MACH_MSM7X27_SURF	MSM7X27_SURF		2705
msm7x27_ffa		MACH_MSM7X27_FFA	MSM7X27_FFA		2706
msm7x30_ffa		MACH_MSM7X30_FFA	MSM7X30_FFA		2707
qsd8x50_surf		MACH_QSD8X50_SURF	QSD8X50_SURF		2708
mx53_evk		MACH_MX53_EVK		MX53_EVK		2716
igep0030		MACH_IGEP0030		IGEP0030		2717
sbc3530			MACH_SBC3530		SBC3530			2722
saarb			MACH_SAARB		SAARB			2727
harmony			MACH_HARMONY		HARMONY			2731
msm7x30_fluid		MACH_MSM7X30_FLUID	MSM7X30_FLUID		2741
cm_t3517		MACH_CM_T3517		CM_T3517		2750
wbd222			MACH_WBD222		WBD222			2753
msm8x60_surf		MACH_MSM8X60_SURF	MSM8X60_SURF		2755
msm8x60_sim		MACH_MSM8X60_SIM	MSM8X60_SIM		2756
tcc8000_sdk		MACH_TCC8000_SDK	TCC8000_SDK		2758
cns3420vb		MACH_CNS3420VB		CNS3420VB		2776
omap4_panda		MACH_OMAP4_PANDA	OMAP4_PANDA		2791
ti8168evm		MACH_TI8168EVM		TI8168EVM		2800
teton_bga		MACH_TETON_BGA		TETON_BGA		2816
eukrea_cpuimx25sd	MACH_EUKREA_CPUIMX25SD	EUKREA_CPUIMX25SD	2820
eukrea_cpuimx35sd	MACH_EUKREA_CPUIMX35SD	EUKREA_CPUIMX35SD	2821
eukrea_cpuimx51sd	MACH_EUKREA_CPUIMX51SD	EUKREA_CPUIMX51SD	2822
eukrea_cpuimx51		MACH_EUKREA_CPUIMX51	EUKREA_CPUIMX51		2823
smdkc210		MACH_SMDKC210		SMDKC210		2838
t5325			MACH_T5325		T5325			2846
income			MACH_INCOME		INCOME			2849
meson			MACH_MESON		MESON			2853
goni			MACH_GONI		GONI			2862
bv07			MACH_BV07		BV07			2882
openrd_ultimate		MACH_OPENRD_ULTIMATE	OPENRD_ULTIMATE		2884
devixp			MACH_DEVIXP		DEVIXP			2885
miccpt			MACH_MICCPT		MICCPT			2886
mic256			MACH_MIC256		MIC256			2887
u5500			MACH_U5500		U5500			2890
linkstation_lschl	MACH_LINKSTATION_LSCHL	LINKSTATION_LSCHL	2913
smdkv310		MACH_SMDKV310		SMDKV310		2925
wm8505_7in_netbook	MACH_WM8505_7IN_NETBOOK	WM8505_7IN_NETBOOK	2928
craneboard		MACH_CRANEBOARD		CRANEBOARD		2932
smdk6450		MACH_SMDK6450		SMDK6450		2938
brownstone		MACH_BROWNSTONE		BROWNSTONE		2957
flexibity		MACH_FLEXIBITY		FLEXIBITY		2965
mx50_rdp		MACH_MX50_RDP		MX50_RDP		2988
universal_c210		MACH_UNIVERSAL_C210	UNIVERSAL_C210		2989
real6410		MACH_REAL6410		REAL6410		2990
dockstar		MACH_DOCKSTAR		DOCKSTAR		2998
ti8148evm		MACH_TI8148EVM		TI8148EVM		3004
seaboard		MACH_SEABOARD		SEABOARD		3005
mx53_ard		MACH_MX53_ARD		MX53_ARD		3010
mx53_smd		MACH_MX53_SMD		MX53_SMD		3011
msm8x60_rumi3		MACH_MSM8X60_RUMI3	MSM8X60_RUMI3		3016
msm8x60_ffa		MACH_MSM8X60_FFA	MSM8X60_FFA		3017
cm_a510			MACH_CM_A510		CM_A510			3020
tx28			MACH_TX28		TX28			3043
pcontrol_g20		MACH_PCONTROL_G20	PCONTROL_G20		3062
vpr200			MACH_VPR200		VPR200			3087
torbreck		MACH_TORBRECK		TORBRECK		3090
prima2_evb		MACH_PRIMA2_EVB		PRIMA2_EVB		3103
paz00			MACH_PAZ00		PAZ00			3128
acmenetusfoxg20		MACH_ACMENETUSFOXG20	ACMENETUSFOXG20		3129
ag5evm			MACH_AG5EVM		AG5EVM			3189
wlf_cragg_6410		MACH_WLF_CRAGG_6410	WLF_CRAGG_6410		3207
trimslice		MACH_TRIMSLICE		TRIMSLICE		3209
mackerel		MACH_MACKEREL		MACKEREL		3211
kaen			MACH_KAEN		KAEN			3217
nokia_rm680		MACH_NOKIA_RM680	NOKIA_RM680		3220
msm8960_sim		MACH_MSM8960_SIM	MSM8960_SIM		3230
msm8960_rumi3		MACH_MSM8960_RUMI3	MSM8960_RUMI3		3231
gsia18s			MACH_GSIA18S		GSIA18S			3234
mx53_loco		MACH_MX53_LOCO		MX53_LOCO		3273
wario			MACH_WARIO		WARIO			3288
cm_t3730		MACH_CM_T3730		CM_T3730		3290
hrefv60			MACH_HREFV60		HREFV60			3293
armlex4210		MACH_ARMLEX4210		ARMLEX4210		3361
snowball		MACH_SNOWBALL		SNOWBALL		3363
xilinx_ep107		MACH_XILINX_EP107	XILINX_EP107		3378
nuri			MACH_NURI		NURI			3379
origen			MACH_ORIGEN		ORIGEN			3455
xarina			MACH_XARINA		XARINA			3476
nspire			MACH_NSPIRE		NSPIRE			3503
nokia_rm696		MACH_NOKIA_RM696	NOKIA_RM696		3522
m28evk			MACH_M28EVK		M28EVK			3613
kota2			MACH_KOTA2		KOTA2			3616
bonito			MACH_BONITO		BONITO			3623
smdk4212		MACH_SMDK4212		SMDK4212		3638
apx4devkit		MACH_APX4DEVKIT		APX4DEVKIT		3712
smdk4412		MACH_SMDK4412		SMDK4412		3765
marzen			MACH_MARZEN		MARZEN			3790
empc_a500		MACH_EMPC_A500		EMPC_A500		3848
u8520			MACH_U8520		U8520			3990
urt			MACH_URT		URT			4347
keystone		MACH_KEYSTONE		KEYSTONE		4390
ckb_rza1h		MACH_CKB_RZA1H		CKB_RZA1H		4780
bcm2835			MACH_BCM2835		BCM2835			4828
cm_3g			MACH_CM_3G		CM_3G			4943
empc_aimx6		MACH_EMPC_AIMX6		EMPC_AIMX6		4958
diyefis6410		MACH_DIYEFIS6410	DIYEFIS6410		5063
mx53_turing		MACH_MX53_TURING	MX53_TURING		5064
mx6dl_turing		MACH_MX6DL_TURING	MX6DL_TURING		5066
mx53_indash		MACH_MX53_INDASH	MX53_INDASH		5067
mx6q_indash		MACH_MX6Q_INDASH	MX6Q_INDASH		5068
mx6dl_indash		MACH_MX6DL_INDASH	MX6DL_INDASH		5069
rts_g6			MACH_RTS_G6		RTS_G6			5070
ka_titan		MACH_KA_TITAN		KA_TITAN		5071
cl_som_imx7		MACH_CL_SOM_IMX7	CL_SOM_IMX7		5072
vvdn_mgsi_vsis		MACH_VVDN_MGSI_VSIS	VVDN_MGSI_VSIS		5073
mx6q_nano		MACH_MX6Q_NANO		MX6Q_NANO		5074
pdu001			MACH_PDU001		PDU001			5075
cab_proyk		MACH_CAB_PROYK		CAB_PROYK		5076
klin			MACH_KLIN		KLIN			5077
enman_steuerbox		MACH_ENMAN_STEUERBOX	ENMAN_STEUERBOX		5078
ls_stingray		MACH_LS_STINGRAY	LS_STINGRAY		5079
ipdu			MACH_IPDU		IPDU			5080
linda			MACH_LINDA		LINDA			5081
mx6q_openrex		MACH_MX6Q_OPENREX	MX6Q_OPENREX		5082
on100			MACH_ON100		ON100			5083
eminds_rtu12		MACH_EMINDS_RTU12	EMINDS_RTU12		5084
eminds_avl10		MACH_EMINDS_AVL10	EMINDS_AVL10		5085
main_plc_lme		MACH_MAIN_PLC_LME	MAIN_PLC_LME		5086
mspx			MACH_MSPX		MSPX			5087
cgw_300			MACH_CGW_300		CGW_300			5088
mx7d_cicada		MACH_MX7D_CICADA	MX7D_CICADA		5089
virt2real_dm365		MACH_VIRT2REAL_DM365	VIRT2REAL_DM365		5090
dm365_virt2real		MACH_DM365_VIRT2REAL	DM365_VIRT2REAL		5091
h6073			MACH_H6073		H6073			5092
gtgateway		MACH_GTGATEWAY		GTGATEWAY		5093
xarina_standard		MACH_XARINA_STANDARD	XARINA_STANDARD		5094
novasoms		MACH_NOVASOMS		NOVASOMS		5095
novasomp		MACH_NOVASOMP		NOVASOMP		5096
novasomu		MACH_NOVASOMU		NOVASOMU		5097
mx6q_mpbd		MACH_MX6Q_MPBD		MX6Q_MPBD		5098
ncr_1930		MACH_NCR_1930		NCR_1930		5099
uap301			MACH_UAP301		UAP301			5100
urt02			MACH_URT02		URT02			5101
atc8			MACH_ATC8		ATC8			5102
iot_gateway		MACH_IOT_GATEWAY	IOT_GATEWAY		5103
hsm_phoenix		MACH_HSM_PHOENIX	HSM_PHOENIX		5104
missouri		MACH_MISSOURI		MISSOURI		5105
remarkable		MACH_REMARKABLE		REMARKABLE		5106
fa0113			MACH_FA0113		FA0113			5107
innova_statnettawm	MACH_INNOVA_STATNETTAWM	INNOVA_STATNETTAWM	5108

path: arch/arm/tools/mach-types