code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Marvell OpenRD Client Board Description
 *
 * Andrew Lunn <andrew@lunn.ch>
 *
 * This file contains the definitions that are specific to OpenRD
 * client variant of the Marvell Kirkwood Development Board.
 */

/dts-v1/;

#include "kirkwood-openrd.dtsi"

/ {
	model = "OpenRD Client";
	compatible = "marvell,openrd-client", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";

	ocp@f1000000 {
		audio-controller@a0000 {
			status = "okay";
		};
		i2c@11000 {
			status = "okay";
			clock-frequency = <400000>;

			cs42l51: cs42l51@4a {
				compatible = "cirrus,cs42l51";
				reg = <0x4a>;
				#sound-dai-cells = <0>;
			};
		};
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,mclk-fs = <256>;

		simple-audio-card,cpu {
			sound-dai = <&audio0 0>;
		};

		simple-audio-card,codec {
			sound-dai = <&cs42l51>;
		};
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@8 {
		reg = <8>;
	};
	ethphy1: ethernet-phy@24 {
		reg = <24>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};

&eth1 {
	status = "okay";
	ethernet1-port@0 {
		phy-handle = <&ethphy1>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Marvell OpenRD Ultimate Board Description
 *
 * Andrew Lunn <andrew@lunn.ch>
 *
 * This file contains the definitions that are specific to OpenRD
 * ultimate variant of the Marvell Kirkwood Development Board.
 */

/dts-v1/;

#include "kirkwood-openrd.dtsi"

/ {
	model = "OpenRD Ultimate";
	compatible = "marvell,openrd-ultimate", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";

	ocp@f1000000 {
		i2c@11000 {
			status = "okay";
			clock-frequency = <400000>;

			cs42l51: cs42l51@4a {
				compatible = "cirrus,cs42l51";
				reg = <0x4a>;
			};
		};
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};
	ethphy1: ethernet-phy@1 {
		reg = <1>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};

&eth1 {
	status = "okay";
	ethernet1-port@0 {
		phy-handle = <&ethphy1>;
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Marvell OpenRD (Base|Client|Ultimate) Board Description
 *
 * Andrew Lunn <andrew@lunn.ch>
 *
 * This file contains the definitions that are common between the three
 * variants of the Marvell Kirkwood Development Board.
 */

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>;
			pinctrl-names = "default";

			pmx_select28: pmx-select-rs232-rs485 {
				marvell,pins = "mpp28";
				marvell,function = "gpio";
			};
			pmx_sdio_cd: pmx-sdio-cd {
				marvell,pins = "mpp29";
				marvell,function = "gpio";
			};
			pmx_select34: pmx-select-uart-sd {
				marvell,pins = "mpp34";
				marvell,function = "gpio";
			};
		};
		serial@12000 {
			status = "okay";

		};
		sata@80000 {
			status = "okay";
			nr-ports = <2>;
		};
		mvsdio@90000 {
			status = "okay";
			cd-gpios = <&gpio0 29 9>;
		};
		gpio@10100 {
			p28 {
				gpio-hog;
				gpios = <28 GPIO_ACTIVE_HIGH>;
				/*
				 * SelRS232or485 selects between RS-232 or RS-485
				 * mode for the second UART.
				 *
				 * Low: RS-232
				 * High: RS-485
				 *
				 * To use the second UART, you need to change also
				 * the SelUARTorSD.
				 */
				output-low;
				line-name = "SelRS232or485";
			};
		};
		gpio@10140 {
			p2 {
				gpio-hog;
				gpios = <2 GPIO_ACTIVE_HIGH>;
				/*
				 * SelUARTorSD selects between the second UART
				 * (serial@12100) and SD (mvsdio@90000).
				 *
				 * Low: UART
				 * High: SD
				 *
				 * When changing this line make sure the newly
				 * selected device node is enabled and the
				 * previously selected device node is disabled.
				 */
				output-high; /* Select SD by default */
				line-name = "SelUARTorSD";
			};
		};
	};
};

&nand {
	status = "okay";
	pinctrl-0 = <&pmx_nand>;
	pinctrl-names = "default";

	partition@0 {
		label = "u-boot";
		reg = <0x0000000 0x100000>;
	};

	partition@100000 {
		label = "uImage";
		reg = <0x0100000 0x400000>;
	};

	partition@600000 {
		label = "root";
		reg = <0x0600000 0x1FA00000>;
	};
};

&pciec {
	status = "okay";
};

&pcie0 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * kirkwood-pogo_e02.dts - Device tree file for Pogoplug E02
 *
 * Copyright (C) 2015 Christoph Junghans <ottxor@gentoo.org>
 *
 * based on information of dts files from
 *  Arch Linux ARM by Oleg Rakhmanov <moonman.ca@gmail.com>
 *  OpenWrt by Felix Kaechele <heffer@fedoraproject.org>
 *
 */

/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"

/ {
	model = "Cloud Engines Pogoplug E02";
	compatible = "cloudengines,pogoe02", "marvell,kirkwood-88f6281",
		     "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x10000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	gpio-leds {
		compatible = "gpio-leds";

		health {
			label = "pogo_e02:green:health";
			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
			default-state = "keep";
		};
		fault {
			label = "pogo_e02:orange:fault";
			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_usb_power_enable>;
		pinctrl-names = "default";

		usb_power: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "USB Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
		};
	};
};

&pinctrl {
	pinctrl-0 = < &pmx_usb_power_enable &pmx_led_orange
		      &pmx_led_green >;
	pinctrl-names = "default";

	pmx_usb_power_enable: pmx-usb-power-enable {
		marvell,pins = "mpp29";
		marvell,function = "gpio";
	};

	pmx_led_green: pmx-led-green {
		marvell,pins = "mpp48";
		marvell,function = "gpio";
	};

	pmx_led_orange: pmx-led-orange {
		marvell,pins = "mpp49";
		marvell,function = "gpio";
	};
};

&uart0 {
	status = "okay";
};

&nand {
	chip-delay = <40>;
	status = "okay";

	partition@0 {
		label = "u-boot";
		reg = <0x0000000 0x100000>;
		read-only;
	};

	partition@100000 {
		label = "uImage";
		reg = <0x0100000 0x400000>;
	};

	partition@500000 {
		label = "pogoplug";
		reg = <0x0500000 0x2000000>;
	};

	partition@2500000 {
		label = "root";
		reg = <0x02500000 0x5b00000>;
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4
 * inspired by the board files made by Kevin Mihelich for ArchLinux,
 * and their DTS file.
 *
 * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
 */

/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6192.dtsi"
#include <dt-bindings/input/linux-event-codes.h>

/ {
	model = "Cloud Engines PogoPlug Series 4";
	compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
		     "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x08000000>;
	};

	chosen {
		stdout-path = "uart0:115200n8";
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_button_eject>;
		pinctrl-names = "default";

		eject {
			debounce-interval = <50>;
			wakeup-source;
			linux,code = <KEY_EJECTCD>;
			label = "Eject Button";
			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_led_green &pmx_led_red>;
		pinctrl-names = "default";

		health {
			label = "pogoplugv4:green:health";
			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};
		fault {
			label = "pogoplugv4:red:fault";
			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
		};
	};
};

&pinctrl {
	pmx_sata0: pmx-sata0 {
		marvell,pins = "mpp21";
		marvell,function = "sata0";
	};

	pmx_sata1: pmx-sata1 {
		marvell,pins = "mpp20";
		marvell,function = "sata1";
	};

	pmx_sdio_cd: pmx-sdio-cd {
		marvell,pins = "mpp27";
		marvell,function = "gpio";
	};

	pmx_sdio_wp: pmx-sdio-wp {
		marvell,pins = "mpp28";
		marvell,function = "gpio";
	};

	pmx_button_eject: pmx-button-eject {
		marvell,pins = "mpp29";
		marvell,function = "gpio";
	};

	pmx_led_green: pmx-led-green {
		marvell,pins = "mpp22";
		marvell,function = "gpio";
	};

	pmx_led_red: pmx-led-red {
		marvell,pins = "mpp24";
		marvell,function = "gpio";
	};
};

&uart0 {
	status = "okay";
};

/*
 * This PCIE controller has a USB 3.0 XHCI controller at 1,0
 */
&pciec {
	status = "okay";
};

&pcie0 {
	status = "okay";
};

&sata {
	status = "okay";
	pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
	pinctrl-names = "default";
	nr-ports = <1>;
};

&sdio {
	status = "okay";
	pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
	pinctrl-names = "default";
	cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
};

&nand {
	/* 128 MiB of NAND flash */
	chip-delay = <40>;
	status = "okay";
	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "u-boot";
			reg = <0x00000000 0x200000>;
			read-only;
		};

		partition@200000 {
			label = "uImage";
			reg = <0x00200000 0x300000>;
		};

		partition@500000 {
			label = "uImage2";
			reg = <0x00500000 0x300000>;
		};

		partition@800000 {
			label = "failsafe";
			reg = <0x00800000 0x800000>;
		};

		partition@1000000 {
			label = "root";
			reg = <0x01000000 0x7000000>;
		};
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Marvell RD88F6192 Board descrition
 *
 * Andrew Lunn <andrew@lunn.ch>
 *
 * This file contains the definitions that are common between the three
 * variants of the Marvell Kirkwood Development Board.
 */
/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6192.dtsi"

/ {
	model = "Marvell RD88F6192 reference design";
	compatible = "marvell,rd88f6192", "marvell,kirkwood-88f6192", "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			pinctrl-0 = <&pmx_usb_power>;
			pinctrl-names = "default";

			pmx_usb_power: pmx-usb-power {
				marvell,pins = "mpp10";
				marvell,function = "gpo";
			};
		};

		serial@12000 {
			status = "okay";

		};

		spi@10600 {
			status = "okay";

			m25p128@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "st,m25p128", "jedec,spi-nor";
				reg = <0>;
				spi-max-frequency = <20000000>;
				mode = <0>;
			};
		};

		sata@80000 {
			status = "okay";
			nr-ports = <2>;
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_usb_power>;
		pinctrl-names = "default";

		usb_power: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "USB VBUS";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
		};
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@8 {
		reg = <8>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};

&pciec {
	status = "okay";
};

&pcie0 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Marvell RD88F6181 A Board descrition
 *
 * Andrew Lunn <andrew@lunn.ch>
 *
 * This file contains the definitions for the board with the A0 or
 * higher stepping of the SoC. The ethernet switch does not have a
 * "wan" port.
 */

/dts-v1/;
#include "kirkwood-rd88f6281.dtsi"

/ {
	model = "Marvell RD88f6281 Reference design, with A0 or higher SoC";
	compatible = "marvell,rd88f6281-a", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";

};

&mdio {
	status = "okay";

	ethphy1: ethernet-phy@11 {
		 reg = <11>;
	};
};

&switch {
	reg = <10>;
};

&eth1 {
	status = "okay";

	ethernet1-port@0 {
		 phy-handle = <&ethphy1>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Marvell RD88F6181 Z0 stepping descrition
 *
 * Andrew Lunn <andrew@lunn.ch>
 *
 * This file contains the definitions for the board using the Z0
 * stepping of the SoC. The ethernet switch has a "wan" port.
*/

/dts-v1/;

#include "kirkwood-rd88f6281.dtsi"

/ {
	model = "Marvell RD88f6281 Reference design, with Z0 SoC";
	compatible = "marvell,rd88f6281-z0", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";

};

&eth1 {
	status = "disabled";
};

&switch {
	reg = <0>;

	ports {
		port@4 {
			reg = <4>;
			label = "wan";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Marvell RD88F6181 Common Board descrition
 *
 * Andrew Lunn <andrew@lunn.ch>
 *
 * This file contains the definitions that are common between the two
 * variants of the Marvell Kirkwood Development Board.
 */

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			pinctrl-names = "default";

			pmx_sdio_cd: pmx-sdio-cd {
				marvell,pins = "mpp28";
				marvell,function = "gpio";
			};
		};

		serial@12000 {
			status = "okay";

		};

		sata@80000 {
			status = "okay";
			nr-ports = <2>;
		};
		mvsdio@90000 {
			pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
			pinctrl-names = "default";
			status = "okay";
			cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
			/* No WP GPIO */
		};
	};
};

&nand {
	status = "okay";

	partition@0 {
		label = "u-boot";
		reg = <0x0000000 0x100000>;
		read-only;
	};

	partition@100000 {
		label = "uImage";
		reg = <0x0100000 0x200000>;
	};

	partition@300000 {
		label = "rootfs";
		reg = <0x0300000 0x500000>;
	};
};

&mdio {
	status = "okay";

	switch: switch@0 {
		compatible = "marvell,mv88e6085";
		#address-cells = <1>;
		#size-cells = <0>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				label = "lan1";
			};

			port@1 {
				reg = <1>;
				label = "lan2";
			};

			port@2 {
				reg = <2>;
				label = "lan3";
			};

			port@3 {
				reg = <3>;
				label = "lan4";
			};

			port@5 {
				reg = <5>;
				label = "cpu";
				ethernet = <&eth0port>;
				fixed-link {
					speed = <1000>;
					full-duplex;
				};
			};

		};
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		speed = <1000>;
		duplex = <1>;
	};
};

&pciec {
	status = "okay";
};

&pcie0 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Andrew Lunn <andrew@lunn.ch>
 * Ben Peddell <klightspeed@killerwolves.net>
 *
 */

/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6282.dtsi"
#include "kirkwood-synology.dtsi"

/ {
	model = "Synology RS212";
	compatible = "synology,rs212", "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x8000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	gpio-fan-100-15-35-3 {
		status = "okay";
	};

	gpio-leds-hdd-38 {
		status = "okay";
	};

	regulators-hdd-30-2 {
		status = "okay";
	};
};

&s35390a {
	status = "okay";
};

&pciec {
	status = "okay";
};

&pcie1 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Andrew Lunn <andrew@lunn.ch>
 * Ben Peddell <klightspeed@killerwolves.net>
 *
 */

/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"
#include "kirkwood-synology.dtsi"

/ {
	model = "Synology RS409";
	compatible = "synology,rs409", "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x8000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	gpio-fan-150-15-18 {
		status = "okay";
	};

	gpio-leds-hdd-36 {
		status = "okay";
	};
};

&eth1 {
	status = "okay";
};

&rs5c372 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Andrew Lunn <andrew@lunn.ch>
 * Ben Peddell <klightspeed@killerwolves.net>
 *
 */

/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6282.dtsi"
#include "kirkwood-synology.dtsi"

/ {
	model = "Synology RS411 RS812";
	compatible = "synology,rs411", "synology,rs812", "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x8000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	gpio-fan-100-15-35-3 {
		status = "okay";
	};

	gpio-leds-hdd-36 {
		status = "okay";
	};
};

&eth1 {
	status = "okay";
};

&s35390a {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * kirkwood-sheevaplug-common.dtsi - Common parts for Sheevaplugs
 *
 * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
 */

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8 earlyprintk";
		stdout-path = &uart0;
	};

	ocp@f1000000 {
		pinctrl: pin-controller@10000 {

			pmx_usb_power_enable: pmx-usb-power-enable {
				marvell,pins = "mpp29";
				marvell,function = "gpio";
			};
			pmx_led_red: pmx-led-red {
				marvell,pins = "mpp46";
				marvell,function = "gpio";
			};
			pmx_led_blue: pmx-led-blue {
				marvell,pins = "mpp49";
				marvell,function = "gpio";
			};
			pmx_sdio_cd: pmx-sdio-cd {
				marvell,pins = "mpp44";
				marvell,function = "gpio";
			};
			pmx_sdio_wp: pmx-sdio-wp {
				marvell,pins = "mpp47";
				marvell,function = "gpio";
			};
		};
		serial@12000 {
			status = "okay";
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_usb_power_enable>;
		pinctrl-names = "default";

		usb_power: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "USB Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio0 29 0>;
		};
	};
};

&nand {
	status = "okay";

	partition@0 {
		label = "u-boot";
		reg = <0x0000000 0x100000>;
	};

	partition@100000 {
		label = "uImage";
		reg = <0x0100000 0x400000>;
	};

	partition@500000 {
		label = "root";
		reg = <0x0500000 0x1fb00000>;
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * kirkwood-sheevaplug-esata.dts - Device tree file for eSATA Sheevaplug
 *
 * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
 */

/dts-v1/;

#include "kirkwood-sheevaplug-common.dtsi"

/ {
	model = "Globalscale Technologies eSATA SheevaPlug";
	compatible = "globalscale,sheevaplug-esata-rev13", "globalscale,sheevaplug-esata", "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";

	ocp@f1000000 {
		sata@80000 {
			status = "okay";
			nr-ports = <2>;
		};

		mvsdio@90000 {
			pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
			pinctrl-names = "default";
			status = "okay";
			cd-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
			wp-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_led_blue>;
		pinctrl-names = "default";

		health {
			label = "sheevaplug:blue:health";
			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
			default-state = "keep";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * kirkwood-sheevaplug.dts - Device tree file for Sheevaplug
 *
 * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
 */

/dts-v1/;

#include "kirkwood-sheevaplug-common.dtsi"

/ {
	model = "Globalscale Technologies SheevaPlug";
	compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";

	ocp@f1000000 {
		mvsdio@90000 {
			pinctrl-0 = <&pmx_sdio>;
			pinctrl-names = "default";
			status = "okay";
			/* No CD or WP GPIOs */
			broken-cd;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_led_blue &pmx_led_red>;
		pinctrl-names = "default";

		health {
			label = "sheevaplug:blue:health";
			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
			default-state = "keep";
		};

		misc {
			label = "sheevaplug:red:misc";
			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Nodes for Marvell 628x Synology devices
 *
 * Andrew Lunn <andrew@lunn.ch>
 * Ben Peddell <klightspeed@killerwolves.net>
 *
 */

/ {
	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			pmx_alarmled_12: pmx-alarmled-12 {
				marvell,pins = "mpp12";
				marvell,function = "gpio";
			};

			pmx_fanctrl_15: pmx-fanctrl-15 {
				marvell,pins = "mpp15";
				marvell,function = "gpio";
			};

			pmx_fanctrl_16: pmx-fanctrl-16 {
				marvell,pins = "mpp16";
				marvell,function = "gpio";
			};

			pmx_fanctrl_17: pmx-fanctrl-17 {
				marvell,pins = "mpp17";
				marvell,function = "gpio";
			};

			pmx_fanalarm_18: pmx-fanalarm-18 {
				marvell,pins = "mpp18";
				marvell,function = "gpo";
			};

			pmx_hddled_20: pmx-hddled-20 {
				marvell,pins = "mpp20";
				marvell,function = "gpio";
			};

			pmx_hddled_21: pmx-hddled-21 {
				marvell,pins = "mpp21";
				marvell,function = "gpio";
			};

			pmx_hddled_22: pmx-hddled-22 {
				marvell,pins = "mpp22";
				marvell,function = "gpio";
			};

			pmx_hddled_23: pmx-hddled-23 {
				marvell,pins = "mpp23";
				marvell,function = "gpio";
			};

			pmx_hddled_24: pmx-hddled-24 {
				marvell,pins = "mpp24";
				marvell,function = "gpio";
			};

			pmx_hddled_25: pmx-hddled-25 {
				marvell,pins = "mpp25";
				marvell,function = "gpio";
			};

			pmx_hddled_26: pmx-hddled-26 {
				marvell,pins = "mpp26";
				marvell,function = "gpio";
			};

			pmx_hddled_27: pmx-hddled-27 {
				marvell,pins = "mpp27";
				marvell,function = "gpio";
			};

			pmx_hddled_28: pmx-hddled-28 {
				marvell,pins = "mpp28";
				marvell,function = "gpio";
			};

			pmx_hdd1_pwr_29: pmx-hdd1-pwr-29 {
				marvell,pins = "mpp29";
				marvell,function = "gpio";
			};

			pmx_hdd1_pwr_30: pmx-hdd-pwr-30 {
				marvell,pins = "mpp30";
				marvell,function = "gpio";
			};

			pmx_hdd2_pwr_31: pmx-hdd2-pwr-31 {
				marvell,pins = "mpp31";
				marvell,function = "gpio";
			};

			pmx_fanctrl_32: pmx-fanctrl-32 {
				marvell,pins = "mpp32";
				marvell,function = "gpio";
			};

			pmx_fanctrl_33: pmx-fanctrl-33 {
				marvell,pins = "mpp33";
				marvell,function = "gpo";
			};

			pmx_fanctrl_34: pmx-fanctrl-34 {
				marvell,pins = "mpp34";
				marvell,function = "gpio";
			};

			pmx_hdd2_pwr_34: pmx-hdd2-pwr-34 {
				marvell,pins = "mpp34";
				marvell,function = "gpio";
			};

			pmx_fanalarm_35: pmx-fanalarm-35 {
				marvell,pins = "mpp35";
				marvell,function = "gpio";
			};

			pmx_hddled_36: pmx-hddled-36 {
				marvell,pins = "mpp36";
				marvell,function = "gpio";
			};

			pmx_hddled_37: pmx-hddled-37 {
				marvell,pins = "mpp37";
				marvell,function = "gpio";
			};

			pmx_hddled_38: pmx-hddled-38 {
				marvell,pins = "mpp38";
				marvell,function = "gpio";
			};

			pmx_hddled_39: pmx-hddled-39 {
				marvell,pins = "mpp39";
				marvell,function = "gpio";
			};

			pmx_hddled_40: pmx-hddled-40 {
				marvell,pins = "mpp40";
				marvell,function = "gpio";
			};

			pmx_hddled_41: pmx-hddled-41 {
				marvell,pins = "mpp41";
				marvell,function = "gpio";
			};

			pmx_hddled_42: pmx-hddled-42 {
				marvell,pins = "mpp42";
				marvell,function = "gpio";
			};

			pmx_hddled_43: pmx-hddled-43 {
				marvell,pins = "mpp43";
				marvell,function = "gpio";
			};

			pmx_hddled_44: pmx-hddled-44 {
				marvell,pins = "mpp44";
				marvell,function = "gpio";
			};

			pmx_hddled_45: pmx-hddled-45 {
				marvell,pins = "mpp45";
				marvell,function = "gpio";
			};

			pmx_hdd3_pwr_44: pmx-hdd3-pwr-44 {
				marvell,pins = "mpp44";
				marvell,function = "gpio";
			};

			pmx_hdd4_pwr_45: pmx-hdd4-pwr-45 {
				marvell,pins = "mpp45";
				marvell,function = "gpio";
			};

			pmx_fanalarm_44: pmx-fanalarm-44 {
				marvell,pins = "mpp44";
				marvell,function = "gpio";
			};

			pmx_fanalarm_45: pmx-fanalarm-45 {
				marvell,pins = "mpp45";
				marvell,function = "gpio";
			};
		};

		rtc@10300 {
			status = "disabled";
		};

		spi@10600 {
			status = "okay";

			flash@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "st,m25p80", "jedec,spi-nor";
				reg = <0>;
				spi-max-frequency = <20000000>;
				mode = <0>;

				partition@0 {
					reg = <0x00000000 0x00080000>;
					label = "RedBoot";
				};

				partition@80000 {
					reg = <0x00080000 0x00200000>;
					label = "zImage";
				};

				partition@280000 {
					reg = <0x00280000 0x00140000>;
					label = "rd.gz";
				};

				partition@3c0000 {
					reg = <0x003c0000 0x00010000>;
					label = "vendor";
				};

				partition@3d0000 {
					reg = <0x003d0000 0x00020000>;
					label = "RedBoot config";
				};

				partition@3f0000 {
					reg = <0x003f0000 0x00010000>;
					label = "FIS directory";
				};
			};
		};

		i2c@11000 {
			status = "okay";
			clock-frequency = <400000>;

			rs5c372: rs5c372@32 {
				status = "disabled";
				compatible = "ricoh,rs5c372a";
				reg = <0x32>;
			};

			s35390a: s35390a@30 {
				status = "disabled";
				compatible = "sii,s35390a";
				reg = <0x30>;
			};
		};

		serial@12000 {
			status = "okay";
		};

		serial@12100 {
			status = "okay";
		};

		poweroff@12100 {
			compatible = "synology,power-off";
			reg = <0x12100 0x100>;
			clocks = <&gate_clk 7>;
		};

		sata@80000 {
			pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
			pinctrl-names = "default";
			status = "okay";
			nr-ports = <2>;
		};
	};

	gpio-fan-150-32-35 {
		status = "disabled";
		compatible = "gpio-fan";
		pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34
		             &pmx_fanalarm_35>;
		pinctrl-names = "default";
		gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
			 &gpio1 1 GPIO_ACTIVE_HIGH
			 &gpio1 2 GPIO_ACTIVE_HIGH>;
		gpio-fan,speed-map = <    0 0
				       2200 1
				       2500 2
				       3000 4
				       3300 3
				       3700 5
				       3800 6
				       4200 7 >;
	};

	gpio-fan-150-15-18 {
		status = "disabled";
		compatible = "gpio-fan";
		pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
		             &pmx_fanalarm_18>;
		pinctrl-names = "default";
		gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
			 &gpio0 16 GPIO_ACTIVE_HIGH
			 &gpio0 17 GPIO_ACTIVE_HIGH>;
		alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
		gpio-fan,speed-map = <    0 0
				       2200 1
				       2500 2
				       3000 4
				       3300 3
				       3700 5
				       3800 6
				       4200 7 >;
	};

	gpio-fan-100-32-35 {
		status = "disabled";
		compatible = "gpio-fan";
		pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34
		             &pmx_fanalarm_35>;
		pinctrl-names = "default";
		gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
			 &gpio1 1 GPIO_ACTIVE_HIGH
			 &gpio1 2 GPIO_ACTIVE_HIGH>;
		alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
		gpio-fan,speed-map = <    0 0
				       2500 1
				       3100 2
				       3800 3
				       4600 4
				       4800 5
				       4900 6
				       5000 7 >;
	};

	gpio-fan-100-15-18 {
		status = "disabled";
		compatible = "gpio-fan";
		pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
		             &pmx_fanalarm_18>;
		pinctrl-names = "default";
		gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
			 &gpio0 16 GPIO_ACTIVE_HIGH
			 &gpio0 17 GPIO_ACTIVE_HIGH>;
		alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
		gpio-fan,speed-map = <    0 0
				       2500 1
				       3100 2
				       3800 3
				       4600 4
				       4800 5
				       4900 6
				       5000 7 >;
	};

	gpio-fan-100-15-35-1 {
		status = "disabled";
		compatible = "gpio-fan";
		pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
		             &pmx_fanalarm_35>;
		pinctrl-names = "default";
		gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
			 &gpio0 16 GPIO_ACTIVE_HIGH
			 &gpio0 17 GPIO_ACTIVE_HIGH>;
		alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
		gpio-fan,speed-map = <    0 0
				       2500 1
				       3100 2
				       3800 3
				       4600 4
				       4800 5
				       4900 6
				       5000 7 >;
	};

	gpio-fan-100-15-35-3 {
		status = "disabled";
		compatible = "gpio-fan";
		pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
		             &pmx_fanalarm_35 &pmx_fanalarm_44 &pmx_fanalarm_45>;
		pinctrl-names = "default";
		gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
			 &gpio0 16 GPIO_ACTIVE_HIGH
			 &gpio0 17 GPIO_ACTIVE_HIGH>;
		alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH
			       &gpio1 12 GPIO_ACTIVE_HIGH
			       &gpio1 13 GPIO_ACTIVE_HIGH>;
		gpio-fan,speed-map = <    0 0
				       2500 1
				       3100 2
				       3800 3
				       4600 4
				       4800 5
				       4900 6
				       5000 7 >;
	};

	gpio-leds-alarm-12 {
		status = "disabled";
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_alarmled_12>;
		pinctrl-names = "default";

		hdd1-green {
			label = "synology:alarm";
			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds-hdd-20 {
		status = "disabled";
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_hddled_20 &pmx_hddled_21 &pmx_hddled_22
			     &pmx_hddled_23 &pmx_hddled_24 &pmx_hddled_25
			     &pmx_hddled_26 &pmx_hddled_27>;
		pinctrl-names = "default";

		hdd1-green {
			label = "synology:green:hdd1";
			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
		};

		hdd1-amber {
			label = "synology:amber:hdd1";
			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
		};

		hdd2-green {
			label = "synology:green:hdd2";
			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
		};

		hdd2-amber {
			label = "synology:amber:hdd2";
			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
		};

		hdd3-green {
			label = "synology:green:hdd3";
			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
		};

		hdd3-amber {
			label = "synology:amber:hdd3";
			gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
		};

		hdd4-green {
			label = "synology:green:hdd4";
			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
		};

		hdd4-amber {
			label = "synology:amber:hdd4";
			gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds-hdd-21-1 {
		status = "disabled";
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23>;
		pinctrl-names = "default";

		hdd1-green {
			label = "synology:green:hdd1";
			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
		};

		hdd1-amber {
			label = "synology:amber:hdd1";
			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds-hdd-21-2 {
		status = "disabled";
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23 &pmx_hddled_20 &pmx_hddled_22>;
		pinctrl-names = "default";

		hdd1-green {
			label = "synology:green:hdd1";
			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
		};

		hdd1-amber {
			label = "synology:amber:hdd1";
			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
		};

		hdd2-green {
			label = "synology:green:hdd2";
			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
		};

		hdd2-amber {
			label = "synology:amber:hdd2";
			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds-hdd-36 {
		status = "disabled";
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_hddled_36 &pmx_hddled_37 &pmx_hddled_38
			     &pmx_hddled_39 &pmx_hddled_40 &pmx_hddled_41
			     &pmx_hddled_42 &pmx_hddled_43 &pmx_hddled_44
			     &pmx_hddled_45>;
		pinctrl-names = "default";

		hdd1-green {
			label = "synology:green:hdd1";
			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
		};

		hdd1-amber {
			label = "synology:amber:hdd1";
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
		};

		hdd2-green {
			label = "synology:green:hdd2";
			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
		};

		hdd2-amber {
			label = "synology:amber:hdd2";
			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
		};

		hdd3-green {
			label = "synology:green:hdd3";
			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
		};

		hdd3-amber {
			label = "synology:amber:hdd3";
			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
		};

		hdd4-green {
			label = "synology:green:hdd4";
			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
		};

		hdd4-amber {
			label = "synology:amber:hdd4";
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
		};

		hdd5-green {
			label = "synology:green:hdd5";
			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
		};

		hdd5-amber {
			label = "synology:amber:hdd5";
			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds-hdd-38 {
		status = "disabled";
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_hddled_38 &pmx_hddled_39 &pmx_hddled_36 &pmx_hddled_37>;
		pinctrl-names = "default";

		hdd1-green {
			label = "synology:green:hdd1";
			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
		};

		hdd1-amber {
			label = "synology:amber:hdd1";
			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
		};

		hdd2-green {
			label = "synology:green:hdd2";
			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
		};

		hdd2-amber {
			label = "synology:amber:hdd2";
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
		};
	};

	regulators-hdd-29 {
		status = "disabled";
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_hdd1_pwr_29 &pmx_hdd2_pwr_31>;
		pinctrl-names = "default";

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "hdd1power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
		};

		regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "hdd2power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>;
		};
	};

	regulators-hdd-30-1 {
		status = "disabled";
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_hdd1_pwr_30>;
		pinctrl-names = "default";

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "hdd1power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
		};
	};

	regulators-hdd-30-2 {
		status = "disabled";
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34>;
		pinctrl-names = "default";

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "hdd1power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
		};

		regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "hdd2power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
		};
	};

	regulators-hdd-30-4 {
		status = "disabled";
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34
			     &pmx_hdd3_pwr_44 &pmx_hdd4_pwr_45>;
		pinctrl-names = "default";

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "hdd1power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
		};

		regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "hdd2power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
		};

		regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "hdd3power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		};

		regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "hdd4power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
		};
	};

	regulators-hdd-31 {
		status = "disabled";
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_hdd2_pwr_31>;
		pinctrl-names = "default";

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "hdd2power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>;
		};
	};

	regulators-hdd-34 {
		status = "disabled";
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_hdd2_pwr_34 &pmx_hdd3_pwr_44
			     &pmx_hdd4_pwr_45>;
		pinctrl-names = "default";

		regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "hdd2power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
		};

		regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "hdd3power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		};

		regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "hdd4power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			startup-delay-us = <5000000>;
			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
		};
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		device_type = "ethernet-phy";
		reg = <8>;
	};

	ethphy1: ethernet-phy@1 {
		device_type = "ethernet-phy";
		reg = <9>;
	};
};

&eth0 {
	status = "okay";

	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};

&eth1 {
	status = "disabled";

	ethernet1-port@0 {
		phy-handle = <&ethphy1>;
	};
};

&pciec {
	status = "okay";
};

&pcie0 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree file for HP t5325 Thin Client"
 *
 * Copyright (C) 2014
 *
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 * Andrew Lunn <andrew@lunn.ch>
 *
*/

/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"

/ {
	model = "HP t5325 Thin Client";
	compatible = "hp,t5325", "marvell,kirkwood-88f6281", "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			pinctrl-0 = <&pmx_i2s &pmx_sysrst>;
			pinctrl-names = "default";

			pmx_button_power: pmx-button_power {
				marvell,pins = "mpp45";
				marvell,function = "gpio";
			};

			pmx_power_off: pmx-power-off {
				marvell,pins = "mpp48";
				marvell,function = "gpio";
			};

			pmx_led: pmx-led {
				marvell,pins = "mpp21";
				marvell,function = "gpio";
			};

			pmx_usb_sata_power_enable: pmx-usb-sata-power-enable {
				marvell,pins = "mpp44";
				marvell,function = "gpio";
			};

			pmx_spi: pmx-spi {
				marvell,pins = "mpp1", "mpp2", "mpp3", "mpp7";
				marvell,function = "spi";
			};

			pmx_sysrst: pmx-sysrst {
				marvell,pins = "mpp6";
				marvell,function = "sysrst";
			};

			pmx_i2s: pmx-i2s {
				marvell,pins = "mpp39", "mpp40", "mpp41", "mpp42",
					       "mpp43";
				marvell,function = "audio";
			};
		};

		spi@10600 {
			status = "okay";

			flash@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "st,m25p80", "jedec,spi-nor";
				spi-max-frequency = <86000000>;
				reg = <0>;
				mode = <0>;

				partition@0 {
					reg = <0x0 0x80000>;
					label = "u-boot";
				};

				partition@1 {
					reg = <0x80000 0x40000>;
					label = "SSD firmware";
				};

				partition@2 {
					reg = <0xc0000 0x10000>;
					label = "u-boot env";
				};

				partition@3 {
					reg = <0xd0000 0x10000>;
					label = "permanent u-boot env";
				};

				partition@4 {
					reg = <0xd0000 0x10000>;
					label = "permanent u-boot env";
				};
			};
		};

		i2c@11000 {
			status = "okay";

			alc5621: alc5621@1a {
				compatible = "realtek,alc5621";
				reg = <0x1a>;
				#sound-dai-cells = <0>;
				add-ctrl = <0x3700>;
				jack-det-ctrl = <0x4810>;
			};
		};

		serial@12000 {
			status = "okay";
		};

		sata@80000 {
			status = "okay";
			nr-ports = <2>;
		};

		audio: audio-controller@a0000 {
			status = "okay";
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_usb_sata_power_enable>;
		pinctrl-names = "default";

		usb_power: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "USB-SATA Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_button_power>;
		pinctrl-names = "default";

		power {
			label = "Power Button";
			linux,code = <KEY_POWER>;
			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
		};
	};

	gpio_poweroff {
		compatible = "gpio-poweroff";
		pinctrl-0 = <&pmx_power_off>;
		pinctrl-names = "default";
		gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,routing =
			"Headphone Jack", "HPL",
			"Headphone Jack", "HPR",
			"Speaker", "SPKOUT",
			"Speaker", "SPKOUTN",
			"MIC1", "Mic Jack",
			"MIC2", "Mic Jack";
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack",
			"Speaker", "Speaker",
			"Microphone", "Mic Jack";

		simple-audio-card,mclk-fs = <256>;

		simple-audio-card,cpu {
			sound-dai = <&audio>;
		};

		simple-audio-card,codec {
			sound-dai = <&alc5621>;
		};
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@8 {
		device_type = "ethernet-phy";
		reg = <8>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};

&pciec {
	status = "okay";
};

&pcie0 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6282.dtsi"

/ {
	model = "Universal Scientific Industrial Co. Topkick-1281P2";
	compatible = "usi,topkick-1281P2", "usi,topkick", "marvell,kirkwood-88f6282", "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x10000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8 earlyprintk";
		stdout-path = &uart0;
	};

	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			/*
			 * Switch positions
			 *
			 *     /-SW_LEFT(2)
			 *     |
			 *     |   /-SW_IDLE
			 *     |   |
			 *     |   |   /-SW_RIGHT
			 *     |   |   |
			 * PS [L] [I] [R] LEDS
			 */
			pinctrl-0 = <&pmx_sw_left &pmx_sw_right
				     &pmx_sw_idle &pmx_sw_left2>;
			pinctrl-names = "default";

			pmx_led_disk_yellow: pmx-led-disk-yellow {
				marvell,pins = "mpp21";
				marvell,function = "gpio";
			};

			pmx_sata0_pwr_enable: pmx-sata0-pwr-enable {
				marvell,pins = "mpp36";
				marvell,function = "gpio";
			};

			pmx_led_sys_red: pmx-led-sys-red {
				marvell,pins = "mpp37";
				marvell,function = "gpio";
			};

			pmx_led_sys_blue: pmx-led-sys-blue {
				marvell,pins = "mpp38";
				marvell,function = "gpio";
			};

			pmx_led_wifi_green: pmx-led-wifi-green {
				marvell,pins = "mpp39";
				marvell,function = "gpio";
			};

			pmx_sw_left: pmx-sw-left {
				marvell,pins = "mpp43";
				marvell,function = "gpio";
			};

			pmx_sw_right: pmx-sw-right {
				marvell,pins = "mpp44";
				marvell,function = "gpio";
			};

			pmx_sw_idle: pmx-sw-idle {
				marvell,pins = "mpp45";
				marvell,function = "gpio";
			};

			pmx_sw_left2: pmx-sw-left2 {
				marvell,pins = "mpp46";
				marvell,function = "gpio";
			};

			pmx_led_wifi_yellow: pmx-led-wifi-yellow {
				marvell,pins = "mpp48";
				marvell,function = "gpio";
			};
		};

		serial@12000 {
			status = "okay";
		};

		sata@80000 {
			status = "okay";
			nr-ports = <1>;
		};

		i2c@11000 {
			status = "okay";
		};

		mvsdio@90000 {
			pinctrl-0 = <&pmx_sdio>;
			pinctrl-names = "default";
			status = "okay";
			/* No CD or WP GPIOs */
			broken-cd;
		};
	};

	gpio-leds {
		/*
		 * GPIO LED layout
		 *
		 *       /-SYS_LED(2)
		 *       |
		 *       |   /-DISK_LED
		 *       |   |
		 *       |   |   /-WLAN_LED(2)
		 *       |   |   |
		 * [SW] [*] [*] [*]
		 */

		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_led_disk_yellow &pmx_led_sys_red
			     &pmx_led_sys_blue &pmx_led_wifi_green
			     &pmx_led_wifi_yellow>;
		pinctrl-names = "default";

		disk {
			label = "topkick:yellow:disk";
			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "disk-activity";
		};
		system2 {
			label = "topkick:red:system";
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
		};
		system {
			label = "topkick:blue:system";
			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};
		wifi {
			label = "topkick:green:wifi";
			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
		};
		wifi2 {
			label = "topkick:yellow:wifi";
			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
		};
	};
	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_sata0_pwr_enable>;
		pinctrl-names = "default";

		sata0_power: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "SATA0 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 4 0>;
		};
	};
};

&nand {
	status = "okay";

	partition@0 {
		label = "u-boot";
		reg = <0x0000000 0x180000>;
	};

	partition@180000 {
		label = "u-boot env";
		reg = <0x0180000 0x20000>;
	};

	partition@200000 {
		label = "uImage";
		reg = <0x0200000 0x600000>;
	};

	partition@800000 {
		label = "uInitrd";
		reg = <0x0800000 0x1000000>;
	};

	partition@1800000 {
		label = "rootfs";
		reg = <0x1800000 0xe800000>;
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"
#include "kirkwood-ts219.dtsi"

/ {
	ocp@f1000000 {
		pinctrl: pin-controller@10000 {

			pinctrl-0 = <&pmx_ram_size &pmx_board_id>;
			pinctrl-names = "default";

			pmx_ram_size: pmx-ram-size {
				/* RAM: 0: 256 MB, 1: 512 MB */
				marvell,pins = "mpp36";
				marvell,function = "gpio";
			};
			pmx_USB_copy_button: pmx-USB-copy-button {
				marvell,pins = "mpp15";
				marvell,function = "gpio";
			};
			pmx_reset_button: pmx-reset-button {
				marvell,pins = "mpp16";
				marvell,function = "gpio";
			};
			pmx_board_id: pmx-board-id {
				/* 0: TS-11x, 1: TS-21x */
				marvell,pins = "mpp44";
				marvell,function = "gpio";
			};
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>;
		pinctrl-names = "default";

		copy {
			label = "USB Copy";
			linux,code = <KEY_COPY>;
			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
		};
		reset {
			label = "Reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
		};
	};
};

&ethphy0 { reg = <8>; };


code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6282.dtsi"
#include "kirkwood-ts219.dtsi"

/ {
	ocp@f1000000 {
		pinctrl: pin-controller@10000 {

			pinctrl-0 = <&pmx_ram_size &pmx_board_id>;
			pinctrl-names = "default";

			pmx_ram_size: pmx-ram-size {
				/* RAM: 0: 256 MB, 1: 512 MB */
				marvell,pins = "mpp36";
				marvell,function = "gpio";
			};
			pmx_reset_button: pmx-reset-button {
				marvell,pins = "mpp37";
				marvell,function = "gpio";
			};
			pmx_USB_copy_button: pmx-USB-copy-button {
				marvell,pins = "mpp43";
				marvell,function = "gpio";
			};
			pmx_board_id: pmx-board-id {
				/* 0: TS-11x, 1: TS-21x */
				marvell,pins = "mpp44";
				marvell,function = "gpio";
			};
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>;
		pinctrl-names = "default";

		copy {
			label = "USB Copy";
			linux,code = <KEY_COPY>;
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
		};
		reset {
			label = "Reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
		};
	};
};

&ethphy0 { reg = <0>; };

&pcie1 { status = "okay"; };


code:
// SPDX-License-Identifier: GPL-2.0
/ {
	model = "QNAP TS219 family";
	compatible = "qnap,ts219", "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	ocp@f1000000 {
		i2c@11000 {
			status = "okay";
			clock-frequency = <400000>;

			s35390a: s35390a@30 {
				compatible = "s35390a";
				reg = <0x30>;
			};
		};
		serial@12000 {
			status = "okay";
		};
		serial@12100 {
			status = "okay";
		};
		poweroff@12100 {
			compatible = "qnap,power-off";
			reg = <0x12100 0x100>;
			clocks = <&gate_clk 7>;
		};
		spi@10600 {
			status = "okay";

			m25p128@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "m25p128", "jedec,spi-nor";
				reg = <0>;
				spi-max-frequency = <20000000>;
				mode = <0>;

				partition@0 {
					reg = <0x00000000 0x00080000>;
					label = "U-Boot";
				};

				partition@200000 {
					reg = <0x00200000 0x00200000>;
					label = "Kernel";
				};

				partition@400000 {
					reg = <0x00400000 0x00900000>;
					label = "RootFS1";
				};
				partition@d00000 {
					reg = <0x00d00000 0x00300000>;
					label = "RootFS2";
				};
				partition@40000 {
					reg = <0x00080000 0x00040000>;
					label = "U-Boot Config";
				};
				partition@c0000 {
					reg = <0x000c0000 0x00140000>;
					label = "NAS Config";
				};
			};
		};
		sata@80000 {
			pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
			pinctrl-names = "default";
			status = "okay";
			nr-ports = <2>;
		};
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@X {
		/* overwrite reg property in board file */
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};

&pciec {
	status = "okay";
};

&pcie0 {
	status = "okay";
};

&rtc {
	/*
	 * There is a s35390a available on the i2c bus, the internal rtc isn't
	 * working (probably no crystal assembled).
	 */
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0+
/*
 * Device Tree file for QNAP TS41X with 6281 SoC
 *
 * Copyright (C) 2013, Andrew Lunn <andrew@lunn.ch>
 */

/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"
#include "kirkwood-ts219.dtsi"
#include "kirkwood-ts419.dtsi"

&ethphy0 { reg = <8>; };
&ethphy1 { reg = <0>; };


code:
// SPDX-License-Identifier: GPL-2.0+
/*
 * Device Tree file for QNAP TS41X with 6282 SoC
 *
 * Copyright (C) 2013, Andrew Lunn <andrew@lunn.ch>
 */

/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6282.dtsi"
#include "kirkwood-ts219.dtsi"
#include "kirkwood-ts419.dtsi"

&ethphy0 { reg = <0>; };
&ethphy1 { reg = <1>; };

&pciec { status = "okay"; };
&pcie1 { status = "okay"; };


code:
// SPDX-License-Identifier: GPL-2.0+
/*
 * Device Tree include file for QNAP TS41X
 *
 * Copyright (C) 2013, Andrew Lunn <andrew@lunn.ch>
 */

/ {
	model = "QNAP TS419 family";
	compatible = "qnap,ts419", "marvell,kirkwood";

	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			pinctrl-names = "default";

			pmx_USB_copy_button: pmx-USB-copy-button {
				marvell,pins = "mpp43";
				marvell,function = "gpio";
			};
			pmx_reset_button: pmx-reset-button {
				marvell,pins = "mpp37";
				marvell,function = "gpio";
			};
			/*
			 * JP1 indicates if an LCD module is installed
			 * on the serial port (0), or if the port is used
			 * as a console (1).
			 */
			pmx_jumper_jp1: pmx-jumper_jp1 {
				marvell,pins = "mpp45";
				marvell,function = "gpio";
			};

		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>;
		pinctrl-names = "default";

		copy {
			label = "USB Copy";
			linux,code = <KEY_COPY>;
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
		};
		reset {
			label = "Reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
		};
	};
};

&mdio {
	status = "okay";

	ethphy1: ethernet-phy@1 {
		device_type = "ethernet-phy";
                /* overwrite reg property in board file */
	};
};

&eth1 {
	status = "okay";
	ethernet1-port@0 {
		phy-handle = <&ethphy1>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>

#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "marvell,kirkwood";
	interrupt-parent = <&intc>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "marvell,feroceon";
			reg = <0>;
			clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
			clock-names = "cpu_clk", "ddrclk", "powersave";
		};
	};

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		i2c0 = &i2c0;
	};

	mbus@f1000000 {
		compatible = "marvell,kirkwood-mbus", "simple-bus";
		#address-cells = <2>;
		#size-cells = <1>;
		/* If a board file needs to change this ranges it must replace it completely */
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000	/* internal-regs */
			  MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000	/* nand flash */
			  MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000	/* crypto sram */
			  >;
		controller = <&mbusc>;
		pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
		pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */

		nand: nand@12f {
			#address-cells = <1>;
			#size-cells = <1>;
			cle = <0>;
			ale = <1>;
			bank-width = <1>;
			compatible = "marvell,orion-nand";
			reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
			chip-delay = <25>;
			/* set partition map and/or chip-delay in board dts */
			clocks = <&gate_clk 7>;
			pinctrl-0 = <&pmx_nand>;
			pinctrl-names = "default";
			status = "disabled";
		};

		crypto_sram: sa-sram@301 {
			compatible = "mmio-sram";
			reg = <MBUS_ID(0x03, 0x01) 0x0 0x800>;
			clocks = <&gate_clk 17>;
			#address-cells = <1>;
			#size-cells = <1>;
		};
	};

	ocp@f1000000 {
		compatible = "simple-bus";
		ranges = <0x00000000 0xf1000000 0x0100000>;
		#address-cells = <1>;
		#size-cells = <1>;

		pinctrl: pin-controller@10000 {
			/* set compatible property in SoC file */
			reg = <0x10000 0x20>;

			pmx_ge1: pmx-ge1 {
				marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
					       "mpp24", "mpp25", "mpp26", "mpp27",
					       "mpp30", "mpp31", "mpp32", "mpp33";
				marvell,function = "ge1";
			};

			pmx_nand: pmx-nand {
				marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
					       "mpp4", "mpp5", "mpp18", "mpp19";
				marvell,function = "nand";
			};

			/*
			 * Default SPI0 pinctrl setting with CSn on mpp0,
			 * overwrite marvell,pins on board level if required.
			 */
			pmx_spi: pmx-spi {
				marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
				marvell,function = "spi";
			};

			pmx_twsi0: pmx-twsi0 {
				marvell,pins = "mpp8", "mpp9";
				marvell,function = "twsi0";
			};

			/*
			 * Default UART pinctrl setting without RTS/CTS,
			 * overwrite marvell,pins on board level if required.
			 */
			pmx_uart0: pmx-uart0 {
				marvell,pins = "mpp10", "mpp11";
				marvell,function = "uart0";
			};

			pmx_uart1: pmx-uart1 {
				marvell,pins = "mpp13", "mpp14";
				marvell,function = "uart1";
			};
		};

		core_clk: core-clocks@10030 {
			compatible = "marvell,kirkwood-core-clock";
			reg = <0x10030 0x4>;
			#clock-cells = <1>;
		};

		spi0: spi@10600 {
			compatible = "marvell,orion-spi";
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			interrupts = <23>;
			reg = <0x10600 0x28>;
			clocks = <&gate_clk 7>;
			pinctrl-0 = <&pmx_spi>;
			pinctrl-names = "default";
			status = "disabled";
		};

		gpio0: gpio@10100 {
			compatible = "marvell,orion-gpio";
			#gpio-cells = <2>;
			gpio-controller;
			reg = <0x10100 0x40>;
			ngpios = <32>;
			interrupt-controller;
			#interrupt-cells = <2>;
			interrupts = <35>, <36>, <37>, <38>;
			clocks = <&gate_clk 7>;
		};

		gpio1: gpio@10140 {
			compatible = "marvell,orion-gpio";
			#gpio-cells = <2>;
			gpio-controller;
			reg = <0x10140 0x40>;
			ngpios = <18>;
			interrupt-controller;
			#interrupt-cells = <2>;
			interrupts = <39>, <40>, <41>;
			clocks = <&gate_clk 7>;
		};

		i2c0: i2c@11000 {
			compatible = "marvell,mv64xxx-i2c";
			reg = <0x11000 0x20>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <29>;
			clock-frequency = <100000>;
			clocks = <&gate_clk 7>;
			pinctrl-0 = <&pmx_twsi0>;
			pinctrl-names = "default";
			status = "disabled";
		};

		uart0: serial@12000 {
			compatible = "ns16550a";
			reg = <0x12000 0x100>;
			reg-shift = <2>;
			interrupts = <33>;
			clocks = <&gate_clk 7>;
			pinctrl-0 = <&pmx_uart0>;
			pinctrl-names = "default";
			status = "disabled";
		};

		uart1: serial@12100 {
			compatible = "ns16550a";
			reg = <0x12100 0x100>;
			reg-shift = <2>;
			interrupts = <34>;
			clocks = <&gate_clk 7>;
			pinctrl-0 = <&pmx_uart1>;
			pinctrl-names = "default";
			status = "disabled";
		};

		mbusc: mbus-controller@20000 {
			compatible = "marvell,mbus-controller";
			reg = <0x20000 0x80>, <0x1500 0x20>;
		};

		sysc: system-controller@20000 {
			compatible = "marvell,orion-system-controller";
			reg = <0x20000 0x120>;
		};

		bridge_intc: bridge-interrupt-ctrl@20110 {
			compatible = "marvell,orion-bridge-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x20110 0x8>;
			interrupts = <1>;
			marvell,#interrupts = <6>;
		};

		gate_clk: clock-gating-control@2011c {
			compatible = "marvell,kirkwood-gating-clock";
			reg = <0x2011c 0x4>;
			clocks = <&core_clk 0>;
			#clock-cells = <1>;
		};

		l2: l2-cache@20128 {
			compatible = "marvell,kirkwood-cache";
			reg = <0x20128 0x4>;
		};

		intc: interrupt-controller@20200 {
			compatible = "marvell,orion-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x20200 0x10>, <0x20210 0x10>;
		};

		timer: timer@20300 {
			compatible = "marvell,orion-timer";
			reg = <0x20300 0x20>;
			interrupt-parent = <&bridge_intc>;
			interrupts = <1>, <2>;
			clocks = <&core_clk 0>;
		};

		wdt: watchdog-timer@20300 {
			compatible = "marvell,orion-wdt";
			reg = <0x20300 0x28>, <0x20108 0x4>;
			interrupt-parent = <&bridge_intc>;
			interrupts = <3>;
			clocks = <&gate_clk 7>;
			status = "okay";
		};

		cesa: crypto@30000 {
			compatible = "marvell,kirkwood-crypto";
			reg = <0x30000 0x10000>;
			reg-names = "regs";
			interrupts = <22>;
			clocks = <&gate_clk 17>;
			marvell,crypto-srams = <&crypto_sram>;
			marvell,crypto-sram-size = <0x800>;
			status = "okay";
		};

		usb0: ehci@50000 {
			compatible = "marvell,orion-ehci";
			reg = <0x50000 0x1000>;
			interrupts = <19>;
			clocks = <&gate_clk 3>;
			status = "okay";
		};

		dma0: xor@60800 {
			compatible = "marvell,orion-xor";
			reg = <0x60800 0x100
			       0x60A00 0x100>;
			status = "okay";
			clocks = <&gate_clk 8>;

			xor00 {
				interrupts = <5>;
				dmacap,memcpy;
				dmacap,xor;
			};
			xor01 {
				interrupts = <6>;
				dmacap,memcpy;
				dmacap,xor;
				dmacap,memset;
			};
		};

		dma1: xor@60900 {
			compatible = "marvell,orion-xor";
			reg = <0x60900 0x100
			       0x60B00 0x100>;
			status = "okay";
			clocks = <&gate_clk 16>;

			xor00 {
				interrupts = <7>;
				dmacap,memcpy;
				dmacap,xor;
			};
			xor01 {
				interrupts = <8>;
				dmacap,memcpy;
				dmacap,xor;
				dmacap,memset;
			};
		};

		eth0: ethernet-controller@72000 {
			compatible = "marvell,kirkwood-eth";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x72000 0x4000>;
			clocks = <&gate_clk 0>;
			marvell,tx-checksum-limit = <1600>;
			status = "disabled";

			eth0port: ethernet0-port@0 {
				compatible = "marvell,kirkwood-eth-port";
				reg = <0>;
				interrupts = <11>;
				/* overwrite MAC address in bootloader */
				local-mac-address = [00 00 00 00 00 00];
				/* set phy-handle property in board file */
			};
		};

		mdio: mdio-bus@72004 {
			compatible = "marvell,orion-mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x72004 0x84>;
			interrupts = <46>;
			clocks = <&gate_clk 0>;
			status = "disabled";

			/* add phy nodes in board file */
		};

		eth1: ethernet-controller@76000 {
			compatible = "marvell,kirkwood-eth";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x76000 0x4000>;
			clocks = <&gate_clk 19>;
			marvell,tx-checksum-limit = <1600>;
			pinctrl-0 = <&pmx_ge1>;
			pinctrl-names = "default";
			status = "disabled";

			eth1port: ethernet1-port@0 {
				compatible = "marvell,kirkwood-eth-port";
				reg = <0>;
				interrupts = <15>;
				/* overwrite MAC address in bootloader */
				local-mac-address = [00 00 00 00 00 00];
				/* set phy-handle property in board file */
			};
		};

		sata_phy0: sata-phy@82000 {
			compatible = "marvell,mvebu-sata-phy";
			reg = <0x82000 0x0334>;
			clocks = <&gate_clk 14>;
			clock-names = "sata";
			#phy-cells = <0>;
			status = "okay";
		};

		sata_phy1: sata-phy@84000 {
			compatible = "marvell,mvebu-sata-phy";
			reg = <0x84000 0x0334>;
			clocks = <&gate_clk 15>;
			clock-names = "sata";
			#phy-cells = <0>;
			status = "okay";
		};

		audio0: audio-controller@a0000 {
			compatible = "marvell,kirkwood-audio";
			#sound-dai-cells = <0>;
			reg = <0xa0000 0x2210>;
			interrupts = <24>;
			clocks = <&gate_clk 9>;
			clock-names = "internal";
			status = "disabled";
		};
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS
 */

/dts-v1/;
#include "lan966x-kontron-kswitch-d10-mmt.dtsi"

/ {
	model = "Kontron KSwitch D10 MMT 6G-2GS";
	compatible = "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921",
		     "microchip,lan9668", "microchip,lan966";

	aliases {
		i2c0 = &i2c4;
		i2c1 = &i2c1;
	};

	sfp0: sfp0 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c4>;
		los-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>;
		mod-def0-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_LOW>;
		maximum-power-milliwatt = <2500>;
		tx-disable-gpios = <&sgpio_out 3 0 GPIO_ACTIVE_LOW>;
		tx-fault-gpios = <&sgpio_in 0 2 GPIO_ACTIVE_HIGH>;
		rate-select0-gpios = <&sgpio_out 2 0 GPIO_ACTIVE_HIGH>;
		rate-select1-gpios = <&sgpio_out 2 1 GPIO_ACTIVE_HIGH>;
	};

	sfp1: sfp1 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c1>;
		los-gpios = <&sgpio_in 1 2 GPIO_ACTIVE_HIGH>;
		mod-def0-gpios = <&sgpio_in 1 3 GPIO_ACTIVE_LOW>;
		maximum-power-milliwatt = <2500>;
		tx-disable-gpios = <&sgpio_out 3 1 GPIO_ACTIVE_LOW>;
		tx-fault-gpios = <&sgpio_in 0 3 GPIO_ACTIVE_HIGH>;
		rate-select0-gpios = <&sgpio_out 2 2 GPIO_ACTIVE_HIGH>;
		rate-select1-gpios = <&sgpio_out 2 3 GPIO_ACTIVE_HIGH>;
	};
};

&flx1 {
	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
	status = "okay";

	i2c1: i2c@600 {
		pinctrl-0 = <&fc1_c_pins>;
		pinctrl-names = "default";
		status = "okay";
	};
};

&flx4 {
	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
	status = "okay";

	i2c4: i2c@600 {
		pinctrl-0 = <&fc4_b_pins>;
		pinctrl-names = "default";
		status = "okay";
	};
};

&gpio {
	fc1_c_pins: fc1-c-i2c-pins {
		/* SCL, SDA */
		pins = "GPIO_47", "GPIO_48";
		function = "fc1_c";
	};

	fc4_b_pins: fc4-b-i2c-pins {
		/* SCL, SDA */
		pins = "GPIO_57", "GPIO_58";
		function = "fc4_b";
	};
};

&port2 {
	phys = <&serdes 2 SERDES6G(0)>;
	sfp = <&sfp0>;
	managed = "in-band-status";
	phy-mode = "sgmii";
	status = "okay";
};

&port3 {
	phys = <&serdes 3 SERDES6G(1)>;
	sfp = <&sfp1>;
	managed = "in-band-status";
	phy-mode = "sgmii";
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for the Kontron KSwitch D10 MMT 8G
 */

/dts-v1/;
#include "lan966x-kontron-kswitch-d10-mmt.dtsi"

/ {
	model = "Kontron KSwitch D10 MMT 8G";
	compatible = "kontron,kswitch-d10-mmt-8g", "kontron,s1921",
		     "microchip,lan9668", "microchip,lan966";
};

&mdio0 {
	phy2: ethernet-phy@3 {
		reg = <3>;
	};

	phy3: ethernet-phy@4 {
		reg = <4>;
	};
};

&port2 {
	phys = <&serdes 2 SERDES6G(0)>;
	phy-handle = <&phy2>;
	phy-mode = "sgmii";
	managed = "in-band-status";
	status = "okay";
};

&port3 {
	phys = <&serdes 3 SERDES6G(1)>;
	phy-handle = <&phy3>;
	phy-mode = "sgmii";
	managed = "in-band-status";
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Common part of the device tree for the Kontron KSwitch D10 MMT
 */

/dts-v1/;
#include "lan966x.dtsi"
#include "dt-bindings/phy/phy-lan966x-serdes.h"

/ {
	aliases {
		serial0 = &usart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	gpio-restart {
		compatible = "gpio-restart";
		gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
		priority = <200>;
	};
};

&flx0 {
	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
	status = "okay";

	usart0: serial@200 {
		pinctrl-0 = <&usart0_pins>;
		pinctrl-names = "default";
		status = "okay";
	};
};

&flx3 {
	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
	status = "okay";

	spi3: spi@400 {
		pinctrl-0 = <&fc3_b_pins>;
		pinctrl-names = "default";
		status = "okay";
		cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
	};
};

&gpio {
	fc3_b_pins: fc3-b-pins {
		/* SCK, MISO, MOSI */
		pins = "GPIO_51", "GPIO_52", "GPIO_53";
		function = "fc3_b";
	};

	miim_c_pins: miim-c-pins {
		/* MDC, MDIO */
		pins = "GPIO_59", "GPIO_60";
		function = "miim_c";
	};

	sgpio_a_pins: sgpio-a-pins {
		/* SCK, D0, D1 */
		pins = "GPIO_32", "GPIO_33", "GPIO_34";
		function = "sgpio_a";
	};

	sgpio_b_pins: sgpio-b-pins {
		/* LD */
		pins = "GPIO_64";
		function = "sgpio_b";
	};

	usart0_pins: usart0-pins {
		/* RXD, TXD */
		pins = "GPIO_25", "GPIO_26";
		function = "fc0_b";
	};

	usbs_a_pins: usbs-a-pins {
		/* VBUS_DET */
		pins = "GPIO_66";
		function = "gpio";
	};
};

&mdio0 {
	pinctrl-0 = <&miim_c_pins>;
	pinctrl-names = "default";
	reset-gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
	clock-frequency = <2500000>;
	status = "okay";

	phy4: ethernet-phy@5 {
		reg = <5>;
		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
	};

	phy5: ethernet-phy@6 {
		reg = <6>;
		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
	};

	phy6: ethernet-phy@7 {
		reg = <7>;
		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
	};

	phy7: ethernet-phy@8 {
		reg = <8>;
		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
	};
};

&mdio1 {
	status = "okay";
};

&phy0 {
	status = "okay";
};

&phy1 {
	status = "okay";
};

&port0 {
	phys = <&serdes 0 CU(0)>;
	phy-handle = <&phy0>;
	phy-mode = "gmii";
	status = "okay";
};

&port1 {
	phys = <&serdes 1 CU(1)>;
	phy-handle = <&phy1>;
	phy-mode = "gmii";
	status = "okay";
};

&port4 {
	phys = <&serdes 4 SERDES6G(2)>;
	phy-handle = <&phy4>;
	phy-mode = "qsgmii";
	status = "okay";
};

&port5 {
	phys = <&serdes 5 SERDES6G(2)>;
	phy-handle = <&phy5>;
	phy-mode = "qsgmii";
	status = "okay";
};

&port6 {
	phys = <&serdes 6 SERDES6G(2)>;
	phy-handle = <&phy6>;
	phy-mode = "qsgmii";
	status = "okay";
};

&port7 {
	phys = <&serdes 7 SERDES6G(2)>;
	phy-handle = <&phy7>;
	phy-mode = "qsgmii";
	status = "okay";
};

&serdes {
	status = "okay";
};

&sgpio {
	pinctrl-0 = <&sgpio_a_pins>, <&sgpio_b_pins>;
	pinctrl-names = "default";
	bus-frequency = <8000000>;
	/* arbitrary range because all GPIOs are in software mode */
	microchip,sgpio-port-ranges = <0 11>;
	status = "okay";

	sgpio_in: gpio@0 {
		ngpios = <128>;
	};

	sgpio_out: gpio@1 {
		ngpios = <128>;
	};
};

&switch {
	status = "okay";
};

&udc {
	pinctrl-0 = <&usbs_a_pins>;
	pinctrl-names = "default";
	atmel,vbus-gpio = <&gpio 66 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&watchdog {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * lan966x-pcb8290.dts - Device Tree file for LAN966X-PCB8290 board
 *
 * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
 *
 * Author: Horatiu Vultur <horatiu.vultur@microchip.com>
 */
/dts-v1/;
#include "lan966x.dtsi"
#include "dt-bindings/phy/phy-lan966x-serdes.h"

/ {
	model = "Microchip EVB LAN9668";
	compatible = "microchip,lan9668-pcb8290", "microchip,lan9668", "microchip,lan966";

	gpio-restart {
		compatible = "gpio-restart";
		gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
		priority = <200>;
	};
};

&aes {
	status = "disabled"; /* Reserved by secure OS */
};

&gpio {
	miim_a_pins: mdio-pins {
		/* MDC, MDIO */
		pins =  "GPIO_28", "GPIO_29";
		function = "miim_a";
	};

	pps_out_pins: pps-out-pins {
		/* 1pps output */
		pins = "GPIO_38";
		function = "ptpsync_3";
	};

	ptp_ext_pins: ptp-ext-pins {
		/* 1pps input */
		pins = "GPIO_35";
		function = "ptpsync_0";
	};

	udc_pins: ucd-pins {
		/* VBUS_DET B */
		pins = "GPIO_8";
		function = "usb_slave_b";
	};
};

&mdio0 {
	pinctrl-0 = <&miim_a_pins>;
	pinctrl-names = "default";
	status = "okay";

	ext_phy0: ethernet-phy@7 {
		reg = <7>;
		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio>;
		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
	};

	ext_phy1: ethernet-phy@8 {
		reg = <8>;
		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio>;
		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
	};

	ext_phy2: ethernet-phy@9 {
		reg = <9>;
		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio>;
		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
	};

	ext_phy3: ethernet-phy@10 {
		reg = <10>;
		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio>;
		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
	};

	ext_phy4: ethernet-phy@15 {
		reg = <15>;
		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio>;
		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
	};

	ext_phy5: ethernet-phy@16 {
		reg = <16>;
		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio>;
		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
	};

	ext_phy6: ethernet-phy@17 {
		reg = <17>;
		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio>;
		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
	};

	ext_phy7: ethernet-phy@18 {
		reg = <18>;
		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio>;
		coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
	};
};

&port0 {
	reg = <2>;
	phy-handle = <&ext_phy2>;
	phy-mode = "qsgmii";
	phys = <&serdes 0 SERDES6G(1)>;
	status = "okay";
};

&port1 {
	reg = <3>;
	phy-handle = <&ext_phy3>;
	phy-mode = "qsgmii";
	phys = <&serdes 1 SERDES6G(1)>;
	status = "okay";
};

&port2 {
	reg = <0>;
	phy-handle = <&ext_phy0>;
	phy-mode = "qsgmii";
	phys = <&serdes 2 SERDES6G(1)>;
	status = "okay";
};

&port3 {
	reg = <1>;
	phy-handle = <&ext_phy1>;
	phy-mode = "qsgmii";
	phys = <&serdes 3 SERDES6G(1)>;
	status = "okay";
};

&port4 {
	reg = <6>;
	phy-handle = <&ext_phy6>;
	phy-mode = "qsgmii";
	phys = <&serdes 4 SERDES6G(2)>;
	status = "okay";
};

&port5 {
	reg = <7>;
	phy-handle = <&ext_phy7>;
	phy-mode = "qsgmii";
	phys = <&serdes 5 SERDES6G(2)>;
	status = "okay";
};

&port6 {
	reg = <4>;
	phy-handle = <&ext_phy4>;
	phy-mode = "qsgmii";
	phys = <&serdes 6 SERDES6G(2)>;
	status = "okay";
};

&port7 {
	reg = <5>;
	phy-handle = <&ext_phy5>;
	phy-mode = "qsgmii";
	phys = <&serdes 7 SERDES6G(2)>;
	status = "okay";
};

&serdes {
	status = "okay";
};

&switch {
	pinctrl-0 = <&pps_out_pins>, <&ptp_ext_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&udc {
	pinctrl-0 = <&udc_pins>;
	pinctrl-names = "default";
	atmel,vbus-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * lan966x_pcb8291.dts - Device Tree file for PCB8291
 */
/dts-v1/;
#include "lan966x.dtsi"
#include "dt-bindings/phy/phy-lan966x-serdes.h"

/ {
	model = "Microchip EVB - LAN9662";
	compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	aliases {
		serial0 = &usart3;
	};

	gpio-restart {
		compatible = "gpio-restart";
		gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
		priority = <200>;
	};

	leds {
		compatible = "gpio-leds";

		led-s0-blue {
			label = "s0:blue";
			gpios = <&sgpio_out 2 0 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led-s0-green {
			label = "s0:green";
			gpios = <&sgpio_out 2 1 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led-s1-blue {
			label = "s1:blue";
			gpios = <&sgpio_out 3 0 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led-s1-green {
			label = "s1:green";
			gpios = <&sgpio_out 3 1 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};
};

&aes {
	status = "disabled"; /* Reserved by secure OS */
};

&gpio {
	fc3_b_pins: fc3-b-pins {
		/* RX, TX */
		pins = "GPIO_52", "GPIO_53";
		function = "fc3_b";
	};

	can0_b_pins:  can0-b-pins {
		/* RX, TX */
		pins = "GPIO_35", "GPIO_36";
		function = "can0_b";
	};

	sgpio_a_pins: sgpio-a-pins {
		/* SCK, D0, D1, LD */
		pins = "GPIO_32", "GPIO_33", "GPIO_34", "GPIO_35";
		function = "sgpio_a";
	};
};

&can0 {
	pinctrl-0 = <&can0_b_pins>;
	pinctrl-names = "default";
	status = "disabled"; /* Conflict with switch */
};

&flx3 {
	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
	status = "okay";

	usart3: serial@200 {
		pinctrl-0 = <&fc3_b_pins>;
		pinctrl-names = "default";
		status = "okay";
	};
};

&mdio1 {
	status = "okay";
};

&phy0 {
	status = "okay";
};

&phy1 {
	status = "okay";
};

&port0 {
	phy-handle = <&phy0>;
	phy-mode = "gmii";
	phys = <&serdes 0 CU(0)>;
	status = "okay";
};

&port1 {
	phy-handle = <&phy1>;
	phy-mode = "gmii";
	phys = <&serdes 1 CU(1)>;
	status = "okay";
};

&serdes {
	status = "okay";
};

&sgpio {
	pinctrl-0 = <&sgpio_a_pins>;
	pinctrl-names = "default";
	microchip,sgpio-port-ranges = <0 3>, <8 11>;
	status = "okay";

	gpio@0 {
		ngpios = <64>;
	};
	gpio@1 {
		ngpios = <64>;
	};
};

&switch {
	status = "okay";
};

&watchdog {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * lan966x_pcb8309.dts - Device Tree file for PCB8309
 */
/dts-v1/;
#include "lan966x.dtsi"
#include "dt-bindings/phy/phy-lan966x-serdes.h"

/ {
	model = "Microchip EVB - LAN9662";
	compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";

	aliases {
		serial0 = &usart3;
		i2c102 = &i2c102;
		i2c103 = &i2c103;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	gpio-restart {
		compatible = "gpio-restart";
		gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
		priority = <200>;
	};

	i2c-mux {
		compatible = "i2c-mux";
		#address-cells = <1>;
		#size-cells = <0>;
		mux-controls = <&mux>;
		i2c-parent = <&i2c4>;

		i2c102: i2c-sfp@1 {
			reg = <1>;
		};

		i2c103: i2c-sfp@2 {
			reg = <2>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led-s0-green {
			label = "s0:green";
			gpios = <&sgpio_out 2 0 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led-s0-red {
			label = "s0:red";
			gpios = <&sgpio_out 2 1 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led-s1-green {
			label = "s1:green";
			gpios = <&sgpio_out 3 0 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led-s1-red {
			label = "s1:red";
			gpios = <&sgpio_out 3 1 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};

	mux: mux-controller {
		compatible = "gpio-mux";
		#mux-control-cells = <0>;

		mux-gpios = <&sgpio_out 11 0 GPIO_ACTIVE_HIGH>, /* p11b0 */
			    <&sgpio_out 11 1 GPIO_ACTIVE_HIGH>; /* p11b1 */
	};

	sfp2: sfp2 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c102>;
		tx-disable-gpios = <&sgpio_out 10 0 GPIO_ACTIVE_LOW>;
		los-gpios = <&sgpio_in  2 0 GPIO_ACTIVE_HIGH>;
		mod-def0-gpios = <&sgpio_in  2 1 GPIO_ACTIVE_LOW>;
		tx-fault-gpios = <&sgpio_in  1 0 GPIO_ACTIVE_HIGH>;
	};

	sfp3: sfp3 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c103>;
		tx-disable-gpios = <&sgpio_out 10 1 GPIO_ACTIVE_LOW>;
		los-gpios = <&sgpio_in  3 0 GPIO_ACTIVE_HIGH>;
		mod-def0-gpios = <&sgpio_in  3 1 GPIO_ACTIVE_LOW>;
		tx-fault-gpios = <&sgpio_in  1 1 GPIO_ACTIVE_HIGH>;
	};
};

&aes {
	status = "disabled"; /* Reserved by secure OS */
};

&flx3 {
	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
	status = "okay";

	usart3: serial@200 {
		pinctrl-0 = <&fc3_b_pins>;
		pinctrl-names = "default";
		status = "okay";
	};
};

&flx4 {
	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
	status = "okay";

	i2c4: i2c@600 {
		compatible = "microchip,sam9x60-i2c";
		reg = <0x600 0x200>;
		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&nic_clk>;
		pinctrl-0 = <&fc4_b_pins>;
		pinctrl-names = "default";
		i2c-analog-filter;
		i2c-digital-filter;
		i2c-digital-filter-width-ns = <35>;
		i2c-sda-hold-time-ns = <1500>;
		status = "okay";
	};
};

&gpio {
	fc3_b_pins: fc3-b-pins {
		/* RXD, TXD */
		pins = "GPIO_52", "GPIO_53";
		function = "fc3_b";
	};

	fc4_b_pins: fc4-b-pins {
		/* SCL, SDA */
		pins = "GPIO_57", "GPIO_58";
		function = "fc4_b";
	};

	sgpio_a_pins: sgpio-a-pins {
		/* SCK, D0, D1, LD */
		pins = "GPIO_32", "GPIO_33", "GPIO_34", "GPIO_35";
		function = "sgpio_a";
	};
};

&mdio1 {
	status = "okay";
};

&phy0 {
	status = "okay";
};

&phy1 {
	status = "okay";
};

&port0 {
	phy-handle = <&phy0>;
	phy-mode = "gmii";
	phys = <&serdes 0 CU(0)>;
	status = "okay";
};

&port1 {
	phy-handle = <&phy1>;
	phy-mode = "gmii";
	phys = <&serdes 1 CU(1)>;
	status = "okay";
};

&port2 {
	sfp = <&sfp2>;
	managed = "in-band-status";
	phy-mode = "sgmii";
	phys = <&serdes 2 SERDES6G(0)>;
	status = "okay";
};

&port3 {
	sfp = <&sfp3>;
	managed = "in-band-status";
	phy-mode = "sgmii";
	phys = <&serdes 3 SERDES6G(1)>;
	status = "okay";
};

&serdes {
	status = "okay";
};

&sgpio {
	pinctrl-0 = <&sgpio_a_pins>;
	pinctrl-names = "default";
	microchip,sgpio-port-ranges = <0 3>, <8 11>;
	status = "okay";

	gpio@0 {
		ngpios = <64>;
	};
	gpio@1 {
		ngpios = <64>;
	};
};

&switch {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC
 *
 * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries
 *
 * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
 *
 */

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mfd/atmel-flexcom.h>
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/microchip,lan966x.h>

/ {
	model = "Microchip LAN966 family SoC";
	compatible = "microchip,lan966";
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			clock-frequency = <600000000>;
			reg = <0x0>;
		};
	};

	clocks {
		sys_clk: sys_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <165625000>;
		};

		cpu_clk: cpu_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <600000000>;
		};

		ddr_clk: ddr_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <300000000>;
		};

		nic_clk: nic_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <200000000>;
		};
	};

	clks: clock-controller@e00c00a8 {
		compatible = "microchip,lan966x-gck";
		#clock-cells = <1>;
		clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
		clock-names = "cpu", "ddr", "sys";
		reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupt-parent = <&gic>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
		clock-frequency = <37500000>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		udc: usb@200000 {
			compatible = "microchip,lan9662-udc",
				     "atmel,sama5d3-udc";
			reg = <0x00200000 0x80000>,
			      <0xe0808000 0x400>;
			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
			clock-names = "pclk", "hclk";
			status = "disabled";
		};

		switch: switch@e0000000 {
			compatible = "microchip,lan966x-switch";
			reg = <0xe0000000 0x0100000>,
			      <0xe2000000 0x0800000>;
			reg-names = "cpu", "gcb";
			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "xtr", "fdma", "ana", "ptp",
					  "ptp-ext";
			resets = <&reset 0>;
			reset-names = "switch";
			status = "disabled";

			ethernet-ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port0: port@0 {
					reg = <0>;
					status = "disabled";
				};

				port1: port@1 {
					reg = <1>;
					status = "disabled";
				};

				port2: port@2 {
					reg = <2>;
					status = "disabled";
				};

				port3: port@3 {
					reg = <3>;
					status = "disabled";
				};

				port4: port@4 {
					reg = <4>;
					status = "disabled";
				};

				port5: port@5 {
					reg = <5>;
					status = "disabled";
				};

				port6: port@6 {
					reg = <6>;
					status = "disabled";
				};

				port7: port@7 {
					reg = <7>;
					status = "disabled";
				};
			};
		};

		otp: otp@e0021000 {
			compatible = "microchip,lan9668-otpc", "microchip,lan9662-otpc";
			reg = <0xe0021000 0x300>;
		};

		flx0: flexcom@e0040000 {
			compatible = "atmel,sama5d2-flexcom";
			reg = <0xe0040000 0x100>;
			clocks = <&clks GCK_ID_FLEXCOM0>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0xe0040000 0x800>;
			status = "disabled";

			usart0: serial@200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0x200 0x200>;
				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
				       <&dma0 AT91_XDMAC_DT_PERID(2)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "usart";
				atmel,fifo-size = <32>;
				status = "disabled";
			};

			spi0: spi@400 {
				compatible = "atmel,at91rm9200-spi";
				reg = <0x400 0x200>;
				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
				       <&dma0 AT91_XDMAC_DT_PERID(2)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "spi_clk";
				atmel,fifo-size = <32>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c0: i2c@600 {
				compatible = "microchip,sam9x60-i2c";
				reg = <0x600 0x200>;
				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
				       <&dma0 AT91_XDMAC_DT_PERID(2)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		flx1: flexcom@e0044000 {
			compatible = "atmel,sama5d2-flexcom";
			reg = <0xe0044000 0x100>;
			clocks = <&clks GCK_ID_FLEXCOM1>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0xe0044000 0x800>;
			status = "disabled";

			usart1: serial@200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0x200 0x200>;
				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
				       <&dma0 AT91_XDMAC_DT_PERID(4)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "usart";
				atmel,fifo-size = <32>;
				status = "disabled";
			};

			spi1: spi@400 {
				compatible = "atmel,at91rm9200-spi";
				reg = <0x400 0x200>;
				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
				       <&dma0 AT91_XDMAC_DT_PERID(4)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "spi_clk";
				atmel,fifo-size = <32>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@600 {
				compatible = "microchip,sam9x60-i2c";
				reg = <0x600 0x200>;
				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
				       <&dma0 AT91_XDMAC_DT_PERID(4)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		trng: rng@e0048000 {
			compatible = "atmel,at91sam9g45-trng";
			reg = <0xe0048000 0x100>;
			clocks = <&nic_clk>;
		};

		aes: crypto@e004c000 {
			compatible = "atmel,at91sam9g46-aes";
			reg = <0xe004c000 0x100>;
			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
			       <&dma0 AT91_XDMAC_DT_PERID(13)>;
			dma-names = "tx", "rx";
			clocks = <&nic_clk>;
			clock-names = "aes_clk";
		};

		flx2: flexcom@e0060000 {
			compatible = "atmel,sama5d2-flexcom";
			reg = <0xe0060000 0x100>;
			clocks = <&clks GCK_ID_FLEXCOM2>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0xe0060000 0x800>;
			status = "disabled";

			usart2: serial@200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0x200 0x200>;
				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
				       <&dma0 AT91_XDMAC_DT_PERID(6)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "usart";
				atmel,fifo-size = <32>;
				status = "disabled";
			};

			spi2: spi@400 {
				compatible = "atmel,at91rm9200-spi";
				reg = <0x400 0x200>;
				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
				       <&dma0 AT91_XDMAC_DT_PERID(6)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "spi_clk";
				atmel,fifo-size = <32>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c2: i2c@600 {
				compatible = "microchip,sam9x60-i2c";
				reg = <0x600 0x200>;
				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
				       <&dma0 AT91_XDMAC_DT_PERID(6)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		flx3: flexcom@e0064000 {
			compatible = "atmel,sama5d2-flexcom";
			reg = <0xe0064000 0x100>;
			clocks = <&clks GCK_ID_FLEXCOM3>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0xe0064000 0x800>;
			status = "disabled";

			usart3: serial@200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0x200 0x200>;
				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
				       <&dma0 AT91_XDMAC_DT_PERID(8)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "usart";
				atmel,fifo-size = <32>;
				status = "disabled";
			};

			spi3: spi@400 {
				compatible = "atmel,at91rm9200-spi";
				reg = <0x400 0x200>;
				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
				       <&dma0 AT91_XDMAC_DT_PERID(8)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "spi_clk";
				atmel,fifo-size = <32>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c3: i2c@600 {
				compatible = "microchip,sam9x60-i2c";
				reg = <0x600 0x200>;
				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
				       <&dma0 AT91_XDMAC_DT_PERID(8)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		dma0: dma-controller@e0068000 {
			compatible = "microchip,sama7g5-dma";
			reg = <0xe0068000 0x1000>;
			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
			#dma-cells = <1>;
			clocks = <&nic_clk>;
			clock-names = "dma_clk";
		};

		sha: crypto@e006c000 {
			compatible = "atmel,at91sam9g46-sha";
			reg = <0xe006c000 0xec>;
			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&dma0 AT91_XDMAC_DT_PERID(14)>;
			dma-names = "tx";
			clocks = <&nic_clk>;
			clock-names = "sha_clk";
		};

		flx4: flexcom@e0070000 {
			compatible = "atmel,sama5d2-flexcom";
			reg = <0xe0070000 0x100>;
			clocks = <&clks GCK_ID_FLEXCOM4>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0xe0070000 0x800>;
			status = "disabled";

			usart4: serial@200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0x200 0x200>;
				interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
				       <&dma0 AT91_XDMAC_DT_PERID(10)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "usart";
				atmel,fifo-size = <32>;
				status = "disabled";
			};

			spi4: spi@400 {
				compatible = "atmel,at91rm9200-spi";
				reg = <0x400 0x200>;
				interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
				       <&dma0 AT91_XDMAC_DT_PERID(10)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				clock-names = "spi_clk";
				atmel,fifo-size = <32>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c4: i2c@600 {
				compatible = "microchip,sam9x60-i2c";
				reg = <0x600 0x200>;
				interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
				       <&dma0 AT91_XDMAC_DT_PERID(10)>;
				dma-names = "tx", "rx";
				clocks = <&nic_clk>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		timer0: timer@e008c000 {
			compatible = "snps,dw-apb-timer";
			reg = <0xe008c000 0x400>;
			clocks = <&nic_clk>;
			clock-names = "timer";
			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
		};

		watchdog: watchdog@e0090000 {
			compatible = "snps,dw-wdt";
			reg = <0xe0090000 0x1000>;
			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&nic_clk>;
			status = "disabled";
		};

		cpu_ctrl: syscon@e00c0000 {
			compatible = "microchip,lan966x-cpu-syscon", "syscon";
			reg = <0xe00c0000 0x350>;
		};

		can0: can@e081c000 {
			compatible = "bosch,m_can";
			reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
			reg-names = "m_can", "message_ram";
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "int0", "int1";
			clocks = <&clks GCK_ID_MCAN0>, <&clks GCK_ID_MCAN0>;
			clock-names = "hclk", "cclk";
			assigned-clocks = <&clks GCK_ID_MCAN0>;
			assigned-clock-rates = <40000000>;
			bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
			status = "disabled";
		};

		can1: can@e0820000 {
			compatible = "bosch,m_can";
			reg = <0xe0820000 0xfc>, <0x00100000 0x8000>;
			reg-names = "m_can", "message_ram";
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "int0", "int1";
			clocks = <&clks GCK_ID_MCAN1>, <&clks GCK_ID_MCAN1>;
			clock-names = "hclk", "cclk";
			assigned-clocks = <&clks GCK_ID_MCAN1>;
			assigned-clock-rates = <40000000>;
			bosch,mram-cfg = <0x4000 0 0 64 0 0 32 32>;
			status = "disabled";
		};

		reset: reset-controller@e200400c {
			compatible = "microchip,lan966x-switch-reset";
			reg = <0xe200400c 0x4>;
			reg-names = "gcb";
			#reset-cells = <1>;
			cpu-syscon = <&cpu_ctrl>;
		};

		gpio: pinctrl@e2004064 {
			compatible = "microchip,lan966x-pinctrl";
			reg = <0xe2004064 0xb4>,
			    <0xe2010024 0x138>;
			resets = <&reset 0>;
			reset-names = "switch";
			gpio-controller;
			#gpio-cells = <2>;
			gpio-ranges = <&gpio 0 0 78>;
			interrupt-controller;
			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
			#interrupt-cells = <2>;
		};

		mdio0: mdio@e2004118 {
			compatible = "microchip,lan966x-miim";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0xe2004118 0x24>;
			clocks = <&sys_clk>;
			status = "disabled";
		};

		mdio1: mdio@e200413c {
			compatible = "microchip,lan966x-miim";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0xe200413c 0x24>,
			      <0xe2010020 0x4>;
			clocks = <&sys_clk>;
			status = "disabled";

			phy0: ethernet-phy@1 {
				reg = <1>;
				interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			phy1: ethernet-phy@2 {
				reg = <2>;
				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};
		};

		sgpio: gpio@e2004190 {
			compatible = "microchip,sparx5-sgpio";
			reg = <0xe2004190 0x118>;
			clocks = <&sys_clk>;
			resets = <&reset 0>;
			reset-names = "switch";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			sgpio_in: gpio@0 {
				compatible = "microchip,sparx5-sgpio-bank";
				reg = <0>;
				gpio-controller;
				#gpio-cells = <3>;
				interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <3>;
			};

			sgpio_out: gpio@1 {
				compatible = "microchip,sparx5-sgpio-bank";
				reg = <1>;
				gpio-controller;
				#gpio-cells = <3>;
			};
		};

		hwmon: hwmon@e2010180 {
			compatible = "microchip,lan9668-hwmon";
			reg = <0xe2010180 0xc>,
			      <0xe20042a8 0xc>;
			reg-names = "pvt", "fan";
			clocks = <&sys_clk>;
		};

		serdes: serdes@e202c000 {
			compatible = "microchip,lan966x-serdes";
			reg = <0xe202c000 0x9c>,
			      <0xe2004010 0x4>;
			#phy-cells = <2>;
			status = "disabled";
		};

		gic: interrupt-controller@e8c11000 {
			compatible = "arm,gic-400", "arm,cortex-a7-gic";
			#interrupt-cells = <3>;
			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-controller;
			reg = <0xe8c11000 0x1000>,
			      <0xe8c12000 0x2000>,
			      <0xe8c14000 0x2000>,
			      <0xe8c16000 0x2000>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only

/dts-v1/;

#include "omap34xx.dtsi"
#include "logicpd-som-lv.dtsi"
#include "logicpd-som-lv-baseboard.dtsi"
#include "omap-gpmc-smsc9221.dtsi"

/ {
	model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit";
	compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3";
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_2_pins>;
	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only

/dts-v1/;

#include "omap36xx.dtsi"
#include "logicpd-som-lv.dtsi"
#include "logicpd-som-lv-baseboard.dtsi"
#include "omap-gpmc-smsc9221.dtsi"

/ {
	model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
	compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_2_pins>;
	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
		>;
	};
};