code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2011-2013 Texas Instruments Incorporated - https://www.ti.com/
 */
#include <dt-bindings/input/input.h>
#include "elpida_ecb240abacn.dtsi"
#include "omap4-mcpdm.dtsi"

/ {
	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>; /* 1 GB */
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		dsp_memory_region: dsp-memory@98000000 {
			compatible = "shared-dma-pool";
			reg = <0x98000000 0x800000>;
			reusable;
			status = "okay";
		};

		ipu_memory_region: ipu-memory@98800000 {
			compatible = "shared-dma-pool";
			reg = <0x98800000 0x7000000>;
			reusable;
			status = "okay";
		};
	};

	chosen {
		stdout-path = &uart3;
	};

	aliases {
		display0 = &dvi0;
		display1 = &hdmi0;
		ethernet = &ethernet;
	};

	leds: leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <
			&led_wkgpio_pins
		>;

		led-heartbeat {
			label = "pandaboard::status1";
			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};

		led-mmc {
			label = "pandaboard::status2";
			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc0";
		};
	};

	gpio_keys: gpio_keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <
			&button_pins
		>;

		buttonS2 {
			label = "button S2";
			gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;	/* gpio_121 */
			linux,code = <BTN_0>;
			wakeup-source;
		};
	};

	sound: sound {
		compatible = "ti,abe-twl6040";
		ti,model = "PandaBoard";

		ti,mclk-freq = <38400000>;

		ti,mcpdm = <&mcpdm>;

		ti,twl6040 = <&twl6040>;

		/* Audio routing */
		ti,audio-routing =
			"Headset Stereophone", "HSOL",
			"Headset Stereophone", "HSOR",
			"Ext Spk", "HFL",
			"Ext Spk", "HFR",
			"Line Out", "AUXL",
			"Line Out", "AUXR",
			"HSMIC", "Headset Mic",
			"Headset Mic", "Headset Mic Bias",
			"AFML", "Line In",
			"AFMR", "Line In";
	};

	/* HS USB Port 1 Power */
	hsusb1_power: hsusb1_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb1_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;	/* gpio_1 */
		startup-delay-us = <70000>;
		enable-active-high;
		/*
		 * boot-on is required along with always-on as the
		 * regulator framework doesn't enable the regulator
		 * if boot-on is not there.
		 */
		regulator-always-on;
		regulator-boot-on;
	};

	/* HS USB Host PHY on PORT 1 */
	hsusb1_phy: hsusb1_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;   /* gpio_62 */
		#phy-cells = <0>;
		vcc-supply = <&hsusb1_power>;
		clocks = <&auxclk3_ck>;
		clock-names = "main_clk";
		clock-frequency = <19200000>;
	};

	/* regulator for wl12xx on sdio5 */
	wl12xx_vmmc: wl12xx_vmmc {
		pinctrl-names = "default";
		pinctrl-0 = <&wl12xx_gpio>;
		compatible = "regulator-fixed";
		regulator-name = "vwl1271";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <70000>;
		enable-active-high;
	};

	tfp410: encoder0 {
		compatible = "ti,tfp410";
		powerdown-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;	/* gpio_0 */

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector0 {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c3>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};

	tpd12s015: encoder1 {
		compatible = "ti,tpd12s015";

		gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>,	/* 60, CT CP HPD */
			<&gpio2 9 GPIO_ACTIVE_HIGH>,	/* 41, LS OE */
			<&gpio2 31 GPIO_ACTIVE_HIGH>;	/* 63, HPD */

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tpd12s015_in: endpoint {
					remote-endpoint = <&hdmi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tpd12s015_out: endpoint {
					remote-endpoint = <&hdmi_connector_in>;
				};
			};
		};
	};

	hdmi0: connector1 {
		compatible = "hdmi-connector";
		label = "hdmi";

		type = "a";

		port {
			hdmi_connector_in: endpoint {
				remote-endpoint = <&tpd12s015_out>;
			};
		};
	};
};

&omap4_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&dss_dpi_pins
			&tfp410_pins
			&dss_hdmi_pins
			&tpd12s015_pins
			&hsusbb1_pins
	>;

	twl6040_pins: pinmux_twl6040_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3)	/* hdq_sio.gpio_127 */
			OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0)	/* sys_nirq2.sys_nirq2 */
		>;
	};

	mcbsp1_pins: pinmux_mcbsp1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
			OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp1_dr.abe_mcbsp1_dr */
			OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp1_dx.abe_mcbsp1_dx */
			OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x162, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data23 */
			OMAP4_IOPAD(0x164, PIN_OUTPUT | MUX_MODE5) 	/* dispc2_data22 */
			OMAP4_IOPAD(0x166, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data21 */
			OMAP4_IOPAD(0x168, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data20 */
			OMAP4_IOPAD(0x16a, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data19 */
			OMAP4_IOPAD(0x16c, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data18 */
			OMAP4_IOPAD(0x16e, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data15 */
			OMAP4_IOPAD(0x170, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data14 */
			OMAP4_IOPAD(0x172, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data13 */
			OMAP4_IOPAD(0x174, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data12 */
			OMAP4_IOPAD(0x176, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data11 */

			OMAP4_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data10 */
			OMAP4_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data9 */
			OMAP4_IOPAD(0x1b8, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data16 */
			OMAP4_IOPAD(0x1ba, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data17 */
			OMAP4_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE5)	/* dispc2_hsync */
			OMAP4_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE5)	/* dispc2_pclk */
			OMAP4_IOPAD(0x1c0, PIN_OUTPUT | MUX_MODE5)	/* dispc2_vsync */
			OMAP4_IOPAD(0x1c2, PIN_OUTPUT | MUX_MODE5)	/* dispc2_de */
			OMAP4_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data8 */
			OMAP4_IOPAD(0x1c6, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data7 */
			OMAP4_IOPAD(0x1c8, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data6 */
			OMAP4_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data5 */
			OMAP4_IOPAD(0x1cc, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data4 */
			OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data3 */

			OMAP4_IOPAD(0x1d0, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data2 */
			OMAP4_IOPAD(0x1d2, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data1 */
			OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE5)	/* dispc2_data0 */
		>;
	};

	tfp410_pins: pinmux_tfp410_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x184, PIN_OUTPUT | MUX_MODE3)	/* gpio_0 */
		>;
	};

	dss_hdmi_pins: pinmux_dss_hdmi_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)		/* hdmi_cec.hdmi_cec */
			OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_scl.hdmi_scl */
			OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_sda.hdmi_sda */
		>;
	};

	tpd12s015_pins: pinmux_tpd12s015_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a17.gpio_41 */
			OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)		/* gpmc_nbe1.gpio_60 */
			OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* hdmi_hpd.gpio_63 */
		>;
	};

	hsusbb1_pins: pinmux_hsusbb1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
			OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4)		/* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
			OMAP4_IOPAD(0x0c6, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
			OMAP4_IOPAD(0x0c8, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
			OMAP4_IOPAD(0x0ca, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
			OMAP4_IOPAD(0x0cc, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
			OMAP4_IOPAD(0x0ce, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
			OMAP4_IOPAD(0x0d0, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
			OMAP4_IOPAD(0x0d2, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
			OMAP4_IOPAD(0x0d4, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
			OMAP4_IOPAD(0x0d6, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
			OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
			OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
		>;
	};

	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_scl */
			OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_sda */
		>;
	};

	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_scl */
			OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_sda */
		>;
	};

	i2c4_pins: pinmux_i2c4_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c4_scl */
			OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c4_sda */
		>;
	};

	/*
	 * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
	 * REVISIT: Are the pull-ups needed for GPIO 48 and 49?
	 */
	wl12xx_gpio: pinmux_wl12xx_gpio {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a19.gpio_43 */
			OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a22.gpio_46 */
			OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_a24.gpio_48 */
			OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_a25.gpio_49 */
		>;
	};

	/* wl12xx GPIO inputs and SDIO pins */
	wl12xx_pins: pinmux_wl12xx_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3)		/* gpmc_ncs2.gpio_52 */
			OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)		/* gpmc_ncs3.gpio_53 */
			OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_clk.sdmmc5_clk */
			OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_cmd.sdmmc5_cmd */
			OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat0.sdmmc5_dat0 */
			OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat1.sdmmc5_dat1 */
			OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat2.sdmmc5_dat2 */
			OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat3.sdmmc5_dat3 */
		>;
	};

	button_pins: pinmux_button_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpio_121 */
		>;
	};
};

&omap4_pmx_wkup {
	led_wkgpio_pins: pinmux_leds_wkpins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE3)	/* gpio_wk7 */
			OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3)	/* gpio_wk8 */
		>;
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <400000>;

	twl: twl@48 {
		reg = <0x48>;
		/* IRQ# = 7 */
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
	};

	twl6040: twl@4b {
		compatible = "ti,twl6040";
		#clock-cells = <0>;
		reg = <0x4b>;

		pinctrl-names = "default";
		pinctrl-0 = <&twl6040_pins>;

		/* IRQ# = 119 */
		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
		ti,audpwron-gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>;  /* gpio line 127 */

		vio-supply = <&v1v8>;
		v2v1-supply = <&v2v1>;
		enable-active-high;
	};
};

#include "twl6030.dtsi"
#include "twl6030_omap4.dtsi"

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;

	clock-frequency = <400000>;
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;

	clock-frequency = <100000>;

	/*
	 * Display monitor features are burnt in their EEPROM as EDID data.
	 * The EEPROM is connected as I2C slave device.
	 */
	eeprom@50 {
		compatible = "ti,eeprom";
		reg = <0x50>;
	};
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4_pins>;

	clock-frequency = <400000>;
};

&mmc1 {
	vmmc-supply = <&vmmc>;
	bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&mmc4 {
	status = "disabled";
};

&mmc5 {
	pinctrl-names = "default";
	pinctrl-0 = <&wl12xx_pins>;
	vmmc-supply = <&wl12xx_vmmc>;
	interrupts-extended = <&wakeupgen GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core 0x10e>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		/* gpio_53 with gpmc_ncs3 pad as wakeup */
		interrupts-extended = <&gpio2 21 IRQ_TYPE_LEVEL_HIGH>,
				      <&omap4_pmx_core 0x3a>;
		interrupt-names = "irq", "wakeup";
		ref-clock-frequency = <38400000>;
	};
};

&emif1 {
	cs1-used;
	device-handle = <&elpida_ECB240ABACN>;
};

&emif2 {
	cs1-used;
	device-handle = <&elpida_ECB240ABACN>;
};

&mcbsp1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp1_pins>;
	status = "okay";
};

&twl_usb_comparator {
	usb-supply = <&vusb>;
};

&uart2 {
	interrupts-extended = <&wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core OMAP4_UART2_RX>;
};

&uart3 {
	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core OMAP4_UART3_RX>;
};

&uart4 {
	interrupts-extended = <&wakeupgen GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core OMAP4_UART4_RX>;
};

&usb_otg_hs {
	interface-type = <1>;
	mode = <3>;
	power = <50>;
};

&usbhshost {
	port1-mode = "ehci-phy";
};

&usbhsehci {
	phys = <&hsusb1_phy>;

	#address-cells = <1>;
	#size-cells = <0>;

	hub@1 {
		compatible = "usb424,9514";
		reg = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		ethernet: ethernet@1 {
			compatible = "usb424,ec00";
			reg = <1>;
		};
	};
};

&dss {
	status = "okay";

	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};

&dsi2 {
	status = "okay";
	vdd-supply = <&vcxio>;
};

&hdmi {
	status = "okay";
	vdda-supply = <&vdac>;

	port {
		hdmi_out: endpoint {
			remote-endpoint = <&tpd12s015_in>;
		};
	};
};

&dsp {
	status = "okay";
	memory-region = <&dsp_memory_region>;
	ti,timers = <&timer5>;
	ti,watchdog-timers = <&timer6>;
};

&ipu {
	status = "okay";
	memory-region = <&ipu_memory_region>;
	ti,timers = <&timer3>;
	ti,watchdog-timers = <&timer9>, <&timer11>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap4460.dtsi"
#include "omap4-panda-common.dtsi"

/ {
	model = "TI OMAP4 PandaBoard-ES";
	compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
};

/* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
&sound {
	ti,model = "PandaBoardES";

	/* Audio routing */
	ti,audio-routing =
		"Headset Stereophone", "HSOL",
		"Headset Stereophone", "HSOR",
		"Ext Spk", "HFL",
		"Ext Spk", "HFR",
		"Line Out", "AUXL",
		"Line Out", "AUXR",
		"AFML", "Line In",
		"AFMR", "Line In";
};

/* PandaboardES has external pullups on SCL & SDA */
&dss_hdmi_pins {
	pinctrl-single,pins = <
		OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)		/* hdmi_cec.hdmi_cec */
		OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)		/* hdmi_scl.hdmi_scl */
		OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)		/* hdmi_sda.hdmi_sda */
		>;
};

&omap4_pmx_core {
	led_gpio_pins: gpio_led_pmx {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0f6, PIN_OUTPUT | MUX_MODE3)	/* gpio_110 */
		>;
	};

	button_pins: pinmux_button_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0fc, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_113 */
		>;
	};

	bt_pins: pinmux_bt_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a22.gpio_46 - BTEN */
			OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_a25.gpio_49 - BTWAKEUP */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_cts.uart2_cts - HCI */
			OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0)		/* uart2_rts.uart2_rts */
			OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_rx.uart2_rx */
			OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
		>;
	};
};

&led_wkgpio_pins {
	pinctrl-single,pins = <
		OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3)	/* gpio_wk8 */
	>;
};

&leds {
	pinctrl-0 = <
		&led_gpio_pins
		&led_wkgpio_pins
	>;

	led-heartbeat {
		gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
	};
	led-mmc {
		gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
	};
};

&gpio_keys {
	buttonS2 {
		gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* gpio_113 */
	};
};

&gpio1_target {
	 ti,no-reset-on-init;
};

&wl12xx_gpio {
	pinctrl-single,pins = <
		OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a19.gpio_43 */
		OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_a24.gpio_48 */
	>;
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins &bt_pins>;
	bluetooth: tiwi {
		compatible = "ti,wl1271-st";
		enable-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;	/* GPIO_46 */
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap443x.dtsi"
#include "omap4-panda-common.dtsi"

/ {
	model = "TI OMAP4 PandaBoard";
	compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 */
#include "omap4-sdp.dts"

/* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
&dss_hdmi_pins {
	pinctrl-single,pins = <
		OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)		/* hdmi_cec.hdmi_cec */
		OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)		/* hdmi_scl.hdmi_scl */
		OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)		/* hdmi_sda.hdmi_sda */
		>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap443x.dtsi"
#include "elpida_ecb240abacn.dtsi"
#include "omap4-mcpdm.dtsi"

/ {
	model = "TI OMAP4 SDP board";
	compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>; /* 1 GB */
	};

	aliases {
		display0 = &lcd0;
		display1 = &lcd1;
		display2 = &hdmi0;
	};

	vdd_eth: fixedregulator-vdd-eth {
		pinctrl-names = "default";
		pinctrl-0 = <&enet_enable_gpio>;

		compatible = "regulator-fixed";
		regulator-name = "VDD_ETH";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>;  /* gpio line 48 */
		enable-active-high;
		regulator-boot-on;
		startup-delay-us = <25000>;
	};

	vbat: fixedregulator-vbat {
		compatible = "regulator-fixed";
		regulator-name = "VBAT";
		regulator-min-microvolt = <3750000>;
		regulator-max-microvolt = <3750000>;
		regulator-boot-on;
	};

	led-controller-1 {
		compatible = "gpio-leds";

		led-1 {
			label = "omap4:green:debug0";
			gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; /* 61 */
		};

		led-2 {
			label = "omap4:green:debug1";
			gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; /* 30 */
		};

		led-3 {
			label = "omap4:green:debug2";
			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; /* 7 */
		};

		led-4 {
			label = "omap4:green:debug3";
			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* 8 */
		};

		led-5 {
			label = "omap4:green:debug4";
			gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; /* 50 */
		};

		led-6 {
			label = "omap4:blue:user";
			gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* 169 */
		};

		led-7 {
			label = "omap4:red:user";
			gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>; /* 170 */
		};

		led-8 {
			label = "omap4:green:user";
			gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* 139 */
		};
	};

	led-controller-2 {
		compatible = "pwm-leds";

		led-9 {
			label = "omap4::keypad";
			pwms = <&twl_pwm 0 7812500>;
			max-brightness = <127>;
		};

		led-10 {
			label = "omap4:green:chrg";
			pwms = <&twl_pwmled 0 7812500>;
			max-brightness = <255>;
		};
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&twl_pwm 1 7812500>;
		brightness-levels = <
				0 10 20 30 40
				50 60 70 80 90
				100 110 120 127
				>;
		default-brightness-level = <13>;
	};

	sound {
		compatible = "ti,abe-twl6040";
		ti,model = "SDP4430";

		ti,jack-detection = <1>;
		ti,mclk-freq = <38400000>;

		ti,mcpdm = <&mcpdm>;
		ti,dmic = <&dmic>;

		ti,twl6040 = <&twl6040>;

		/* Audio routing */
		ti,audio-routing =
			"Headset Stereophone", "HSOL",
			"Headset Stereophone", "HSOR",
			"Earphone Spk", "EP",
			"Ext Spk", "HFL",
			"Ext Spk", "HFR",
			"Line Out", "AUXL",
			"Line Out", "AUXR",
			"Vibrator", "VIBRAL",
			"Vibrator", "VIBRAR",
			"HSMIC", "Headset Mic",
			"Headset Mic", "Headset Mic Bias",
			"MAINMIC", "Main Handset Mic",
			"Main Handset Mic", "Main Mic Bias",
			"SUBMIC", "Sub Handset Mic",
			"Sub Handset Mic", "Main Mic Bias",
			"AFML", "Line In",
			"AFMR", "Line In",
			"DMic", "Digital Mic",
			"Digital Mic", "Digital Mic1 Bias";
	};

	/* regulator for wl12xx on sdio5 */
	wl12xx_vmmc: wl12xx_vmmc {
		pinctrl-names = "default";
		pinctrl-0 = <&wl12xx_gpio>;
		compatible = "regulator-fixed";
		regulator-name = "vwl1271";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <70000>;
		enable-active-high;
	};

	tpd12s015: encoder {
		compatible = "ti,tpd12s015";

		gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>,	/* 60, CT CP HPD */
			<&gpio2 9 GPIO_ACTIVE_HIGH>,	/* 41, LS OE */
			<&gpio2 31 GPIO_ACTIVE_HIGH>;	/* 63, HPD */

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tpd12s015_in: endpoint {
					remote-endpoint = <&hdmi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tpd12s015_out: endpoint {
					remote-endpoint = <&hdmi_connector_in>;
				};
			};
		};
	};

	hdmi0: connector {
		compatible = "hdmi-connector";
		label = "hdmi";

		type = "c";

		port {
			hdmi_connector_in: endpoint {
				remote-endpoint = <&tpd12s015_out>;
			};
		};
	};
};

&omap4_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&dss_hdmi_pins
			&tpd12s015_pins
	>;

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_cts.uart2_cts */
			OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0)		/* uart2_rts.uart2_rts */
			OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_rx.uart2_rx */
			OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart3_cts_rctx.uart3_cts_rctx */
			OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0)		/* uart3_rts_sd.uart3_rts_sd */
			OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0)		/* uart3_rx_irrx.uart3_rx_irrx */
			OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0)		/* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	uart4_pins: pinmux_uart4_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0)		/* uart4_rx.uart4_rx */
			OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0)		/* uart4_tx.uart4_tx */
		>;
	};

	twl6040_pins: pinmux_twl6040_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3)		/* hdq_sio.gpio_127 */
			OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0)		/* sys_nirq2.sys_nirq2 */
		>;
	};

	dmic_pins: pinmux_dmic_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x110, PIN_OUTPUT | MUX_MODE0)		/* abe_dmic_clk1.abe_dmic_clk1 */
			OMAP4_IOPAD(0x112, PIN_INPUT | MUX_MODE0)		/* abe_dmic_din1.abe_dmic_din1 */
			OMAP4_IOPAD(0x114, PIN_INPUT | MUX_MODE0)		/* abe_dmic_din2.abe_dmic_din2 */
			OMAP4_IOPAD(0x116, PIN_INPUT | MUX_MODE0)		/* abe_dmic_din3.abe_dmic_din3 */
		>;
	};

	mcbsp1_pins: pinmux_mcbsp1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
			OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp1_dr.abe_mcbsp1_dr */
			OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp1_dx.abe_mcbsp1_dx */
			OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
			OMAP4_IOPAD(0x0f8, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp2_dr.abe_mcbsp2_dr */
			OMAP4_IOPAD(0x0fa, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp2_dx.abe_mcbsp2_dx */
			OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
		>;
	};

	mcspi1_pins: pinmux_mcspi1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0)		/*  mcspi1_clk.mcspi1_clk */
			OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0)		/*  mcspi1_somi.mcspi1_somi */
			OMAP4_IOPAD(0x136, PIN_INPUT | MUX_MODE0)		/*  mcspi1_simo.mcspi1_simo */
			OMAP4_IOPAD(0x138, PIN_INPUT | MUX_MODE0)		/*  mcspi1_cs0.mcspi1_cs0 */
		>;
	};

	dss_hdmi_pins: pinmux_dss_hdmi_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)		/* hdmi_cec.hdmi_cec */
			OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_scl.hdmi_scl */
			OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_sda.hdmi_sda */
		>;
	};

	tpd12s015_pins: pinmux_tpd12s015_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a17.gpio_41 */
			OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)		/* gpmc_nbe1.gpio_60 */
			OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* hdmi_hpd.gpio_63 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
			OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
		>;
	};

	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_scl */
			OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_sda */
		>;
	};

	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_scl */
			OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_sda */
		>;
	};

	i2c4_pins: pinmux_i2c4_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c4_scl */
			OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c4_sda */
		>;
	};

	/* wl12xx GPIO output for WLAN_EN */
	wl12xx_gpio: pinmux_wl12xx_gpio {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3)		/* gpmc_nwp.gpio_54 */
		>;
	};

	/* wl12xx GPIO inputs and SDIO pins */
	wl12xx_pins: pinmux_wl12xx_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)		/* gpmc_ncs3.gpio_53 */
			OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_clk.sdmmc5_clk */
			OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_cmd.sdmmc5_cmd */
			OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat0.sdmmc5_dat0 */
			OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat1.sdmmc5_dat1 */
			OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat2.sdmmc5_dat2 */
			OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat3.sdmmc5_dat3 */
		>;
	};

	/* gpio_48 for ENET_ENABLE */
	enet_enable_gpio: pinmux_enet_enable_gpio {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a24.gpio_48 */
		>;
	};

	ks8851_pins: pinmux_ks8851_pins {
		pinctrl-single,pins = <
			/* ENET_INT */
			OMAP4_IOPAD(0x054, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_ad10.gpio_34 */
			/*
			 * Misterious pin which makes the ethernet working
			 * The legacy board file requested this pin on boot
			 * (ETH_KS8851_QUART) and set it to high, similarly to
			 * the ENET_ENABLE pin.
			 * We could use gpio-hog to keep it high, but let's use
			 * it as a reset GPIO for ks8851.
			 */
			OMAP4_IOPAD(0x13a, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* mcspi1_cs1.gpio_138 */
		>;
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <400000>;

	twl: twl@48 {
		reg = <0x48>;
		/* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
	};

	twl6040: twl@4b {
		compatible = "ti,twl6040";
		#clock-cells = <0>;
		reg = <0x4b>;

		pinctrl-names = "default";
		pinctrl-0 = <&twl6040_pins>;

		/* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
		ti,audpwron-gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>;  /* gpio line 127 */

		vio-supply = <&v1v8>;
		v2v1-supply = <&v2v1>;
		enable-active-high;

		/* regulators for vibra motor */
		vddvibl-supply = <&vbat>;
		vddvibr-supply = <&vbat>;

		vibra {
			/* Vibra driver, motor resistance parameters */
			ti,vibldrv-res = <8>;
			ti,vibrdrv-res = <3>;
			ti,viblmotor-res = <10>;
			ti,vibrmotor-res = <10>;
		};
	};
};

#include "twl6030.dtsi"
#include "twl6030_omap4.dtsi"

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;

	clock-frequency = <400000>;
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;

	clock-frequency = <400000>;

	/*
	 * Temperature Sensor
	 * https://www.ti.com/lit/ds/symlink/tmp105.pdf
	 */
	tmp105@48 {
		compatible = "ti,tmp105";
		reg = <0x48>;
	};

	/*
	 * Ambient Light Sensor
	 * http://www.rohm.com/products/databook/sensor/pdf/bh1780gli-e.pdf
	 */
	bh1780@29 {
		compatible = "rohm,bh1780";
		reg = <0x29>;
	};
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4_pins>;

	clock-frequency = <400000>;

	/*
	 * 3-Axis Digital Compass
	 * https://www.sparkfun.com/datasheets/Sensors/Magneto/HMC5843.pdf
	 */
	hmc5843@1e {
		compatible = "honeywell,hmc5843";
		reg = <0x1e>;
	};
};

&mcspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi1_pins>;

	eth@0 {
		pinctrl-names = "default";
		pinctrl-0 = <&ks8851_pins>;

		compatible = "ks8851";
		spi-max-frequency = <24000000>;
		reg = <0>;
		interrupt-parent = <&gpio2>;
		interrupts = <2 IRQ_TYPE_LEVEL_LOW>; /* gpio line 34 */
		vdd-supply = <&vdd_eth>;
		reset-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
	};
};

&mmc1 {
	vmmc-supply = <&vmmc>;
	bus-width = <8>;
};

&mmc2 {
	vmmc-supply = <&vaux1>;
	bus-width = <8>;
	ti,non-removable;
};

&mmc3 {
	status = "disabled";
};

&mmc4 {
	status = "disabled";
};

&mmc5 {
	pinctrl-names = "default";
	pinctrl-0 = <&wl12xx_pins>;
	vmmc-supply = <&wl12xx_vmmc>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1281";
		reg = <2>;
		interrupt-parent = <&gpio1>;
		interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */
		ref-clock-frequency = <26000000>;
		tcxo-clock-frequency = <26000000>;
	};
};

&emif1 {
	cs1-used;
	device-handle = <&elpida_ECB240ABACN>;
};

&emif2 {
	cs1-used;
	device-handle = <&elpida_ECB240ABACN>;
};

&keypad {
	keypad,num-rows = <8>;
	keypad,num-columns = <8>;
	linux,keymap = <0x00000012	/* KEY_E */
			0x00010013	/* KEY_R */
			0x00020014	/* KEY_T */
			0x00030066	/* KEY_HOME */
			0x0004003f	/* KEY_F5 */
			0x000500f0	/* KEY_UNKNOWN */
			0x00060017	/* KEY_I */
			0x0007002a	/* KEY_LEFTSHIFT */
			0x01000020	/* KEY_D*/
			0x01010021	/* KEY_F */
			0x01020022	/* KEY_G */
			0x010300e7	/* KEY_SEND */
			0x01040040	/* KEY_F6 */
			0x010500f0	/* KEY_UNKNOWN */
			0x01060025	/* KEY_K */
			0x0107001c	/* KEY_ENTER */
			0x0200002d	/* KEY_X */
			0x0201002e	/* KEY_C */
			0x0202002f	/* KEY_V */
			0x0203006b	/* KEY_END */
			0x02040041	/* KEY_F7 */
			0x020500f0	/* KEY_UNKNOWN */
			0x02060034	/* KEY_DOT */
			0x0207003a	/* KEY_CAPSLOCK */
			0x0300002c	/* KEY_Z */
			0x0301004e	/* KEY_KPLUS */
			0x03020030	/* KEY_B */
			0x0303003b	/* KEY_F1 */
			0x03040042	/* KEY_F8 */
			0x030500f0	/* KEY_UNKNOWN */
			0x03060018	/* KEY_O */
			0x03070039	/* KEY_SPACE */
			0x04000011	/* KEY_W */
			0x04010015	/* KEY_Y */
			0x04020016	/* KEY_U */
			0x0403003c	/* KEY_F2 */
			0x04040073	/* KEY_VOLUMEUP */
			0x040500f0	/* KEY_UNKNOWN */
			0x04060026	/* KEY_L */
			0x04070069	/* KEY_LEFT */
			0x0500001f	/* KEY_S */
			0x05010023	/* KEY_H */
			0x05020024	/* KEY_J */
			0x0503003d	/* KEY_F3 */
			0x05040043	/* KEY_F9 */
			0x05050072	/* KEY_VOLUMEDOWN */
			0x05060032	/* KEY_M */
			0x0507006a	/* KEY_RIGHT */
			0x06000010	/* KEY_Q */
			0x0601001e	/* KEY_A */
			0x06020031	/* KEY_N */
			0x0603009e	/* KEY_BACK */
			0x0604000e	/* KEY_BACKSPACE */
			0x060500f0	/* KEY_UNKNOWN */
			0x06060019	/* KEY_P */
			0x06070067	/* KEY_UP */
			0x07000094	/* KEY_PROG1 */
			0x07010095	/* KEY_PROG2 */
			0x070200ca	/* KEY_PROG3 */
			0x070300cb	/* KEY_PROG4 */
			0x0704003e	/* KEY_F4 */
			0x070500f0	/* KEY_UNKNOWN */
			0x07060160	/* KEY_OK */
			0x0707006c>;	/* KEY_DOWN */
	linux,input-no-autorepeat;
};

&uart2 {
	interrupts-extended = <&wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core OMAP4_UART2_RX>;
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&uart3 {
	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core OMAP4_UART3_RX>;
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

&uart4 {
	interrupts-extended = <&wakeupgen GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core OMAP4_UART4_RX>;
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins>;
};

&mcbsp1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp1_pins>;
	status = "okay";
};

&mcbsp2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
	status = "okay";
};

&dmic {
	pinctrl-names = "default";
	pinctrl-0 = <&dmic_pins>;
	status = "okay";
};

&twl_usb_comparator {
	usb-supply = <&vusb>;
};

&usb_otg_hs {
	interface-type = <1>;
	mode = <3>;
	power = <50>;
};

&dss {
	status = "okay";
};

&dsi1 {
	status = "okay";
	vdd-supply = <&vcxio>;

	port {
		dsi1_out_ep: endpoint {
			remote-endpoint = <&lcd0_in>;
			lanes = <0 1 2 3 4 5>;
		};
	};

	lcd0: panel@0 {
		compatible = "tpo,taal", "panel-dsi-cm";
		reg = <0>;
		label = "lcd0";

		reset-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;	/* 102 */

		port {
			lcd0_in: endpoint {
				remote-endpoint = <&dsi1_out_ep>;
			};
		};
	};
};

&dsi2 {
	status = "okay";
	vdd-supply = <&vcxio>;

	port {
		dsi2_out_ep: endpoint {
			remote-endpoint = <&lcd1_in>;
			lanes = <0 1 2 3 4 5>;
		};
	};

	lcd1: panel@0 {
		compatible = "tpo,taal", "panel-dsi-cm";
		reg = <0>;
		label = "lcd1";

		reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;	/* 104 */

		port {
			lcd1_in: endpoint {
				remote-endpoint = <&dsi2_out_ep>;
			};
		};
	};
};

&hdmi {
	status = "okay";
	vdda-supply = <&vdac>;

	port {
		hdmi_out: endpoint {
			remote-endpoint = <&tpd12s015_in>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 Joachim Eastwood <manabian@gmail.com>
 */
/dts-v1/;

#include "omap4-var-som-om44.dtsi"
#include "omap4-var-som-om44-wlan.dtsi"
#include "omap4-var-om44customboard.dtsi"

/ {
	model = "Variscite VAR-DVK-OM44";
	compatible = "variscite,var-dvk-om44", "variscite,var-som-om44", "ti,omap4460", "ti,omap4";

	aliases {
		display0 = &lcd0;
		display1 = &hdmi0;
	};

	lcd0: display {
		compatible = "innolux,at070tn83", "panel-dpi";
		label = "lcd";
		panel-timing {
			clock-frequency = <33333333>;

			hback-porch = <40>;
			hactive = <800>;
			hfront-porch = <40>;
			hsync-len = <48>;

			vback-porch = <29>;
			vactive = <480>;
			vfront-porch = <13>;
			vsync-len = <3>;
		};

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_out>;
			};
		};
	};

	backlight {
		compatible = "gpio-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&backlight_pins>;

		gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio 122 */
	};
};

&dss {
	pinctrl-names = "default";
	pinctrl-0 = <&dss_dpi_pins>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};

&dsi2 {
	status = "okay";
	vdd-supply = <&vcxio>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 Joachim Eastwood <manabian@gmail.com>
 */

#include <dt-bindings/input/input.h>

/ {
	aliases {
		display0 = &hdmi0;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&gpio_led_pins>;

		led0 {
			label = "var:green:led0";
			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; /* gpio 173 */
			linux,default-trigger = "heartbeat";
		};

		led1 {
			label = "var:green:led1";
			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; /* gpio 172 */
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&gpio_key_pins>;
		#address-cells = <1>;
		#size-cells = <0>;

		user-key@184 {
			label = "user";
			gpios = <&gpio6 24 GPIO_ACTIVE_HIGH>; /* gpio 184 */
			linux,code = <BTN_EXTRA>;
			wakeup-source;
		};
	};

	hdmi0: connector {
		compatible = "hdmi-connector";
		pinctrl-names = "default";
		pinctrl-0 = <&hdmi_hpd_pins>;
		label = "hdmi";
		type = "a";

		hpd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; /* gpio_63 */

		port {
			hdmi_connector_in: endpoint {
				remote-endpoint = <&hdmi_out>;
			};
		};
	};
};

&omap4_pmx_core {
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)	/* mcspi1_cs2.uart1_cts */
			OMAP4_IOPAD(0x13e, PIN_OUTPUT | MUX_MODE1)		/* mcspi1_cs3.uart1_rts */
			OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE1)	/* i2c2_scl.uart1_rx */
			OMAP4_IOPAD(0x128, PIN_OUTPUT | MUX_MODE1)		/* i2c2_sda.uart1_tx */
		>;
	};

	mcspi1_pins: pinmux_mcspi1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0)		/*  mcspi1_clk.mcspi1_clk */
			OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0)		/*  mcspi1_somi.mcspi1_somi */
			OMAP4_IOPAD(0x136, PIN_INPUT | MUX_MODE0)		/*  mcspi1_simo.mcspi1_simo */
			OMAP4_IOPAD(0x138, PIN_INPUT | MUX_MODE0)		/*  mcspi1_cs0.mcspi1_cs0 */
		>;
	};

	mcasp_pins: pinmux_mcsasp_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0f8, PIN_OUTPUT | MUX_MODE2)		/*  mcbsp2_dr.abe_mcasp_axr */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x162, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data23 */
			OMAP4_IOPAD(0x164, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data22 */
			OMAP4_IOPAD(0x166, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data21 */
			OMAP4_IOPAD(0x168, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data20 */
			OMAP4_IOPAD(0x16a, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data19 */
			OMAP4_IOPAD(0x16c, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data18 */
			OMAP4_IOPAD(0x16e, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data15 */
			OMAP4_IOPAD(0x170, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data14 */
			OMAP4_IOPAD(0x172, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data13 */
			OMAP4_IOPAD(0x174, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data12 */
			OMAP4_IOPAD(0x176, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data11 */
			OMAP4_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data10 */
			OMAP4_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data9 */
			OMAP4_IOPAD(0x1b8, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data16 */
			OMAP4_IOPAD(0x1ba, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data17 */
			OMAP4_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE5)		/* dispc2_hsync */
			OMAP4_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE5)		/* dispc2_pclk */
			OMAP4_IOPAD(0x1c0, PIN_OUTPUT | MUX_MODE5)		/* dispc2_vsync */
			OMAP4_IOPAD(0x1c2, PIN_OUTPUT | MUX_MODE5)		/* dispc2_de */
			OMAP4_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data8 */
			OMAP4_IOPAD(0x1c6, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data7 */
			OMAP4_IOPAD(0x1c8, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data6 */
			OMAP4_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data5 */
			OMAP4_IOPAD(0x1cc, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data4 */
			OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data3 */
			OMAP4_IOPAD(0x1d0, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data2 */
			OMAP4_IOPAD(0x1d2, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data1 */
			OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE5)		/* dispc2_data0 */
		>;
	};

	dss_hdmi_pins: pinmux_dss_hdmi_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)		/* hdmi_cec.hdmi_cec */
			OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_scl.hdmi_scl */
			OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_sda.hdmi_sda */
		>;
	};

	i2c4_pins: pinmux_i2c4_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c4_scl */
			OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c4_sda */
		>;
	};

	mmc5_pins: pinmux_mmc5_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE3)		/* abe_mcbsp2_clkx.gpio_110 */
			OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_clk.sdmmc5_clk */
			OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_cmd.sdmmc5_cmd */
			OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat0.sdmmc5_dat0 */
			OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat1.sdmmc5_dat1 */
			OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat2.sdmmc5_dat2 */
			OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat3.sdmmc5_dat3 */
		>;
	};

	gpio_led_pins: pinmux_gpio_led_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x17e, PIN_OUTPUT | MUX_MODE3)		/* kpd_col4.gpio_172 */
			OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3)		/* kpd_col5.gpio_173 */
		>;
	};

	gpio_key_pins: pinmux_gpio_key_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x1a2, PIN_INPUT | MUX_MODE3)		/* sys_boot0.gpio_184 */
		>;
	};

	ks8851_irq_pins: pinmux_ks8851_irq_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x17c, PIN_INPUT_PULLUP | MUX_MODE3)	/* kpd_col3.gpio_171 */
		>;
	};

	hdmi_hpd_pins: pinmux_hdmi_hpd_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* hdmi_hpd.gpio_63 */
		>;
	};

	backlight_pins: pinmux_backlight_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x116, PIN_OUTPUT | MUX_MODE3)		/* abe_dmic_din3.gpio_122 */
		>;
	};
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4_pins>;
	clock-frequency = <400000>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
	status = "okay";
};

&mcspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi1_pins>;
	status = "okay";

	eth@0 {
		compatible = "ks8851";
		pinctrl-names = "default";
		pinctrl-0 = <&ks8851_irq_pins>;
		spi-max-frequency = <24000000>;
		reg = <0>;
		interrupt-parent = <&gpio6>;
		interrupts = <11 IRQ_TYPE_LEVEL_LOW>; /* gpio 171 */
	};
};

&mmc5 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc5_pins>;
	vmmc-supply = <&vbat>;
	bus-width = <4>;
	cd-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>; /* gpio 110 */
	status = "okay";
};

&dss {
	status = "okay";
};

&hdmi {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&dss_hdmi_pins>;
	vdda-supply = <&vdac>;

	port {
		hdmi_out: endpoint {
			remote-endpoint = <&hdmi_connector_in>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 Joachim Eastwood <manabian@gmail.com>
 */

/ {
	/* regulator for wl12xx on sdio4 */
	wl12xx_vmmc: wl12xx_vmmc {
		pinctrl-names = "default";
		pinctrl-0 = <&wl12xx_ctrl_pins>;
		compatible = "regulator-fixed";
		regulator-name = "vwl1271";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;	/* gpio 43 */
		startup-delay-us = <70000>;
		enable-active-high;
	};
};

&omap4_pmx_core {
	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_cts.uart2_cts */
			OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0)		/* uart2_rts.uart2_rts */
			OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_rx.uart2_rx */
			OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
		>;
	};

	wl12xx_ctrl_pins: pinmux_wl12xx_ctrl_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x062, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a17.gpio_41 (WLAN_IRQ) */
			OMAP4_IOPAD(0x064, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a18.gpio_42 (BT_EN) */
			OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a19.gpio_43 (WLAN_EN) */
		>;
	};

	mmc4_pins: pinmux_mmc4_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x154, PIN_INPUT_PULLUP | MUX_MODE1)	/* mcspi4_clk.sdmmc4_clk */
			OMAP4_IOPAD(0x156, PIN_INPUT_PULLUP | MUX_MODE1)	/* mcspi4_simo.sdmmc4_cmd */
			OMAP4_IOPAD(0x158, PIN_INPUT_PULLUP | MUX_MODE1)	/* mcspi4_somi.sdmmc4_dat0 */
			OMAP4_IOPAD(0x15e, PIN_INPUT_PULLUP | MUX_MODE1)	/* uart4_tx.sdmmc4_dat1 */
			OMAP4_IOPAD(0x15c, PIN_INPUT_PULLUP | MUX_MODE1)	/* uart4_rx.sdmmc4_dat2 */
			OMAP4_IOPAD(0x15a, PIN_INPUT_PULLUP | MUX_MODE1)	/* mcspi4_cs0.sdmmc4_dat3 */
		>;
	};
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
	status = "okay";
};

&mmc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc4_pins>;
	vmmc-supply = <&wl12xx_vmmc>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;
	status = "okay";

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio2>;
		interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; /* gpio 41 */
		ref-clock-frequency = <38400000>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 Joachim Eastwood <manabian@gmail.com>
 * Copyright (C) 2012 Variscite Ltd. - https://www.variscite.com
 */
#include "omap4460.dtsi"
#include "omap4-mcpdm.dtsi"

/ {
	model = "Variscite VAR-SOM-OM44";
	compatible = "variscite,var-som-om44", "ti,omap4460", "ti,omap4";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>; /* 1 GB */
	};

	sound: sound {
		compatible = "ti,abe-twl6040";
		ti,model = "VAR-SOM-OM44";

		ti,mclk-freq = <38400000>;
		ti,mcpdm = <&mcpdm>;
		ti,twl6040 = <&twl6040>;

		/* Audio routing */
		ti,audio-routing =
			"Headset Stereophone", "HSOL",
			"Headset Stereophone", "HSOR",
			"AFML", "Line In",
			"AFMR", "Line In";
	};

	/* HS USB Host PHY on PORT 1 */
	hsusb1_phy: hsusb1_phy {
		compatible = "usb-nop-xceiv";
		pinctrl-names = "default";
		pinctrl-0 = <
			&hsusbb1_phy_clk_pins
			&hsusbb1_phy_rst_pins
		>;

		reset-gpios = <&gpio6 17 GPIO_ACTIVE_LOW>; /* gpio 177 */
		vcc-supply = <&vbat>;
		#phy-cells = <0>;

		clocks = <&auxclk3_ck>;
		clock-names = "main_clk";
		clock-frequency = <19200000>;
	};

	vbat: fixedregulator-vbat {
		compatible = "regulator-fixed";
		regulator-name = "VBAT";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
	};
};

&omap4_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusbb1_pins
	>;

	twl6040_pins: pinmux_twl6040_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x19c, PIN_OUTPUT | MUX_MODE3)		/* fref_clk2_out.gpio_182 */
			OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0)		/* sys_nirq2.sys_nirq2 */
		>;
	};

	tsc2004_pins: pinmux_tsc2004_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x090, PIN_INPUT | MUX_MODE3)		/* gpmc_ncs4.gpio_101 (irq) */
			OMAP4_IOPAD(0x092, PIN_OUTPUT | MUX_MODE3)		/* gpmc_ncs5.gpio_102 (rst) */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart3_cts_rctx.uart3_cts_rctx */
			OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0)		/* uart3_rts_sd.uart3_rts_sd */
			OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0)		/* uart3_rx_irrx.uart3_rx_irrx */
			OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0)		/* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	hsusbb1_pins: pinmux_hsusbb1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
			OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4)		/* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
			OMAP4_IOPAD(0x0c6, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
			OMAP4_IOPAD(0x0c8, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
			OMAP4_IOPAD(0x0ca, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
			OMAP4_IOPAD(0x0cc, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
			OMAP4_IOPAD(0x0ce, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
			OMAP4_IOPAD(0x0d0, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
			OMAP4_IOPAD(0x0d2, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
			OMAP4_IOPAD(0x0d4, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
			OMAP4_IOPAD(0x0d6, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
			OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
		>;
	};

	hsusbb1_phy_rst_pins: pinmux_hsusbb1_phy_rst_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x18c, PIN_OUTPUT | MUX_MODE3)		/* kpd_row2.gpio_177 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
			OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
		>;
	};

	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_scl */
			OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_sda */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x0e2, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			OMAP4_IOPAD(0x0e4, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
			OMAP4_IOPAD(0x0e6, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP4_IOPAD(0x0e8, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP4_IOPAD(0x0ea, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP4_IOPAD(0x0ec, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};
};

&omap4_pmx_wkup {
	pinctrl-names = "default";
	pinctrl-0 = <
		&hsusbb1_hub_rst_pins
		&lan7500_rst_pins
	>;

	hsusbb1_phy_clk_pins: pinmux_hsusbb1_phy_clk_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x058, PIN_OUTPUT | MUX_MODE0)	/* fref_clk3_out */
		>;
	};

	hsusbb1_hub_rst_pins: pinmux_hsusbb1_hub_rst_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x042, PIN_OUTPUT | MUX_MODE3)	/* gpio_wk1 */
		>;
	};

	lan7500_rst_pins: pinmux_lan7500_rst_pins {
		pinctrl-single,pins = <
			OMAP4_IOPAD(0x040, PIN_OUTPUT | MUX_MODE3)	/* gpio_wk0 */
		>;
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	status = "okay";

	clock-frequency = <400000>;

	twl: twl@48 {
		reg = <0x48>;
		/* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
	};

	twl6040: twl@4b {
		compatible = "ti,twl6040";
		#clock-cells = <0>;
		reg = <0x4b>;

		pinctrl-names = "default";
		pinctrl-0 = <&twl6040_pins>;

		/* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
		ti,audpwron-gpio = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio 182 */

		vio-supply = <&v1v8>;
		v2v1-supply = <&v2v1>;
		enable-active-high;
	};
};

#include "twl6030.dtsi"
#include "twl6030_omap4.dtsi"

&vusim {
	regulator-min-microvolt = <3000000>;
	regulator-max-microvolt = <3000000>;
	regulator-always-on;
};

&i2c2 {
	status = "disabled";
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
	status = "okay";

	clock-frequency = <400000>;

	touchscreen: tsc2004@48 {
		compatible = "ti,tsc2004";
		reg = <0x48>;
		pinctrl-names = "default";
		pinctrl-0 = <&tsc2004_pins>;
		interrupt-parent = <&gpio4>;
		interrupts = <5 IRQ_TYPE_LEVEL_LOW>; /* gpio 101 */
		status = "disabled";
	};

	tmp105@49 {
		compatible = "ti,tmp105";
		reg = <0x49>;
	};

	eeprom@50 {
		compatible = "microchip,24c32", "atmel,24c32";
		reg = <0x50>;
	};
};

&i2c4 {
	status = "disabled";
};

&gpmc {
	status = "disabled";
};

&mcspi1 {
	status = "disabled";
};

&mcspi2 {
	status = "disabled";
};

&mcspi3 {
	status = "disabled";
};

&mcspi4 {
	status = "disabled";
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&vmmc>;
	bus-width = <4>;
	ti,non-removable;
	status = "okay";
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&mmc4 {
	status = "disabled";
};

&mmc5 {
	status = "disabled";
};

&uart1 {
	status = "disabled";
};

&uart2 {
	status = "disabled";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	status = "okay";
};

&uart4 {
	status = "disabled";
};

&keypad {
	status = "disabled";
};

&twl_usb_comparator {
	usb-supply = <&vusb>;
};

&usb_otg_hs {
	interface-type = <1>;
	mode = <3>;
	power = <50>;
};

&usbhshost {
	port1-mode = "ehci-phy";
};

&usbhsehci {
	phys = <&hsusb1_phy>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 Joachim Eastwood <manabian@gmail.com>
 */
/dts-v1/;

#include "omap4-var-som-om44.dtsi"
#include "omap4-var-som-om44-wlan.dtsi"
#include "omap4-var-om44customboard.dtsi"

/ {
	model = "Variscite VAR-STK-OM44";
	compatible = "variscite,var-stk-om44", "variscite,var-som-om44", "ti,omap4460", "ti,omap4";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
 */

#include <dt-bindings/bus/ti-sysc.h>
#include <dt-bindings/clock/omap4.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/omap.h>
#include <dt-bindings/clock/omap4.h>

/ {
	compatible = "ti,omap4430", "ti,omap4";
	interrupt-parent = <&wakeupgen>;
	#address-cells = <1>;
	#size-cells = <1>;
	chosen { };

	aliases {
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		i2c3 = &i2c4;
		mmc0 = &mmc1;
		mmc1 = &mmc2;
		mmc2 = &mmc3;
		mmc3 = &mmc4;
		mmc4 = &mmc5;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		rproc0 = &dsp;
		rproc1 = &ipu;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			next-level-cache = <&L2>;
			reg = <0x0>;

			clocks = <&dpll_mpu_ck>;
			clock-names = "cpu";

			clock-latency = <300000>; /* From omap-cpufreq driver */
		};
		cpu@1 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			next-level-cache = <&L2>;
			reg = <0x1>;
		};
	};

	/*
	 * Needed early by omap4_sram_init() for barrier, do not move to l3
	 * interconnect as simple-pm-bus probes at module_init() time.
	 */
	ocmcram: sram@40304000 {
		compatible = "mmio-sram";
		reg = <0x40304000 0xa000>; /* 40k */
	};

	gic: interrupt-controller@48241000 {
		compatible = "arm,cortex-a9-gic";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0x48241000 0x1000>,
		      <0x48240100 0x0100>;
		interrupt-parent = <&gic>;
	};

	L2: cache-controller@48242000 {
		compatible = "arm,pl310-cache";
		reg = <0x48242000 0x1000>;
		cache-unified;
		cache-level = <2>;
	};

	local-timer@48240600 {
		compatible = "arm,cortex-a9-twd-timer";
		clocks = <&mpu_periphclk>;
		reg = <0x48240600 0x20>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_EDGE_RISING)>;
		interrupt-parent = <&gic>;
	};

	wakeupgen: interrupt-controller@48281000 {
		compatible = "ti,omap4-wugen-mpu";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0x48281000 0x1000>;
		interrupt-parent = <&gic>;
	};

	/*
	 * XXX: Use a flat representation of the OMAP4 interconnect.
	 * The real OMAP interconnect network is quite complex.
	 * Since it will not bring real advantage to represent that in DT for
	 * the moment, just use a fake OCP bus entry to represent the whole bus
	 * hierarchy.
	 */
	ocp {
		compatible = "simple-pm-bus";
		power-domains = <&prm_l4per>;
		clocks = <&l3_1_clkctrl OMAP4_L3_MAIN_1_CLKCTRL 0>,
			 <&l3_2_clkctrl OMAP4_L3_MAIN_2_CLKCTRL 0>,
			 <&l3_instr_clkctrl OMAP4_L3_MAIN_3_CLKCTRL 0>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		l3-noc@44000000 {
			compatible = "ti,omap4-l3-noc";
			reg = <0x44000000 0x1000>,
			      <0x44800000 0x2000>,
			      <0x45000000 0x1000>;
			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
		};

		l4_wkup: interconnect@4a300000 {
		};

		l4_cfg: interconnect@4a000000 {
		};

		l4_per: interconnect@48000000 {
		};

		target-module@48210000 {
			compatible = "ti,sysc-omap4-simple", "ti,sysc";
			power-domains = <&prm_mpu>;
			clocks = <&mpuss_clkctrl OMAP4_MPU_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x48210000 0x1f0000>;

			mpu {
				compatible = "ti,omap4-mpu";
				sram = <&ocmcram>;
			};
		};

		l4_abe: interconnect@40100000 {
		};

		target-module@50000000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x50000000 4>,
			      <0x50000010 4>,
			      <0x50000014 4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			ti,no-idle-on-init;
			clocks = <&l3_2_clkctrl OMAP4_GPMC_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
				 <0x00000000 0x00000000 0x40000000>; /* data */

			gpmc: gpmc@50000000 {
				compatible = "ti,omap4430-gpmc";
				reg = <0x50000000 0x1000>;
				#address-cells = <2>;
				#size-cells = <1>;
				interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&sdma 4>;
				dma-names = "rxtx";
				gpmc,num-cs = <8>;
				gpmc,num-waitpins = <4>;
				clocks = <&l3_div_ck>;
				clock-names = "fck";
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-controller;
				#gpio-cells = <2>;
			};
		};

		target-module@52000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x52000000 0x4>,
			      <0x52000010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			ti,sysc-delay-us = <2>;
			power-domains = <&prm_cam>;
			clocks = <&iss_clkctrl OMAP4_ISS_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x52000000 0x1000000>;

			/* No child device binding, driver in staging */
		};

		/*
		 * Note that 4430 needs cross trigger interface (CTI) supported
		 * before we can configure the interrupts. This means sampling
		 * events are not supported for pmu. Note that 4460 does not use
		 * CTI, see also 4460.dtsi.
		 */
		target-module@54000000 {
			compatible = "ti,sysc-omap4-simple", "ti,sysc";
			power-domains = <&prm_emu>;
			clocks = <&emu_sys_clkctrl OMAP4_DEBUGSS_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x54000000 0x1000000>;

			pmu: pmu {
				compatible = "arm,cortex-a9-pmu";
			};
		};

		target-module@55082000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x55082000 0x4>,
			      <0x55082010 0x4>,
			      <0x55082014 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
					 SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			clocks = <&ducati_clkctrl OMAP4_IPU_CLKCTRL 0>;
			clock-names = "fck";
			resets = <&prm_core 2>;
			reset-names = "rstctrl";
			ranges = <0x0 0x55082000 0x100>;
			#size-cells = <1>;
			#address-cells = <1>;

			mmu_ipu: mmu@0 {
				compatible = "ti,omap4-iommu";
				reg = <0x0 0x100>;
				interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
				#iommu-cells = <0>;
				ti,iommu-bus-err-back;
			};
		};

		target-module@4012c000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x4012c000 0x4>,
			      <0x4012c010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			clocks = <&abe_clkctrl OMAP4_SLIMBUS1_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
				 <0x4902c000 0x4902c000 0x1000>; /* L3 */

			/* No child device binding or driver in mainline */
		};

		target-module@4e000000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x4e000000 0x4>,
			      <0x4e000010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ranges = <0x0 0x4e000000 0x2000000>;
			#size-cells = <1>;
			#address-cells = <1>;

			dmm@0 {
				compatible = "ti,omap4-dmm";
				reg = <0 0x800>;
				interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		target-module@4c000000 {
			compatible = "ti,sysc-omap4-simple", "ti,sysc";
			reg = <0x4c000000 0x4>;
			reg-names = "rev";
			clocks = <&l3_emif_clkctrl OMAP4_EMIF1_CLKCTRL 0>;
			clock-names = "fck";
			ti,no-idle;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x4c000000 0x1000000>;

			emif1: emif@0 {
				compatible = "ti,emif-4d";
				reg = <0 0x100>;
				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
				phy-type = <1>;
				hw-caps-read-idle-ctrl;
				hw-caps-ll-interface;
				hw-caps-temp-alert;
			};
		};

		target-module@4d000000 {
			compatible = "ti,sysc-omap4-simple", "ti,sysc";
			reg = <0x4d000000 0x4>;
			reg-names = "rev";
			clocks = <&l3_emif_clkctrl OMAP4_EMIF2_CLKCTRL 0>;
			clock-names = "fck";
			ti,no-idle;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x4d000000 0x1000000>;

			emif2: emif@0 {
				compatible = "ti,emif-4d";
				reg = <0 0x100>;
				interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
				phy-type = <1>;
				hw-caps-read-idle-ctrl;
				hw-caps-ll-interface;
				hw-caps-temp-alert;
			};
		};

		dsp: dsp {
			compatible = "ti,omap4-dsp";
			ti,bootreg = <&scm_conf 0x304 0>;
			iommus = <&mmu_dsp>;
			resets = <&prm_tesla 0>;
			clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
			firmware-name = "omap4-dsp-fw.xe64T";
			mboxes = <&mailbox &mbox_dsp>;
			status = "disabled";
		};

		ipu: ipu@55020000 {
			compatible = "ti,omap4-ipu";
			reg = <0x55020000 0x10000>;
			reg-names = "l2ram";
			iommus = <&mmu_ipu>;
			resets = <&prm_core 0>, <&prm_core 1>;
			clocks = <&ducati_clkctrl OMAP4_IPU_CLKCTRL 0>;
			firmware-name = "omap4-ipu-fw.xem3";
			mboxes = <&mailbox &mbox_ipu>;
			status = "disabled";
		};

		aes1_target: target-module@4b501000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x4b501080 0x4>,
			      <0x4b501084 0x4>,
			      <0x4b501088 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			ti,syss-mask = <1>;
			/* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
			clocks = <&l4_secure_clkctrl OMAP4_AES1_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x4b501000 0x1000>;

			aes1: aes@0 {
				compatible = "ti,omap4-aes";
				reg = <0 0xa0>;
				interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&sdma 111>, <&sdma 110>;
				dma-names = "tx", "rx";
			};
		};

		aes2_target: target-module@4b701000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x4b701080 0x4>,
			      <0x4b701084 0x4>,
			      <0x4b701088 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			ti,syss-mask = <1>;
			/* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
			clocks = <&l4_secure_clkctrl OMAP4_AES2_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x4b701000 0x1000>;

			aes2: aes@0 {
				compatible = "ti,omap4-aes";
				reg = <0 0xa0>;
				interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&sdma 114>, <&sdma 113>;
				dma-names = "tx", "rx";
			};
		};

		sham_target: target-module@4b100000 {
			compatible = "ti,sysc-omap3-sham", "ti,sysc";
			reg = <0x4b100100 0x4>,
			      <0x4b100110 0x4>,
			      <0x4b100114 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			/* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
			clocks = <&l4_secure_clkctrl OMAP4_SHA2MD5_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x4b100000 0x1000>;

			sham: sham@0 {
				compatible = "ti,omap4-sham";
				reg = <0 0x300>;
				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
				dmas = <&sdma 119>;
				dma-names = "rx";
			};
		};

		abb_mpu: regulator-abb-mpu {
			compatible = "ti,abb-v2";
			regulator-name = "abb_mpu";
			#address-cells = <0>;
			#size-cells = <0>;
			ti,tranxdone-status-mask = <0x80>;
			clocks = <&sys_clkin_ck>;
			ti,settling-time = <50>;
			ti,clock-cycles = <16>;

			status = "disabled";
		};

		abb_iva: regulator-abb-iva {
			compatible = "ti,abb-v2";
			regulator-name = "abb_iva";
			#address-cells = <0>;
			#size-cells = <0>;
			ti,tranxdone-status-mask = <0x80000000>;
			clocks = <&sys_clkin_ck>;
			ti,settling-time = <50>;
			ti,clock-cycles = <16>;

			status = "disabled";
		};

		sgx_module: target-module@56000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x5600fe00 0x4>,
			      <0x5600fe10 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			power-domains = <&prm_gfx>;
			clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x56000000 0x2000000>;

			/*
			 * Closed source PowerVR driver, no child device
			 * binding or driver in mainline
			 */
		};

		/*
		 * DSS is only using l3 mapping without l4 as noted in the TRM
		 * "10.1.3 DSS Register Manual" for omap4460.
		 */
		target-module@58000000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x58000000 4>,
			      <0x58000014 4>;
			reg-names = "rev", "syss";
			ti,syss-mask = <1>;
			power-domains = <&prm_dss>;
			clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 0>,
				 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
				 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>,
				 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 11>;
			clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x58000000 0x1000000>;

			dss: dss@0 {
				compatible = "ti,omap4-dss";
				reg = <0 0x80>;
				status = "disabled";
				clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
				clock-names = "fck";
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0 0x1000000>;

				target-module@1000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x1000 0x4>,
					      <0x1010 0x4>,
					      <0x1014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-sidle = <SYSC_IDLE_FORCE>,
							<SYSC_IDLE_NO>,
							<SYSC_IDLE_SMART>;
					ti,sysc-midle = <SYSC_IDLE_FORCE>,
							<SYSC_IDLE_NO>,
							<SYSC_IDLE_SMART>;
					ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
							 SYSC_OMAP2_ENAWAKEUP |
							 SYSC_OMAP2_SOFTRESET |
							 SYSC_OMAP2_AUTOIDLE)>;
					ti,syss-mask = <1>;
					clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
						 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
					clock-names = "fck", "sys_clk";
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x1000 0x1000>;

					dispc@0 {
						compatible = "ti,omap4-dispc";
						reg = <0 0x1000>;
						interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
						clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
						clock-names = "fck";
					};
				};

				target-module@2000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x2000 0x4>,
					      <0x2010 0x4>,
					      <0x2014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-sidle = <SYSC_IDLE_FORCE>,
							<SYSC_IDLE_NO>,
							<SYSC_IDLE_SMART>;
					ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
							 SYSC_OMAP2_AUTOIDLE)>;
					ti,syss-mask = <1>;
					clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
						 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
					clock-names = "fck", "sys_clk";
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x2000 0x1000>;

					rfbi: encoder@0  {
						reg = <0 0x1000>;
						status = "disabled";
						clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>, <&l3_div_ck>;
						clock-names = "fck", "ick";
					};
				};

				target-module@3000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x3000 0x4>;
					reg-names = "rev";
					clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
					clock-names = "sys_clk";
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x3000 0x1000>;

					venc: encoder@0 {
						compatible = "ti,omap4-venc";
						reg = <0 0x1000>;
						status = "disabled";
						clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 11>;
						clock-names = "fck";
					};
				};

				target-module@4000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x4000 0x4>,
					      <0x4010 0x4>,
					      <0x4014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-sidle = <SYSC_IDLE_FORCE>,
							<SYSC_IDLE_NO>,
							<SYSC_IDLE_SMART>;
					ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
							 SYSC_OMAP2_ENAWAKEUP |
							 SYSC_OMAP2_SOFTRESET |
							 SYSC_OMAP2_AUTOIDLE)>;
					ti,syss-mask = <1>;
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x4000 0x1000>;

					dsi1: encoder@0 {
						compatible = "ti,omap4-dsi";
						reg = <0 0x200>,
						      <0x200 0x40>,
						      <0x300 0x20>;
						reg-names = "proto", "phy", "pll";
						interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
						status = "disabled";
						clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
							 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
						clock-names = "fck", "sys_clk";

						#address-cells = <1>;
						#size-cells = <0>;
					};
				};

				target-module@5000 {
					compatible = "ti,sysc-omap2", "ti,sysc";
					reg = <0x5000 0x4>,
					      <0x5010 0x4>,
					      <0x5014 0x4>;
					reg-names = "rev", "sysc", "syss";
					ti,sysc-sidle = <SYSC_IDLE_FORCE>,
							<SYSC_IDLE_NO>,
							<SYSC_IDLE_SMART>;
					ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
							 SYSC_OMAP2_ENAWAKEUP |
							 SYSC_OMAP2_SOFTRESET |
							 SYSC_OMAP2_AUTOIDLE)>;
					ti,syss-mask = <1>;
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x5000 0x1000>;

					dsi2: encoder@0 {
						compatible = "ti,omap4-dsi";
						reg = <0 0x200>,
						      <0x200 0x40>,
						      <0x300 0x20>;
						reg-names = "proto", "phy", "pll";
						interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
						status = "disabled";
						clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
						         <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
						clock-names = "fck", "sys_clk";

						#address-cells = <1>;
						#size-cells = <0>;
					};
				};

				target-module@6000 {
					compatible = "ti,sysc-omap4", "ti,sysc";
					reg = <0x6000 0x4>,
					      <0x6010 0x4>;
					reg-names = "rev", "sysc";
					/*
					 * Has SYSC_IDLE_SMART and SYSC_IDLE_SMART_WKUP
					 * but HDMI audio will fail with them.
					 */
					ti,sysc-sidle = <SYSC_IDLE_FORCE>,
							<SYSC_IDLE_NO>;
					ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET)>;
					clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
						 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
					clock-names = "fck", "dss_clk";
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x6000 0x2000>;

					hdmi: encoder@0 {
					compatible = "ti,omap4-hdmi";
						reg = <0 0x200>,
						      <0x200 0x100>,
						      <0x300 0x100>,
						      <0x400 0x1000>;
						reg-names = "wp", "pll", "phy", "core";
						interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
						status = "disabled";
						clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
						         <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
						clock-names = "fck", "sys_clk";
						dmas = <&sdma 76>;
						dma-names = "audio_tx";
					};
				};
			};
		};

		iva_hd_target: target-module@5a000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x5a05a400 0x4>,
			      <0x5a05a410 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			power-domains = <&prm_ivahd>;
			resets = <&prm_ivahd 2>;
			reset-names = "rstctrl";
			clocks = <&ivahd_clkctrl OMAP4_IVA_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x5a000000 0x5a000000 0x1000000>,
				 <0x5b000000 0x5b000000 0x1000000>;

			iva {
				compatible = "ti,ivahd";
			};
		};
	};
};

#include "omap4-l4.dtsi"
#include "omap4-l4-abe.dtsi"
#include "omap44xx-clocks.dtsi"

&prm {
	prm_mpu: prm@300 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x300 0x100>;
		#power-domain-cells = <0>;
	};

	prm_tesla: prm@400 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x400 0x100>;
		#reset-cells = <1>;
		#power-domain-cells = <0>;
	};

	prm_abe: prm@500 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x500 0x100>;
		#power-domain-cells = <0>;
	};

	prm_always_on_core: prm@600 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x600 0x100>;
		#power-domain-cells = <0>;
	};

	prm_core: prm@700 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x700 0x100>;
		#reset-cells = <1>;
		#power-domain-cells = <0>;
	};

	prm_ivahd: prm@f00 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0xf00 0x100>;
		#reset-cells = <1>;
		#power-domain-cells = <0>;
	};

	prm_cam: prm@1000 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1000 0x100>;
		#power-domain-cells = <0>;
	};

	prm_dss: prm@1100 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1100 0x100>;
		#power-domain-cells = <0>;
	};

	prm_gfx: prm@1200 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1200 0x100>;
		#power-domain-cells = <0>;
	};

	prm_l3init: prm@1300 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1300 0x100>;
		#power-domain-cells = <0>;
	};

	prm_l4per: prm@1400 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1400 0x100>;
		#power-domain-cells = <0>;
	};

	prm_cefuse: prm@1600 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1600 0x100>;
		#power-domain-cells = <0>;
	};

	prm_wkup: prm@1700 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1700 0x100>;
		#power-domain-cells = <0>;
	};

	prm_emu: prm@1900 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1900 0x100>;
		#power-domain-cells = <0>;
	};

	prm_dss: prm@1100 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1100 0x40>;
		#power-domain-cells = <0>;
	};

	prm_device: prm@1b00 {
		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
		reg = <0x1b00 0x40>;
		#reset-cells = <1>;
	};
};

/* Preferred always-on timer for clockevent */
&timer1_target {
	ti,no-reset-on-init;
	ti,no-idle;
	timer@0 {
		assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
		assigned-clock-parents = <&sys_32k_ck>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP4 clock data
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 */
&prm_clocks {
	bandgap_fclk: bandgap_fclk@1888 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "bandgap_fclk";
		clocks = <&sys_32k_ck>;
		ti,bit-shift = <8>;
		reg = <0x1888>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP443x SoC
 *
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 */

#include "omap4.dtsi"

/ {
	cpus {
		cpu0: cpu@0 {
			/* OMAP443x variants OPP50-OPPNT */
			operating-points = <
				/* kHz    uV */
				300000  1025000
				600000  1200000
				800000  1313000
				1008000 1375000
			>;
			clock-latency = <300000>; /* From legacy driver */

			/* cooling options */
			#cooling-cells = <2>; /* min followed by max */
		};
	};

	thermal-zones {
		#include "omap4-cpu-thermal.dtsi"
	};

	ocp {
		/* 4430 has only gpio_86 tshut and no talert interrupt */
		bandgap: bandgap@4a002260 {
			reg = <0x4a002260 0x4
			       0x4a00232C 0x4>;
			compatible = "ti,omap4430-bandgap";
			gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;

			#thermal-sensor-cells = <0>;
		};
	};

	ocp {
		abb_mpu: regulator-abb-mpu {
			status = "okay";

			reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>;
			reg-names = "base-address", "int-address";

			ti,abb_info = <
			/*uV		ABB	efuse	rbb_m	fbb_m	vset_m*/
			1025000		0	0	0	0	0
			1200000		0	0	0	0	0
			1313000		0	0	0	0	0
			1375000		1	0	0	0	0
			1389000		1	0	0	0	0
			>;
		};

		/* Default unused, just provide register info for record */
		abb_iva: regulator-abb-iva {
			reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>;
			reg-names = "base-address", "int-address";
		};

	};

};

&cpu_thermal {
	coefficients = <0 20000>;
};

/include/ "omap443x-clocks.dtsi"

/*
 * Use dpll_per for sgx at 307.2MHz like droid4 stock v3.0.8 Android kernel
 */
&sgx_module {
	assigned-clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 24>,
			  <&dpll_per_m7x2_ck>;
	assigned-clock-rates = <0>, <307200000>;
	assigned-clock-parents = <&dpll_per_m7x2_ck>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP4460 SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 */
#include "omap4.dtsi"

/ {
	cpus {
		/* OMAP446x 'standard device' variants OPP50 to OPPTurbo */
		cpu0: cpu@0 {
			operating-points = <
				/* kHz    uV */
				350000  1025000
				700000  1200000
				920000  1313000
			>;
			clock-latency = <300000>; /* From legacy driver */

			/* cooling options */
			#cooling-cells = <2>; /* min followed by max */
		};
	};

	thermal-zones {
		#include "omap4-cpu-thermal.dtsi"
	};

	ocp {
		bandgap: bandgap@4a002260 {
			reg = <0x4a002260 0x4
			       0x4a00232C 0x4
			       0x4a002378 0x18>;
			compatible = "ti,omap4460-bandgap";
			interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */
			gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* tshut */

			#thermal-sensor-cells = <0>;
		};

		abb_mpu: regulator-abb-mpu {
			status = "okay";

			reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>,
			      <0x4A002268 0x4>;
			reg-names = "base-address", "int-address",
				    "efuse-address";

			ti,abb_info = <
			/*uV		ABB	efuse	rbb_m	fbb_m	vset_m*/
			1025000		0	0	0	0	0
			1200000		0	0	0	0	0
			1313000		0	0	0x100000 0x40000 0
			1375000		1	0	0	0	0
			1389000		1	0	0	0	0
			>;
		};

		abb_iva: regulator-abb-iva {
			status = "okay";

			reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>,
			      <0x4A002268 0x4>;
			reg-names = "base-address", "int-address",
				    "efuse-address";

			ti,abb_info = <
			/*uV		ABB	efuse	rbb_m	fbb_m	vset_m*/
			950000		0	0	0	0	0
			1140000		0	0	0	0	0
			1291000		0	0	0x200000 0	0
			1375000		1	0	0	0	0
			1376000		1	0	0	0	0
			>;
		};
	};

};

&cpu_thermal {
	coefficients = <348 (-9301)>;
};

/* Only some L4 CFG interconnect ranges are different on 4460 */
&l4_cfg_segment_300000 {
	ranges = <0x00000000 0x00300000 0x020000>,	/* ap 67 */
		 <0x00040000 0x00340000 0x001000>,	/* ap 68 */
		 <0x00020000 0x00320000 0x004000>,	/* ap 71 */
		 <0x00024000 0x00324000 0x002000>,	/* ap 72 */
		 <0x00026000 0x00326000 0x001000>,	/* ap 73 */
		 <0x00027000 0x00327000 0x001000>,	/* ap 74 */
		 <0x00028000 0x00328000 0x001000>,	/* ap 75 */
		 <0x00029000 0x00329000 0x001000>,	/* ap 76 */
		 <0x00030000 0x00330000 0x010000>,	/* ap 77 */
		 <0x0002a000 0x0032a000 0x002000>,	/* ap 90 */
		 <0x0002c000 0x0032c000 0x004000>,	/* ap 91 */
		 <0x00010000 0x00310000 0x008000>,	/* ap 92 */
		 <0x00018000 0x00318000 0x004000>,	/* ap 93 */
		 <0x0001c000 0x0031c000 0x002000>,	/* ap 94 */
		 <0x0001e000 0x0031e000 0x002000>;	/* ap 95 */
};

&l4_cfg_target_0 {
	ranges = <0x00000000 0x00000000 0x00010000>,
		 <0x00010000 0x00010000 0x00008000>,
		 <0x00018000 0x00018000 0x00004000>,
		 <0x0001c000 0x0001c000 0x00002000>,
		 <0x0001e000 0x0001e000 0x00002000>,
		 <0x00020000 0x00020000 0x00004000>,
		 <0x00024000 0x00024000 0x00002000>,
		 <0x00026000 0x00026000 0x00001000>,
		 <0x00027000 0x00027000 0x00001000>,
		 <0x00028000 0x00028000 0x00001000>,
		 <0x00029000 0x00029000 0x00001000>,
		 <0x0002a000 0x0002a000 0x00002000>,
		 <0x0002c000 0x0002c000 0x00004000>,
		 <0x00030000 0x00030000 0x00010000>;
};

&pmu {
	compatible = "arm,cortex-a9-pmu";
	interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
};

/include/ "omap446x-clocks.dtsi"


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP4 clock data
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 */
&prm_clocks {
	div_ts_ck: div_ts_ck@1888 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "div_ts_ck";
		clocks = <&l4_wkup_clk_mux_ck>;
		ti,bit-shift = <24>;
		reg = <0x1888>;
		ti,dividers = <8>, <16>, <32>;
	};

	bandgap_ts_fclk: bandgap_ts_fclk@1888 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "bandgap_ts_fclk";
		clocks = <&div_ts_ck>;
		ti,bit-shift = <8>;
		reg = <0x1888>;
	};
};