code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for NETGEAR ReadyNAS 2120
 *
 * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
 */

/dts-v1/;

#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-xp-mv78230.dtsi"

/ {
	model = "NETGEAR ReadyNAS 2120";
	compatible = "netgear,readynas-2120", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0 0x00000000 0 0x80000000>; /* 2GB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;

		internal-regs {

			/* RTC is provided by Intersil ISL12057 I2C RTC chip */
			rtc@10300 {
				status = "disabled";
			};

			i2c@11000 {
				clock-frequency = <400000>;
				status = "okay";

				/* Controller for rear fan #1 of 3 (Protechnic
				 * MGT4012XB-O20, 8000RPM) near eSATA port */
				g762_fan1: g762@3e {
					compatible = "gmt,g762";
					reg = <0x3e>;
					clocks = <&g762_clk>; /* input clock */
					fan_gear_mode = <0>;
					fan_startv = <1>;
					pwm_polarity = <0>;
				};

				/*  Controller for rear (center) fan #2 of 3 */
				g762_fan2: g762@48 {
					compatible = "gmt,g762";
					reg = <0x48>;
					clocks = <&g762_clk>; /* input clock */
					fan_gear_mode = <0>;
					fan_startv = <1>;
					pwm_polarity = <0>;
				};

				/*  Controller for rear fan #3 of 3 */
				g762_fan3: g762@49 {
					compatible = "gmt,g762";
					reg = <0x49>;
					clocks = <&g762_clk>; /* input clock */
					fan_gear_mode = <0>;
					fan_startv = <1>;
					pwm_polarity = <0>;
				};

				/* Temperature sensor */
				g751: g751@4c {
					compatible = "gmt,g751";
					reg = <0x4c>;
				};

				isl12057: rtc@68 {
					compatible = "isil,isl12057";
					reg = <0x68>;
					wakeup-source;
				};
			};

			serial@12000 {
				status = "okay";
			};

			/* Front USB 2.0 port */
			usb@50000 {
				status = "okay";
			};

			ethernet@70000 {
				pinctrl-0 = <&ge0_rgmii_pins>;
				pinctrl-names = "default";

				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};

			ethernet@74000 {
				pinctrl-0 = <&ge1_rgmii_pins>;
				pinctrl-names = "default";

				status = "okay";
				phy = <&phy1>;
				phy-mode = "rgmii-id";
			};

			/* Two rear eSATA ports */
			sata@a0000 {
				nr-ports = <2>;
				status = "okay";
			};
		};
	};

	clocks {
		g762_clk: g762-oscillator {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&sata1_led_pin &sata2_led_pin &err_led_pin
			     &sata3_led_pin &sata4_led_pin>;
		pinctrl-names = "default";

		red-sata1-led {
			label = "rn2120:red:sata1";
			gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red-sata2-led {
			label = "rn2120:red:sata2";
			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red-sata3-led {
			label = "rn2120:red:sata3";
			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red-sata4-led {
			label = "rn2120:red:sata4";
			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		red-err-led {
			label = "rn2120:red:err";
			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&power_button_pin &reset_button_pin>;
		pinctrl-names = "default";

		power-button {
			label = "Power Button";
			linux,code = <KEY_POWER>;
			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
		};

		reset-button {
			label = "Reset Button";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-poweroff {
		compatible = "gpio-poweroff";
		pinctrl-0 = <&poweroff>;
		pinctrl-names = "default";
		gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
	};
};

&pciec {
	status = "okay";

	/* Connected to first Marvell 88SE9170 SATA controller */
	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};

	/* Connected to second Marvell 88SE9170 SATA controller */
	pcie@2,0 {
		/* Port 0, Lane 1 */
		status = "okay";
	};

	/* Connected to Fresco Logic FL1009 USB 3.0 controller */
	pcie@5,0 {
		/* Port 1, Lane 0 */
		status = "okay";
	};
};

&mdio {
	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
		reg = <0>;
	};

	phy1: ethernet-phy@1 { /* Marvell 88E1318 */
		reg = <1>;
	};
};

&pinctrl {
	poweroff: poweroff {
		marvell,pins = "mpp42";
		marvell,function = "gpio";
	};

	power_button_pin: power-button-pin {
		marvell,pins = "mpp27";
		marvell,function = "gpio";
	};

	reset_button_pin: reset-button-pin {
		marvell,pins = "mpp41";
		marvell,function = "gpio";
	};

	sata1_led_pin: sata1-led-pin {
		marvell,pins = "mpp31";
		marvell,function = "gpio";
	};

	sata2_led_pin: sata2-led-pin {
		marvell,pins = "mpp40";
		marvell,function = "gpio";
	};

	sata3_led_pin: sata3-led-pin {
		marvell,pins = "mpp44";
		marvell,function = "gpio";
	};

	sata4_led_pin: sata4-led-pin {
		marvell,pins = "mpp47";
		marvell,function = "gpio";
	};

	sata1_power_pin: sata1-power-pin {
		marvell,pins = "mpp24";
		marvell,function = "gpio";
	};

	sata2_power_pin: sata2-power-pin {
		marvell,pins = "mpp25";
		marvell,function = "gpio";
	};

	sata3_power_pin: sata3-power-pin {
		marvell,pins = "mpp26";
		marvell,function = "gpio";
	};

	sata4_power_pin: sata4-power-pin {
		marvell,pins = "mpp28";
		marvell,function = "gpio";
	};

	sata1_pres_pin: sata1-pres-pin {
		marvell,pins = "mpp32";
		marvell,function = "gpio";
	};

	sata2_pres_pin: sata2-pres-pin {
		marvell,pins = "mpp33";
		marvell,function = "gpio";
	};

	sata3_pres_pin: sata3-pres-pin {
		marvell,pins = "mpp34";
		marvell,function = "gpio";
	};

	sata4_pres_pin: sata4-pres-pin {
		marvell,pins = "mpp35";
		marvell,function = "gpio";
	};

	err_led_pin: err-led-pin {
		marvell,pins = "mpp45";
		marvell,function = "gpio";
	};
};

&nand_controller {
	status = "okay";

	nand@0 {
		reg = <0>;
		label = "pxa3xx_nand-0";
		nand-rb = <0>;
		marvell,nand-keep-config;
		nand-on-flash-bbt;

		/* Use Hardware BCH ECC */
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0000000 0x180000>;  /* 1.5MB */
				read-only;
			};

			partition@180000 {
				label = "u-boot-env";
				reg = <0x180000 0x20000>;    /* 128KB */
				read-only;
			};

			partition@200000 {
				label = "uImage";
				reg = <0x0200000 0x600000>;    /* 6MB */
			};

			partition@800000 {
				label = "minirootfs";
				reg = <0x0800000 0x400000>;    /* 4MB */
			};

			/* Last MB is for the BBT, i.e. not writable */
			partition@c00000 {
				label = "ubifs";
				reg = <0x0c00000 0x7400000>; /* 116MB */
			};
		};
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for OpenBlocks AX3-4 board
 *
 * Copyright (C) 2012 Marvell
 *
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 */

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "armada-xp-mv78260.dtsi"

/ {
	model = "PlatHome OpenBlocks AX3-4 board";
	compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
			  MBUS_ID(0x01, 0x2f) 0 0 0xe8000000 0x8000000
			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
			  MBUS_ID(0x0c, 0x04) 0 0 0xd1200000 0x100000>;

		devbus-bootcs {
			status = "okay";

			/* Device Bus parameters are required */

			/* Read parameters */
			devbus,bus-width    = <16>;
			devbus,turn-off-ps  = <60000>;
			devbus,badr-skew-ps = <0>;
			devbus,acc-first-ps = <124000>;
			devbus,acc-next-ps  = <248000>;
			devbus,rd-setup-ps  = <0>;
			devbus,rd-hold-ps   = <0>;

			/* Write parameters */
			devbus,sync-enable = <0>;
			devbus,wr-high-ps  = <60000>;
			devbus,wr-low-ps   = <60000>;
			devbus,ale-wr-ps   = <60000>;

			/* NOR 128 MiB */
			nor@0 {
				compatible = "cfi-flash";
				reg = <0 0x8000000>;
				bank-width = <2>;
			};
		};

		internal-regs {
			rtc@10300 {
				/* No crystal connected to the internal RTC */
				status = "disabled";
			};
			serial@12000 {
				status = "okay";
			};
			serial@12100 {
				status = "okay";
			};

			leds {
				compatible = "gpio-leds";
				pinctrl-names = "default";
				pinctrl-0 = <&led_pins>;

				red_led {
					label = "red_led";
					gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
					default-state = "off";
				};

				yellow_led {
					label = "yellow_led";
					gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
					default-state = "off";
				};

				green_led {
					label = "green_led";
					gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
					default-state = "keep";
				};
			};

			gpio-keys {
				compatible = "gpio-keys";

				button-init {
					label = "Init Button";
					linux,code = <KEY_POWER>;
					gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
				};
			};

			ethernet@70000 {
				status = "okay";
				phy = <&phy0>;
				phy-mode = "sgmii";
				buffer-manager = <&bm>;
				bm,pool-long = <0>;
			};
			ethernet@74000 {
				status = "okay";
				phy = <&phy1>;
				phy-mode = "sgmii";
				buffer-manager = <&bm>;
				bm,pool-long = <1>;
			};
			ethernet@30000 {
				status = "okay";
				phy = <&phy2>;
				phy-mode = "sgmii";
				buffer-manager = <&bm>;
				bm,pool-long = <2>;
			};
			ethernet@34000 {
				status = "okay";
				phy = <&phy3>;
				phy-mode = "sgmii";
				buffer-manager = <&bm>;
				bm,pool-long = <3>;
			};
			i2c@11000 {
				status = "okay";
				clock-frequency = <400000>;
			};
			i2c@11100 {
				status = "okay";
				clock-frequency = <400000>;

				s35390a: s35390a@30 {
					compatible = "s35390a";
					reg = <0x30>;
				};
			};
			sata@a0000 {
				nr-ports = <2>;
				status = "okay";
			};

			/* Front side USB 0 */
			usb@50000 {
				status = "okay";
			};

			/* Front side USB 1 */
			usb@51000 {
				status = "okay";
			};

			bm@c0000 {
				status = "okay";
			};
		};

		bm-bppi {
			status = "okay";
		};
	};
};

&pciec {
	status = "okay";
	/* Internal mini-PCIe connector */
	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};
};

&mdio {
	phy0: ethernet-phy@0 {
		reg = <0>;
	};

	phy1: ethernet-phy@1 {
		reg = <1>;
	};

	phy2: ethernet-phy@2 {
		reg = <2>;
	};

	phy3: ethernet-phy@3 {
		reg = <3>;
	};
};

&pinctrl {
	led_pins: led-pins-0 {
		marvell,pins = "mpp49", "mpp51", "mpp53";
		marvell,function = "gpio";
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Synology DS414
 *
 * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
 *
 * Note: this Device Tree assumes that the bootloader has remapped the
 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
 * bootloaders provided by Marvell. It is used in recent versions of
 * DSM software provided by Synology. Nonetheless, some earlier boards
 * were delivered with an older version of u-boot that left internal
 * registers mapped at 0xd0000000. If you have such a device you will
 * not be able to directly boot a kernel based on this Device Tree. In
 * that case, the preferred solution is to update your bootloader (e.g.
 * by upgrading to latest version of DSM, or building a new one and
 * installing it from u-boot prompt) or adjust the Devive Tree
 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
 */

/dts-v1/;

#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-xp-mv78230.dtsi"

/ {
	model = "Synology DS414";
	compatible = "synology,ds414", "marvell,armadaxp-mv78230",
		     "marvell,armadaxp", "marvell,armada-370-xp";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0 0x00000000 0 0x40000000>; /* 1GB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;

		internal-regs {

			/* RTC is provided by Seiko S-35390A below */
			rtc@10300 {
				status = "disabled";
			};

			i2c@11000 {
				clock-frequency = <400000>;
				status = "okay";

				s35390a: s35390a@30 {
					 compatible = "sii,s35390a";
					 reg = <0x30>;
				};
			};

			/* Connected to a header on device's PCB. This
			 * provides the main console for the device.
			 *
			 * Warning: the device may not boot with a 3.3V
			 * USB-serial converter connected when the power
			 * button is pressed. The converter needs to be
			 * connected a few seconds after pressing the
			 * power button. This is possibly due to UART0_TXD
			 * pin being sampled at reset (bit 0 of SAR).
			 */
			serial@12000 {
				status = "okay";
			};

			/* Connected to a Microchip PIC16F883 for power control */
			serial@12100 {
				status = "okay";
			};

			poweroff@12100 {
				compatible = "synology,power-off";
				reg = <0x12100 0x100>;
				clocks = <&coreclk 0>;
			};

			/* Front USB 2.0 port */
			usb@50000 {
				status = "okay";
			};

			ethernet@70000 {
				status = "okay";
				pinctrl-0 = <&ge0_rgmii_pins>;
				pinctrl-names = "default";
				phy = <&phy1>;
				phy-mode = "rgmii-id";
			};

			ethernet@74000 {
				pinctrl-0 = <&ge1_rgmii_pins>;
				pinctrl-names = "default";
				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
			     &sata3_pwr_pin &sata4_pwr_pin>;
		pinctrl-names = "default";

		sata1_regulator: sata1-regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "SATA1 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <2000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
		};

		sata2_regulator: sata2-regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "SATA2 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <4000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		};

		sata3_regulator: sata3-regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "SATA3 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <6000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
		};

		sata4_regulator: sata4-regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "SATA4 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <8000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
		};
	};
};

&pciec {
	status = "okay";

	/*
	 * Connected to Marvell 88SX7042 SATA-II controller
	 * handling the four disks.
	 */
	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};

	/*
	 * Connected to EtronTech EJ168A XHCI controller
	 * providing the two rear USB 3.0 ports.
	 */
	pcie@5,0 {
		/* Port 1, Lane 0 */
		status = "okay";
	};
};

&mdio {
	phy0: ethernet-phy@0 { /* Marvell 88E1512 */
		reg = <0>;
	};

	phy1: ethernet-phy@1 { /* Marvell 88E1512 */
		reg = <1>;
	};
};

&pinctrl {
	sata1_pwr_pin: sata1-pwr-pin {
		marvell,pins = "mpp42";
		marvell,function = "gpio";
	};

	sata2_pwr_pin: sata2-pwr-pin {
		marvell,pins = "mpp44";
		marvell,function = "gpio";
	};

	sata3_pwr_pin: sata3-pwr-pin {
		marvell,pins = "mpp45";
		marvell,function = "gpio";
	};

	sata4_pwr_pin: sata4-pwr-pin {
		marvell,pins = "mpp46";
		marvell,function = "gpio";
	};

	sata1_pres_pin: sata1-pres-pin {
		marvell,pins = "mpp34";
		marvell,function = "gpio";
	};

	sata2_pres_pin: sata2-pres-pin {
		marvell,pins = "mpp35";
		marvell,function = "gpio";
	};

	sata3_pres_pin: sata3-pres-pin {
		marvell,pins = "mpp40";
		marvell,function = "gpio";
	};

	sata4_pres_pin: sata4-pres-pin {
		marvell,pins = "mpp41";
		marvell,function = "gpio";
	};

	syno_id_bit0_pin: syno-id-bit0-pin {
		marvell,pins = "mpp26";
		marvell,function = "gpio";
	};

	syno_id_bit1_pin: syno-id-bit1-pin {
		marvell,pins = "mpp28";
		marvell,function = "gpio";
	};

	syno_id_bit2_pin: syno-id-bit2-pin {
		marvell,pins = "mpp29";
		marvell,function = "gpio";
	};

	fan1_alarm_pin: fan1-alarm-pin {
		marvell,pins = "mpp33";
		marvell,function = "gpio";
	};

	fan2_alarm_pin: fan2-alarm-pin {
		marvell,pins = "mpp32";
		marvell,function = "gpio";
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "micron,n25q064", "jedec,spi-nor";
		reg = <0>; /* Chip select 0 */
		spi-max-frequency = <20000000>;

		/*
		 * Warning!
		 *
		 * Synology u-boot uses its compiled-in environment
		 * and it seems Synology did not care to change u-boot
		 * default configuration in order to allow saving a
		 * modified environment at a sensible location. So,
		 * if you do a 'saveenv' under u-boot, your modified
		 * environment will be saved at 1MB after the start
		 * of the flash, i.e. in the middle of the uImage.
		 * For that reason, it is strongly advised not to
		 * change the default environment, unless you know
		 * what you are doing.
		 */
		partition@0 { /* u-boot */
			label = "RedBoot";
			reg = <0x00000000 0x000d0000>; /* 832KB */
		};

		partition@c0000 { /* uImage */
			label = "zImage";
			reg = <0x000d0000 0x002d0000>; /* 2880KB */
		};

		partition@3a0000 { /* uInitramfs */
			label = "rd.gz";
			reg = <0x003a0000 0x00430000>; /* 4250KB */
		};

		partition@7d0000 { /* MAC address and serial number */
			label = "vendor";
			reg = <0x007d0000 0x00010000>; /* 64KB */
		};

		partition@7e0000 {
			label = "RedBoot config";
			reg = <0x007e0000 0x00010000>; /* 64KB */
		};

		partition@7f0000 {
			label = "FIS directory";
			reg = <0x007f0000 0x00010000>; /* 64KB */
		};
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree Include file for Marvell Armada XP family SoC
 *
 * Copyright (C) 2012 Marvell
 *
 * Lior Amsalem <alior@marvell.com>
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 * Ben Dooks <ben.dooks@codethink.co.uk>
 *
 * Contains definitions specific to the Armada XP SoC that are not
 * common to all Armada SoCs.
 */

#include "armada-370-xp.dtsi"

/ {
	#address-cells = <2>;
	#size-cells = <2>;

	model = "Marvell Armada XP family SoC";
	compatible = "marvell,armadaxp", "marvell,armada-370-xp";

	aliases {
		serial2 = &uart2;
		serial3 = &uart3;
	};

	soc {
		compatible = "marvell,armadaxp-mbus", "simple-bus";

		bootrom {
			compatible = "marvell,bootrom";
			reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
		};

		internal-regs {
			sdramc: sdramc@1400 {
				compatible = "marvell,armada-xp-sdram-controller";
				reg = <0x1400 0x500>;
			};

			L2: l2-cache@8000 {
				compatible = "marvell,aurora-system-cache";
				reg = <0x08000 0x1000>;
				cache-id-part = <0x100>;
				cache-level = <2>;
				cache-unified;
				wt-override;
			};

			uart2: serial@12200 {
				compatible = "snps,dw-apb-uart";
				pinctrl-0 = <&uart2_pins>;
				pinctrl-names = "default";
				reg = <0x12200 0x100>;
				reg-shift = <2>;
				interrupts = <43>;
				reg-io-width = <1>;
				clocks = <&coreclk 0>;
				status = "disabled";
			};

			uart3: serial@12300 {
				compatible = "snps,dw-apb-uart";
				pinctrl-0 = <&uart3_pins>;
				pinctrl-names = "default";
				reg = <0x12300 0x100>;
				reg-shift = <2>;
				interrupts = <44>;
				reg-io-width = <1>;
				clocks = <&coreclk 0>;
				status = "disabled";
			};

			systemc: system-controller@18200 {
				compatible = "marvell,armada-370-xp-system-controller";
				reg = <0x18200 0x500>;
			};

			gateclk: clock-gating-control@18220 {
				compatible = "marvell,armada-xp-gating-clock";
				reg = <0x18220 0x4>;
				clocks = <&coreclk 0>;
				#clock-cells = <1>;
			};

			coreclk: mvebu-sar@18230 {
				compatible = "marvell,armada-xp-core-clock";
				reg = <0x18230 0x08>;
				#clock-cells = <1>;
			};

			thermal: thermal@182b0 {
				compatible = "marvell,armadaxp-thermal";
				reg = <0x182b0 0x4
					0x184d0 0x4>;
				status = "okay";
			};

			cpuclk: clock-complex@18700 {
				#clock-cells = <1>;
				compatible = "marvell,armada-xp-cpu-clock";
				reg = <0x18700 0x24>, <0x1c054 0x10>;
				clocks = <&coreclk 1>;
			};

			cpu-config@21000 {
				compatible = "marvell,armada-xp-cpu-config";
				reg = <0x21000 0x8>;
			};

			eth2: ethernet@30000 {
				compatible = "marvell,armada-xp-neta";
				reg = <0x30000 0x4000>;
				interrupts = <12>;
				clocks = <&gateclk 2>;
				status = "disabled";
			};

			usb2: usb@52000 {
				compatible = "marvell,orion-ehci";
				reg = <0x52000 0x500>;
				interrupts = <47>;
				clocks = <&gateclk 20>;
				status = "disabled";
			};

			xor1: xor@60900 {
				compatible = "marvell,orion-xor";
				reg = <0x60900 0x100
				       0x60b00 0x100>;
				clocks = <&gateclk 22>;
				status = "okay";

				xor10 {
					interrupts = <51>;
					dmacap,memcpy;
					dmacap,xor;
				};
				xor11 {
					interrupts = <52>;
					dmacap,memcpy;
					dmacap,xor;
					dmacap,memset;
				};
			};

			ethernet@70000 {
				compatible = "marvell,armada-xp-neta";
			};

			ethernet@74000 {
				compatible = "marvell,armada-xp-neta";
			};

			cesa: crypto@90000 {
				compatible = "marvell,armada-xp-crypto";
				reg = <0x90000 0x10000>;
				reg-names = "regs";
				interrupts = <48>, <49>;
				clocks = <&gateclk 23>, <&gateclk 23>;
				clock-names = "cesa0", "cesa1";
				marvell,crypto-srams = <&crypto_sram0>,
						       <&crypto_sram1>;
				marvell,crypto-sram-size = <0x800>;
			};

			bm: bm@c0000 {
				compatible = "marvell,armada-380-neta-bm";
				reg = <0xc0000 0xac>;
				clocks = <&gateclk 13>;
				internal-mem = <&bm_bppi>;
				status = "disabled";
			};

			xor0: xor@f0900 {
				compatible = "marvell,orion-xor";
				reg = <0xF0900 0x100
				       0xF0B00 0x100>;
				clocks = <&gateclk 28>;
				status = "okay";

				xor00 {
					interrupts = <94>;
					dmacap,memcpy;
					dmacap,xor;
				};
				xor01 {
					interrupts = <95>;
					dmacap,memcpy;
					dmacap,xor;
					dmacap,memset;
				};
			};
		};

		crypto_sram0: sa-sram0 {
			compatible = "mmio-sram";
			reg = <MBUS_ID(0x09, 0x09) 0 0x800>;
			clocks = <&gateclk 23>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 MBUS_ID(0x09, 0x09) 0 0x800>;
		};

		crypto_sram1: sa-sram1 {
			compatible = "mmio-sram";
			reg = <MBUS_ID(0x09, 0x05) 0 0x800>;
			clocks = <&gateclk 23>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
		};

		bm_bppi: bm-bppi {
			compatible = "mmio-sram";
			reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
			ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
			#address-cells = <1>;
			#size-cells = <1>;
			clocks = <&gateclk 13>;
			no-memory-wc;
			status = "disabled";
		};
	};

	clocks {
		/* 25 MHz reference crystal */
		refclk: oscillator {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <25000000>;
		};
	};
};

&i2c0 {
	compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
	reg = <0x11000 0x100>;
};

&i2c1 {
	compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
	reg = <0x11100 0x100>;
};

&mpic {
	reg = <0x20a00 0x2d0>, <0x21070 0x58>;
};

&timer {
	compatible = "marvell,armada-xp-timer";
	clocks = <&coreclk 2>, <&refclk>;
	clock-names = "nbclk", "fixed";
};

&watchdog {
	compatible = "marvell,armada-xp-wdt";
	clocks = <&coreclk 2>, <&refclk>;
	clock-names = "nbclk", "fixed";
	interrupts = <93>, <38>;
};

&cpurst {
	reg = <0x20800 0x20>;
};

&usb0 {
	clocks = <&gateclk 18>;
};

&usb1 {
	clocks = <&gateclk 19>;
};

&pinctrl {
	ge0_gmii_pins: ge0-gmii-pins {
		marvell,pins =
		     "mpp0",  "mpp1",  "mpp2",  "mpp3",
		     "mpp4",  "mpp5",  "mpp6",  "mpp7",
		     "mpp8",  "mpp9",  "mpp10", "mpp11",
		     "mpp12", "mpp13", "mpp14", "mpp15",
		     "mpp16", "mpp17", "mpp18", "mpp19",
		     "mpp20", "mpp21", "mpp22", "mpp23";
		marvell,function = "ge0";
	};

	ge0_rgmii_pins: ge0-rgmii-pins {
		marvell,pins =
		     "mpp0", "mpp1", "mpp2", "mpp3",
		     "mpp4", "mpp5", "mpp6", "mpp7",
		     "mpp8", "mpp9", "mpp10", "mpp11";
		marvell,function = "ge0";
	};

	ge1_rgmii_pins: ge1-rgmii-pins {
		marvell,pins =
		     "mpp12", "mpp13", "mpp14", "mpp15",
		     "mpp16", "mpp17", "mpp18", "mpp19",
		     "mpp20", "mpp21", "mpp22", "mpp23";
		marvell,function = "ge1";
	};

	sdio_pins: sdio-pins {
		marvell,pins = "mpp30", "mpp31", "mpp32",
			       "mpp33", "mpp34", "mpp35";
		marvell,function = "sd0";
	};

	spi0_pins: spi0-pins {
		marvell,pins = "mpp36", "mpp37",
			       "mpp38", "mpp39";
		marvell,function = "spi0";
	};

	spi1_pins: spi1-pins {
		marvell,pins = "mpp13", "mpp14",
			       "mpp16", "mpp17";
		marvell,function = "spi1";
	};

	uart2_pins: uart2-pins {
		marvell,pins = "mpp42", "mpp43";
		marvell,function = "uart2";
	};

	uart3_pins: uart3-pins {
		marvell,pins = "mpp44", "mpp45";
		marvell,function = "uart3";
	};
};

&spi0 {
	compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
	pinctrl-0 = <&spi0_pins>;
	pinctrl-names = "default";
};

&spi1 {
	compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
	pinctrl-0 = <&spi1_pins>;
	pinctrl-names = "default";
};


code:
// SPDX-License-Identifier: GPL-2.0
/ {
	nvic: interrupt-controller@e000e100  {
		compatible = "arm,armv7m-nvic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0xe000e100 0xc00>;
	};

	systick: timer@e000e010 {
		compatible = "arm,armv7m-systick";
		reg = <0xe000e010 0x10>;
		status = "disabled";
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&nvic>;
		ranges;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
// Axis ARTPEC-6 development board.

/dts-v1/;
#include "artpec6.dtsi"

/ {
	model = "ARTPEC-6 development board";
	compatible = "axis,artpec6-dev-board", "axis,artpec6";

	aliases {
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
	};

	chosen {
		stdout-path = "serial3:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x40000000>;
	};
};

&uart0 {
	status = "okay";
};

&uart1 {
	status = "okay";
};

&uart2 {
	status = "okay";
};

&uart3 {
	status = "okay";
};

&pcie {
	status = "okay";
};

&ethernet {
	status = "okay";

	phy-handle = <&phy1>;
	phy-mode = "gmii";

	mdio {
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		compatible = "snps,dwmac-mdio";
		phy1: phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			device_type = "ethernet-phy";
			reg = <0x0>;
		};
	};
};


code:
/*
 * Device Tree Source for the Axis ARTPEC-6 SoC
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/dma/nbpfaxi.h>
#include <dt-bindings/clock/axis,artpec6-clkctrl.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "axis,artpec6";
	interrupt-parent = <&intc>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
			next-level-cache = <&pl310>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <1>;
			next-level-cache = <&pl310>;
		};
	};

	syscon: syscon@f8000000 {
		compatible = "axis,artpec6-syscon", "syscon";
		reg = <0xf8000000 0x48>;
	};

	psci {
		compatible = "arm,psci-0.2", "arm,psci";
		method = "smc";
		psci_version = <0x84000000>;
		cpu_on = <0x84000003>;
		system_reset = <0x84000009>;
	};

	scu@faf00000 {
		compatible = "arm,cortex-a9-scu";
		reg = <0xfaf00000 0x58>;
	};

	/* Main external clock driving CPU and peripherals */
	ext_clk: ext_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <50000000>;
	};

	eth_phy_ref_clk: eth_phy_ref_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <125000000>;
	};

	clkctrl: clkctrl@f8000000 {
		#clock-cells = <1>;
		compatible = "axis,artpec6-clkctrl";
		reg = <0xf8000000 0x48>;
		clocks = <&ext_clk>;
		clock-names = "sys_refclk";
	};

	gtimer@faf00200 {
		compatible = "arm,cortex-a9-global-timer";
		reg = <0xfaf00200 0x20>;
		interrupts = <GIC_PPI 11 0xf01>;
		clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
	};

	timer@faf00600 {
		compatible = "arm,cortex-a9-twd-timer";
		reg = <0xfaf00600 0x20>;
		interrupts = <GIC_PPI 13 0xf04>;
		clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
		status = "disabled";
	};

	intc: interrupt-controller@faf01000 {
		interrupt-controller;
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		reg = < 0xfaf01000 0x1000 >, < 0xfaf00100 0x0100 >;
	};

	pl310: cache-controller@faf10000 {
		compatible = "arm,pl310-cache";
		cache-unified;
		cache-level = <2>;
		reg = <0xfaf10000 0x1000>;
		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
		arm,data-latency = <1 1 1>;
		arm,tag-latency = <1 1 1>;
		arm,filter-ranges = <0x0 0x80000000>;
		arm,double-linefill = <1>;
		arm,double-linefill-incr = <0>;
		arm,double-linefill-wrap = <0>;
		prefetch-data = <1>;
		prefetch-instr = <1>;
		arm,prefetch-offset = <0>;
		arm,prefetch-drop = <1>;
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>;
	};

	/*
	 * Both pci nodes cannot be enabled at the same time,
	 * leave the unwanted node as disabled.
	 */
	pcie: pcie@f8050000 {
		compatible = "axis,artpec6-pcie", "snps,dw-pcie";
		reg = <0xf8050000 0x2000
		       0xf8040000 0x1000
		       0xc0000000 0x2000>;
		reg-names = "dbi", "phy", "config";
		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";
			  /* downstream I/O */
		ranges = <0x81000000 0 0 0xc0002000 0 0x00010000
			  /* non-prefetchable memory */
			  0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>;
		num-lanes = <2>;
		bus-range = <0x00 0xff>;
		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "msi";
		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0x7>;
		interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
				<0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
				<0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
				<0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
		axis,syscon-pcie = <&syscon>;
		status = "disabled";
	};

	pcie_ep: pcie_ep@f8050000 {
		compatible = "axis,artpec6-pcie-ep", "snps,dw-pcie";
		reg = <0xf8050000 0x2000
		       0xf8051000 0x2000
		       0xf8040000 0x1000
		       0xc0000000 0x20000000>;
		reg-names = "dbi", "dbi2", "phy", "addr_space";
		num-ib-windows = <6>;
		num-ob-windows = <2>;
		num-lanes = <2>;
		axis,syscon-pcie = <&syscon>;
		status = "disabled";
	};

	pinctrl: pinctrl@f801d000 {
		compatible = "axis,artpec6-pinctrl";
		reg = <0xf801d000 0x400>;

		pinctrl_uart0: uart0grp {
			function = "uart0";
			groups = "uart0grp2";
			bias-pull-up;
		};
		pinctrl_uart1: uart1grp {
			function = "uart1";
			groups = "uart1grp0";
			bias-pull-up;
		};
		pinctrl_uart2: uart2grp {
			function = "uart2";
			groups = "uart2grp1";
			bias-pull-up;
		};
		pinctrl_uart3: uart3grp {
			function = "uart3";
			groups = "uart3grp0";
			bias-pull-up;
		};
	};

	amba@0 {
		compatible = "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;
		dma-ranges;

		crypto@f4264000 {
			compatible = "axis,artpec6-crypto";
			reg = <0xf4264000 0x4000>;
			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
		};

		dma0: dma@f8019000 {
			compatible = "renesas,nbpfaxi64dmac8b16";
			reg = <0xf8019000 0x400>;
			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* error */
				     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					  "ch0", "ch1", "ch2", "ch3",
					  "ch4", "ch5", "ch6", "ch7",
					  "ch8", "ch9", "ch10", "ch12",
					  "ch12", "ch13", "ch14", "ch15";
			clocks = <&clkctrl ARTPEC6_CLK_DMA_ACLK>;
			#dma-cells = <2>;
			dma-channels = <8>;
			dma-requests = <8>;
		};
		dma1: dma@f8019400 {
			compatible = "renesas,nbpfaxi64dmac8b16";
			reg = <0xf8019400 0x400>;
			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* error */
				     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					  "ch0", "ch1", "ch2", "ch3",
					  "ch4", "ch5", "ch6", "ch7",
					  "ch8", "ch9", "ch10", "ch12",
					  "ch12", "ch13", "ch14", "ch15";
			clocks = <&clkctrl ARTPEC6_CLK_DMA_ACLK>;
			#dma-cells = <2>;
			dma-channels = <8>;
			dma-requests = <8>;
		};

		ethernet: ethernet@f8010000 {
			clock-names = "stmmaceth", "ptp_ref";
			clocks = <&clkctrl ARTPEC6_CLK_ETH_ACLK>,
				<&clkctrl ARTPEC6_CLK_PTP_REF>;
			compatible = "snps,dwmac-4.10a", "snps,dwmac";
			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq", "eth_lpi";
			reg = <0xf8010000 0x4000>;

			snps,axi-config = <&stmmac_axi_setup>;
			snps,mtl-rx-config = <&mtl_rx_setup>;
			snps,mtl-tx-config = <&mtl_tx_setup>;

			snps,txpbl = <8>;
			snps,rxpbl = <2>;
			snps,aal;
			snps,tso;

			status = "disabled";

			stmmac_axi_setup: stmmac-axi-config {
				snps,wr_osr_lmt = <1>;
				snps,rd_osr_lmt = <15>;
				/* If FB is disabled, the AXI master chooses
				 * a burst length of any value less than the
				 * maximum enabled burst length
				 * (all lesser burst length enables are redundant).
				 */
				snps,blen = <0 0 0 0 16 0 0>;
			};

			mtl_rx_setup: rx-queues-config {
				snps,rx-queues-to-use = <1>;
				queue0 {};
			};

			mtl_tx_setup: tx-queues-config {
				snps,tx-queues-to-use = <2>;
				queue0 {};
				queue1 {};
			};
		};

		uart0: serial@f8036000 {
			compatible = "arm,pl011", "arm,primecell";
			reg = <0xf8036000 0x1000>;
			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
				<&clkctrl ARTPEC6_CLK_UART_PCLK>;
			clock-names = "uart_clk", "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart0>;
			dmas = <&dma0 4 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
			       <&dma0 5 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
			dma-names = "rx", "tx";
			status = "disabled";
		};
		uart1: serial@f8037000 {
			compatible = "arm,pl011", "arm,primecell";
			reg = <0xf8037000 0x1000>;
			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
				<&clkctrl ARTPEC6_CLK_UART_PCLK>;
			clock-names = "uart_clk", "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart1>;
			dmas = <&dma0 6 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
			       <&dma0 7 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
			dma-names = "rx", "tx";
			status = "disabled";
		};
		uart2: serial@f8038000 {
			compatible = "arm,pl011", "arm,primecell";
			reg = <0xf8038000 0x1000>;
			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
				<&clkctrl ARTPEC6_CLK_UART_PCLK>;
			clock-names = "uart_clk", "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart2>;
			dmas = <&dma1 0 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
			       <&dma1 1 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
			dma-names = "rx", "tx";
			status = "disabled";
		};
		uart3: serial@f8039000 {
			compatible = "arm,pl011", "arm,primecell";
			reg = <0xf8039000 0x1000>;
			interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
				<&clkctrl ARTPEC6_CLK_UART_PCLK>;
			clock-names = "uart_clk", "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart3>;
			dmas = <&dma1 2 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>,
			       <&dma1 3 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;
			dma-names = "rx", "tx";
			status = "disabled";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;

#include "aspeed-g5.dtsi"

/ {
	model = "AST2500 EVB";
	compatible = "aspeed,ast2500-evb", "aspeed,ast2500";

	aliases {
		serial4 = &uart5;
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=tty0 console=ttyS4,115200 earlycon";
	};

	memory@80000000 {
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		gfx_memory: framebuffer {
			size = <0x01000000>;
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
		spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
	};
};

&spi1 {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "pnor";
		spi-max-frequency = <100000000>;
	};
};

&spi2 {
	status = "okay";
};

&uart5 {
	status = "okay";
};

&mac0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};

&mac1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};

&i2c3 {
	status = "okay";

	eeprom@50 {
		compatible = "atmel,24c08";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&i2c7 {
	status = "okay";

	lm75@4d {
		compatible = "national,lm75";
		reg = <0x4d>;
	};
};

&sdmmc {
	status = "okay";
};

&sdhci0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sd1_default>;
};

/*
 * Enable port A as device (via the virtual hub) and port B as
 * host by default on the eval board. This can be easily changed
 * by replacing the override below with &ehci0 { ... } to enable
 * host on both ports.
 */
&vhub {
	status = "okay";
};

&ehci1 {
	status = "okay";
};

&uhci {
	status = "okay";
};

&gfx {
     status = "okay";
     memory-region = <&gfx_memory>;
};

&rtc {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright 2021 IBM Corp.

#include "aspeed-ast2600-evb.dts"

/ {
	model = "AST2600 A1 EVB";
	compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600-evb", "aspeed,ast2600";

	/delete-node/regulator-vcc-sdhci0;
	/delete-node/regulator-vcc-sdhci1;
	/delete-node/regulator-vccq-sdhci0;
	/delete-node/regulator-vccq-sdhci1;
};

/delete-node/ &sdc;


code:
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright 2019 IBM Corp.

/dts-v1/;

#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>

/ {
	model = "AST2600 EVB";
	compatible = "aspeed,ast2600-evb", "aspeed,ast2600";

	aliases {
		serial4 = &uart5;
	};

	chosen {
		bootargs = "console=ttyS4,115200n8";
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x80000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		video_engine_memory: video {
			size = <0x04000000>;
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};

		gfx_memory: framebuffer {
			size = <0x01000000>;
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};
	};

	vcc_sdhci0: regulator-vcc-sdhci0 {
		compatible = "regulator-fixed";
		regulator-name = "SDHCI0 Vcc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	vccq_sdhci0: regulator-vccq-sdhci0 {
		compatible = "regulator-gpio";
		regulator-name = "SDHCI0 VccQ";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
		gpios-states = <1>;
		states = <3300000 1>,
			 <1800000 0>;
	};

	vcc_sdhci1: regulator-vcc-sdhci1 {
		compatible = "regulator-fixed";
		regulator-name = "SDHCI1 Vcc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	vccq_sdhci1: regulator-vccq-sdhci1 {
		compatible = "regulator-gpio";
		regulator-name = "SDHCI1 VccQ";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
		gpios-states = <1>;
		states = <3300000 1>,
			 <1800000 0>;
	};
};

&mdio0 {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0>;
	};
};

&mdio1 {
	status = "okay";

	ethphy1: ethernet-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0>;
	};
};

&mdio2 {
	status = "okay";

	ethphy2: ethernet-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0>;
	};
};

&mdio3 {
	status = "okay";

	ethphy3: ethernet-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0>;
	};
};

&mac0 {
	status = "okay";

	phy-mode = "rgmii-rxid";
	phy-handle = <&ethphy0>;

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii1_default>;
};

&mac1 {
	status = "okay";

	phy-mode = "rgmii-rxid";
	phy-handle = <&ethphy1>;

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii2_default>;
};

&mac2 {
	status = "okay";

	phy-mode = "rgmii";
	phy-handle = <&ethphy2>;

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii3_default>;
};

&mac3 {
	status = "okay";

	phy-mode = "rgmii";
	phy-handle = <&ethphy3>;

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii4_default>;
};

&emmc_controller {
	status = "okay";
};

&emmc {
	non-removable;
	bus-width = <4>;
	max-frequency = <100000000>;
	clk-phase-mmc-hs200 = <9>, <225>;
};

&rtc {
	status = "okay";
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
		spi-rx-bus-width = <4>;
		spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-64.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "pnor";
		spi-rx-bus-width = <4>;
		spi-max-frequency = <100000000>;
	};
};

&uart5 {
	// Workaround for A0
	compatible = "snps,dw-apb-uart";
};

&i2c0 {
	status = "okay";
};

&i2c1 {
	status = "okay";
};

&i2c2 {
	status = "okay";
};

&i2c3 {
	status = "okay";
};

&i2c4 {
	status = "okay";
};

&i2c5 {
	status = "okay";
};

&i2c6 {
	status = "okay";
};

&i2c7 {
	status = "okay";

	temp@2e {
		compatible = "adi,adt7490";
		reg = <0x2e>;
	};

	eeprom@50 {
		compatible = "atmel,24c08";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&i2c8 {
	status = "okay";

	lm75@4d {
		compatible = "national,lm75";
		reg = <0x4d>;
	};
};

&i2c9 {
	status = "okay";
};

&i2c12 {
	status = "okay";
};

&i2c13 {
	status = "okay";
};

&i2c14 {
	status = "okay";
};

&i2c15 {
	status = "okay";
};

&fsim0 {
	status = "okay";
};

&ehci1 {
	status = "okay";
};

&uhci {
	status = "okay";
};

&sdc {
	status = "okay";
};

/*
 * The signal voltage of sdhci0 and sdhci1 on AST2600-A2 EVB is able to be
 * toggled by GPIO pins.
 * In the reference design, GPIOV0 of AST2600-A2 EVB is connected to the
 * power load switch that provides 3.3v to sdhci0 vdd, GPIOV1 is connected to
 * a 1.8v and a 3.3v power load switch that provides signal voltage to
 * sdhci0 bus.
 * If GPIOV0 is active high, sdhci0 is enabled, otherwise, sdhci0 is disabled.
 * If GPIOV1 is active high, 3.3v power load switch is enabled, sdhci0 signal
 * voltage is 3.3v, otherwise, 1.8v power load switch will be enabled,
 * sdhci0 signal voltage becomes 1.8v.
 * AST2600-A2 EVB also supports toggling signal voltage for sdhci1.
 * The design is the same as sdhci0, it uses GPIOV2 as power-gpio and GPIOV3
 * as power-switch-gpio.
 */
&sdhci0 {
	status = "okay";
	bus-width = <4>;
	max-frequency = <100000000>;
	sdhci-drive-type = /bits/ 8 <3>;
	sdhci-caps-mask = <0x7 0x0>;
	sdhci,wp-inverted;
	vmmc-supply = <&vcc_sdhci0>;
	vqmmc-supply = <&vccq_sdhci0>;
	clk-phase-sd-hs = <7>, <200>;
};

&sdhci1 {
	status = "okay";
	bus-width = <4>;
	max-frequency = <100000000>;
	sdhci-drive-type = /bits/ 8 <3>;
	sdhci-caps-mask = <0x7 0x0>;
	sdhci,wp-inverted;
	vmmc-supply = <&vcc_sdhci1>;
	vqmmc-supply = <&vccq_sdhci1>;
	clk-phase-sd-hs = <7>, <200>;
};

&vhub {
	status = "okay";
	pinctrl-names = "default";
};

&video {
	status = "okay";
	memory-region = <&video_engine_memory>;
};

&gfx {
	status = "okay";
	memory-region = <&gfx_memory>;
};


code:
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "AMD DaytonaX BMC";
	compatible = "amd,daytonax-bmc", "aspeed,ast2500";

	memory@80000000 {
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		video_engine_memory: jpegbuffer {
			size = <0x02000000>;	/* 32M */
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};
	};

	aliases {
		serial0 = &uart1;
		serial4 = &uart5;
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200";
	};

	leds {
		compatible = "gpio-leds";

		led-fault {
			gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
		};

		led-identify {
			gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
			<&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
			<&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>,
			<&adc 15>;
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
		#include "openbmc-flash-layout.dtsi"
	};
};

&mac0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};

&uart1 {
	//Host Console
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd1_default
		&pinctrl_rxd1_default
		&pinctrl_nrts1_default
		&pinctrl_ndtr1_default
		&pinctrl_ndsr1_default
		&pinctrl_ncts1_default
		&pinctrl_ndcd1_default
		&pinctrl_nri1_default>;
};

&uart5 {
	//BMC Console
	status = "okay";
};

&vuart {
	status = "okay";
	aspeed,lpc-io-reg = <0x3f8>;
	aspeed,lpc-interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
};

&adc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc0_default
		&pinctrl_adc1_default
		&pinctrl_adc2_default
		&pinctrl_adc3_default
		&pinctrl_adc4_default
		&pinctrl_adc5_default
		&pinctrl_adc6_default
		&pinctrl_adc7_default
		&pinctrl_adc8_default
		&pinctrl_adc9_default
		&pinctrl_adc10_default
		&pinctrl_adc11_default
		&pinctrl_adc12_default
		&pinctrl_adc13_default
		&pinctrl_adc14_default
		&pinctrl_adc15_default>;
};

&gpio {
	status = "okay";
	gpio-line-names =
	/*A0-A7*/	"","","led-fault","led-identify","","","","",
	/*B0-B7*/	"","","","","","","","",
	/*C0-C7*/	"id-button","","","","","","","",
	/*D0-D7*/	"","","ASSERT_BMC_READY","","","","","",
	/*E0-E7*/	"reset-button","reset-control","power-button","power-control","",
			"power-good","power-ok","",
	/*F0-F7*/	"","","","","","","BATTERY_DETECT","",
	/*G0-G7*/	"","","","","","","","",
	/*H0-H7*/	"","","","","","","","",
	/*I0-I7*/	"","","","","","","","",
	/*J0-J7*/	"","","","","","","","",
	/*K0-K7*/	"","","","","","","","",
	/*L0-L7*/	"","","","","","","","",
	/*M0-M7*/	"","","","","","","","",
	/*N0-N7*/	"","","","","","","","",
	/*O0-O7*/	"","","","","","","","",
	/*P0-P7*/	"","","","","","","","",
	/*Q0-Q7*/	"","","","","","","","",
	/*R0-R7*/	"","","","","","","","",
	/*S0-S7*/	"","","","","","","","",
	/*T0-T7*/	"","","","","","","","",
	/*U0-U7*/	"","","","","","","","",
	/*V0-V7*/	"","","","","","","","",
	/*W0-W7*/	"","","","","","","","",
	/*X0-X7*/	"","","","","","","","",
	/*Y0-Y7*/	"","","","","","","","",
	/*Z0-Z7*/	"","","","","","","","",
	/*AA0-AA7*/	"","","","","","","","",
	/*AB0-AB7*/	"FM_BMC_READ_SPD_TEMP","","","","","","","",
	/*AC0-AC7*/	"","","","","","","","";
};

&i2c0 {
	status = "okay";
};

&i2c1 {
	status = "okay";
};

&i2c2 {
	status = "okay";
};

&i2c3 {
	status = "okay";
};

&i2c4 {
	status = "okay";
};

&i2c5 {
	status = "okay";
};

&i2c6 {
	status = "okay";
};

&i2c7 {
	status = "okay";
};

&i2c8 {
	status = "okay";
};

&i2c10 {
	status = "okay";
};

&i2c11 {
	status = "okay";
};

&i2c12 {
	status = "okay";
};

&kcs3 {
	status = "okay";
	aspeed,lpc-io-reg = <0xca2>;
};

&lpc_snoop {
	status = "okay";
	snoop-ports = <0x80>, <0x81>;
};

&lpc_ctrl {
	status = "okay";
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_default
		&pinctrl_pwm1_default
		&pinctrl_pwm2_default
		&pinctrl_pwm3_default
		&pinctrl_pwm4_default
		&pinctrl_pwm5_default
		&pinctrl_pwm6_default
		&pinctrl_pwm7_default>;

	fan@0 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
	};

	fan@1 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
	};

	fan@2 {
		reg = <0x01>;
		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
	};

	fan@3 {
		reg = <0x01>;
		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
	};

	fan@4 {
		reg = <0x02>;
		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
	};

	fan@5 {
		reg = <0x02>;
		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
	};

	fan@6 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
	};

	fan@7 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
	};

	fan@8 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x08>;
	};

	fan@9 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x09>;
	};

	fan@10 {
		reg = <0x05>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
	};

	fan@11 {
		reg = <0x05>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
	};

	fan@12 {
		reg = <0x06>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
	};

	fan@13 {
		reg = <0x06>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
	};

	fan@14 {
		reg = <0x07>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
	};

	fan@15 {
		reg = <0x07>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
	};
};

&video {
	status = "okay";
	memory-region = <&video_engine_memory>;
};

&vhub {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2020 AMD Inc.
// Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
/dts-v1/;

#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>

/ {
	model = "AMD EthanolX BMC";
	compatible = "amd,ethanolx-bmc", "aspeed,ast2500";

	memory@80000000 {
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		video_engine_memory: jpegbuffer {
			size = <0x02000000>;	/* 32M */
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};
	};

	aliases {
		serial0 = &uart1;
		serial4 = &uart5;
	};
	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200 earlycon";
	};
	leds {
		compatible = "gpio-leds";

		fault {
			gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
		};

		identify {
			gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
		};
	};
	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		#include "openbmc-flash-layout.dtsi"
	};
};

&mac0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii1_default>;
	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
		 <&syscon ASPEED_CLK_MAC1RCLK>;
	clock-names = "MACCLK", "RCLK";
};

&uart1 {
	//Host Console
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd1_default
		     &pinctrl_rxd1_default>;
};

&uart5 {
	//BMC Console
	status = "okay";
};

&adc {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc0_default
		     &pinctrl_adc1_default
		     &pinctrl_adc2_default
		     &pinctrl_adc3_default
		     &pinctrl_adc4_default>;
};

&gpio {
	status = "okay";
	gpio-line-names =
	/*A0-A7*/	"","","FAULT_LED","CHASSIS_ID_LED","","","","",
	/*B0-B7*/	"","","","","","","","",
	/*C0-C7*/	"CHASSIS_ID_BTN","INTRUDER","AC_LOSS","","","","","",
	/*D0-D7*/	"HDT_DBREQ","LOCAL_SPI_ROM_SEL","FPGA_SPI_ROM_SEL","JTAG_MUX_S",
			"JTAG_MUX_OE","HDT_SEL","ASERT_WARM_RST_BTN","FPGA_RSVD",
	/*E0-E7*/	"","","MON_P0_PWR_BTN","MON_P0_RST_BTN","MON_P0_NMI_BTN",
			"MON_P0_PWR_GOOD","MON_PWROK","MON_RESET",
	/*F0-F7*/	"MON_P0_PROCHOT","MON_P1_PROCHOT","MON_P0_THERMTRIP",
			"MON_P1_THERMTRIP","P0_PRESENT","P1_PRESENT","MON_ATX_PWR_OK","",
	/*G0-G7*/	"BRD_REV_ID_3","BRD_REV_ID_2","BRD_REV_ID_1","BRD_REV_ID_0",
			"P0_APML_ALERT","P1_APML_ALERT","FPGA ALERT","",
	/*H0-H7*/	"BRD_ID_0","BRD_ID_1","BRD_ID_2","BRD_ID_3",
			"PCIE_DISCONNECTED","USB_DISCONNECTED","SPARE_0","SPARE_1",
	/*I0-I7*/	"","","","","","","","",
	/*J0-J7*/	"","","","","","","","",
	/*K0-K7*/	"","","","","","","","",
	/*L0-L7*/	"","","","","","","","",
	/*M0-M7*/	"ASSERT_PWR_BTN","ASSERT_RST_BTN","ASSERT_NMI_BTN",
			"ASSERT_LOCAL_LOCK","ASSERT_P0_PROCHOT","ASSERT_P1_PROCHOT",
			"ASSERT_CLR_CMOS","ASSERT_BMC_READY",
	/*N0-N7*/	"","","","","","","","",
	/*O0-O7*/	"","","","","","","","",
	/*P0-P7*/	"P0_VDD_CORE_RUN_VRHOT","P0_VDD_SOC_RUN_VRHOT",
			"P0_VDD_MEM_ABCD_SUS_VRHOT","P0_VDD_MEM_EFGH_SUS_VRHOT",
			"P1_VDD_CORE_RUN_VRHOT","P1_VDD_SOC_RUN_VRHOT",
			"P1_VDD_MEM_ABCD_SUS_VRHOT","P1_VDD_MEM_EFGH_SUS_VRHOT",
	/*Q0-Q7*/	"","","","","","","","",
	/*R0-R7*/	"","","","","","","","",
	/*S0-S7*/	"","","","","","","","",
	/*T0-T7*/	"","","","","","","","",
	/*U0-U7*/	"","","","","","","","",
	/*V0-V7*/	"","","","","","","","",
	/*W0-W7*/	"","","","","","","","",
	/*X0-X7*/	"","","","","","","","",
	/*Y0-Y7*/	"","","","","","","","",
	/*Z0-Z7*/	"","","","","","","","",
	/*AA0-AA7*/	"","SENSOR THERM","","","","","","",
	/*AB0-AB7*/	"","","","","","","","",
	/*AC0-AC7*/	"","","","","","","","";
};

//APML for P0
&i2c0 {
	status = "okay";
};

//APML for P1
&i2c1 {
	status = "okay";
};

//FPGA
&i2c2 {
	status = "okay";
};

//24LC128 EEPROM
&i2c3 {
	status = "okay";
	eeprom@50 {
		compatible = "atmel,24c256";
		reg = <0x50>;
		pagesize = <64>;
	};
};

//P0 Power regulators
&i2c4 {
	status = "okay";
};

//P1 Power regulators
&i2c5 {
	status = "okay";
};

//P0/P1 Thermal diode
&i2c6 {
	status = "okay";
};

// Thermal Sensors
&i2c7 {
	status = "okay";

	lm75a@48 {
		compatible = "national,lm75a";
		reg = <0x48>;
	};

	lm75a@49 {
		compatible = "national,lm75a";
		reg = <0x49>;
	};

	lm75a@4a {
		compatible = "national,lm75a";
		reg = <0x4a>;
	};

	lm75a@4b {
		compatible = "national,lm75a";
		reg = <0x4b>;
	};

	lm75a@4c {
		compatible = "national,lm75a";
		reg = <0x4c>;
	};

	lm75a@4d {
		compatible = "national,lm75a";
		reg = <0x4d>;
	};

	lm75a@4e {
		compatible = "national,lm75a";
		reg = <0x4e>;
	};

	lm75a@4f {
		compatible = "national,lm75a";
		reg = <0x4f>;
	};
};

//BMC I2C
&i2c8 {
	status = "okay";
};

&kcs1 {
	status = "okay";
	aspeed,lpc-io-reg = <0x60>;
};

&kcs2 {
	status = "okay";
	aspeed,lpc-io-reg = <0x62>;
};

&kcs3 {
	status = "okay";
	aspeed,lpc-io-reg = <0xCA2>;
};

&kcs4 {
	status = "okay";
	aspeed,lpc-io-reg = <0x97DE>;
};

&lpc_snoop {
	status = "okay";
	snoop-ports = <0x80>, <0x81>;
};

&lpc_ctrl {
	//Enable lpc clock
	status = "okay";
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_default
	&pinctrl_pwm1_default
	&pinctrl_pwm2_default
	&pinctrl_pwm3_default
	&pinctrl_pwm4_default
	&pinctrl_pwm5_default
	&pinctrl_pwm6_default
	&pinctrl_pwm7_default>;

	fan@0 {
		reg = <0x00>;
		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
	};

	fan@1 {
		reg = <0x01>;
		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
	};

	fan@2 {
		reg = <0x02>;
		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
	};

	fan@3 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
	};

	fan@4 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
	};

	fan@5 {
		reg = <0x05>;
		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
	};

	fan@6 {
		reg = <0x06>;
		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
	};

	fan@7 {
		reg = <0x07>;
		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
	};
};

&video {
	status = "okay";
	memory-region = <&video_engine_memory>;
};

&vhub {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>

/ {
	model = "Ampere Mt. Jade BMC";
	compatible = "ampere,mtjade-bmc", "aspeed,ast2500";

	aliases {
		/*
		 *  i2c bus 50-57 assigned to NVMe slot 0-7
		 */
		i2c50 = &nvmeslot_0;
		i2c51 = &nvmeslot_1;
		i2c52 = &nvmeslot_2;
		i2c53 = &nvmeslot_3;
		i2c54 = &nvmeslot_4;
		i2c55 = &nvmeslot_5;
		i2c56 = &nvmeslot_6;
		i2c57 = &nvmeslot_7;

		/*
		 *  i2c bus 60-67 assigned to NVMe slot 8-15
		 */
		i2c60 = &nvmeslot_8;
		i2c61 = &nvmeslot_9;
		i2c62 = &nvmeslot_10;
		i2c63 = &nvmeslot_11;
		i2c64 = &nvmeslot_12;
		i2c65 = &nvmeslot_13;
		i2c66 = &nvmeslot_14;
		i2c67 = &nvmeslot_15;

		/*
		 *  i2c bus 70-77 assigned to NVMe slot 16-23
		 */
		i2c70 = &nvmeslot_16;
		i2c71 = &nvmeslot_17;
		i2c72 = &nvmeslot_18;
		i2c73 = &nvmeslot_19;
		i2c74 = &nvmeslot_20;
		i2c75 = &nvmeslot_21;
		i2c76 = &nvmeslot_22;
		i2c77 = &nvmeslot_23;

		/*
		 *  i2c bus 80-81 assigned to NVMe M2 slot 0-1
		 */
		i2c80 = &nvme_m2_0;
		i2c81 = &nvme_m2_1;
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200 earlycon";
	};

	memory@80000000 {
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		vga_memory: framebuffer@9f000000 {
			no-map;
			reg = <0x9f000000 0x01000000>; /* 16M */
		};

		gfx_memory: framebuffer {
			size = <0x01000000>;
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};

		video_engine_memory: jpegbuffer {
			size = <0x02000000>;	/* 32M */
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};
	};

	leds {
		compatible = "gpio-leds";

		fault {
			gpios = <&gpio ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
		};

		identify {
			gpios = <&gpio ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>;
		};
	};

	gpioA0mux: mux-controller {
		compatible = "gpio-mux";
		#mux-control-cells = <0>;
		mux-gpios = <&gpio ASPEED_GPIO(A, 0) GPIO_ACTIVE_LOW>;
	};

	adc0mux: adc0mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 0>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc1mux: adc1mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 1>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc2mux: adc2mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 2>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc3mux: adc3mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 3>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc4mux: adc4mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 4>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc5mux: adc5mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 5>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc6mux: adc6mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 6>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc7mux: adc7mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 7>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc8mux: adc8mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 8>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc9mux: adc9mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 9>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc10mux: adc10mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 10>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc11mux: adc11mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 11>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc12mux: adc12mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 12>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	adc13mux: adc13mux {
		compatible = "io-channel-mux";
		io-channels = <&adc 13>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioA0mux>;
		channels = "s0", "s1";
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc0mux 0>, <&adc0mux 1>,
			<&adc1mux 0>, <&adc1mux 1>,
			<&adc2mux 0>, <&adc2mux 1>,
			<&adc3mux 0>, <&adc3mux 1>,
			<&adc4mux 0>, <&adc4mux 1>,
			<&adc5mux 0>, <&adc5mux 1>,
			<&adc6mux 0>, <&adc6mux 1>,
			<&adc7mux 0>, <&adc7mux 1>,
			<&adc8mux 0>, <&adc8mux 1>,
			<&adc9mux 0>, <&adc9mux 1>,
			<&adc10mux 0>, <&adc10mux 1>,
			<&adc11mux 0>, <&adc11mux 1>,
			<&adc12mux 0>, <&adc12mux 1>,
			<&adc13mux 0>, <&adc13mux 1>,
			<&adc 14>, <&adc 15>;
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
		/* spi-max-frequency = <50000000>; */
#include "openbmc-flash-layout-64.dtsi"
	};

	flash@1 {
		status = "okay";
		m25p,fast-read;
		label = "alt-bmc";
#include "openbmc-flash-layout-64-alt.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "pnor";
		/* spi-max-frequency = <100000000>; */
		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;
			uefi@400000 {
				reg = <0x400000 0x1C00000>;
				label = "pnor-uefi";
			};
		};
	};
};

&uart1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd1_default
			 &pinctrl_rxd1_default
			 &pinctrl_ncts1_default
			 &pinctrl_nrts1_default>;
};

&uart2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd2_default
			 &pinctrl_rxd2_default>;
};

&uart3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd3_default
			 &pinctrl_rxd3_default>;
};

&uart4 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd4_default
			 &pinctrl_rxd4_default>;
};

/* The BMC's uart */
&uart5 {
	status = "okay";
};

&mac0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii1_default>;
	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
		 <&syscon ASPEED_CLK_MAC1RCLK>;
	clock-names = "MACCLK", "RCLK";
	use-ncsi;
};

&mac1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};

&i2c0 {
	status = "okay";
	ssif-bmc@10 {
		compatible = "ssif-bmc";
		reg = <0x10>;
	};
};

&i2c1 {
	status = "okay";
};

&i2c2 {
	status = "okay";
	smpro@4f {
		compatible = "ampere,smpro";
		reg = <0x4f>;
	};
	smpro@4e {
		compatible = "ampere,smpro";
		reg = <0x4e>;
	};
};

&i2c3 {
	status = "okay";
	eeprom@50 {
		compatible = "microchip,24c64", "atmel,24c64";
		reg = <0x50>;
		pagesize = <32>;
	};

	inlet_mem2: tmp175@28 {
		compatible = "ti,tmp175";
		reg = <0x28>;
	};

	inlet_cpu: tmp175@29 {
		compatible = "ti,tmp175";
		reg = <0x29>;
	};

	inlet_mem1: tmp175@2a {
		compatible = "ti,tmp175";
		reg = <0x2a>;
	};

	outlet_cpu: tmp175@2b {
		compatible = "ti,tmp175";
		reg = <0x2b>;
	};

	outlet1: tmp175@2c {
		compatible = "ti,tmp175";
		reg = <0x2c>;
	};

	outlet2: tmp175@2d {
		compatible = "ti,tmp175";
		reg = <0x2d>;
	};
};

&i2c4 {
	status = "okay";
	rtc@51 {
		compatible = "nxp,pcf85063a";
		reg = <0x51>;
	};
};

&i2c5 {
	status = "okay";
	i2c-mux@70 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x70>;
		i2c-mux-idle-disconnect;

		nvmeslot_0_7: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;
		};
	};

	i2c-mux@71 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x71>;
		i2c-mux-idle-disconnect;

		nvmeslot_8_15: i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4>;
		};

		nvmeslot_16_23: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;
		};

	};

	i2c-mux@72 {
		compatible = "nxp,pca9545";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x72>;
		i2c-mux-idle-disconnect;

		nvme_m2_0: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;
		};

		nvme_m2_1: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;
		};
	};
};

&nvmeslot_0_7 {
	status = "okay";

	i2c-mux@75 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x75>;
		i2c-mux-idle-disconnect;

		nvmeslot_0: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;
		};
		nvmeslot_1: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;
		};
		nvmeslot_2: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2>;
		};
		nvmeslot_3: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;
		};
		nvmeslot_4: i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4>;
		};
		nvmeslot_5: i2c@5 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x5>;
		};
		nvmeslot_6: i2c@6 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x6>;
		};
		nvmeslot_7: i2c@7 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x7>;
		};

	};
};

&nvmeslot_8_15 {
	status = "okay";

	i2c-mux@75 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x75>;
		i2c-mux-idle-disconnect;

		nvmeslot_8: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;
		};
		nvmeslot_9: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;
		};
		nvmeslot_10: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2>;
		};
		nvmeslot_11: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;
		};
		nvmeslot_12: i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4>;
		};
		nvmeslot_13: i2c@5 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x5>;
		};
		nvmeslot_14: i2c@6 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x6>;
		};
		nvmeslot_15: i2c@7 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x7>;
		};
	};
};

&nvmeslot_16_23 {
	status = "okay";

	i2c-mux@75 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x75>;
		i2c-mux-idle-disconnect;

		nvmeslot_16: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;
		};
		nvmeslot_17: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;
		};
		nvmeslot_18: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2>;
		};
		nvmeslot_19: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;
		};
		nvmeslot_20: i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4>;
		};
		nvmeslot_21: i2c@5 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x5>;
		};
		nvmeslot_22: i2c@6 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x6>;
		};
		nvmeslot_23: i2c@7 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x7>;
		};
	};
};

&i2c6 {
	status = "okay";
	psu@58 {
		compatible = "pmbus";
		reg = <0x58>;
	};

	psu@59 {
		compatible = "pmbus";
		reg = <0x59>;
	};
};

&i2c7 {
	status = "okay";
};

&i2c8 {
	status = "okay";
};

&i2c9 {
	status = "okay";
};

&i2c10 {
	status = "okay";
	adm1278@10 {
		compatible = "adi,adm1278";
		reg = <0x10>;
	};

	adm1278@11 {
		compatible = "adi,adm1278";
		reg = <0x11>;
	};
};

&gfx {
	status = "okay";
	memory-region = <&gfx_memory>;
};

&pinctrl {
	aspeed,external-nodes = <&gfx &lhc>;
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2_default &pinctrl_pwm3_default
			&pinctrl_pwm4_default &pinctrl_pwm5_default
			&pinctrl_pwm6_default &pinctrl_pwm7_default>;

	fan@0 {
		reg = <0x02>;
		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
	};

	fan@1 {
		reg = <0x02>;
		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
	};

	fan@2 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
	};

	fan@3 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
	};

	fan@4 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x08>;
	};

	fan@5 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x09>;
	};

	fan@6 {
		reg = <0x05>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
	};

	fan@7 {
		reg = <0x05>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
	};

	fan@8 {
		reg = <0x06>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
	};

	fan@9 {
		reg = <0x06>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
	};

	fan@10 {
		reg = <0x07>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
	};

	fan@11 {
		reg = <0x07>;
		aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
	};

};

&vhub {
	status = "okay";
};

&adc {
	status = "okay";
};

&video {
	status = "okay";
	memory-region = <&video_engine_memory>;
};

&gpio {
	gpio-line-names =
	/*A0-A7*/	"","","","S0_BMC_SPECIAL_BOOT","","","","",
	/*B0-B7*/	"BMC_SELECT_EEPROM","","","",
			"POWER_BUTTON","","","",
	/*C0-C7*/	"","","","","","","","",
	/*D0-D7*/	"","","","","","","","",
	/*E0-E7*/	"","","","","","","","",
	/*F0-F7*/	"","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
			"S1_DDR_SAVE","","",
	/*G0-G7*/	"host0-ready","SHD_REQ_L","","S0_OVERTEMP_L","","",
			"","",
	/*H0-H7*/	"","","","","PSU1_VIN_GOOD","PSU2_VIN_GOOD","","",
	/*I0-I7*/	"PSU1_PRESENT","PSU2_PRESENT","S1_BMC_SPECIAL_BOOT",
			"","","","","",
	/*J0-J7*/	"S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
			"","","","",
	/*K0-K7*/	"","","","","","","","",
	/*L0-L7*/       "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
	/*M0-M7*/	"","","","","","","","",
	/*N0-N7*/	"","","","","","","","",
	/*O0-O7*/	"","","","","","","","",
	/*P0-P7*/	"","","","","","","","",
	/*Q0-Q7*/	"","","","","","UID_BUTTON","","",
	/*R0-R7*/	"","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
			"OCP_MAIN_PWREN","RESET_BUTTON","","",
	/*S0-S7*/	"","","","","rtc-battery-voltage-read-enable","","","",
	/*T0-T7*/	"","","","","","","","",
	/*U0-U7*/	"","","","","","","","",
	/*V0-V7*/	"","","","","","","","",
	/*W0-W7*/	"","","","","","","","",
	/*X0-X7*/	"","","","","","","","",
	/*Y0-Y7*/	"","","","","","","","",
	/*Z0-Z7*/	"S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
			"S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
	/*AA0-AA7*/	"","","","","","","","",
	/*AB0-AB7*/	"S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
			"S1_BMC_DDR_ADR","","","","",
	/*AC0-AC7*/	"SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
			"BMC_OCP_PG";

	i2c4-o-en-hog {
		gpio-hog;
		gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "BMC_I2C4_O_EN";
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (c) 2022, Ampere Computing LLC

/dts-v1/;

#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>

/ {
	model = "Ampere Mt.Mitchell BMC";
	compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";

	chosen {
		stdout-path = &uart5;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x80000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		gfx_memory: framebuffer {
			size = <0x01000000>;
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};

		video_engine_memory: video {
			size = <0x04000000>;
			alignment = <0x01000000>;
			compatible = "shared-dma-pool";
			reusable;
		};

		vga_memory: region@bf000000 {
			no-map;
			compatible = "shared-dma-pool";
			reg = <0xbf000000 0x01000000>;  /* 16M */
		};
	};

	voltage_mon_reg: voltage-mon-regulator {
		compatible = "regulator-fixed";
		regulator-name = "ltc2497_reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	gpioI5mux: mux-controller {
		compatible = "gpio-mux";
		#mux-control-cells = <0>;
		mux-gpios = <&gpio0 ASPEED_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
	};

	adc0mux: adc0mux {
		compatible = "io-channel-mux";
		io-channels = <&adc0 0>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc1mux: adc1mux {
		compatible = "io-channel-mux";
		io-channels = <&adc0 1>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc2mux: adc2mux {
		compatible = "io-channel-mux";
		io-channels = <&adc0 2>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc3mux: adc3mux {
		compatible = "io-channel-mux";
		io-channels = <&adc0 3>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc4mux: adc4mux {
		compatible = "io-channel-mux";
		io-channels = <&adc0 4>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc5mux: adc5mux {
		compatible = "io-channel-mux";
		io-channels = <&adc0 5>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc6mux: adc6mux {
		compatible = "io-channel-mux";
		io-channels = <&adc0 6>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc7mux: adc7mux {
		compatible = "io-channel-mux";
		io-channels = <&adc0 7>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc8mux: adc8mux {
		compatible = "io-channel-mux";
		io-channels = <&adc1 0>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc9mux: adc9mux {
		compatible = "io-channel-mux";
		io-channels = <&adc1 1>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc10mux: adc10mux {
		compatible = "io-channel-mux";
		io-channels = <&adc1 2>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc11mux: adc11mux {
		compatible = "io-channel-mux";
		io-channels = <&adc1 3>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc12mux: adc12mux {
		compatible = "io-channel-mux";
		io-channels = <&adc1 4>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc13mux: adc13mux {
		compatible = "io-channel-mux";
		io-channels = <&adc1 5>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc14mux: adc14mux {
		compatible = "io-channel-mux";
		io-channels = <&adc1 6>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	adc15mux: adc15mux {
		compatible = "io-channel-mux";
		io-channels = <&adc1 7>;
		#io-channel-cells = <1>;
		io-channel-names = "parent";
		mux-controls = <&gpioI5mux>;
		channels = "s0", "s1";
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc0mux 0>, <&adc0mux 1>,
			<&adc1mux 0>, <&adc1mux 1>,
			<&adc2mux 0>, <&adc2mux 1>,
			<&adc3mux 0>, <&adc3mux 1>,
			<&adc4mux 0>, <&adc4mux 1>,
			<&adc5mux 0>, <&adc5mux 1>,
			<&adc6mux 0>, <&adc6mux 1>,
			<&adc7mux 0>, <&adc7mux 1>,
			<&adc8mux 0>, <&adc8mux 1>,
			<&adc9mux 0>, <&adc9mux 1>,
			<&adc10mux 0>, <&adc10mux 1>,
			<&adc11mux 0>, <&adc11mux 1>,
			<&adc12mux 0>, <&adc12mux 1>,
			<&adc13mux 0>, <&adc13mux 1>,
			<&adc14mux 0>, <&adc14mux 1>,
			<&adc15mux 0>, <&adc15mux 1>,
			<&adc_i2c 0>, <&adc_i2c 1>,
			<&adc_i2c 2>, <&adc_i2c 3>,
			<&adc_i2c 4>, <&adc_i2c 5>,
			<&adc_i2c 6>, <&adc_i2c 7>,
			<&adc_i2c 8>, <&adc_i2c 9>,
			<&adc_i2c 10>, <&adc_i2c 11>,
			<&adc_i2c 12>, <&adc_i2c 13>,
			<&adc_i2c 14>, <&adc_i2c 15>;
	};
};

&mdio0 {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0>;
	};
};

&mac0 {
	status = "okay";

	phy-mode = "rgmii";
	phy-handle = <&ethphy0>;

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii1_default>;
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
		spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-64.dtsi"
	};

	flash@1 {
		status = "okay";
		m25p,fast-read;
		label = "alt-bmc";
		spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-64-alt.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "pnor";
		spi-max-frequency = <20000000>;
	};
};

&uart1 {
	status = "okay";
};

&uart2 {
	status = "okay";
};

&uart3 {
	status = "okay";
};

&uart4 {
	status = "okay";
};

&i2c0 {
	status = "okay";

	temperature-sensor@2e {
		compatible = "adi,adt7490";
		reg = <0x2e>;
	};
};

&i2c1 {
	status = "okay";
};

&i2c2 {
	status = "okay";

	psu@58 {
		compatible = "pmbus";
		reg = <0x58>;
	};

	psu@59 {
		compatible = "pmbus";
		reg = <0x59>;
	};
};

&i2c3 {
	status = "okay";
};

&i2c4 {
	status = "okay";

	adc_i2c: adc@16 {
		compatible = "lltc,ltc2497";
		reg = <0x16>;
		vref-supply = <&voltage_mon_reg>;
		#io-channel-cells = <1>;
	 };

	eeprom@50 {
		compatible = "atmel,24c64";
		reg = <0x50>;
		pagesize = <32>;
	};

	i2c-mux@70 {
		compatible = "nxp,pca9545";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x70>;
		i2c-mux-idle-disconnect;

		i2c4_bus70_chn0: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;

			outlet_temp1: temperature-sensor@48 {
				compatible = "ti,tmp75";
				reg = <0x48>;
			};
			psu1_inlet_temp2: temperature-sensor@49 {
				compatible = "ti,tmp75";
				reg = <0x49>;
			};
		};

		i2c4_bus70_chn1: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;

			pcie_zone_temp1: temperature-sensor@48 {
				compatible = "ti,tmp75";
				reg = <0x48>;
			};
			psu0_inlet_temp2: temperature-sensor@49 {
				compatible = "ti,tmp75";
				reg = <0x49>;
			};
		};

		i2c4_bus70_chn2: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2>;

			pcie_zone_temp2: temperature-sensor@48 {
				compatible = "ti,tmp75";
				reg = <0x48>;
			};
			outlet_temp2: temperature-sensor@49 {
				compatible = "ti,tmp75";
				reg = <0x49>;
			};
		};

		i2c4_bus70_chn3: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;

			mb_inlet_temp1: temperature-sensor@7c {
				compatible = "microchip,emc1413";
				reg = <0x7c>;
			};
			mb_inlet_temp2: temperature-sensor@4c {
				compatible = "microchip,emc1413";
				reg = <0x4c>;
			};
		};
	};
};

&i2c5 {
	status = "okay";

	i2c-mux@70 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x70>;
		i2c-mux-idle-disconnect;
	};
};

&i2c6 {
	status = "okay";
	rtc@51 {
		compatible = "nxp,pcf85063a";
		reg = <0x51>;
	};
};

&i2c7 {
	status = "okay";
};

&i2c9 {
	status = "okay";
};

&i2c11 {
	status = "okay";
	ssif-bmc@10 {
		compatible = "ssif-bmc";
		reg = <0x10>;
	};
};

&i2c14 {
	status = "okay";
	eeprom@50 {
		compatible = "atmel,24c64";
		reg = <0x50>;
		pagesize = <32>;
	};

	bmc_ast2600_cpu: temperature-sensor@35 {
		compatible = "ti,tmp175";
		reg = <0x35>;
	};
};

&adc0 {
	ref_voltage = <2500>;
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
		&pinctrl_adc2_default &pinctrl_adc3_default
		&pinctrl_adc4_default &pinctrl_adc5_default
		&pinctrl_adc6_default &pinctrl_adc7_default>;
};

&adc1 {
	ref_voltage = <2500>;
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
		&pinctrl_adc10_default &pinctrl_adc11_default
		&pinctrl_adc12_default &pinctrl_adc13_default
		&pinctrl_adc14_default &pinctrl_adc15_default>;
};

&vhub {
	status = "okay";
};

&video {
	status = "okay";
	memory-region = <&video_engine_memory>;
};

&gpio0 {
	gpio-line-names =
	/*A0-A7*/	"","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n",
	/*B0-B7*/	"","","","","host0-sysreset-n","host0-pmin-n","","",
	/*C0-C7*/	"s0-vrd-fault-n","s1-vrd-fault-n","","",
			"irq-n","","vrd-sel","spd-sel",
	/*D0-D7*/	"presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n",
			"","bmc-ncsi-txen","","",
	/*E0-E7*/	"","","clk50m-bmc-ncsi","","","","","",
	/*F0-F7*/	"s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control",
			"cpu-bios-recover","s0-heartbeat","hs-csout-prochot",
			"s0-vr-hot-n","s1-vr-hot-n",
	/*G0-G7*/	"","","hsc-12vmain-alt1-n","","","","","",
	/*H0-H7*/	"","","wd-disable-n","power-chassis-good","","","","",
	/*I0-I7*/	"","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable",
	/*J0-J7*/	"","","","","","","","",
	/*K0-K7*/	"","","","","","","","",
	/*L0-L7*/	"","","","","","","","",
	/*M0-M7*/	"","s0-ddr-save","soc-spi-nor-access","presence-cpu0",
			"s0-rtc-lock","","","",
	/*N0-N7*/	"hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb",
			"jtag-dbgr-prsnt-n","s1-heartbeat","","",
	/*O0-O7*/	"","","","","","","","",
	/*P0-P7*/	"ps0-ac-loss-n","ps1-ac-loss-n","","",
			"led-fault","cpld-user-mode","jtag-srst-n","led-bmc-hb",
	/*Q0-Q7*/	"","","","","","","","",
	/*R0-R7*/	"","","","","","","","",
	/*S0-S7*/	"","","identify-button","led-identify",
			"s1-ddr-save","spi-nor-access","sys-pgood","presence-cpu1",
	/*T0-T7*/	"","","","","","","","",
	/*U0-U7*/	"","","","","","","","",
	/*V0-V7*/	"s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
			"host0-reboot-ack-n","host0-ready","host0-shd-req-n",
			"host0-shd-ack-n","s0-overtemp-n",
	/*W0-W7*/	"ocp-aux-pwren","ocp-main-pwren","ocp-pgood","",
			"bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
	/*X0-X7*/	"i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
			"s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
			"s1-overtemp-n","s1-spi-auth-fail-n",
	/*Y0-Y7*/	"","","","","","","","host0-special-boot",
	/*Z0-Z7*/	"reset-button","ps0-pgood","ps1-pgood","","","","","";
};

&gpio1 {
	gpio-line-names =
	/*18A0-18A7*/	"","","","","","","","",
	/*18B0-18B7*/	"","","","","","","s0-soc-pgood","",
	/*18C0-18C7*/	"uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1",
			"uart3-mode0","uart3-mode1","uart4-mode0","uart4-mode1",
	/*18D0-18D7*/	"","","","","","","","",
	/*18E0-18E3*/	"","","","";
};


code:
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;

#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>

/ {
	model = "HXT StarDragon 4800 REP2 AST2520";
	compatible = "hxt,stardragon4800-rep2-bmc", "aspeed,ast2500";

	chosen {
		stdout-path = &uart5;
		bootargs = "console=ttyS4,115200 earlycon";
	};

	memory@80000000 {
		reg = <0x80000000 0x40000000>;
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
						<&adc 4>, <&adc 5>, <&adc 6>, <&adc 8>;
	};

	iio-hwmon-battery {
		compatible = "iio-hwmon";
		io-channels = <&adc 7>;
	};

	leds {
		compatible = "gpio-leds";

		system_fault1 {
			label = "System_fault1";
			gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>;
		};

		system_fault2 {
			label = "System_fault2";
			gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_LOW>;
		};
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
#include "openbmc-flash-layout.dtsi"
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;
	flash@0 {
		status = "okay";
	};
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi2ck_default
			&pinctrl_spi2miso_default
			&pinctrl_spi2mosi_default
			&pinctrl_spi2cs0_default>;
};

&uart3 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
	current-speed = <115200>;
};

&uart5 {
	status = "okay";
};

&mac0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};

&mac1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rmii2_default>;
	clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
		 <&syscon ASPEED_CLK_MAC2RCLK>;
	clock-names = "MACCLK", "RCLK";
	use-ncsi;
};

&i2c0 {
	status = "okay";
};

&i2c1 {
	status = "okay";

	tmp421@1e {
		compatible = "ti,tmp421";
		reg = <0x1e>;
	};
	tmp421@2a {
		compatible = "ti,tmp421";
		reg = <0x2a>;
	};
	tmp421@1c {
		compatible = "ti,tmp421";
		reg = <0x1c>;
	};
};

&i2c2 {
	status = "okay";
};

&i2c3 {
	status = "okay";
};

&i2c4 {
	status = "okay";
};

&i2c5 {
	status = "okay";
};

&i2c6 {
	status = "okay";

	tmp421@1f {
		compatible = "ti,tmp421";
		reg = <0x1f>;
	};
	nvt210@4c {
		compatible = "nvt210";
		reg = <0x4c>;
	};
	eeprom@50 {
		compatible = "atmel,24c128";
		reg = <0x50>;
		pagesize = <128>;
	};
};

&i2c7 {
	status = "okay";
};

&i2c8 {
	status = "okay";

	pca9641@70 {
		compatible = "nxp,pca9641";
		reg = <0x70>;
		i2c-arb {
			#address-cells = <1>;
			#size-cells = <0>;
			eeprom@50 {
				compatible = "atmel,24c02";
				reg = <0x50>;
			};
			dps650ab@58 {
				compatible = "dps650ab";
				reg = <0x58>;
			};
		};
	};

	dps650ab@58 {
		compatible = "delta,dps650ab";
		reg = <0x58>;
	};

	dps650ab@59 {
		compatible = "delta,dps650ab";
		reg = <0x59>;
	};
};

&i2c9 {
	status = "okay";
};

&vuart {
	status = "okay";
};

&gfx {
	status = "okay";
};

&pinctrl {
	aspeed,external-nodes = <&gfx &lhc>;
};

&gpio {
	pin_gpio_c7 {
		gpio-hog;
		gpios = <ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "BIOS_SPI_MUX_S";
	};
	pin_gpio_d1 {
		gpio-hog;
		gpios = <ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "PHY2_RESET_N";
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;

#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/interrupt-controller/irq.h>

/{
	model = "ASRock E3C246D4I BMC";
	compatible = "asrock,e3c246d4i-bmc", "aspeed,ast2500";

	aliases {
		serial4 = &uart5;
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=tty0 console=ttyS4,115200 earlycon";
	};

	memory@80000000 {
		reg = <0x80000000 0x20000000>;
	};

	leds {
		compatible = "gpio-leds";

		heartbeat {
			/* BMC_HB_LED_N */
			gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;
			linux,default-trigger = "timer";
		};

		system-fault {
			/* SYSTEM_FAULT_LED_N */
			gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
			panic-indicator;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		uid-button {
			label = "uid-button";
			gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
			linux,code = <ASPEED_GPIO(F, 1)>;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
			<&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
			<&adc 10>, <&adc 11>, <&adc 12>;
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
		spi-max-frequency = <100000000>; /* 100 MHz */
#include "openbmc-flash-layout.dtsi"
	};
};

&uart5 {
	status = "okay";
};

&vuart {
	status = "okay";
	aspeed,lpc-io-reg = <0x2f8>;
	aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};

&mac0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};

&i2c1 {
	status = "okay";

	/* thermal sensor, one diode run to a disconnected header */
	w83773g@4c {
		compatible = "nuvoton,w83773g";
		reg = <0x4c>;
	};
};

&i2c3 {
	status = "okay";

	/* FRU EEPROM */
	eeprom@57 {
		compatible = "st,24c128", "atmel,24c128";
		reg = <0x57>;
		pagesize = <16>;
	};
};

&video {
	status = "okay";
};

&vhub {
	status = "okay";
};

&lpc_ctrl {
	status = "okay";
};

&lpc_snoop {
	status = "okay";
	snoop-ports = <0x80>;
};

&gpio {
	status = "okay";
	gpio-line-names =
		/*  A */ "BMC_MAC1_INTB", "BMC_MAC2_INTB", "NMI_BTN_N", "BMC_NMI",
			"", "", "", "",
		/*  B */ "", "", "", "", "", "IRQ_BMC_PCH_SMI_LPC_N", "", "",
		/*  C */ "", "", "", "", "", "", "", "",
		/*  D */ "BMC_PSIN", "BMC_PSOUT", "BMC_RESETCON", "RESETCON",
			"", "", "", "",
		/*  E */ "", "", "", "", "", "", "", "",
		/*  F */ "LOCATORLED_STATUS_N", "LOCATORBTN", "", "",
			"", "", "BMC_PCH_SCI_LPC", "BMC_NCSI_MUX_CTL",
		/*  G */ "HWM_BAT_EN", "CHASSIS_ID0", "CHASSIS_ID1", "CHASSIS_ID2",
			"BMC_ALERT1_N_R", "BMC_ALERT2_N_R", "BMC_ALERT3_N", "SML0ALERT",
		/*  H */ "FM_ME_RCVR_N", "O_PWROK", "SKL_CNL_R", "D4_DIMM_EVENT_3V_N",
			"MFG_MODE_N", "BMC_RTCRST", "BMC_HB_LED_N", "BMC_CASEOPEN",
		/*  I */ "", "", "", "", "", "", "", "",
		/*  J */ "BMC_READY", "BMC_PCH_BIOS_CS_N", "BMC_SMI", "",
			"", "", "", "",
		/*  K */ "", "", "", "", "", "", "", "",
		/*  L */ "BMC_CTS1", "BMC_DCD1", "BMC_DSR1", "BMC_RI1",
			"BMC_DTR1", "BMC_RTS1", "BMC_TXD1", "BMC_RXD1",
		/*  M */ "BMC_LAN0_DIS_N", "BMC_LAN1_DIS_N", "", "",
			"", "", "", "",
		/*  N */ "", "", "", "", "", "", "", "",
		/*  O */ "", "", "", "", "", "", "", "",
		/*  P */ "", "", "", "", "", "", "", "",
		/*  Q */ "", "", "", "",
			"BMC_SBM_PRESENT_1_N", "BMC_SBM_PRESENT_2_N",
			"BMC_SBM_PRESENT_3_N", "BMC_PCIE_WAKE_N",
		/*  R */ "", "", "", "", "", "", "", "",
		/*  S */ "PCHHOT_BMC_N", "", "RSMRST",
			"", "", "", "", "",
		/*  T */ "", "", "", "", "", "", "", "",
		/*  U */ "", "", "", "", "", "", "", "",
		/*  V */ "", "", "", "", "", "", "", "",
		/*  W */ "PS_PWROK", /* dummy always-high signal */
			"", "", "", "", "", "", "",
		/*  X */ "", "", "", "", "", "", "", "",
		/*  Y */ "SLP_S3", "SLP_S5", "", "", "", "", "", "",
		/*  Z */ "CPU_CATERR_BMC_PCH_N", "", "SYSTEM_FAULT_LED_N", "BMC_THROTTLE_N",
			"", "", "", "",
		/* AA */ "CPU1_THERMTRIP_LATCH_N", "", "CPU1_PROCHOT_N", "",
			"", "", "IRQ_SMI_ACTIVE_N", "FM_BIOS_POST_CMPLT_N",
		/* AB */ "", "", "ME_OVERRIDE", "BMC_DMI_MODIFY",
			"", "", "", "",
		/* AC */ "LAD0", "LAD1", "LAD2", "LAD3",
			"CK_33M_BMC", "LFRAME", "SERIRQ", "S_PLTRST";

	/* Assert BMC_READY so BIOS doesn't sit around waiting for it */
	bmc-ready {
		gpio-hog;
		gpios = <ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
		output-high;
	};
};

&adc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc0_default
			&pinctrl_adc1_default
			&pinctrl_adc2_default
			&pinctrl_adc3_default
			&pinctrl_adc4_default
			&pinctrl_adc5_default
			&pinctrl_adc6_default
			&pinctrl_adc7_default
			&pinctrl_adc8_default
			&pinctrl_adc9_default
			&pinctrl_adc10_default
			&pinctrl_adc11_default
			&pinctrl_adc12_default>;
};

&kcs3 {
	status = "okay";
	aspeed,lpc-io-reg = <0xca2>;
};


code:
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;

#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/{
	model = "ASRock ROMED8HM3 BMC v1.00";
	compatible = "asrock,romed8hm3-bmc", "aspeed,ast2500";

	aliases {
		serial4 = &uart5;
	};

	chosen {
		stdout-path = &uart5;
		bootargs = "console=tty0 console=ttyS4,115200 earlycon";
	};

	memory@80000000 {
		reg = <0x80000000 0x20000000>;
	};

	leds {
		compatible = "gpio-leds";

		heartbeat {
			gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;
			linux,default-trigger = "timer";
		};

		system-fault {
			gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
			panic-indicator;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
			<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
			<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
	};
};

&fmc {
	status = "okay";
	flash@0 {
		status = "okay";
		m25p,fast-read;
		label = "bmc";
		spi-max-frequency = <100000000>; /* 100 MHz */
#include "openbmc-flash-layout-64.dtsi"
	};
};

&uart5 {
	status = "okay";
};

&vuart {
	status = "okay";
	aspeed,lpc-io-reg = <0x2f8>;
	aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};

&mac0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};

&i2c0 {
	status = "okay";

	/* inlet temp sensor */
	w83773g@4c {
		compatible = "nuvoton,w83773g";
		reg = <0x4c>;
	};
};

&i2c1 {
	status = "okay";
};

&i2c2 {
	status = "okay";

	/* IPB temp sensor */
	w83773g@4c {
		compatible = "nuvoton,w83773g";
		reg = <0x4c>;
	};

	/* IPB PMIC */
	lm25066@40 {
		compatible = "lm25066";
		reg = <0x40>;
		shunt-resistor-micro-ohms = <1000>;
	};

	/* 12VSB PMIC */
	lm25066@41 {
		compatible = "lm25066";
		reg = <0x41>;
		shunt-resistor-micro-ohms = <10000>;
	};
};

&i2c4 {
	status = "okay";
};

&i2c5 {
	status = "okay";
};

&i2c6 {
	status = "okay";
};

&i2c7 {
	status = "okay";

	/* Baseboard FRU eeprom */
	eeprom@50 {
		compatible = "st,24c128", "atmel,24c128";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&i2c8 {
	status = "okay";
};

&i2c9 {
	status = "okay";
};

&video {
	status = "okay";
};

&vhub {
	status = "okay";
};

&lpc_ctrl {
	status = "okay";
};

&lpc_snoop {
	status = "okay";
	snoop-ports = <0x80>;
};

&kcs3 {
	status = "okay";
	aspeed,lpc-io-reg = <0xca2>;
};

&pwm_tacho {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3_default
		&pinctrl_pwm4_default
		&pinctrl_pwm5_default
		&pinctrl_pwm6_default>;

	fan@3 {
		reg = <0x03>;
		aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0b>;
	};

	fan@4 {
		reg = <0x04>;
		aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0c>;
	};

	fan@5 {
		reg = <0x05>;
		aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0d>;
	};

	fan@6 {
		reg = <0x06>;
		aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0e>;
	};
};

&gpio {
	status = "okay";
	gpio-line-names =
		/*  A */ "LOCATORLED_STATUS_N", "BMC_MAC2_INTB", "NMI_BTN_N", "BMC_NMI",
			"", "", "", "",
		/*  B */ "POST_COMPLETE_N", "", "", "", "", "", "", "",
		/*  C */ "", "", "", "", "PCIE_HP_SEL_N", "PCIE_SATA_SEL_N", "LOCATORBTN", "",
		/*  D */ "BMC_PSIN", "BMC_PSOUT", "BMC_RESETCON", "RESETCON",
			"", "", "", "PSU_FAN_FAIL_N",
		/*  E */ "", "", "", "", "", "", "", "",
		/*  F */ "NIC_PWR_GOOD", "PRSNTB0", "PRSNTB1", "PRSNTB2",
			"PRSNTB3", "", "3VSB_PCIE1_PG", "12V_PCIE1_PG",
		/*  G */ "HWM_BAT_EN", "CHASSIS_ID0", "CHASSIS_ID1", "CHASSIS_ID2",
			"BMC_ALERT1_N_R", "BMC_ALERT2_N_R", "BMC_ALERT3_N", "BMC_ALERT4_N",
		/*  H */ "X24_C1_PRSNT", "X24_C2_PRSNT", "X24_C3_PRSNT", "FM_MEM_THERM_EVENT_BMC_R_N",
			"FACMODE", "BMC_RTCRST", "BMC_HB_LED_N", "BMC_CASEOPEN",
		/*  I */ "", "", "", "", "", "", "", "",
		/*  J */ "BMC_READY", "BMC_PCH_BIOS_CS_N", "", "P0_MA_DDR_QS_CS_N",
			"", "", "", "",
		/*  K */ "", "", "", "", "", "", "", "",
		/*  L */ "", "", "", "", "", "", "", "",
		/*  M */ "", "", "MEZZ_PWRBRK_N", "OCP_HP_RST_EN",
			"MAIN_PWR_EN_G", "BMC_MAIN_EN", "AUX_PWR_EN_G", "BMC_AUX_EN",
		/*  N */ "", "", "", "", "", "", "", "",
		/*  O */ "", "", "", "", "", "", "", "",
		/*  P */ "", "", "", "", "", "", "", "",
		/*  Q */ "", "", "", "",
			"BMC_SMB_PRESENT_1_N", "BMC_SMB_PRESENT_2_N",
			"BMC_SMB_PRESENT_3_N", "BMC_PCIE_WAKE_N",
		/*  R */ "", "", "THERMALTRIP_CLEAR_N", "", "", "", "", "",
		/*  S */ "", "", "", "", "", "", "", "",
		/*  T */ "", "", "", "", "", "", "", "",
		/*  U */ "", "", "", "", "", "", "", "",
		/*  V */ "", "", "", "", "", "", "", "",
		/*  W */ "", "", "", "", "", "", "", "",
		/*  X */ "", "", "", "", "", "", "", "",
		/*  Y */ "SLP_S3", "SLP_S4_S5", "NODE_ID_1", "NODE_ID_2", "", "", "", "",
		/*  Z */ "", "", "SYSTEM_FAULT_LED_N", "FAST_THROTTLE_N",
			"", "", "", "",
		/* AA */ "FM_CPU0_IBMC_THERMTRIP_N", "", "PROCHOT_L_G", "",
			"", "", "", "",
		/* AB */ "BMC_FORCE_SELFREFRESH", "PWRGD_OUT", "", "IRQ_BMC_PCH_SMI_LPC_N",
			"", "", "", "",
		/* AC */ "", "", "", "", "", "", "", "";
};

&adc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc0_default
		&pinctrl_adc1_default
		&pinctrl_adc2_default
		&pinctrl_adc3_default
		&pinctrl_adc4_default
		&pinctrl_adc5_default
		&pinctrl_adc6_default
		&pinctrl_adc7_default
		&pinctrl_adc8_default
		&pinctrl_adc9_default
		&pinctrl_adc10_default
		&pinctrl_adc11_default
		&pinctrl_adc12_default
		&pinctrl_adc13_default
		&pinctrl_adc14_default
		&pinctrl_adc15_default>;
};