code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Common support for omap3 EVM boards
 */

#include <dt-bindings/input/input.h>
#include "omap-gpmc-smsc911x.dtsi"

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	/* HS USB Port 2 Power */
	hsusb2_power: hsusb2_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb2_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; /* gpio_22 */
		startup-delay-us = <70000>;
		enable-active-high;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; /* gpio_21 */
		vcc-supply = <&hsusb2_power>;
		#phy-cells = <0>;
	};

	leds {
		compatible = "gpio-leds";
		ledb {
			label = "omap3evm::ledb";
			gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
			linux,default-trigger = "default-on";
		};
	};

	wl12xx_vmmc: wl12xx_vmmc {
		compatible = "regulator-fixed";
		regulator-name = "vwl1271";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio5 22 GPIO_ACTIVE_HIGH>;	/* gpio150 */
		startup-delay-us = <70000>;
		enable-active-high;
		vin-supply = <&vmmc2>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
#include "omap3-panel-sharp-ls037v7dw01.dtsi"

&backlight0 {
	gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
};

&twl {
	twl_power: power {
		compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
		ti,use_poweroff;
	};
};

&i2c2 {
	clock-frequency = <400000>;
};

&i2c3 {
	clock-frequency = <400000>;

	/*
	 * TVP5146 Video decoder-in for analog input support.
	 */
	tvp5146@5c {
		compatible = "ti,tvp5146m2";
		reg = <0x5c>;
	};
};

&lcd_3v3 {
	gpio = <&gpio5 25 GPIO_ACTIVE_LOW>;	/* gpio153 */
};

&lcd0 {
	enable-gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;	/* gpio152, lcd INI */
	reset-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;	/* gpio155, lcd RESB */
	mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH	/* gpio154, lcd MO */
		      &gpio1 2 GPIO_ACTIVE_HIGH		/* gpio2, lcd LR */
		      &gpio1 3 GPIO_ACTIVE_HIGH>;	/* gpio3, lcd UD */
};

&mcspi1 {
	tsc2046@0 {
		interrupt-parent = <&gpio6>;
		interrupts = <15 0>;		/* gpio175 */
		pendown-gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
	};
};

&mmc1 {
	interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
	vmmc-supply = <&vmmc1>;
	vqmmc-supply = <&vsim>;
	bus-width = <8>;
};

&mmc2 {
	interrupts-extended = <&intc 86 &omap3_pmx_core 0x12e>;
	vmmc-supply = <&wl12xx_vmmc>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		/* gpio_149 with uart1_rts pad as wakeirq */
		interrupts-extended = <&gpio5 21 IRQ_TYPE_EDGE_RISING>,
				      <&omap3_pmx_core 0x14e>;
		interrupt-names = "irq", "wakeup";
		ref-clock-frequency = <38400000>;
	};
};

&twl_gpio {
	ti,use-leds;
};

&twl_keypad {
	linux,keymap = <
			MATRIX_KEY(2, 2, KEY_1)
			MATRIX_KEY(1, 1, KEY_2)
			MATRIX_KEY(0, 0, KEY_3)
			MATRIX_KEY(3, 2, KEY_4)
			MATRIX_KEY(2, 1, KEY_5)
			MATRIX_KEY(1, 0, KEY_6)
			MATRIX_KEY(1, 3, KEY_7)
			MATRIX_KEY(3, 1, KEY_8)
			MATRIX_KEY(2, 0, KEY_9)
			MATRIX_KEY(2, 3, KEY_KPASTERISK)
			MATRIX_KEY(0, 2, KEY_0)
			MATRIX_KEY(3, 0, KEY_KPDOT)
			/* s4 not wired */
			MATRIX_KEY(1, 2, KEY_BACKSPACE)
			MATRIX_KEY(0, 1, KEY_ENTER)
			>;
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

&gpmc {
	ethernet@gpmc {
		interrupt-parent = <&gpio6>;
		interrupts = <16 8>;
		reg = <5 0 0xff>;
	};
};

&vaux2 {
	regulator-name = "usb_1v8";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};


code:
/*
 * Common support for omap3 EVM 35xx/37xx processor modules
 */

/ {
	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	wl12xx_vmmc: wl12xx_vmmc {
		pinctrl-names = "default";
		pinctrl-0 = <&wl12xx_gpio>;
	};
};

&dss {
	vdds_dsi-supply = <&vpll2>;
	vdda_video-supply = <&lcd_3v3>;
	pinctrl-names = "default";
	pinctrl-0 = <
		&dss_dpi_pins1
		&dss_dpi_pins2
	>;
};

&hsusb2_phy {
	pinctrl-names = "default";
	pinctrl-0 = <&ehci_phy_pins>;
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;

	dss_dpi_pins1: pinmux_dss_dpi_pins2 {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */

			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */

			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3)   /* dss_data18.dss_data0 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3)   /* dss_data19.dss_data1 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3)   /* dss_data20.dss_data2 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3)   /* dss_data21.dss_data3 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3)   /* dss_data22.dss_data4 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3)   /* dss_data23.dss_data5 */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_cmd.sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat3.sdmmc1_dat3 */
			OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat4.sdmmc1_dat4 */
			OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat5.sdmmc1_dat5 */
			OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat6.sdmmc1_dat6 */
			OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat7.sdmmc1_dat7 */
		>;
	};

	/* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
			OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1)	/* sdmmc2_dat4.sdmmc2_dir_dat0 */
			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1)	/* sdmmc2_dat5.sdmmc2_dir_dat1 */
			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1)	/* sdmmc2_dat6.sdmmc2_dir_cmd */
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1)	/* sdmmc2_dat7.sdmmc2_clkin */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)		/* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	/* Devices are routed with gpmc_nbe1.gpio_61 to on-board devices */
	on_board_gpio_61: pinmux_ehci_port_select_pins {
		pinctrl-single,pins = <
		OMAP3_CORE1_IOPAD(0x20c8, PIN_OUTPUT | MUX_MODE4)
		>;
	};

	/* Used by OHCI and EHCI. OHCI won't work without external phy */
	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <

		/* mcspi1_cs3.hsusb2_data2 */
		OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* mcspi2_clk.hsusb2_data7 */
		OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* mcspi2_simo.hsusb2_data4 */
		OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* mcspi2_somi.hsusb2_data5 */
		OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* mcspi2_cs0.hsusb2_data6 */
		OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* mcspi2_cs1.hsusb2_data3 */
		OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)
		>;
	};

	/*
	 * Note that gpio_150 pulled high with internal pull to prevent wlcore
	 * reset on return from off mode in idle.
	 */
	wl12xx_gpio: pinmux_wl12xx_gpio {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE7)		/* uart1_cts.gpio_150 */
			OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4)		/* uart1_rts.gpio_149 */
		>;
	};

	smsc911x_pins: pinmux_smsc911x_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4)		/* mcspi1_cs2.gpio_176 */
		>;
	};
};

&omap3_pmx_wkup {
	dss_dpi_pins2: pinmux_dss_dpi_pins1 {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3)   /* sys_boot0.dss_data18 */
			OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3)   /* sys_boot1.dss_data19 */
			OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3)   /* sys_boot3.dss_data20 */
			OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3)   /* sys_boot4.dss_data21 */
			OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3)   /* sys_boot5.dss_data22 */
			OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3)   /* sys_boot6.dss_data23 */
		>;
	};
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
};

&mmc3 {
	status = "disabled";
};

&uart1 {
	interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
};

&uart2 {
	interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
};

&uart3 {
	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

/*
 * GPIO_61 (nUSB2_EN_1V8) must be low to enable on-board EHCI USB2 interface
 * for bus switch SN74CB3Q3384A, level-shifter SN74AVC16T245DGGR, and 1.8V.
 */
&gpio2 {
	en-usb2-port-hog {
		gpio-hog;
		gpios = <29 GPIO_ACTIVE_HIGH>;	/* gpio_61 */
		output-low;
		line-name = "enable usb2 port";
	};
};

/* T2_GPIO_2 low to route GPIO_61 to on-board devices */
&twl_gpio {
	en_on_board_gpio_61 {
		gpio-hog;
		gpios = <2 GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "en_hsusb2_clk";
	};
};

&gpmc {
	ranges = <0 0 0x30000000 0x1000000>,	/* CS0: 16MB for NAND */
		 <5 0 0x2c000000 0x01000000>;	/* CS5: 16MB for LAN9220 */

	ethernet@gpmc {
		pinctrl-names = "default";
		pinctrl-0 = <&smsc911x_pins>;
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap34xx.dtsi"
#include "omap3-evm-common.dtsi"
#include "omap3-evm-processor-common.dtsi"

/ {
	model = "TI OMAP35XX EVM (TMDSEVM3530)";
	compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3";
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_2_pins>;

	ehci_phy_pins: pinmux_ehci_phy_pins {
		pinctrl-single,pins = <

		/* EHCI PHY reset GPIO etk_d7.gpio_21 */
		OMAP3430_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)

		/* EHCI VBUS etk_d8.gpio_22 */
		OMAP3430_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
		>;
	};

	/* Used by OHCI and EHCI. OHCI won't work without external phy */
	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <

		/* etk_d10.hsusb2_clk */
		OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)

		/* etk_d11.hsusb2_stp */
		OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)

		/* etk_d12.hsusb2_dir */
		OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* etk_d13.hsusb2_nxt */
		OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* etk_d14.hsusb2_data0 */
		OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* etk_d15.hsusb2_data1 */
		OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
		>;
	};
};

&gpmc {
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		linux,mtd-name = "micron,mt29f2g16abdhc";
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		ti,nand-ecc-opt = "bch8";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Marek Belisko <marek@goldelico.com>
 *
 * Based on omap3-beagle-xm.dts
 */
/dts-v1/;

#include "omap36xx.dtsi"
#include <dt-bindings/input/input.h>

/ {
	model = "OMAP3 GTA04";
	compatible = "ti,omap3-gta04", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	chosen {
		stdout-path = &uart3;
	};

	aliases {
		display0 = &lcd;
		display1 = &tv0;
		/delete-property/ mmc2;
		/delete-property/ mmc3;
	};

	ldo_3v3: fixedregulator {
		compatible = "regulator-fixed";
		regulator-name = "ldo_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	/* fixed 26MHz oscillator */
	hfclk_26m: oscillator {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <26000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		aux-button {
			label = "aux";
			linux,code = <KEY_PHONE>;
			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
			wakeup-source;
		};
	};

	antenna-detect {
		compatible = "gpio-keys";

		gps_antenna_button: gps-antenna-button {
			label = "GPS_EXT_ANT";
			linux,input-type = <EV_SW>;
			linux,code = <SW_LINEIN_INSERT>;
			gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* GPIO144 */
			interrupt-parent = <&gpio5>;
			interrupts = <16 IRQ_TYPE_EDGE_BOTH>;
			debounce-interval = <10>;
			wakeup-source;
		};
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "gta04";

		ti,mcbsp = <&mcbsp2>;
	};

	/* GSM audio */
	sound_telephony {
		compatible = "simple-audio-card";
		simple-audio-card,name = "GTA04 voice";
		simple-audio-card,bitclock-master = <&telephony_link_master>;
		simple-audio-card,frame-master = <&telephony_link_master>;
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-inversion;
		simple-audio-card,frame-inversion;
		simple-audio-card,cpu {
			sound-dai = <&mcbsp4>;
		};

		telephony_link_master: simple-audio-card,codec {
			sound-dai = <&gtm601_codec>;
		};
	};

	gtm601_codec: gsm_codec {
		compatible = "option,gtm601";
		#sound-dai-cells = <0>;
	};

	spi_lcd: spi {
		compatible = "spi-gpio";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		pinctrl-names = "default";
		pinctrl-0 = <&spi_gpio_pins>;

		sck-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		miso-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
		mosi-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
		cs-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
		num-chipselects = <1>;

		/* lcd panel */
		lcd: td028ttec1@0 {
			compatible = "tpo,td028ttec1";
			reg = <0>;
			spi-max-frequency = <100000>;
			spi-cpol;
			spi-cpha;

			backlight = <&backlight>;
			label = "lcd";
			port {
				lcd_in: endpoint {
					remote-endpoint = <&dpi_out>;
				};
			};
		};
	};

	backlight: backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm11 0 12000000 0>;
		pwm-names = "backlight";
		brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>;
		default-brightness-level = <9>;	/* => 90 */
		pinctrl-names = "default";
		pinctrl-0 = <&backlight_pins>;
	};

	pwm11: pwm-11 {
		compatible = "ti,omap-dmtimer-pwm";
		ti,timers = <&timer11>;
		#pwm-cells = <3>;
		ti,clock-source = <0x01>;
	};

	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
		#phy-cells = <0>;
	};

	tv0: connector {
		compatible = "composite-video-connector";
		label = "tv";

		port {
			tv_connector_in: endpoint {
				remote-endpoint = <&opa_out>;
			};
		};
	};

	tv_amp: opa362 {
		compatible = "ti,opa362";
		enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;	/* GPIO_23 to enable video out amplifier */

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				opa_in: endpoint {
					remote-endpoint = <&venc_out>;
				};
			};

			port@1 {
				reg = <1>;
				opa_out: endpoint {
					remote-endpoint = <&tv_connector_in>;
				};
			};
		};
	};

	wifi_pwrseq: wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&tca6507 0 GPIO_ACTIVE_LOW>;	/* W2CBW003 reset through tca6507 */
	};

	/* devconf0 setup for mcbsp1 clock pins */
	pinmux_mcbsp1@48002274 {
		compatible = "pinctrl-single";
		reg = <0x48002274 4>;   /* CONTROL_DEVCONF0 */
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-single,bit-per-mux;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x7>;	/* MCBSP1 CLK pinmux */
		#pinctrl-cells = <2>;
		pinctrl-names = "default";
		pinctrl-0 = <&mcbsp1_devconf0_pins>;
		mcbsp1_devconf0_pins: pinmux_mcbsp1_devconf0_pins {
			/*                   offset bits mask */
			pinctrl-single,bits = <0x00 0x08 0x1c>;	/* set MCBSP1_CLKR */
		};
	};

	/* devconf1 setup for tvout pins */
	pinmux_tv_out@480022d8 {
		compatible = "pinctrl-single";
		reg = <0x480022d8 4>;	/* CONTROL_DEVCONF1 */
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-single,bit-per-mux;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x81>;	/* TV out pin control */
		#pinctrl-cells = <2>;
		pinctrl-names = "default";
		pinctrl-0 = <&tv_acbias_devconf1_pins>;
		tv_acbias_devconf1_pins: pinmux_tv_acbias_devconf1_pins {
			/*			offset	bits	mask */
			pinctrl-single,bits = <0x00 0x40800 0x40800>;	/* set TVOUTBYPASS and TVOUTACEN */
		};
	};
};

&omap3_pmx_wkup {
	gpio1_pins: pinmux_gpio1_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
			OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_clkout.gpio_10 */
		>;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_pins
	>;

	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)		/* uart1_rx.uart1_rx */
			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)		/* uart1_tx.uart1_tx */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)		/* uart2_rx.uart2_rx */
			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)		/* uart3_rx.uart3_rx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)		/* uart3_tx.uart3_tx */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_clk.sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_cmd.sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};

	backlight_pins: backlight_pins_pinmux {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20ba, MUX_MODE3)		/* gpt11/gpio57 */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
		>;
	};

	gps_pins: pinmux_gps_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* gpio145 */
		>;
	};

	hdq_pins: hdq_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.hdq */
		>;
	};

	bmp085_pins: pinmux_bmp085_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2136, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio113 */
		>;
	};

	bma180_pins: pinmux_bma180_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x213a, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio115 */
		>;
	};

	itg3200_pins: pinmux_itg3200_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio56 */
		>;
	};

	hmc5843_pins: pinmux_hmc5843_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2134, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio112 */
		>;
	};

	penirq_pins: pinmux_penirq_pins {
		pinctrl-single,pins = <
			/* here we could enable to wakeup the cpu from suspend by a pen touch */
			OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio160 */
		>;
	};

	camera_pins: pinmux_camera_pins {
		pinctrl-single,pins = <
			/* set up parallel camera interface */
			OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_hs */
			OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_vs */
			OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */
			OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_pclk */
			OMAP3_CORE1_IOPAD(0x2114, PIN_OUTPUT | MUX_MODE4) /* cam_fld = gpio_98 */
			OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d0 */
			OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d1 */
			OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d2 */
			OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d3 */
			OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d4 */
			OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d5 */
			OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d6 */
			OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d7 */
			OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d8 */
			OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d9 */
			OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */
			OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */
			OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE0) /* cam_xclkb */
			OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* cam_wen = gpio_167 */
			OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLDOWN | MUX_MODE4) /* cam_strobe */
		>;
	};

	mcbsp1_pins: pinmux_mcbsp1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT | MUX_MODE4)	/* mcbsp1_clkr.mcbsp1_clkr - gpio_156 FM interrupt */
			OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE0)	/* mcbsp1_clkr.mcbsp1_fsr */
			OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0)	/* mcbsp1_dx.mcbsp1_dx */
			OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0)	/* mcbsp1_dx.mcbsp1_dr */
			/* mcbsp_clks is used as PENIRQ */
			/* OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT | MUX_MODE0)	   mcbsp_clks.mcbsp_clks */
			OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0)	/* mcbsp_clks.mcbsp1_fsx */
			OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0)	/* mcbsp1_clkx.mcbsp1_clkx */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx.mcbsp2_fsx */
			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx.mcbsp2_clkx */
			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)	/* mcbsp2_dr.mcbsp2_dr */
			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)	/* mcbsp2_dr.mcbsp2_dx */
		>;
	};

	mcbsp3_pins: pinmux_mcbsp3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0)	/* mcbsp3_dx.mcbsp3_dx */
			OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0)	/* mcbsp3_dx.mcbsp3_dr */
			OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0)	/* mcbsp3_clkx.mcbsp3_clkx */
			OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0)	/* mcbsp3_clkx.mcbsp3_fsx */
		>;
	};

	mcbsp4_pins: pinmux_mcbsp4_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcbsp4_clkx.mcbsp4_clkx */
			OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcbsp4_clkx.mcbsp4_dr */
			OMAP3_CORE1_IOPAD(0x218a, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcbsp4_dx.mcbsp4_fsx */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_2_pins
	>;

	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};

	spi_gpio_pins: spi_gpio_pinmux {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE4) /* clk */
			OMAP3630_CORE2_IOPAD(0x25e6, PIN_OUTPUT | MUX_MODE4) /* cs */
			OMAP3630_CORE2_IOPAD(0x25e8, PIN_OUTPUT | MUX_MODE4) /* tx */
			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE4) /* rx */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		clocks = <&hfclk_26m>;
		clock-names = "fck";

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			ti,enable-vibra = <1>;
			codec {
				ti,ramp_delay_value = <3>;
			};
		};

		twl_power: power {
			compatible = "ti,twl4030-power-idle";
			ti,system-power-controller;
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c2 {
	clock-frequency = <400000>;

	/* pressure sensor */
	bmp085@77 {
		compatible = "bosch,bmp085";
		reg = <0x77>;
		pinctrl-names = "default";
		pinctrl-0 = <&bmp085_pins>;
		interrupt-parent = <&gpio4>;
		interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* GPIO_113 */
		vdda-supply = <&vio>;
		vddd-supply = <&vio>;
	};

	/* accelerometer */
	bma180@41 {
		compatible = "bosch,bma180";
		reg = <0x41>;
		pinctrl-names = "default";
		pinctrl-0 = <&bma180_pins>;
		interrupt-parent = <&gpio4>;
		interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_115 */
	};

	/* gyroscope */
	itg3200@68 {
		compatible = "invensense,itg3200";
		reg = <0x68>;
		pinctrl-names = "default";
		pinctrl-0 = <&itg3200_pins>;
		interrupt-parent = <&gpio2>;
		interrupts = <24 IRQ_TYPE_EDGE_FALLING>; /* GPIO_56 */
	};

	/* leds + gpios */
	tca6507: tca6507@45 {
		compatible = "ti,tca6507";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x45>;

		gpio-controller;
		#gpio-cells = <2>;

		gta04_led0: led@0 {
			label = "gta04:red:aux";
			reg = <0x0>;
		};

		gta04_led1: led@1 {
			label = "gta04:green:aux";
			reg = <0x1>;
		};

		gta04_led3: led@3 {
			label = "gta04:red:power";
			reg = <0x3>;
			linux,default-trigger = "default-on";
		};

		gta04_led4: led@4 {
			label = "gta04:green:power";
			reg = <0x4>;
		};

		wifi_reset: led@6 {
			/* reference as <&tca_gpios 0 0> since it is currently the only GPIO */
			reg = <0x6>;
			compatible = "gpio";
		};
	};

	/* compass aka magnetometer */
	hmc5843@1e {
		compatible = "honeywell,hmc5883l";
		reg = <0x1e>;
		pinctrl-names = "default";
		pinctrl-0 = <&hmc5843_pins>;
		interrupt-parent = <&gpio4>;
		interrupts = <16 IRQ_TYPE_EDGE_FALLING>;	/* gpio112 */
	};

	/* touchscreen */
	tsc2007@48 {
		compatible = "ti,tsc2007";
		reg = <0x48>;
		pinctrl-names = "default";
		pinctrl-0 = <&penirq_pins>;
		interrupt-parent = <&gpio6>;
		interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */
		gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;	/* GPIO_160 */
		ti,x-plate-ohms = <600>;
		touchscreen-size-x = <480>;
		touchscreen-size-y = <640>;
		touchscreen-max-pressure = <1000>;
		touchscreen-fuzz-x = <3>;
		touchscreen-fuzz-y = <8>;
		touchscreen-fuzz-pressure = <10>;
		touchscreen-inverted-y;
	};

	/* RFID EEPROM */
	m24lr64@50 {
		compatible = "atmel,24c64";
		reg = <0x50>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&vmmc1>;
	bus-width = <4>;
	ti,non-removable;
	broken-cd;	/* hardware has no CD */
};

&mmc2 {
	vmmc-supply = <&vaux4>;
	bus-width = <4>;
	ti,non-removable;
	cap-power-off-card;
	mmc-pwrseq = <&wifi_pwrseq>;
};

&mmc3 {
	status = "disabled";
};

#define BIT(x) (1 << (x))
&twl_gpio {
	/* pullups: BIT(2) */
	ti,pullups = <BIT(2)>;
	/*
	 * pulldowns:
	 * BIT(0),  BIT(1), BIT(6), BIT(7), BIT(8), BIT(13)
	 * BIT(15), BIT(16), BIT(17)
	 */
	ti,pulldowns = <(BIT(0) | BIT(1) | BIT(6) | BIT(7) | BIT(8) |
			 BIT(13) | BIT(15) | BIT(16) | BIT(17))>;
};

&twl_keypad {
	status = "disabled";
};

&gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio1_pins>;
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
	gnss: gnss {
		compatible = "wi2wi,w2sg0004";
		pinctrl-names = "default";
		pinctrl-0 = <&gps_pins>;
		sirf,onoff-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
		lna-supply = <&vsim>;
		vcc-supply = <&ldo_3v3>;
	};
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
};

&charger {
	ti,bb-uvolt = <3200000>;
	ti,bb-uamp = <150>;
};

/* spare */
&vaux1 {
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <3000000>;
};

/* sensors */
&vaux2 {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <2800000>;
	regulator-always-on;	/* we should never switch off while vio is on! */
};

/* camera */
&vaux3 {
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <2500000>;
};

/* WLAN/BT */
&vaux4 {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <3150000>;
};

/* GPS LNA */
&vsim {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <3150000>;
};

/* Needed to power the DPI pins */

&vpll2 {
	regulator-always-on;
};

&dss {
	pinctrl-names = "default";
	pinctrl-0 = < &dss_dpi_pins >;

	status = "okay";
	vdds_dsi-supply = <&vpll2>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};

&venc {
	status = "okay";

	vdda-supply = <&vdac>;

	port {
		venc_out: endpoint {
			remote-endpoint = <&opa_in>;
			ti,channels = <1>;
			ti,invert-polarity;
		};
	};
};

&gpmc {
	ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		ti,nand-ecc-opt = "ham1";
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		nand-bus-width = <16>;
		#address-cells = <1>;
		#size-cells = <1>;

		gpmc,device-width = <2>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,oe-off-ns = <54>;
		gpmc,we-off-ns = <40>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,sync-clk-ps = <0>;

		x-loader@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};

		bootloaders@80000 {
			label = "U-Boot";
			reg = <0x80000 0x1c0000>;
		};

		bootloaders_env@240000 {
			label = "U-Boot Env";
			reg = <0x240000 0x40000>;
		};

		kernel@280000 {
			label = "Kernel";
			reg = <0x280000 0x600000>;
		};

		filesystem@880000 {
			label = "File System";
			reg = <0x880000 0>;	/* 0 = MTDPART_SIZ_FULL */
		};
	};
};

&mcbsp1 { /* FM Transceiver PCM */
	status = "okay";
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp1_pins>;
};

&mcbsp2 { /* TPS65950 I2S */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
};

&mcbsp3 { /* Bluetooth PCM */
	status = "okay";
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp3_pins>;
};

&mcbsp4 { /* GSM voice PCM */
	status = "okay";
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp4_pins>;
};

&hdqw1w {
	pinctrl-names = "default";
	pinctrl-0 = <&hdq_pins>;
};

/* image signal processor within OMAP3 SoC */
&isp {
	ports {
		port@0 {
			reg = <0>;
			parallel_ep: endpoint {
				ti,isp-clock-divisor = <1>;
				ti,strobe-mode;
				bus-width = <8>;/* Used data lines */
				data-shift = <2>; /* Lines 9:2 are used */
				hsync-active = <0>; /* Active low */
				vsync-active = <1>; /* Active high */
				data-active = <1>;/* Active high */
				pclk-sample = <1>;/* Falling */
			};
		};
		/* port@1 and port@2 are not used by GTA04 */
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 H. Nikolaus Schaller <hns@goldelico.com>
 */

#include "omap3-gta04.dtsi"

/ {
	model = "Goldelico GTA04A3/Letux 2804";
};

&i2c2 {

	/* alternate accelerometer that might be installed on some GTA04A3 boards */
	lis302@1d {
		compatible = "st,lis331dlh", "st,lis3lv02d";
		reg = <0x1d>;
		interrupt-parent = <&gpio3>;
		interrupts = <18 (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)>;
		Vdd-supply = <&vaux2>;
		Vdd_IO-supply = <&vaux2>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <8>;
		st,click-thresh-y = <8>;
		st,click-thresh-z = <10>;
		st,click-click-time-limit = <9>;
		st,click-latency = <50>;
		st,irq1-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
		st,min-limit-x = <32>;
		st,min-limit-y = <3>;
		st,min-limit-z = <3>;
		st,max-limit-x = <3>;
		st,max-limit-y = <32>;
		st,max-limit-z = <32>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 Marek Belisko <marek@goldelico.com>
 */

#include "omap3-gta04.dtsi"

/ {
	model = "Goldelico GTA04A4/Letux 2804";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
 */

#include "omap3-gta04.dtsi"

/ {
	model = "Goldelico GTA04A5/Letux 2804";

	sound {
		ti,jack-det-gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>;	/* GTA04A5 only */
	};

	wlan_en: wlan_en_regulator {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&wlan_pins>;
		regulator-name = "wlan-en-regulator";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;

		gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;	/* GPIO_138 */

		startup-delay-us = <70000>;
		enable-active-high;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pps_pins>;

		gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; /* GPIN_114 */
	};

};

&gpio5 {
	irda-en-hog {
		gpio-hog;
		gpios = <(175-160) GPIO_ACTIVE_HIGH>;
		output-high;	/* activate gpio_175 to disable IrDA receiver */
	};
};

&omap3_pmx_core {
	bt_pins: pinmux_bt_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)	/* mmc2_dat5 = mmc3_dat1 = gpio137 */
		>;
	};

	wlan_pins: pinmux_wlan_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4)	/* mmc2_dat6 = mmc3_dat2 = gpio138 */
		>;
	};

	wlan_irq_pin: pinmux_wlan_irq_pin {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE4)	/* mmc2_dat7 = mmc3_dat3 = gpio139 */
		>;
	};

	irda_pins: pinmux_irda {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d0, PIN_OUTPUT_PULLUP | MUX_MODE4)	/* mcspi1_cs1 = gpio175 */
		>;
	};

	pps_pins: pinmux_pps_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2138, PIN_INPUT | MUX_MODE4) /* gpin114 */
		>;
	};

};

/*
 * for WL183x module see
 * Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml
 */

&wifi_pwrseq {
	/delete-property/ reset-gpios;
};

&mmc2 {
	vmmc-supply = <&wlan_en>;
	bus-width = <4>;
	cap-power-off-card;
	non-removable;

	pinctrl-names = "default";
	pinctrl-0 = <&wlan_irq_pin>;

	#address-cells = <1>;
	#size-cells = <0>;

	/delete-property/ mmc-pwrseq;

	wlcore: wlcore@2 {
		compatible = "ti,wl1837";
		reg = <2>;
		interrupt-parent = <&gpio5>;
		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;	/* GPIO_139 */
		ref-clock-frequency = <26000000>;
	};
};

&i2c2 {
	/delete-node/ bmp085@77;
	/delete-node/ bma180@41;
	/delete-node/ itg3200@68;
	/delete-node/ hmc5843@1e;

	bmg160@69 {
		compatible = "bosch,bmg160";
		reg = <0x69>;
	};

	bmc150@10 {
		compatible = "bosch,bmc150_accel";
		reg = <0x10>;
	};

	bmc150@12 {
		compatible = "bosch,bmc150_magn";
		reg = <0x12>;
	};

	bme280@76 {
		compatible = "bosch,bme280";
		reg = <0x76>;
		vdda-supply = <&vio>;
		vddd-supply = <&vio>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
 */

#include "omap3-gta04a5.dts"

&omap3_pmx_core {
	model = "Goldelico GTA04A5/Letux 2804 with OneNAND";

	gpmc_pins: pinmux_gpmc_pins {
		pinctrl-single,pins = <

			/* address lines */
			OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
			OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
			OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */

			/* data lines, gpmc_d0..d7 not muxable according to TRM */
			OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
			OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
			OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
			OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
			OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
			OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
			OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
			OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */

			/*
			 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
			 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
			 */
			OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
			OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
		>;
	};
};

&gpmc {
	/* switch inherited setup to OneNAND */

	ranges = <0 0 0x04000000 0x1000000>;	/* CS0: 16MB for OneNAND */
	pinctrl-names = "default";
	pinctrl-0 = <&gpmc_pins>;

	/delete-node/ nand@0,0;

	onenand@0,0 {

		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "ti,omap2-onenand";
		reg = <0 0 0x20000>;	/* CS0, offset 0, IO size 128K */

		gpmc,sync-read;
		gpmc,sync-write;
		gpmc,burst-length = <16>;
		gpmc,burst-read;
		gpmc,burst-wrap;
		gpmc,burst-write;
		gpmc,device-width = <2>;
		gpmc,mux-add-data = <2>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <87>;
		gpmc,cs-wr-off-ns = <87>;
		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <10>;
		gpmc,adv-wr-off-ns = <10>;
		gpmc,oe-on-ns = <15>;
		gpmc,oe-off-ns = <87>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <87>;
		gpmc,rd-cycle-ns = <112>;
		gpmc,wr-cycle-ns = <112>;
		gpmc,access-ns = <81>;
		gpmc,page-burst-access-ns = <15>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,clk-activation-ns = <5>;
		gpmc,wr-data-mux-bus-ns = <30>;
		gpmc,wr-access-ns = <81>;
		gpmc,sync-clk-ps = <15000>;

		x-loader@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};

		bootloaders@80000 {
			label = "U-Boot";
			reg = <0x80000 0x1c0000>;
		};

		bootloaders_env@240000 {
			label = "U-Boot Env";
			reg = <0x240000 0x40000>;
		};

		kernel@280000 {
			label = "Kernel";
			reg = <0x280000 0x600000>;
		};

		filesystem@880000 {
			label = "File System";
			reg = <0x880000 0>;	/* 0 = MTDPART_SIZ_FULL */
		};

	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
 */

#include "omap3-tao3530.dtsi"

/ {
	gpio_poweroff {
		pinctrl-names = "default";
		pinctrl-0 = <&poweroff_pins>;

		compatible = "gpio-poweroff";
		gpios = <&gpio6 8 GPIO_ACTIVE_LOW>;	/* GPIO 168 */
	};
};

&omap3_pmx_core {
	sound2_pins: pinmux_sound2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x209e, PIN_OUTPUT | MUX_MODE4)	/* gpmc_d8 gpio_44 */
		>;
	};

	led_blue_pins: pinmux_led_blue_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE4)	/* cam_xclka gpio_96, LED blue */
		>;
	};

	led_green_pins: pinmux_led_green_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2126, PIN_OUTPUT | MUX_MODE4)	/* cam_d8 gpio_107, LED green */
		>;
	};

	led_red_pins: pinmux_led_red_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT_PULLUP | MUX_MODE4)	/* cam_xclkb gpio_111, LED red */
		>;
	};

	poweroff_pins: pinmux_poweroff_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT_PULLUP | MUX_MODE4)	/* i2c2_scl gpio_168 */
		>;
	};

	powerdown_input_pins: pinmux_powerdown_input_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT_PULLUP | MUX_MODE4)	/* i2c2_sda gpio_183 */
		>;
	};

	fpga_boot0_pins: fpga_boot0_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE4)	/* cam_d2 gpio_101 */
			OMAP3_CORE1_IOPAD(0x211c, PIN_OUTPUT | MUX_MODE4)	/* cam_d3 gpio_102 */
			OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE4)	/* cam_d4 gpio_103 */
			OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT_PULLUP | MUX_MODE4)	/* cam_d5 gpio_104 */
		>;
	};

	fpga_boot1_pins: fpga_boot1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE4)	/* gpmc_d10 gpio_46 */
			OMAP3_CORE1_IOPAD(0x20a4, PIN_OUTPUT | MUX_MODE4)	/* gpmc_d11 gpio_47 */
			OMAP3_CORE1_IOPAD(0x20a6, PIN_OUTPUT | MUX_MODE4)	/* gpmc_d12 gpio_48 */
			OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT_PULLUP | MUX_MODE4)	/* gpmc_d13 gpio_49 */
		>;
	};
};

/* I2C2: mux'ed with GPIO168 which is connected to nKILL_POWER */
&i2c2 {
	status = "disabled";
};

&i2c3 {
	clock-frequency = <100000>;

	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
 */

#include "omap3-ha-common.dtsi"

/ {
	model = "TI OMAP3 HEAD acoustics LCD-baseboard with TAO3530 SOM";
	compatible = "headacoustics,omap3-ha-lcd", "technexion,omap3-tao3530", "ti,omap3430", "ti,omap34xx", "ti,omap3";
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
		&hsusbb2_pins
		&powerdown_input_pins
		&fpga_boot0_pins
		&fpga_boot1_pins
		&led_blue_pins
		&led_green_pins
		&led_red_pins
		&touchscreen_wake_pins
	>;

	touchscreen_irq_pins: pinmux_touchscreen_irq_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE4)	/* gpio_136, Touchscreen IRQ */
		>;
	};

	touchscreen_wake_pins: pinmux_touchscreen_wake_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x212c, PIN_OUTPUT_PULLUP | MUX_MODE4)	/* gpio_110, Touchscreen Wake */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
		>;
	};

	lte430_pins: pinmux_lte430_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat6.gpio_138 */
		>;
	};

	backlight_pins: pinmux_backlight_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 */
		>;
	};
};

/* I2C2: mux'ed with GPIO168 which is connected to nKILL_POWER */
&i2c2 {
	status = "disabled";
};

&i2c3 {
	clock-frequency = <100000>;

	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
};

/* Needed to power the DPI pins */
&vpll2 {
	regulator-always-on;
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_dpi_pins>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};

/ {
	aliases {
		display0 = &lcd0;
	};

	lcd0: display {
		compatible = "panel-dpi";
		label = "lcd";

		pinctrl-names = "default";
		pinctrl-0 = <&lte430_pins>;
		enable-gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;	/* gpio_138 */

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_out>;
			};
		};

		panel-timing {
			clock-frequency = <31250000>;
			hactive = <800>;
			vactive = <480>;
			hfront-porch = <40>;
			hback-porch = <86>;
			hsync-len = <1>;
			vback-porch = <30>;
			vfront-porch = <13>;
			vsync-len = <3>;

			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};
	};

	backlight {
		compatible = "gpio-backlight";

		pinctrl-names = "default";
		pinctrl-0 = <&backlight_pins>;
		gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>;		/* gpio_139 */

		default-on;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
 */

#include "omap3-ha-common.dtsi"

/ {
	model = "TI OMAP3 HEAD acoustics baseboard with TAO3530 SOM";
	compatible = "headacoustics,omap3-ha", "technexion,omap3-tao3530", "ti,omap3430", "ti,omap34xx", "ti,omap3";
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
		&hsusbb2_pins
		&powerdown_input_pins
		&fpga_boot0_pins
		&fpga_boot1_pins
		&led_blue_pins
		&led_green_pins
		&led_red_pins
	>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Common device tree for IGEP boards based on AM/DM37x
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
 */
/dts-v1/;

#include "omap36xx.dtsi"

/ {
	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	chosen {
		stdout-path = &uart3;
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "igep2";
		ti,mcbsp = <&mcbsp2>;
	};

	vdd33: regulator-vdd33 {
		compatible = "regulator-fixed";
		regulator-name = "vdd33";
		regulator-always-on;
	};

};

&omap3_pmx_core {
	gpmc_pins: pinmux_gpmc_pins {
		pinctrl-single,pins = <
			/* OneNAND seems to require PIN_INPUT on clock. */
                        OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)	/* uart1_rx.uart1_rx */
			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)	/* uart1_tx.uart1_tx */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)	/* uart3_rx.uart3_rx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx.uart3_tx */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx.mcbsp2_fsx */
			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)	/* mcbsp2_clkx.mcbsp2_clkx */
			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)	/* mcbsp2_dr.mcbsp2.dr */
			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)	/* mcbsp2_dx.mcbsp2_dx */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)	/* i2c1_scl.i2c1_scl */
			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)	/* i2c1_sda.i2c1_sda */
		>;
	};

	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl.i2c3_scl */
			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda.i2c3_sda */
		>;
	};
};

&gpmc {
	pinctrl-names = "default";
	pinctrl-0 = <&gpmc_pins>;

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		linux,mtd-name = "micron,mt29c4g96maz";
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		ti,nand-ecc-opt = "bch8";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;

		status = "okay";
	};

	onenand@0,0 {
		compatible = "ti,omap2-onenand";
		reg = <0 0 0x20000>;	/* CS0, offset 0, IO size 128K */

		gpmc,sync-read;
		gpmc,sync-write;
		gpmc,burst-length = <16>;
		gpmc,burst-wrap;
		gpmc,burst-read;
		gpmc,burst-write;
		gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
		gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <96>;
		gpmc,cs-wr-off-ns = <96>;
		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <12>;
		gpmc,adv-wr-off-ns = <12>;
		gpmc,oe-on-ns = <18>;
		gpmc,oe-off-ns = <96>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <96>;
		gpmc,rd-cycle-ns = <114>;
		gpmc,wr-cycle-ns = <114>;
		gpmc,access-ns = <90>;
		gpmc,page-burst-access-ns = <12>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,clk-activation-ns = <6>;
		gpmc,wr-data-mux-bus-ns = <30>;
		gpmc,wr-access-ns = <90>;
		gpmc,sync-clk-ps = <12000>;

		#address-cells = <1>;
		#size-cells = <1>;

		status = "disabled";
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
};

&mcbsp2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
	status = "okay";
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&vmmc1>;
	vmmc_aux-supply = <&vsim>;
	bus-width = <4>;
	cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
};

&mmc3 {
	status = "disabled";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

&twl_gpio {
	ti,use-leds;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Common Device Tree Source for IGEPv2
 *
 * Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
 */

#include "omap3-igep.dtsi"
#include "omap-gpmc-smsc9221.dtsi"

/ {

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&leds_pins>;
		compatible = "gpio-leds";

		boot {
			 label = "omap3:green:boot";
			 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
			 default-state = "on";
		};

		user0 {
			 label = "omap3:red:user0";
			 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
			 default-state = "off";
		};

		user1 {
			 label = "omap3:red:user1";
			 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
			 default-state = "off";
		};

		user2 {
			label = "omap3:green:user1";
			gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
		};
	};

	/* HS USB Port 1 Power */
	hsusb1_power: hsusb1_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb1_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>;	/* GPIO LEDA */
		startup-delay-us = <70000>;
	};

	/* HS USB Host PHY on PORT 1 */
	hsusb1_phy: hsusb1_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
		vcc-supply = <&hsusb1_power>;
		#phy-cells = <0>;
	};

	tfp410: encoder {
		compatible = "ti,tfp410";
		powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c3>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
		&tfp410_pins
		&dss_dpi_pins
	>;

	tfp410_pins: pinmux_tfp410_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4)   /* hdq_sio.gpio_170 */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)	/* uart2_cts.uart2_cts */
			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)	/* uart2_rts .uart2_rts*/
			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)	/* uart2_tx.uart2_tx */
			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)	/* uart2_rx.uart2_rx */
		>;
	};

	smsc9221_pins: pinmux_smsc9221_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4)	/* mcspi1_cs2.gpio_176 */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <
		&hsusbb1_pins
	>;

	hsusbb1_pins: pinmux_hsusbb1_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3)		/* etk_ctl.hsusb1_clk */
			OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)		/* etk_clk.hsusb1_stp */
			OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d8.hsusb1_dir */
			OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d9.hsusb1_nxt */
			OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d0.hsusb1_data0 */
			OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d1.hsusb1_data1 */
			OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d2.hsusb1_data2 */
			OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d3.hsusb1_data7 */
			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d4.hsusb1_data4 */
			OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d5.hsusb1_data5 */
			OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d6.hsusb1_data6 */
			OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d7.hsusb1_data3 */
		>;
	};

	leds_pins: pinmux_leds_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
			OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
			OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
		>;
	};

	mmc1_wp_pins: pinmux_mmc1_cd_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT | MUX_MODE4)   /* etk_d15.gpio_29 */
		>;
	};
};

&i2c3 {
	clock-frequency = <100000>;

	/*
	 * Display monitor features are burnt in the EEPROM
	 * as EDID data.
	 */
	eeprom@50 {
		compatible = "ti,eeprom";
		reg = <0x50>;
	};
};

&gpmc {
	ranges = <0 0 0x30000000 0x01000000>,	/* CS0: 16MB for NAND */
		 <5 0 0x2c000000 0x01000000>;	/* CS5: 16MB for ethernet */

	ethernet@gpmc {
		pinctrl-names = "default";
		pinctrl-0 = <&smsc9221_pins>;
		reg = <5 0 0xff>;
		interrupt-parent = <&gpio6>;
		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
	};
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&usbhshost {
	port1-mode = "ehci-phy";
};

&usbhsehci {
	phys = <&hsusb1_phy>;
};

&vpll2 {
	/* Needed for DSS */
	regulator-name = "vdds_dsi";
};

&dss {
	status = "okay";

	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};

&mmc1 {
	pinctrl-0 = <&mmc1_pins &mmc1_wp_pins>;
	wp-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;	/* gpio_29 */
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for IGEPv2 Rev. F (TI OMAP AM/DM37x)
 *
 * Copyright (C) Javier Martinez Canillas <javier@dowhile0.org>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
 */

#include "omap3-igep0020-common.dtsi"

/ {
	model = "IGEPv2 Rev. F (TI OMAP AM/DM37x)";
	compatible = "isee,omap3-igep0020-rev-f", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	/* Regulator to trigger the WL_EN signal of the Wifi module */
	lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
		compatible = "regulator-fixed";
		regulator-name = "regulator-lbep5clwmc-wlen";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>;		/* gpio_139 - WL_EN */
		enable-active-high;
	};
};

&omap3_pmx_core {
	lbep5clwmc_pins: pinmux_lbep5clwmc_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT | MUX_MODE4)	/* mcspi1_cs3.gpio_177 - W_IRQ */
			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat5.gpio_137 - BT_EN */
			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 - WL_EN */
		>;
	};
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins &lbep5clwmc_pins>;
	vmmc-supply = <&lbep5clwmc_wlen>;
	bus-width = <4>;
	non-removable;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1835";
		reg = <2>;
		interrupt-parent = <&gpio6>;
		interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 177 */
	};
};

&uart2 {
	bluetooth {
		compatible = "ti,wl1835-st";
		enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; /* gpio 137 */
		max-speed = <300000>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x)
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
 */

#include "omap3-igep0020-common.dtsi"

/ {
	model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)";
	compatible = "isee,omap3-igep0020", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	vmmcsdio_fixed: fixedregulator-mmcsdio {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsdio_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	mmc2_pwrseq: mmc2_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>,	/* gpio_139 - RESET_N_W */
			      <&gpio5 10 GPIO_ACTIVE_LOW>;	/* gpio_138 - WIFI_PDN */
	};
};

&omap3_pmx_core {
	lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat5.gpio_137 - RESET_N_W */
			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat6.gpio_138 - WIFI_PDN */
			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 - RST_N_B */
		>;
	};
};

/* On board Wifi module */
&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>;
	vmmc-supply = <&vmmcsdio_fixed>;
	mmc-pwrseq = <&mmc2_pwrseq>;
	bus-width = <4>;
	non-removable;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Common Device Tree Source for IGEP COM MODULE
 *
 * Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
 */

#include "omap3-igep.dtsi"

/ {
	leds: gpio_leds {
		compatible = "gpio-leds";

		user0 {
			 label = "omap3:red:user0";
			 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;	/* LEDA */
			 default-state = "off";
		};

		user1 {
			 label = "omap3:green:user1";
			 gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;	/* LEDB */
			 default-state = "off";
		};

		user2 {
			 label = "omap3:red:user1";
			 gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;		/* gpio_16 */
			 default-state = "off";
		};
	};

	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;		/* gpio_54 */
		#phy-cells = <0>;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_pins>;

	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1)	/* mcbsp3_dx.uart2_cts */
			OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1)	/* mcbsp3_dr.uart2_rts */
			OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)	/* mcbsp3_clk.uart2_tx */
			OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)	/* mcbsp3_fsx.uart2_rx */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_core2_pins>;

	hsusb2_core2_pins: pinmux_hsusb2_core2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		      /* etk_d10.hsusb2_clk */
			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		      /* etk_d11.hsusb2_stp */
			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};

	leds_core2_pins: pinmux_leds_core2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)	/* etk_d2.gpio_16 */
		>;
	};
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&gpmc {
	ranges = <0 0 0x30000000 0x01000000>;   /* CS0: 16MB for NAND */
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
 *
 * Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
 */

#include "omap3-igep0030-common.dtsi"

/ {
	model = "IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)";
	compatible = "isee,omap3-igep0030-rev-g", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	/* Regulator to trigger the WL_EN signal of the Wifi module */
	lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
		compatible = "regulator-fixed";
		regulator-name = "regulator-lbep5clwmc-wlen";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>;		/* gpio_139 - WL_EN */
		enable-active-high;
	};
};

&omap3_pmx_core {
	lbep5clwmc_pins: pinmux_lbep5clwmc_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4)	/* sdmmc2_dat4.gpio_136 - W_IRQ */
			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat5.gpio_137 - BT_EN */
			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 - WL_EN */
		>;
	};

	leds_pins: pinmux_leds_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)	/* i2c2_scl.gpio_168 */
		>;
	};

};

&i2c2 {
	status = "disabled";
};

&leds {
	pinctrl-names = "default";
	pinctrl-0 = <&leds_pins &leds_core2_pins>;

	boot {
		label = "omap3:green:boot";
		gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
		default-state = "on";
	};
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins &lbep5clwmc_pins>;
	vmmc-supply = <&lbep5clwmc_wlen>;
	bus-width = <4>;
	non-removable;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1835";
		reg = <2>;
		interrupt-parent = <&gpio5>;
		interrupts = <8 IRQ_TYPE_EDGE_RISING>; /* gpio 136 */
	};
};

&uart2 {
	bluetooth {
		compatible = "ti,wl1835-st";
		enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; /* gpio 137 */
		max-speed = <300000>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for IGEP COM MODULE Rev. E (TI OMAP AM/DM37x)
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
 */

#include "omap3-igep0030-common.dtsi"

/ {
	model = "IGEP COM MODULE Rev. E (TI OMAP AM/DM37x)";
	compatible = "isee,omap3-igep0030", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	vmmcsdio_fixed: fixedregulator-mmcsdio {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsdio_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	mmc2_pwrseq: mmc2_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>,	/* gpio_139 - RESET_N_W */
			      <&gpio5 10 GPIO_ACTIVE_LOW>;	/* gpio_138 - WIFI_PDN */
	};
};

&omap3_pmx_core {
	lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat5.gpio_137 - RESET_N_W */
			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat6.gpio_138 - WIFI_PDN */
			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 - RST_N_B */
		>;
	};
};

&leds {
	pinctrl-names = "default";
	pinctrl-0 = <&leds_core2_pins>;

	boot {
		label = "omap3:green:boot";
		gpios = <&twl_gpio 13 GPIO_ACTIVE_LOW>;	/* LEDSYNC */
		default-state = "on";
	};
};

/* On board Wifi module */
&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>;
	vmmc-supply = <&vmmcsdio_fixed>;
	mmc-pwrseq = <&mmc2_pwrseq>;
	bus-width = <4>;
	non-removable;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include <dt-bindings/input/input.h>
#include "omap34xx.dtsi"
#include "omap-gpmc-smsc911x.dtsi"

/ {
	model = "TI OMAP3430 LDP (Zoom1 Labrador)";
	compatible = "ti,omap3-ldp", "ti,omap3430", "ti,omap3";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x8000000>; /* 128 MB */
	};

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&gpio_key_pins>;

		key_enter {
			label = "enter";
			gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; /* gpio101 */
			linux,code = <KEY_ENTER>;
			wakeup-source;
		};

		key_f1 {
			label = "f1";
			gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; /* gpio102 */
			linux,code = <KEY_F1>;
			wakeup-source;
		};

		key_f2 {
			label = "f2";
			gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; /* gpio103 */
			linux,code = <KEY_F2>;
			wakeup-source;
		};

		key_f3 {
			label = "f3";
			gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; /* gpio104 */
			linux,code = <KEY_F3>;
			wakeup-source;
		};

		key_f4 {
			label = "f4";
			gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; /* gpio105 */
			linux,code = <KEY_F4>;
			wakeup-source;
		};

		key_left {
			label = "left";
			gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */
			linux,code = <KEY_LEFT>;
			wakeup-source;
		};

		key_right {
			label = "right";
			gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* gpio107 */
			linux,code = <KEY_RIGHT>;
			wakeup-source;
		};

		key_up {
			label = "up";
			gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; /* gpio108 */
			linux,code = <KEY_UP>;
			wakeup-source;
		};

		key_down {
			label = "down";
			gpios = <&gpio4 13 GPIO_ACTIVE_LOW>; /* gpio109 */
			linux,code = <KEY_DOWN>;
			wakeup-source;
		};
	};
};

&gpmc {
	ranges = <0 0 0x30000000 0x1000000>,	/* CS0 space, 16MB */
		 <1 0 0x08000000 0x1000000>;	/* CS1 space, 16MB */

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		linux,mtd-name = "micron,nand";
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		ti,nand-ecc-opt = "bch8";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x80000 0x140000>;
		};
		partition@1c0000 {
			label = "Environment";
			reg = <0x1c0000 0x40000>;
		};
		partition@200000 {
			label = "Kernel";
			reg = <0x200000 0x1e00000>;
		};
		partition@2000000 {
			label = "Filesystem";
			reg = <0x2000000 0x6000000>;
		};
	};

	ethernet@gpmc {
		interrupt-parent = <&gpio5>;
		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
		reg = <1 0 0xff>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_power: power {
			compatible = "ti,twl4030-power-idle";
			ti,use_poweroff;
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
#include "omap3-panel-sharp-ls037v7dw01.dtsi"

&backlight0 {
	gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
};

&i2c2 {
	clock-frequency = <400000>;
};

&i2c3 {
	clock-frequency = <400000>;
};

/* tps61130rsa enabled by twl4030 regen */
&lcd_3v3 {
	regulator-always-on;
};

&lcd0 {
	enable-gpios = <&twl_gpio 15 GPIO_ACTIVE_HIGH>;	/* lcd INI */
	reset-gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;	/* gpio55, lcd RESB */
	mode-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;	/* gpio56, lcd MO */
};

&mcspi1 {
	tsc2046@0 {
		interrupt-parent = <&gpio2>;
		interrupts = <22 0>;		/* gpio54 */
		pendown-gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;
	};
};

&mmc1 {
	/* See 35xx errata 2.1.1.128 in SPRZ278F */
	compatible = "ti,omap3-pre-es3-hsmmc";
	vmmc-supply = <&vmmc1>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&omap3_pmx_core {
	gpio_key_pins: pinmux_gpio_key_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE4)	/* cam_d2.gpio_101 */
			OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE4)	/* cam_d3.gpio_102 */
			OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE4)	/* cam_d4.gpio_103 */
			OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE4)	/* cam_d5.gpio_104 */
			OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE4)	/* cam_d6.gpio_105 */
			OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE4)	/* cam_d7.gpio_106 */
			OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE4)	/* cam_d8.gpio_107 */
			OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE4)	/* cam_d9.gpio_108 */
			OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT | MUX_MODE4)	/* cam_d10.gpio_109 */
		>;
	};

	musb_pins: pinmux_musb_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)	/* hsusb0_clk.hsusb0_clk */
			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)	/* hsusb0_data0.hsusb0_data0 */
			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)	/* hsusb0_data1.hsusb0_data1 */
			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)	/* hsusb0_data2.hsusb0_data2 */
			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)	/* hsusb0_data3.hsusb0_data3 */
			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)	/* hsusb0_data4.hsusb0_data4 */
			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)	/* hsusb0_data5.hsusb0_data5 */
			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)	/* hsusb0_data6.hsusb0_data6 */
			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)	/* hsusb0_data7.hsusb0_data7 */
			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)	/* hsusb0_dir.hsusb0_dir */
			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)	/* hsusb0_nxt.hsusb0_nxt */
			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)	/* hsusb0_stp.hsusb0_stp */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_clk.mmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_cmd.mmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_dat0.mmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214A, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_dat1.mmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214C, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_dat2.mmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_dat3.mmc1_dat3 */
		>;
	};
};

&twl_keypad {
	linux,keymap = <MATRIX_KEY(0, 0, KEY_1)
			MATRIX_KEY(0, 1, KEY_2)
			MATRIX_KEY(0, 2, KEY_3)
			MATRIX_KEY(1, 0, KEY_4)
			MATRIX_KEY(1, 1, KEY_5)
			MATRIX_KEY(1, 2, KEY_6)
			MATRIX_KEY(1, 3, KEY_F5)
			MATRIX_KEY(2, 0, KEY_7)
			MATRIX_KEY(2, 1, KEY_8)
			MATRIX_KEY(2, 2, KEY_9)
			MATRIX_KEY(2, 3, KEY_F6)
			MATRIX_KEY(3, 0, KEY_F7)
			MATRIX_KEY(3, 1, KEY_0)
			MATRIX_KEY(3, 2, KEY_F8)
			MATRIX_KEY(5, 4, KEY_RESERVED)
			MATRIX_KEY(4, 4, KEY_VOLUMEUP)
			MATRIX_KEY(5, 5, KEY_VOLUMEDOWN)>;
};

&uart3 {
	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
};

&usb_otg_hs {
	pinctrl-names = "default";
	pinctrl-0 = <&musb_pins>;
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	mode = <3>;
	power = <50>;
};

&vaux1 {
	/* Needed for ads7846 */
	regulator-name = "vcc";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
 */

#include "omap36xx.dtsi"

/ {
	model = "INCOstartec LILLY-A83X module (DM3730)";
	compatible = "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	chosen {
			bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x8000000>;   /* 128 MB */
	};

	leds {
		compatible = "gpio-leds";

		led1 {
			label = "lilly-a83x::led1";
			gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "default-on";
		};

	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "lilly-a83x";

		ti,mcbsp = <&mcbsp2>;
	};

	reg_vcc3: vcc3 {
		compatible = "regulator-fixed";
		regulator-name = "VCC3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	hsusb1_phy: hsusb1_phy {
		compatible = "usb-nop-xceiv";
		vcc-supply = <&reg_vcc3>;
		#phy-cells = <0>;
	};
};

&omap3_pmx_wkup {
	pinctrl-names = "default";

	lan9221_pins: pinmux_lan9221_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_129 */
		>;
	};

	tsc2048_pins: pinmux_tsc2048_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4)   /* sys_boot6.gpio_8 */
		>;
	};

	mmc1cd_pins: pinmux_mmc1cd_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_126 */
		>;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)   /* uart1_tx.uart1_tx */
			OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0)   /* uart1_rts.uart1_rts */
			OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0)    /* uart1_cts.uart1_cts */
			OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)    /* uart1_rx.uart1_rx */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)   /* mcbsp3_clkx.uart2_tx */
			OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)    /* mcbsp3_fsx.uart2_rx */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)    /* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)   /* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_scl.i2c1_scl */
			OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_sda.i2c1_sda */
		>;
	};

	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)   /* i2c2_scl.i2c2_scl */
			OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)   /* i2c2_sda.i2c2_sda */
		>;
	};

	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)   /* i2c3_scl.i2c3_scl */
			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)   /* i2c3_sda.i2c3_sda */
		>;
	};

	hsusb1_pins: pinmux_hsusb1_pins {
		pinctrl-single,pins = <

			/* GPIO 182 controls USB-Hub reset. But USB-Phy its
			 * reset can't be controlled. So we clamp this GPIO to
			 * high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
			 */

			OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4)   /* mcspi2_cs1.gpio_182 */
		>;
	};

	hsusb_otg_pins: pinmux_hsusb_otg_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)   /* hsusb0_clk.hsusb0_clk */
			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)  /* hsusb0_stp.hsusb0_stp */
			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)   /* hsusb0_dir.hsusb0_dir */
			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)   /* hsusb0_nxt.hsusb0_nxt */
			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)   /* hsusb0_data0.hsusb0_data0 */
			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)   /* hsusb0_data1.hsusb0_data1 */
			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)   /* hsusb0_data2.hsusb0_data2 */
			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)   /* hsusb0_data3.hsusb0_data3 */
			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)   /* hsusb0_data4.hsusb0_data4 */
			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)   /* hsusb0_data5.hsusb0_data5 */
			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)   /* hsusb0_data6.hsusb0_data6 */
			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)   /* hsusb0_data7.hsusb0_data7 */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_clk.sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_cmd.sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};

	spi2_pins: pinmux_spi2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_clk.mcspi2_clk */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_simo.mcspi2_simo */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_somi.mcspi2_somi */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0)   /* mcspi2_cs0.mcspi2_cs0 */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";

	hsusb1_2_pins: pinmux_hsusb1_2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)  /* etk_clk.hsusb1_stp */
			OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3)   /* etk_ctl.hsusb1_clk */
			OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3)   /* etk_d0.hsusb1_data0 */
			OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3)   /* etk_d1.hsusb1_data1 */
			OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3)   /* etk_d2.hsusb1_data2 */
			OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3)   /* etk_d3.hsusb1_data7 */
			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3)   /* etk_d4.hsusb1_data4 */
			OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3)   /* etk_d5.hsusb1_data5 */
			OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3)   /* etk_d6.hsusb1_data6 */
			OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3)   /* etk_d7.hsusb1_data3 */
			OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3)   /* etk_d8.hsusb1_dir */
			OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3)   /* etk_d9.hsusb1_nxt */
		>;
	};

	gpio1_pins: pinmux_gpio1_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4)   /* etk_d15.gpio_29 */
		>;
	};

};

&gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio1_pins>;
};

&gpio6 {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb1_pins>;
};

&i2c1 {
	clock-frequency = <2600000>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>;   /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&twl {
	vmmc1: regulator-vmmc1 {
		regulator-always-on;
	};

	vdd1: regulator-vdd1 {
		regulator-always-on;
	};

	vdd2: regulator-vdd2 {
		regulator-always-on;
	};
};

&i2c2 {
	clock-frequency = <2600000>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
};

&i2c3 {
	clock-frequency = <2600000>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
		gpiom1: gpio@20 {
			compatible = "microchip,mcp23017";
			gpio-controller;
			#gpio-cells = <2>;
			reg = <0x20>;
		};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

&uart4 {
	status = "disabled";
};

&mmc1 {
	cd-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
	cd-inverted;
	vmmc-supply = <&vmmc1>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
	cap-sdio-irq;
	cap-sd-highspeed;
	cap-mmc-highspeed;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&mcspi2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi2_pins>;

	tsc2046@0 {
		reg = <0>;   /* CS0 */
		compatible = "ti,tsc2046";
		interrupt-parent = <&gpio1>;
		interrupts = <8 0>;   /* boot6 / gpio_8 */
		spi-max-frequency = <1000000>;
		pendown-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
		vcc-supply = <&reg_vcc3>;
		pinctrl-names = "default";
		pinctrl-0 = <&tsc2048_pins>;

		ti,x-min = /bits/ 16 <300>;
		ti,x-max = /bits/ 16 <3000>;
		ti,y-min = /bits/ 16 <600>;
		ti,y-max = /bits/ 16 <3600>;
		ti,x-plate-ohms = /bits/ 16 <80>;
		ti,pressure-max = /bits/ 16 <255>;
		ti,swap-xy;

		wakeup-source;
	};
};

&usbhsehci {
	phys = <&hsusb1_phy>;
};

&usbhshost {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb1_2_pins>;
	num-ports = <2>;
	port1-mode = "ehci-phy";
};

&usb_otg_hs {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb_otg_pins>;
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

&mcbsp2 {
	status = "okay";
};

&gpmc {
	ranges = <0 0 0x30000000 0x1000000>,
		<7 0 0x15000000 0x01000000>;

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		nand-bus-width = <16>;
		ti,nand-ecc-opt = "bch8";
		/* no elm on omap3 */

		gpmc,mux-add-data = <0>;
		gpmc,device-width = <2>;
		gpmc,wait-pin = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,burst-length = <4>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <100>;
		gpmc,cs-wr-off-ns = <100>;
		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <100>;
		gpmc,adv-wr-off-ns = <100>;
		gpmc,oe-on-ns = <5>;
		gpmc,oe-off-ns = <75>;
		gpmc,we-on-ns = <5>;
		gpmc,we-off-ns = <75>;
		gpmc,rd-cycle-ns = <100>;
		gpmc,wr-cycle-ns = <100>;
		gpmc,access-ns = <60>;
		gpmc,page-burst-access-ns = <5>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-delay-ns = <50>;
		gpmc,wr-data-mux-bus-ns = <75>;
		gpmc,wr-access-ns = <155>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "MLO";
			reg = <0 0x80000>;
		};

		partition@80000 {
			label = "u-boot";
			reg = <0x80000 0x1e0000>;
		};

		partition@260000 {
			label = "u-boot-environment";
			reg = <0x260000 0x20000>;
		};

		partition@280000 {
			label = "kernel";
			reg = <0x280000 0x500000>;
		};

		partition@780000 {
			label = "filesystem";
			reg = <0x780000 0xf880000>;
		};
	};

	ethernet@7,0 {
		compatible = "smsc,lan9221", "smsc,lan9115";
		bank-width = <2>;
		gpmc,mux-add-data = <2>;
		gpmc,cs-on-ns = <10>;
		gpmc,cs-rd-off-ns = <60>;
		gpmc,cs-wr-off-ns = <60>;
		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <10>;
		gpmc,adv-wr-off-ns = <10>;
		gpmc,oe-on-ns = <10>;
		gpmc,oe-off-ns = <60>;
		gpmc,we-on-ns = <10>;
		gpmc,we-off-ns = <60>;
		gpmc,rd-cycle-ns = <100>;
		gpmc,wr-cycle-ns = <100>;
		gpmc,access-ns = <50>;
		gpmc,page-burst-access-ns = <5>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <75>;
		gpmc,wr-data-mux-bus-ns = <15>;
		gpmc,wr-access-ns = <75>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-diffcsen;
		vddvario-supply = <&reg_vcc3>;
		vdd33a-supply = <&reg_vcc3>;
		reg-io-width = <4>;
		interrupt-parent = <&gpio5>;
		interrupts = <1 0x2>;
		reg = <7 0 0xff>;
		pinctrl-names = "default";
		pinctrl-0 = <&lan9221_pins>;
		phy-mode = "mii";
	};
};