code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2022 Analog Devices Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,max11410.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Analog Devices MAX11410 ADC device driver

maintainers:
  - Ibrahim Tilki <Ibrahim.Tilki@analog.com>

description: |
  Bindings for the Analog Devices MAX11410 ADC device. Datasheet can be
  found here:
    https://datasheets.maximintegrated.com/en/ds/MAX11410.pdf

properties:
  compatible:
    enum:
      - adi,max11410

  reg:
    maxItems: 1

  interrupts:
    minItems: 1
    maxItems: 2

  interrupt-names:
    description: Name of the gpio pin of max11410 used for IRQ
    minItems: 1
    items:
      - enum: [gpio0, gpio1]
      - const: gpio1

  '#address-cells':
    const: 1

  '#size-cells':
    const: 0

  avdd-supply:
    description: Optional avdd supply. Used as reference when no explicit reference supplied.

  vref0p-supply:
    description: vref0p supply can be used as reference for conversion.

  vref1p-supply:
    description: vref1p supply can be used as reference for conversion.

  vref2p-supply:
    description: vref2p supply can be used as reference for conversion.

  vref0n-supply:
    description: vref0n supply can be used as reference for conversion.

  vref1n-supply:
    description: vref1n supply can be used as reference for conversion.

  vref2n-supply:
    description: vref2n supply can be used as reference for conversion.

  spi-max-frequency:
    maximum: 8000000

patternProperties:
  "^channel(@[0-9])?$":
    $ref: adc.yaml
    type: object
    description: Represents the external channels which are connected to the ADC.

    properties:
      reg:
        description: The channel number in single-ended mode.
        minimum: 0
        maximum: 9

      adi,reference:
        description: |
          Select the reference source to use when converting on
          the specific channel. Valid values are:
          0: VREF0P/VREF0N
          1: VREF1P/VREF1N
          2: VREF2P/VREF2N
          3: AVDD/AGND
          4: VREF0P/AGND
          5: VREF1P/AGND
          6: VREF2P/AGND
          If this field is left empty, AVDD/AGND is selected.
        $ref: /schemas/types.yaml#/definitions/uint32
        enum: [0, 1, 2, 3, 4, 5, 6]
        default: 3

      adi,input-mode:
        description: |
          Select signal path of input channels. Valid values are:
          0: Buffered, low-power, unity-gain path (default)
          1: Bypass path
          2: PGA path
        $ref: /schemas/types.yaml#/definitions/uint32
        enum: [0, 1, 2]
        default: 0

      diff-channels: true

      bipolar: true

      settling-time-us: true

      adi,buffered-vrefp:
        description: Enable buffered mode for positive reference.
        type: boolean

      adi,buffered-vrefn:
        description: Enable buffered mode for negative reference.
        type: boolean

    required:
      - reg

    additionalProperties: false

required:
  - compatible
  - reg

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@0 {
            reg = <0>;
            compatible = "adi,max11410";
            spi-max-frequency = <8000000>;

            interrupt-parent = <&gpio>;
            interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
            interrupt-names = "gpio1";

            avdd-supply = <&adc_avdd>;

            vref1p-supply = <&adc_vref1p>;
            vref1n-supply = <&adc_vref1n>;

            #address-cells = <1>;
            #size-cells = <0>;

            channel@0 {
                reg = <0>;
            };

            channel@1 {
                reg = <1>;
                diff-channels = <2 3>;
                adi,reference = <1>;
                bipolar;
                settling-time-us = <100000>;
            };

            channel@2 {
                reg = <2>;
                diff-channels = <7 9>;
                adi,reference = <5>;
                adi,input-mode = <2>;
                settling-time-us = <50000>;
            };
        };
    };


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/allwinner,sun8i-a33-ths.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A33 Thermal Sensor Device Tree Bindings

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

properties:
  "#io-channel-cells":
    const: 0

  "#thermal-sensor-cells":
    const: 0

  compatible:
    const: allwinner,sun8i-a33-ths

  reg:
    maxItems: 1

required:
  - "#io-channel-cells"
  - "#thermal-sensor-cells"
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    ths: ths@1c25000 {
        compatible = "allwinner,sun8i-a33-ths";
        reg = <0x01c25000 0x100>;
        #thermal-sensor-cells = <0>;
        #io-channel-cells = <0>;
    };

...

repo_name: angery/linux


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Amlogic Meson SAR (Successive Approximation Register) A/D converter

maintainers:
  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>

description:
  Binding covers a range of ADCs found on Amlogic Meson SoCs.

properties:
  compatible:
    oneOf:
      - const: amlogic,meson-saradc
      - items:
          - enum:
              - amlogic,meson8-saradc
              - amlogic,meson8b-saradc
              - amlogic,meson8m2-saradc
              - amlogic,meson-gxbb-saradc
              - amlogic,meson-gxl-saradc
              - amlogic,meson-gxm-saradc
              - amlogic,meson-axg-saradc
              - amlogic,meson-g12a-saradc
          - const: amlogic,meson-saradc

  reg:
    maxItems: 1

  interrupts:
    description: Interrupt indicates end of sampling.
    maxItems: 1

  clocks:
    minItems: 2
    maxItems: 4

  clock-names:
    minItems: 2
    items:
      - const: clkin
      - const: core
      - const: adc_clk
      - const: adc_sel

  vref-supply: true

  "#io-channel-cells":
    const: 1

  amlogic,hhi-sysctrl:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Syscon which contains the 5th bit of the TSC (temperature sensor
      coefficient) on Meson8b and Meson8m2 (which used to calibrate the
      temperature sensor)

  nvmem-cells:
    description: phandle to the temperature_calib eFuse cells
    maxItems: 1

  nvmem-cell-names:
    const: temperature_calib

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - amlogic,meson8-saradc
              - amlogic,meson8b-saradc
              - amlogic,meson8m2-saradc
    then:
      properties:
        clocks:
          maxItems: 2
        clock-names:
          maxItems: 2
    else:
      properties:
        nvmem-cells: false
        mvmem-cel-names: false
        clocks:
          minItems: 4
        clock-names:
          minItems: 4

  - if:
      properties:
        compatible:
          contains:
            enum:
              - amlogic,meson8b-saradc
              - amlogic,meson8m2-saradc
    then:
      properties:
        amlogic,hhi-sysctrl: true
    else:
      properties:
        amlogic,hhi-sysctrl: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/clock/gxbb-clkc.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    soc {
        #address-cells = <2>;
        #size-cells = <2>;
        adc@8680 {
            compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
            #io-channel-cells = <1>;
            reg = <0x0 0x8680 0x0 0x34>;
            interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
            clocks = <&xtal>,
                <&clkc CLKID_SAR_ADC>,
                <&clkc CLKID_SAR_ADC_CLK>,
                <&clkc CLKID_SAR_ADC_SEL>;
            clock-names = "clkin", "core", "adc_clk", "adc_sel";
        };
        adc@9680 {
            compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
            #io-channel-cells = <1>;
            reg = <0x0 0x9680 0x0 0x34>;
            interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
            clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
            clock-names = "clkin", "core";
            nvmem-cells = <&tsens_caldata>;
            nvmem-cell-names = "temperature_calib";
            amlogic,hhi-sysctrl = <&hhi>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2400-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ADC that forms part of an ASPEED server management processor.

maintainers:
  - Joel Stanley <joel@jms.id.au>

description:
  This device is a 10-bit converter for 16 voltage channels.  All inputs are
  single ended.

properties:
  compatible:
    enum:
      - aspeed,ast2400-adc
      - aspeed,ast2500-adc

  reg:
    maxItems: 1

  clocks:
    maxItems: 1
    description:
      Input clock used to derive the sample clock. Expected to be the
      SoC's APB clock.

  resets:
    maxItems: 1

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - clocks
  - resets
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/aspeed-clock.h>
    adc@1e6e9000 {
        compatible = "aspeed,ast2400-adc";
        reg = <0x1e6e9000 0xb0>;
        clocks = <&syscon ASPEED_CLK_APB>;
        resets = <&syscon ASPEED_RESET_ADC>;
        #io-channel-cells = <1>;
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ADC that forms part of an ASPEED server management processor.

maintainers:
  - Billy Tsai <billy_tsai@aspeedtech.com>

description: |
  • 10-bits resolution for 16 voltage channels.
  • The device split into two individual engine and each contains 8 voltage
  channels.
  • Channel scanning can be non-continuous.
  • Programmable ADC clock frequency.
  • Programmable upper and lower threshold for each channels.
  • Interrupt when larger or less than threshold for each channels.
  • Support hysteresis for each channels.
  • Built-in a compensating method.
  • Built-in a register to trim internal reference voltage.
  • Internal or External reference voltage.
  • Support 2 Internal reference voltage 1.2v or 2.5v.
  • Integrate dividing circuit for battery sensing.

properties:
  compatible:
    enum:
      - aspeed,ast2600-adc0
      - aspeed,ast2600-adc1
    description:
      Their trimming data, which is used to calibrate internal reference volage,
      locates in different address of OTP.

  reg:
    maxItems: 1

  clocks:
    maxItems: 1
    description:
      Input clock used to derive the sample clock. Expected to be the
      SoC's APB clock.

  resets:
    maxItems: 1

  "#io-channel-cells":
    const: 1

  vref-supply:
    description:
      The external regulator supply ADC reference voltage.

  aspeed,int-vref-microvolt:
    enum: [1200000, 2500000]
    description:
      ADC internal reference voltage in microvolts.

  aspeed,battery-sensing:
    type: boolean
    description:
      Inform the driver that last channel will be used to sensor battery.

required:
  - compatible
  - reg
  - clocks
  - resets
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/ast2600-clock.h>
    adc0: adc@1e6e9000 {
        compatible = "aspeed,ast2600-adc0";
        reg = <0x1e6e9000 0x100>;
        clocks = <&syscon ASPEED_CLK_APB2>;
        resets = <&syscon ASPEED_RESET_ADC>;
        #io-channel-cells = <1>;
        aspeed,int-vref-microvolt = <2500000>;
    };
    adc1: adc@1e6e9100 {
        compatible = "aspeed,ast2600-adc1";
        reg = <0x1e6e9100 0x100>;
        clocks = <&syscon ASPEED_CLK_APB2>;
        resets = <&syscon ASPEED_RESET_ADC>;
        #io-channel-cells = <1>;
        aspeed,int-vref-microvolt = <2500000>;
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: AT91 SAMA5D2 Analog to Digital Converter (ADC)

maintainers:
  - Eugen Hristev <eugen.hristev@microchip.com>

properties:
  compatible:
    enum:
      - atmel,sama5d2-adc
      - microchip,sam9x60-adc
      - microchip,sama7g5-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    const: adc_clk

  vref-supply: true
  vddana-supply: true

  atmel,min-sample-rate-hz:
    description: Minimum sampling rate, it depends on SoC.

  atmel,max-sample-rate-hz:
    description: Maximum sampling rate, it depends on SoC.

  atmel,startup-time-ms:
    description: Startup time expressed in ms, it depends on SoC.

  atmel,trigger-edge-type:
    $ref: '/schemas/types.yaml#/definitions/uint32'
    description:
      One of possible edge types for the ADTRG hardware trigger pin.
      When the specific edge type is detected, the conversion will
      start. Should be one of IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING
      or IRQ_TYPE_EDGE_BOTH.
    enum: [1, 2, 3]

  dmas:
    maxItems: 1

  dma-names:
    const: rx

  "#io-channel-cells":
    const: 1

additionalProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - vref-supply
  - vddana-supply
  - atmel,min-sample-rate-hz
  - atmel,max-sample-rate-hz
  - atmel,startup-time-ms

examples:
  - |
    #include <dt-bindings/dma/at91.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    soc {
        #address-cells = <1>;
        #size-cells = <1>;

        adc@fc030000 {
            compatible = "atmel,sama5d2-adc";
            reg = <0xfc030000 0x100>;
            interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;
            clocks = <&adc_clk>;
            clock-names = "adc_clk";
            atmel,min-sample-rate-hz = <200000>;
            atmel,max-sample-rate-hz = <20000000>;
            atmel,startup-time-ms = <4>;
            vddana-supply = <&vdd_3v3_lp_reg>;
            vref-supply = <&vdd_3v3_lp_reg>;
            atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>;
            dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
            dma-names = "rx";
            #io-channel-cells = <1>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/atmel,sama9260-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: AT91 sama9260 and similar Analog to Digital Converter (ADC)

maintainers:
  - Alexandre Belloni <alexandre.belloni@bootlin.com>

properties:
  compatible:
    enum:
      - atmel,at91sam9260-adc
      - atmel,at91sam9rl-adc
      - atmel,at91sam9g45-adc
      - atmel,at91sam9x5-adc
      - atmel,at91sama5d3-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    minItems: 2
    maxItems: 2

  clock-names:
    items:
      - const: adc_clk
      - const: adc_op_clk

  atmel,adc-channels-used:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: Bitmask of the channels muxed and enabled for this device

  atmel,adc-startup-time:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Startup Time of the ADC in microseconds as defined in the datasheet

  atmel,adc-vref:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: Reference voltage in millivolts for the conversions

  atmel,adc-use-external-triggers:
    $ref: /schemas/types.yaml#/definitions/flag
    description: Enable the external triggers

  atmel,adc-use-res:
    $ref: /schemas/types.yaml#/definitions/string
    description:
      String corresponding to an identifier from atmel,adc-res-names property.
      If not specified, the highest resolution will be used.
    enum:
      - "lowres"
      - "highres"

  atmel,adc-sleep-mode:
    $ref: /schemas/types.yaml#/definitions/flag
    description: Enable sleep mode when no conversion

  atmel,adc-sample-hold-time:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: Sample and Hold Time in microseconds

  atmel,adc-ts-wires:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: |
      Number of touchscreen wires. Must be set to enable touchscreen.
      NOTE: when adc touchscreen is enabled, the adc hardware trigger will be
      disabled. Since touchscreen will occupy the trigger register.
    enum:
      - 4
      - 5

  atmel,adc-ts-pressure-threshold:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Pressure threshold for touchscreen.

  "#io-channel-cells":
    const: 1

additionalProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - atmel,adc-channels-used
  - atmel,adc-startup-time
  - atmel,adc-vref

examples:
  - |
    #include <dt-bindings/dma/at91.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    soc {
        #address-cells = <1>;
        #size-cells = <1>;

        adc@fffb0000 {
            compatible = "atmel,at91sam9260-adc";
            reg = <0xfffb0000 0x100>;
            interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
            clocks = <&adc_clk>, <&adc_op_clk>;
            clock-names = "adc_clk", "adc_op_clk";
            atmel,adc-channels-used = <0xff>;
            atmel,adc-startup-time = <40>;
            atmel,adc-use-external-triggers;
            atmel,adc-vref = <3300>;
            atmel,adc-use-res = "lowres";
        };
    };
...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: AVIA HX711 ADC chip for weight cells

maintainers:
  - Andreas Klinger <ak@it-klinger.de>

description: |
  Bit-banging driver using two GPIOs:
  - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
    and up to 3 cycles for selection of the input channel and gain for the
    next measurement
  - dout-gpio is the sensor data the sensor responds to the clock

  Specifications about the driver can be found at:
  http://www.aviaic.com/ENProducts.aspx

properties:
  compatible:
    enum:
      - avia,hx711

  sck-gpios:
    description:
      Definition of the GPIO for the clock (output). In the datasheet it is
      named PD_SCK
    maxItems: 1

  dout-gpios:
    description:
      Definition of the GPIO for the data-out sent by the sensor in
      response to the clock (input).
      See Documentation/devicetree/bindings/gpio/gpio.txt for information
      on how to specify a consumer gpio.
    maxItems: 1

  avdd-supply:
    description:
      Definition of the regulator used as analog supply

  clock-frequency:
    minimum: 20000
    maximum: 2500000
    default: 400000

required:
  - compatible
  - sck-gpios
  - dout-gpios
  - avdd-supply

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    weight {
        compatible = "avia,hx711";
        sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
        dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
        avdd-supply = <&avdd>;
        clock-frequency = <100000>;
    };


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/brcm,iproc-static-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom's IPROC Static ADC controller

maintainers:
  - Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>

description: |
  Broadcom iProc ADC controller has 8 10bit channels

properties:
  compatible:
    const: brcm,iproc-static-adc

  adc-syscon:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      syscon node defining physical base address of the controller and length
      of memory mapped region.

  "#io-channel-cells":
    const: 1

  clocks:
    maxItems: 1

  clock-names:
    const: tsc_clk

  interrupts:
    maxItems: 1

additionalProperties: false

required:
  - compatible
  - adc-syscon
  - "#io-channel-cells"
  - clocks
  - clock-names
  - interrupts

examples:
  - |
    #include <dt-bindings/clock/bcm-cygnus.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    soc {
        #address-cells = <1>;
        #size-cells = <1>;

        adc {
            compatible = "brcm,iproc-static-adc";
            adc-syscon = <&ts_adc_syscon>;
            #io-channel-cells = <1>;
            clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
            clock-names = "tsc_clk";
            interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cosmic Circuits CC-10001 ADC

maintainers:
  - Jonathan Cameron <jic23@kernel.org>

description:
  Cosmic Circuits 10001 10-bit ADC device.

properties:
  compatible:
    const: cosmic,10001-adc

  reg:
    maxItems: 1

  adc-reserved-channels:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Bitmask of reserved channels, i.e. channels that cannot be
      used by the OS.

  clocks:
    maxItems: 1

  clock-names:
    const: adc

  vref-supply: true

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - vref-supply

additionalProperties: false

examples:
  - |
    adc@18101600 {
        compatible = "cosmic,10001-adc";
        reg = <0x18101600 0x24>;
        adc-reserved-channels = <0x2>;
        clocks = <&adc_clk>;
        clock-names = "adc";
        vref-supply = <&reg_1v8>;
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/dlg,da9150-gpadc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Dialog Semiconductor DA9150 IIO GPADC

maintainers:
  - Adam Thomson <Adam.Thomson.Opensource@diasemi.com>

description:
  This patch adds support for general purpose ADC within the
  DA9150 Charger & Fuel-Gauge IC.

properties:
  compatible:
    const: dlg,da9150-gpadc

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    adc {
        compatible = "dlg,da9150-gpadc";
        #io-channel-cells = <1>;
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/envelope-detector.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ADC envelope detector using a DAC and a comparator

maintainers:
  - Peter Rosin <peda@axentia.se>

description: |
  The DAC is used to find the peak level of an alternating voltage input
  signal by a binary search using the output of a comparator wired to
  an interrupt pin. Like so:
                          _
                         | \
    input +------>-------|+ \
                         |   \
           .-------.     |    }---.
           |       |     |   /    |
           |    dac|-->--|- /     |
           |       |     |_/      |
           |       |              |
           |       |              |
           |    irq|------<-------'
           |       |
           '-------'

properties:
  compatible:
    const: axentia,tse850-envelope-detector

  io-channels:
    maxItems: 1
    description: Channel node of the dac to be used for comparator input.

  io-channel-names:
    const: dac

  interrupts:
    maxItems: 1

  interrupt-names:
    const: comp

required:
  - compatible
  - io-channels
  - io-channel-names
  - interrupts
  - interrupt-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;
        dpot: dpot@28 {
            compatible = "microchip,mcp4651-104";
            reg = <0x28>;
            #io-channel-cells = <1>;
        };
    };

    dac: dac {
        compatible = "dpot-dac";
        vref-supply = <&reg_3v3>;
        io-channels = <&dpot 0>;
        io-channel-names = "dpot";
        #io-channel-cells = <1>;
    };

    envelope-detector {
        compatible = "axentia,tse850-envelope-detector";
        io-channels = <&dac 0>;
        io-channel-names = "dac";

        interrupt-parent = <&gpio>;
        interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
        interrupt-names = "comp";
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/fsl,imx25-gcq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale ADC GCQ device

description:
  This is a generic conversion queue device that can convert any of the
  analog inputs using the ADC unit of the i.MX25.

maintainers:
  - Jonathan Cameron <jic23@kernel.org>

properties:
  compatible:
    const: fsl,imx25-gcq

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  vref-ext-supply:
    description:
      The regulator supplying the ADC reference voltage.
      Required when at least one subnode uses the this reference.

  vref-xp-supply:
    description:
      The regulator supplying the ADC reference voltage on pin XP.
      Required when at least one subnode uses this reference.

  vref-yp-supply:
    description:
      The regulator supplying the ADC reference voltage on pin YP.
      Required when at least one subnode uses this reference.

  "#io-channel-cells":
    const: 1

  "#address-cells":
    const: 1

  "#size-cells":
    const: 0

required:
  - compatible
  - reg
  - interrupts
  - "#address-cells"
  - "#size-cells"

patternProperties:
  "[a-z][a-z0-9]+@[0-9a-f]+$":
    type: object
    description:
      Child nodes used to define the reference voltages used for each channel

    properties:
      reg:
        description: |
          Number of the analog input.
          0: xp
          1: yp
          2: xn
          3: yn
          4: wiper
          5: inaux0
          6: inaux1
          7: inaux2
        items:
          - minimum: 0
            maximum: 7

      fsl,adc-refp:
        $ref: /schemas/types.yaml#/definitions/uint32
        description: |
          Specifies the positive reference input as defined in
          <dt-bindings/iio/adc/fsl-imx25-gcq.h>
          0: YP voltage reference
          1: XP voltage reference
          2: External voltage reference
          3: Internal voltage reference (default)
        minimum: 0
        maximum: 3

      fsl,adc-refn:
        $ref: /schemas/types.yaml#/definitions/uint32
        description: |
          Specifies the negative reference input as defined in
          <dt-bindings/iio/adc/fsl-imx25-gcq.h>
          0: XN ground reference
          1: YN ground reference
          2: Internal ground reference
          3: External ground reference (default)
        minimum: 0
        maximum: 3

    required:
      - reg

    additionalProperties: false

additionalProperties: false

examples:
  - |
    #include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
    soc {
        #address-cells = <1>;
        #size-cells = <1>;
        adc@50030800 {
            compatible = "fsl,imx25-gcq";
            reg = <0x50030800 0x60>;
            interrupt-parent = <&tscadc>;
            interrupts = <1>;
            #address-cells = <1>;
            #size-cells = <0>;

            inaux@5 {
                reg = <5>;
                fsl,adc-refp = <MX25_ADC_REFP_INT>;
                fsl,adc-refn = <MX25_ADC_REFN_NGND>;
            };
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/fsl,imx7d-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale ADC found on the imx7d SoC

maintainers:
  - Haibo Chen <haibo.chen@nxp.com>

properties:
  compatible:
    const: fsl,imx7d-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    const: adc

  vref-supply: true

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - vref-supply
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/clock/imx7d-clock.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    soc {
        #address-cells = <1>;
        #size-cells = <1>;
        adc@30610000 {
            compatible = "fsl,imx7d-adc";
            reg = <0x30610000 0x10000>;
            interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clks IMX7D_ADC_ROOT_CLK>;
            clock-names = "adc";
            vref-supply = <&reg_vcc_3v3_mcu>;
            #io-channel-cells = <1>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ADC found on Freescale vf610 and similar SoCs

maintainers:
  - Haibo Chen <haibo.chen@nxp.com>

description:
  ADCs found on vf610/i.MX6slx and upward SoCs from Freescale.

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - fsl,imx6sx-adc
              - fsl,imx6ul-adc
          - const: fsl,vf610-adc
      - items:
          - const: fsl,vf610-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    description: ADC source clock (ipg clock)
    maxItems: 1

  clock-names:
    const: adc

  vref-supply:
    description: ADC reference voltage supply.

  fsl,adck-max-frequency:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    minItems: 3
    maxItems: 3
    description: |
      Maximum frequencies from datasheet operating requirements.
      Three values necessary to cover the 3 conversion modes.
      * Frequency in normal mode (ADLPC=0, ADHSC=0)
      * Frequency in high-speed mode (ADLPC=0, ADHSC=1)
      * Frequency in low-power mode (ADLPC=1, ADHSC=0)

  min-sample-time:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Minimum sampling time in nanoseconds. This value has
      to be chosen according to the conversion mode and the connected analog
      source resistance (R_as) and capacitance (C_as). Refer the datasheet's
      operating requirements. A safe default across a wide range of R_as and
      C_as as well as conversion modes is 1000ns.

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - vref-supply

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/vf610-clock.h>
    adc@4003b000 {
        compatible = "fsl,vf610-adc";
        reg = <0x4003b000 0x1000>;
        interrupts = <0 53 0x04>;
        clocks = <&clks VF610_CLK_ADC0>;
        clock-names = "adc";
        fsl,adck-max-frequency = <30000000>, <40000000>, <20000000>;
        vref-supply = <&reg_vcc_3v3_mcu>;
        min-sample-time = <10000>;
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/holt,hi8435.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Holt Integrated Circuits HI-8435 SPI threshold detector

maintainers:
  - Vladimir Barinov <vladimir.barinov@cogentembedded.com>

description: |
  Datasheet: http://www.holtic.com/documents/427-hi-8435_v-rev-lpdf.do

properties:
  compatible:
    const: holt,hi8435

  reg:
    maxItems: 1

  gpios:
    description:
      GPIO used for controlling the reset pin
    maxItems: 1

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

examples:
  - |
    spi {
        #address-cells = <1>;
        #size-cells = <0>;
        threshold-detector@0 {
            compatible = "holt,hi8435";
            reg = <0>;
            gpios = <&gpio6 1 0>;
            spi-max-frequency = <1000000>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019-2020 Artur Rojek
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Ingenic JZ47xx ADC controller IIO bindings

maintainers:
  - Artur Rojek <contact@artur-rojek.eu>

description: >
  Industrial I/O subsystem bindings for ADC controller found in
  Ingenic JZ47xx SoCs.

  ADC clients must use the format described in
  https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml,
  giving a phandle and IIO specifier pair ("io-channels") to the ADC controller.

properties:
  compatible:
    enum:
      - ingenic,jz4725b-adc
      - ingenic,jz4740-adc
      - ingenic,jz4760-adc
      - ingenic,jz4760b-adc
      - ingenic,jz4770-adc

  '#io-channel-cells':
    const: 1
    description:
      Must be set to <1> to indicate channels are selected by index.

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: adc

  interrupts:
    maxItems: 1

  ingenic,use-internal-divider:
    description:
      If present, battery voltage is read from the VBAT_IR pin, which has an
      internal 1/4 divider. If absent, it is read through the VBAT_ER pin,
      which does not have such a divider.
    type: boolean

if:
  not:
    properties:
      compatible:
        contains:
          const: ingenic,jz4760b-adc
then:
  properties:
    ingenic,use-internal-divider: false

required:
  - compatible
  - '#io-channel-cells'
  - reg
  - clocks
  - clock-names
  - interrupts

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
    #include <dt-bindings/iio/adc/ingenic,adc.h>

    adc@10070000 {
            compatible = "ingenic,jz4740-adc";
            #io-channel-cells = <1>;

            reg = <0x10070000 0x30>;

            clocks = <&cgu JZ4740_CLK_ADC>;
            clock-names = "adc";

            interrupt-parent = <&intc>;
            interrupts = <18>;
    };


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/lltc,ltc2496.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Linear Technology / Analog Devices LTC2496 ADC

maintainers:
  - Lars-Peter Clausen <lars@metafoo.de>
  - Michael Hennerich <Michael.Hennerich@analog.com>
  - Stefan Popa <stefan.popa@analog.com>

properties:
  compatible:
    enum:
      - lltc,ltc2496

  vref-supply:
    description: Power supply for the reference voltage

  reg:
    maxItems: 1

required:
  - compatible
  - vref-supply
  - reg

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

examples:
  - |
    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@0 {
            compatible = "lltc,ltc2496";
            reg = <0>;
            vref-supply = <&ltc2496_reg>;
            spi-max-frequency = <2000000>;
        };
    };


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/lltc,ltc2497.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Linear Technology / Analog Devices LTC2497 ADC

maintainers:
  - Michael Hennerich <michael.hennerich@analog.com>

description: |
  16bit ADC supporting up to 16 single ended or 8 differential inputs.
  I2C interface.

  https://www.analog.com/media/en/technical-documentation/data-sheets/2497fb.pdf
  https://www.analog.com/media/en/technical-documentation/data-sheets/2499fe.pdf

properties:
  compatible:
    enum:
      - lltc,ltc2497
      - lltc,ltc2499

  reg: true
  vref-supply: true
  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - vref-supply

additionalProperties: false

examples:
  - |
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@76 {
            compatible = "lltc,ltc2497";
            reg = <0x76>;
            vref-supply = <&ltc2497_reg>;
            #io-channel-cells = <1>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/marvell,berlin2-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Berlin 2 Analog to Digital Converter (ADC)

maintainers:
  - Antoine Tenart <antoine.tenart@free-electrons.com>

description:
  The Berlin ADC has 8 channels, with one connected to a temperature sensor.
  It is part of the system controller register set. The ADC node should be a
  sub-node of the system controller node.

properties:
  compatible:
    const: marvell,berlin2-adc

  interrupts:
    minItems: 2
    maxItems: 2

  interrupt-names:
    items:
      - const: adc
      - const: tsen

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - interrupts
  - interrupt-names

additionalProperties: false

examples:
  - |
    sysctrl {
        adc {
            compatible = "marvell,berlin2-adc";
            interrupt-parent = <&sic>;
            interrupts = <12>, <14>;
            interrupt-names = "adc", "tsen";
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/maxim,max1027.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Maxim MAX1027 and similar ADCs

maintainers:
  - Miquel Raynal <miquel.raynal@bootlin.com>
  - Philippe Reynes <tremyfr@yahoo.fr>

description: |
  300ks/s SPI ADCs with temperature sensors.

properties:
  compatible:
    enum:
        # 10-bit 8 channels
      - maxim,max1027
        # 10-bit 12 channels
      - maxim,max1029
        # 10-bit 16 channels
      - maxim,max1031
         # 12-bit 8 channels
      - maxim,max1227
         # 12-bit 12 channels
      - maxim,max1229
         # 12-bit 16 channels
      - maxim,max1231

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  spi-max-frequency:
    maximum: 10000000

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    spi {
       #address-cells = <1>;
       #size-cells = <0>;
        maxadc: adc@0 {
            compatible = "maxim,max1027";
            reg = <0>;
            #io-channel-cells = <1>;
            interrupt-parent = <&gpio5>;
            interrupts = <15 IRQ_TYPE_EDGE_RISING>;
            spi-max-frequency = <1000000>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/maxim,max11100.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Maxim MAX11100 ADC

maintainers:
  - Jacopo Mondi <jacopo@jmondi.org>

description: |
    Single channel 16 bit ADC with SPI interface.

properties:
  compatible:
    const: maxim,max11100

  reg:
    maxItems: 1

  vref-supply:
    description: External reference, needed to establish input scaling.

  spi-max-frequency:
    minimum: 100000
    maximum: 4800000

required:
  - compatible
  - reg
  - vref-supply

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

examples:
  - |
    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@0 {
            compatible = "maxim,max11100";
            reg = <0>;
            vref-supply = <&adc_vref>;
            spi-max-frequency = <240000>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/maxim,max1118.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Maxim MAX1118 and similar ADCs

maintainers:
  - Akinobu Mita <akinobu.mita@gmail.com>

description: |
    Dual channel 8bit ADCs.

properties:
  compatible:
    enum:
      - maxim,max1117
      - maxim,max1118
      - maxim,max1119

  reg:
    maxItems: 1

  spi-max-frequency:
    maximum: 5000000

  vref-supply:
    description: External reference, needed to establish input scaling

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#
  - if:
      properties:
        compatible:
          contains:
            const: maxim,max1118
    then:
      required:
        - vref-supply
    else:
      properties:
        vref-supply: false

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@0 {
            compatible = "maxim,max1118";
            reg = <0>;
            vref-supply = <&adc_vref>;
            spi-max-frequency = <1000000>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/maxim,max11205.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Maxim MAX11205 ADC

maintainers:
  - Ramona Bolboaca <ramona.bolboaca@analog.com>

description: |
  The MAX11205 is an ultra-low-power (< 300FA max active current),
  high-resolution, serial-output ADC.

  https://datasheets.maximintegrated.com/en/ds/MAX11205.pdf

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
  compatible:
    enum:
      - maxim,max11205a
      - maxim,max11205b

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  spi-max-frequency:
    maximum: 5000000

  spi-cpha: true

  vref-supply:
    description:
      The regulator supply for the ADC reference voltage. This is a differential
      reference. It is equal to the V_REFP - V_REFN. The maximum value is 3.6V.

required:
  - compatible
  - reg
  - interrupts
  - spi-max-frequency
  - spi-cpha
  - vref-supply

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    spi {
        #address-cells = <1>;
        #size-cells = <0>;
        adc@0 {
            compatible = "maxim,max11205a";
            reg = <0>;
            spi-max-frequency = <5000000>;
            spi-cpha;
            interrupt-parent = <&gpio>;
            interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
            vref-supply = <&max11205_vref>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/maxim,max1238.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Maxim MAX1238 and similar ADCs

maintainers:
  - Jonathan Cameron <jic23@kernel.org>

description: |
  Family of simple ADCs with i2c inteface and internal references.

properties:
  compatible:
    enum:
      - maxim,max1036
      - maxim,max1037
      - maxim,max1038
      - maxim,max1039
      - maxim,max1136
      - maxim,max1137
      - maxim,max1138
      - maxim,max1139
      - maxim,max1236
      - maxim,max1237
      - maxim,max1238
      - maxim,max1239
      - maxim,max11600
      - maxim,max11601
      - maxim,max11602
      - maxim,max11603
      - maxim,max11604
      - maxim,max11605
      - maxim,max11606
      - maxim,max11607
      - maxim,max11608
      - maxim,max11609
      - maxim,max11610
      - maxim,max11611
      - maxim,max11612
      - maxim,max11613
      - maxim,max11614
      - maxim,max11615
      - maxim,max11616
      - maxim,max11617
      - maxim,max11644
      - maxim,max11645
      - maxim,max11646
      - maxim,max11647

  reg:
    maxItems: 1

  vcc-supply: true
  vref-supply:
    description: Optional external reference.  If not supplied, internal
      reference will be used.

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@36 {
            compatible = "maxim,max1238";
            reg = <0x36>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2020 Alexandru Lazar
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/maxim,max1241.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Maxim MAX1241 12-bit, single-channel analog to digital converter

maintainers:
  - Alexandru Lazar <alazar@startmail.com>

description: |
  Bindings for the max1241 12-bit, single-channel ADC device. Datasheet
  can be found at:
    https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf

properties:
  compatible:
    enum:
      - maxim,max1241

  reg:
    maxItems: 1

  vdd-supply:
    description:
      Device tree identifier of the regulator that powers the ADC.

  vref-supply:
    description:
      Device tree identifier of the regulator that provides the external
      reference voltage.

  shutdown-gpios:
    description:
      GPIO spec for the GPIO pin connected to the ADC's /SHDN pin. If
      specified, the /SHDN pin will be asserted between conversions,
      thus enabling power-down mode.
    maxItems: 1

required:
  - compatible
  - reg
  - vdd-supply
  - vref-supply

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    spi {
      #address-cells = <1>;
      #size-cells = <0>;

        adc@0 {
            compatible = "maxim,max1241";
            reg = <0>;
            vdd-supply = <&adc_vdd>;
            vref-supply = <&adc_vref>;
            spi-max-frequency = <1000000>;
            shutdown-gpios = <&gpio 26 1>;
        };
    };


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/maxim,max1363.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Maxim MAX1363 and similar ADCs

maintainers:
  - Jonathan Cameron <jic23@kernel.org>

description: |
   Family of ADCs with i2c inteface, internal references and threshold
   monitoring.

properties:
  compatible:
    enum:
      - maxim,max1361
      - maxim,max1362
      - maxim,max1363
      - maxim,max1364

  reg:
    maxItems: 1

  vcc-supply: true
  vref-supply:
    description: Optional external reference.  If not supplied, internal
      reference will be used.

  interrupts:
    maxItems: 1

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@36 {
            compatible = "maxim,max1363";
            reg = <0x36>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/maxim,max9611.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Maxim MAX9611 and similar current sense amplifiers with integrated ADCs

maintainers:
  - Jacopo Mondi <jacopo@jmondi.org>

description: |
   These devices combine a high-side current sense amplifier with a 12 bit ADC.
   They have an i2c interface.

properties:
  compatible:
    enum:
      - maxim,max9611
      - maxim,max9612

  reg:
    maxItems: 1

  shunt-resistor-micro-ohms:
    description: |
      Value in micro Ohms of the shunt resistor connected between the RS+ and
      RS- inputs, across which the current is measured.  Value needed to compute
      the scaling of the measured current.

additionalProperties: false

required:
  - compatible
  - reg
  - shunt-resistor-micro-ohms

examples:
  - |
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@7c {
            compatible = "maxim,max9611";
            reg = <0x7c>;
            shunt-resistor-micro-ohms = <5000>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx)

maintainers:
  - Zhiyong Tao <zhiyong.tao@mediatek.com>
  - Matthias Brugger <matthias.bgg@gmail.com>

description: |
  The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
  in some Mediatek SoCs which among other things measures the temperatures
  in the SoC. It can be used directly with register accesses, but it is also
  used by thermal controller which reads the temperatures from the AUXADC
  directly via its own bus interface. See mediatek-thermal bindings
  for the Thermal Controller which holds a phandle to the AUXADC.

properties:
  compatible:
    oneOf:
      - enum:
          - mediatek,mt2701-auxadc
          - mediatek,mt2712-auxadc
          - mediatek,mt6765-auxadc
          - mediatek,mt7622-auxadc
          - mediatek,mt8173-auxadc
      - items:
          - enum:
              - mediatek,mt7623-auxadc
          - const: mediatek,mt2701-auxadc
      - items:
          - enum:
              - mediatek,mt8183-auxadc
              - mediatek,mt8186-auxadc
              - mediatek,mt8188-auxadc
              - mediatek,mt8195-auxadc
              - mediatek,mt8516-auxadc
          - const: mediatek,mt8173-auxadc

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    const: main

  "#io-channel-cells":
    const: 1

additionalProperties: false

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - "#io-channel-cells"

examples:
  - |
    #include <dt-bindings/clock/mt8183-clk.h>
    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        adc@11001000 {
            compatible = "mediatek,mt8183-auxadc",
                         "mediatek,mt8173-auxadc";
            reg = <0 0x11001000 0 0x1000>;
            clocks = <&infracfg CLK_INFRA_AUXADC>;
            clock-names = "main";
            #io-channel-cells = <1>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/mediatek,mt6360-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Mediatek MT6360 and similar ADCs

maintainers:
  - Gene Chen <gene_chen@richtek.com>

properties:
  compatible:
    const: mediatek,mt6360-adc

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    adc {
      compatible = "mediatek,mt6360-adc";
      #io-channel-cells = <1>;
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3201.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Microchip mcp3201 and similar ADCs

maintainers:
  - Oskar Andero <oskar.andero@gmail.com>

description: |
   Family of simple ADCs with a SPI interface.

properties:
  compatible:
    enum:
      - microchip,mcp3001
      - microchip,mcp3002
      - microchip,mcp3004
      - microchip,mcp3008
      - microchip,mcp3201
      - microchip,mcp3202
      - microchip,mcp3204
      - microchip,mcp3208
      - microchip,mcp3301
      - microchip,mcp3550-50
      - microchip,mcp3550-60
      - microchip,mcp3551
      - microchip,mcp3553

  reg:
    maxItems: 1

  spi-cpha: true
  spi-cpol: true

  vref-supply:
    description: External reference.

  "#io-channel-cells":
    const: 1

dependencies:
  spi-cpol: [ spi-cpha ]
  spi-cpha: [ spi-cpol ]

required:
  - compatible
  - reg
  - vref-supply

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

examples:
  - |
    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@0 {
            compatible = "microchip,mcp3002";
            reg = <0>;
            vref-supply = <&vref_reg>;
            spi-cpha;
            spi-cpol;
            #io-channel-cells = <1>;
        };
        adc@1 {
            compatible = "microchip,mcp3002";
            reg = <1>;
            vref-supply = <&vref_reg>;
            spi-max-frequency = <1500000>;
        };
    };
...


code:
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
# Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com>
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Microchip MCP3911 Dual channel analog front end (ADC)

maintainers:
  - Marcus Folkesson <marcus.folkesson@gmail.com>
  - Kent Gustavsson <nedo80@gmail.com>

description: |
  Bindings for the Microchip MCP3911 Dual channel ADC device. Datasheet can be
  found here: https://ww1.microchip.com/downloads/en/DeviceDoc/20002286C.pdf

properties:
  compatible:
    enum:
      - microchip,mcp3911

  reg:
    maxItems: 1

  spi-max-frequency:
    maximum: 20000000

  clocks:
    description: |
      Phandle and clock identifier for external sampling clock.
      If not specified, the internal crystal oscillator will be used.
    maxItems: 1

  interrupts:
    description: IRQ line of the ADC
    maxItems: 1

  microchip,data-ready-hiz:
    description:
      Data Ready Pin Inactive State Control
      true = The DR pin state is high-impedance
      false = The DR pin state is logic high
    type: boolean

  microchip,device-addr:
    description: Device address when multiple MCP3911 chips are present on the same SPI bus.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [0, 1, 2, 3]
    default: 0

  vref-supply:
    description: |
      Phandle to the external reference voltage supply.
      If not specified, the internal voltage reference (1.2V) will be used.

required:
  - compatible
  - reg

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

examples:
  - |
    spi {
      #address-cells = <1>;
      #size-cells = <0>;

      adc@0 {
        compatible = "microchip,mcp3911";
        reg = <0>;
        interrupt-parent = <&gpio5>;
        interrupts = <15 2>;
        spi-max-frequency = <20000000>;
        microchip,device-addr = <0>;
        vref-supply = <&vref_reg>;
        clocks = <&xtal>;
      };
    };


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/motorola,cpcap-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Motorola CPCAP PMIC ADC binding

maintainers:
  - Tony Lindgren <tony@atomide.com>

description:
  On Motorola phones like droid 4 there is a custom CPCAP PMIC. This PMIC
  has ADCs that are used for battery charging and USB PHY VBUS and ID pin
  detection.

properties:
  compatible:
    enum:
      - motorola,cpcap-adc
      - motorola,mapphone-cpcap-adc

  interrupts:
    maxItems: 1

  interrupt-names:
    const: adcdone

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - interrupts
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    pmic {
        #address-cells = <1>;
        #size-cells = <0>;
        adc {
            compatible = "motorola,mapphone-cpcap-adc";
            interrupt-parent = <&cpcap>;
            interrupts = <8 IRQ_TYPE_NONE>;
            interrupt-names = "adcdone";
            #io-channel-cells = <1>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/nuvoton,nau7802.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Nuvoton NAU7802 I2c Analog to Digital Converter (ADC)

maintainers:
  - Alexandre Belloni <alexandre.belloni@bootlin.com>
  - Maxime Ripard <mripard@kernel.org>

properties:
  compatible:
    const: nuvoton,nau7802

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  nuvoton,vldo:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Internal reference voltage in millivolts to be configured.
    minimum: 2400
    maximum: 4500

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;
        nau7802@2a {
            compatible = "nuvoton,nau7802";
            reg = <0x2a>;
            nuvoton,vldo = <3000>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Nuvoton NPCM BMC Analog to Digital Converter (ADC)

maintainers:
  - Tomer Maimon <tmaimon77@gmail.com>

description:
  The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter,
  both have eight channel inputs.

properties:
  compatible:
    enum:
      - nuvoton,npcm750-adc
      - nuvoton,npcm845-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1
    description: ADC interrupt, should be set for falling edge.

  resets:
    maxItems: 1

  clocks:
    maxItems: 1
    description: If not provided the defulat ADC sample rate will be used.

  vref-supply:
    description: If not supplied, the internal voltage reference will be used.

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - interrupts
  - resets

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
    #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
    soc {
        #address-cells = <1>;
        #size-cells = <1>;
        adc@f000c000 {
            compatible = "nuvoton,npcm750-adc";
            reg = <0xf000c000 0x8>;
            interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clk NPCM7XX_CLK_ADC>;
            resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP IMX8QXP ADC bindings

maintainers:
  - Cai Huoqing <caihuoqing@baidu.com>

description:
  Supports the ADC found on the IMX8QXP SoC.

properties:
  compatible:
    const: nxp,imx8qxp-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 2

  clock-names:
    items:
      - const: per
      - const: ipg

  assigned-clocks:
    maxItems: 1

  assigned-clock-rates:
    maxItems: 1

  power-domains:
    maxItems: 1

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - assigned-clocks
  - assigned-clock-rates
  - power-domains
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/firmware/imx/rsrc.h>
    soc {
        #address-cells = <2>;
        #size-cells = <2>;
        adc@5a880000 {
            compatible = "nxp,imx8qxp-adc";
            reg = <0x0 0x5a880000 0x0 0x10000>;
            interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clk IMX_SC_R_ADC_0>,
                     <&clk IMX_SC_R_ADC_0>;
            clock-names = "per", "ipg";
            assigned-clocks = <&clk IMX_SC_R_ADC_0>;
            assigned-clock-rates = <24000000>;
            power-domains = <&pd IMX_SC_R_ADC_0>;
            #io-channel-cells = <1>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/nxp,lpc1850-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP LPC1850 ADC bindings

maintainers:
  - Jonathan Cameron <jic23@kernel.org>

description:
  Supports the ADC found on the LPC1850 SoC.

properties:
  compatible:
    const: nxp,lpc1850-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  vref-supply: true

  resets:
    maxItems: 1

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - vref-supply
  - resets

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/lpc18xx-ccu.h>
    soc {
        #address-cells = <1>;
        #size-cells = <1>;
        adc@400e3000 {
            compatible = "nxp,lpc1850-adc";
            reg = <0x400e3000 0x1000>;
            interrupts = <17>;
            clocks = <&ccu1 CLK_APB3_ADC0>;
            vref-supply = <&reg_vdda>;
            resets = <&rgu 40>;
         };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/nxp,lpc3220-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP LPC3220 SoC ADC controller

maintainers:
  - Gregory Clement <gregory.clement@bootlin.com>

description:
  This hardware block has been used on several LPC32XX SoCs.

properties:
  compatible:
    const: nxp,lpc3220-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  vref-supply: true

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - interrupts

additionalProperties: false

examples:
  - |
    soc {
        #address-cells = <1>;
        #size-cells = <1>;
        adc@40048000 {
            compatible = "nxp,lpc3220-adc";
            reg = <0x40048000 0x1000>;
            interrupt-parent = <&mic>;
            interrupts = <39 0>;
            vref-supply = <&vcc>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm's PM8xxx voltage XOADC

maintainers:
  - Linus Walleij <linus.walleij@linaro.org>

description: |
  The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal
  oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921.

properties:
  compatible:
    enum:
      - qcom,pm8018-adc
      - qcom,pm8038-adc
      - qcom,pm8058-adc
      - qcom,pm8921-adc

  reg:
    maxItems: 1
    description:
      ADC base address in the PMIC, typically 0x197.

  xoadc-ref-supply:
    description:
      The reference voltage may vary with PMIC variant but is typically
      something like 2.2 or 1.8V.

  interrupts:
    maxItems: 1

  "#address-cells":
    const: 2
    description:
      The first cell is the prescaler (on PM8058) or premux (on PM8921)
      with two valid bits  so legal values are 0x00, 0x01 or 0x02.
      The second cell is the main analog mux setting (0x00..0x0f).
      The combination of prescaler/premux and analog mux uniquely addresses
      a hardware channel on all systems.

  "#size-cells":
    const: 0

  "#io-channel-cells":
    const: 2
    description:
      The cells are precaler or premux followed by the analog muxing line.

additionalProperties: false

required:
  - compatible
  - reg
  - "#io-channel-cells"
  - "#address-cells"
  - "#size-cells"
  - adc-channel@c
  - adc-channel@d
  - adc-channel@f

patternProperties:
  "^(adc-channel@)[0-9a-f]$":
    type: object
    description: |
      ADC channel specific configuration.
      Note that channels c, d and f must be present for calibration.
      These three nodes are used for absolute and ratiometric calibration
      and only need to have these reg values: they are by hardware definition
      1:1 ratio converters that sample 625, 1250 and 0 milliV and create
      an interpolation calibration for all other ADCs.

    properties:
      reg:
        maxItems: 1

      qcom,decimation:
        $ref: /schemas/types.yaml#/definitions/uint32
        description: |
          This parameter is used to decrease the ADC sampling rate.
          Quicker measurements can be made by reducing the decimation ratio.
          Valid values are 512, 1024, 2048, 4096.
          If the property is not found, a default value of 512 will be used.

      qcom,ratiometric:
        $ref: /schemas/types.yaml#/definitions/uint32
        description: |
          Channel calibration type. If this property is specified
          VADC will use a special voltage references for channel
          calibration. The available references are specified in the
          as a u32 value setting (see below) and it is compulsory
          to also specify this reference if ratiometric calibration
          is selected.

          If the property is not found, the channel will be
          calibrated with the 0.625V and 1.25V reference channels, also
          known as an absolute calibration.

          The reference voltage pairs when using ratiometric calibration:
          0 = XO_IN/XOADC_GND
          1 = PMIC_IN/XOADC_GND
          2 = PMIC_IN/BMS_CSP
          3 (invalid)
          4 = XOADC_GND/XOADC_GND
          5 = XOADC_VREF/XOADC_GND

    additionalProperties: false

    required:
      - reg

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    pmic {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@197 {
            compatible = "qcom,pm8058-adc";
            reg = <0x197>;
            interrupts-extended = <&pm8058 76 IRQ_TYPE_EDGE_RISING>;
            #address-cells = <2>;
            #size-cells = <0>;
            #io-channel-cells = <2>;

            vcoin: adc-channel@0 {
                reg = <0x00 0x00>;
            };
            vbat: adc-channel@1 {
                reg = <0x00 0x01>;
            };
            dcin: adc-channel@2 {
                reg = <0x00 0x02>;
            };
            ichg: adc-channel@3 {
                reg = <0x00 0x03>;
            };
            vph_pwr: adc-channel@4 {
                reg = <0x00 0x04>;
            };
            usb_vbus: adc-channel@a {
                reg = <0x00 0x0a>;
            };
            die_temp: adc-channel@b {
                reg = <0x00 0x0b>;
            };
            ref_625mv: adc-channel@c {
                reg = <0x00 0x0c>;
            };
            ref_1250mv: adc-channel@d {
                reg = <0x00 0x0d>;
            };
            ref_325mv: adc-channel@e {
                reg = <0x00 0x0e>;
            };
            ref_muxoff: adc-channel@f {
                reg = <0x00 0x0f>;
           };
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/qcom,spmi-iadc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm's SPMI PMIC current ADC

maintainers:
  - Jonathan Cameron <jic23@kernel.org>

description: |
  QPNP PMIC current ADC (IADC) provides interface to clients to read current.
  A 16 bit ADC is used for current measurements. IADC can measure the current
  through an external resistor (channel 1) or internal (built-in) resistor
  (channel 0). When using an external resistor it is to be described by
  qcom,external-resistor-micro-ohms property.

properties:
  compatible:
    items:
      - enum:
          - qcom,pm8941-iadc
      - const: qcom,spmi-iadc

  reg:
    description: IADC base address and length in the SPMI PMIC register map
    maxItems: 1

  qcom,external-resistor-micro-ohms:
    description:
      Sensor resistor value. If not defined value of 10000 micro Ohms
      will be used.

  interrupts:
    maxItems: 1
    description:
      End of conversion interrupt.

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    spmi_bus {
        #address-cells = <1>;
        #size-cells = <0>;
        pmic_iadc: adc@3600 {
            compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc";
            reg = <0x3600>;
            interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>;
            qcom,external-resistor-micro-ohms = <10000>;
            #io-channel-cells  = <1>;
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/qcom,spmi-rradc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm's SPMI PMIC Round Robin ADC

maintainers:
  - Caleb Connolly <caleb.connolly@linaro.org>

description: |
  The Qualcomm SPMI Round Robin ADC (RRADC) provides interface to clients to
  read the voltage, current and temperature for supported peripherals such as
  the battery thermistor die temperature, charger temperature, USB and DC input
  voltage / current and battery ID resistor.

properties:
  compatible:
    enum:
      - qcom,pmi8998-rradc
      - qcom,pm660-rradc

  reg:
    maxItems: 1

  qcom,batt-id-delay-ms:
    description: Sets the hardware settling time for the battery ID resistor.
    enum: [0, 1, 4, 12, 20, 40, 60, 80]

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    pmic {
      #address-cells = <1>;
      #size-cells = <0>;

      pmic_rradc: adc@4500 {
          compatible = "qcom,pmi8998-rradc";
          reg = <0x4500>;
          #io-channel-cells  = <1>;
      };
    };


code:
# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm's SPMI PMIC ADC

maintainers:
  - Andy Gross <agross@kernel.org>
  - Bjorn Andersson <bjorn.andersson@linaro.org>

description: |
  SPMI PMIC voltage ADC (VADC) provides interface to clients to read
  voltage. The VADC is a 15-bit sigma-delta ADC.
  SPMI PMIC5/PMIC7 voltage ADC (ADC) provides interface to clients to read
  voltage. The VADC is a 16-bit sigma-delta ADC.

properties:
  compatible:
    oneOf:
      - items:
          - const: qcom,pms405-adc
          - const: qcom,spmi-adc-rev2
      - enum:
          - qcom,spmi-vadc
          - qcom,spmi-adc5
          - qcom,spmi-adc-rev2
          - qcom,spmi-adc7

  reg:
    description: VADC base address in the SPMI PMIC register map
    maxItems: 1

  '#address-cells':
    const: 1

  '#size-cells':
    const: 0

  '#io-channel-cells':
    const: 1

  interrupts:
    maxItems: 1
    description:
      End of conversion interrupt.

required:
  - compatible
  - reg
  - '#address-cells'
  - '#size-cells'
  - '#io-channel-cells'

patternProperties:
  "^.*@[0-9a-f]+$":
    type: object
    additionalProperties: false
    description: |
      Represents the external channels which are connected to the ADC.
      For compatible property "qcom,spmi-vadc" following channels, also known as
      reference point channels, are used for result calibration and their channel
      configuration nodes should be defined:
      VADC_REF_625MV and/or VADC_SPARE1(based on PMIC version) VADC_REF_1250MV,
      VADC_GND_REF and VADC_VDD_VADC.

    properties:
      reg:
        maxItems: 1
        description: |
          ADC channel number.
          See include/dt-bindings/iio/qcom,spmi-vadc.h
          For PMIC7 ADC, the channel numbers are specified separately per PMIC
          in the PMIC-specific files in include/dt-bindings/iio/.

      label:
        $ref: /schemas/types.yaml#/definitions/string
        description: |
            ADC input of the platform as seen in the schematics.
            For thermistor inputs connected to generic AMUX or GPIO inputs
            these can vary across platform for the same pins. Hence select
            the platform schematics name for this channel.

      qcom,decimation:
        $ref: /schemas/types.yaml#/definitions/uint32
        description: |
            This parameter is used to decrease ADC sampling rate.
            Quicker measurements can be made by reducing decimation ratio.

      qcom,pre-scaling:
        description: |
            Used for scaling the channel input signal before the signal is
            fed to VADC. The configuration for this node is to know the
            pre-determined ratio and use it for post scaling. It is a pair of
            integers, denoting the numerator and denominator of the fraction by which
            input signal is multiplied. For example, <1 3> indicates the signal is scaled
            down to 1/3 of its value before ADC measurement.
            If property is not found default value depending on chip will be used.
        $ref: /schemas/types.yaml#/definitions/uint32-array
        oneOf:
          - items:
              - const: 1
              - enum: [ 1, 3, 4, 6, 20, 8, 10 ]
          - items:
              - const: 10
              - const: 81

      qcom,ratiometric:
        description: |
            Channel calibration type.
            - For compatible property "qcom,spmi-vadc", if this property is
              specified VADC will use the VDD reference (1.8V) and GND for
              channel calibration. If property is not found, channel will be
              calibrated with 0.625V and 1.25V reference channels, also
              known as absolute calibration.
            - For compatible property "qcom,spmi-adc5", "qcom,spmi-adc7" and
              "qcom,spmi-adc-rev2", if this property is specified VADC will use
              the VDD reference (1.875V) and GND for channel calibration. If
              property is not found, channel will be calibrated with 0V and 1.25V
              reference channels, also known as absolute calibration.
        type: boolean

      qcom,hw-settle-time:
        $ref: /schemas/types.yaml#/definitions/uint32
        description: |
            Time between AMUX getting configured and the ADC starting
            conversion. The 'hw_settle_time' is an index used from valid values
            and programmed in hardware to achieve the hardware settling delay.

      qcom,avg-samples:
        $ref: /schemas/types.yaml#/definitions/uint32
        description: |
            Number of samples to be used for measurement.
            Averaging provides the option to obtain a single measurement
            from the ADC that is an average of multiple samples. The value
            selected is 2^(value).

    required:
      - reg

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: qcom,spmi-vadc

    then:
      patternProperties:
        "^.*@[0-9a-f]+$":
          properties:
            qcom,decimation:
              enum: [ 512, 1024, 2048, 4096 ]
              default: 512

            qcom,hw-settle-time:
              enum: [ 0, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2,
                      4, 6, 8, 10 ]
              default: 0

            qcom,avg-samples:
              enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 ]
              default: 1

  - if:
      properties:
        compatible:
          contains:
            const: qcom,spmi-adc-rev2

    then:
      patternProperties:
        "^.*@[0-9a-f]+$":
          properties:
            qcom,decimation:
              enum: [ 256, 512, 1024 ]
              default: 1024

            qcom,hw-settle-time:
              enum: [ 0, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2,
                      4, 6, 8, 10 ]
              default: 0

            qcom,avg-samples:
              enum: [ 1, 2, 4, 8, 16 ]
              default: 1

  - if:
      properties:
        compatible:
          contains:
            const: qcom,spmi-adc5

    then:
      patternProperties:
        "^.*@[0-9a-f]+$":
          properties:
            qcom,decimation:
              enum: [ 250, 420, 840 ]
              default: 840

            qcom,hw-settle-time:
              enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2,
                      4, 6, 8, 10, 16, 32, 64, 128 ]
              default: 15

            qcom,avg-samples:
              enum: [ 1, 2, 4, 8, 16 ]
              default: 1

  - if:
      properties:
        compatible:
          contains:
            const: qcom,spmi-adc7

    then:
      patternProperties:
        "^.*@[0-9a-f]+$":
          properties:
            qcom,decimation:
              enum: [ 85, 340, 1360 ]
              default: 1360

            qcom,hw-settle-time:
              enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000,
                      8000, 16000, 32000, 64000, 128000 ]
              default: 15

            qcom,avg-samples:
              enum: [ 1, 2, 4, 8, 16 ]
              default: 1

additionalProperties: false

examples:
  - |
    spmi {
        #address-cells = <1>;
        #size-cells = <0>;
        /* VADC node */
        pmic_vadc: adc@3100 {
            compatible = "qcom,spmi-vadc";
            reg = <0x3100>;
            interrupts = <0x0 0x31 0x0 0x1>;
            #address-cells = <1>;
            #size-cells = <0>;
            #io-channel-cells = <1>;

            /* Channel node */
            adc-chan@39 {
                reg = <0x39>;
                qcom,decimation = <512>;
                qcom,ratiometric;
                qcom,hw-settle-time = <200>;
                qcom,avg-samples = <1>;
                qcom,pre-scaling = <1 3>;
            };

            adc-chan@9 {
                reg = <0x9>;
            };

            adc-chan@a {
                reg = <0xa>;
            };

            adc-chan@e {
                reg = <0xe>;
            };

            adc-chan@f {
                reg = <0xf>;
            };
        };
    };

  - |
    #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
    #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    spmi {
        #address-cells = <1>;
        #size-cells = <0>;
        adc@3100 {
            reg = <0x3100>;
            compatible = "qcom,spmi-adc7";
            #address-cells = <1>;
            #size-cells = <0>;
            #io-channel-cells = <1>;

            /* Other properties are omitted */
            xo-therm@44 {
                reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>;
                qcom,ratiometric;
                qcom,hw-settle-time = <200>;
            };

            conn-therm@47 {
                reg = <PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
                qcom,ratiometric;
                qcom,hw-settle-time = <200>;
            };
        };
    };


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas R-Car GyroADC

maintainers:
  - Marek Vasut <marek.vasut+renesas@gmail.com>

description: |
  The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
  which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs
  are sampled by the GyroADC block in a round-robin fashion and the result
  presented in the GyroADC registers.
  The ADC bindings should match with that of the devices connected to a
  full featured SPI bus.

properties:
  compatible:
    items:
      - enum:
          - renesas,r8a7791-gyroadc
          - renesas,r8a7792-gyroadc
      - const: renesas,rcar-gyroadc

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    const: fck

  power-domains: true

  resets: true

  "#address-cells":
    const: 1

  "#size-cells":
    const: 0

additionalProperties: false

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - "#address-cells"
  - "#size-cells"

patternProperties:
  "@[0-7]$":
    type: object
    properties:
      compatible:
        description: |
          fujitsu,mb88101a
          - Fujitsu MB88101A compatible mode,
            12bit sampling, up to 4 channels can be sampled in round-robin
            fashion. One Fujitsu chip supplies four GyroADC channels with
            data as it contains four ADCs on the chip and thus for 4-channel
            operation, single MB88101A is required. The Cx chipselect lines
            of the MB88101A connect directly to two CHS lines of the GyroADC,
            no demuxer is required. The data out line of each MB88101A
            connects to a shared input pin of the GyroADC.
          ti,adcs7476 or ti,adc121 or adi,ad7476
          - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, 15bit
            sampling, up to 8 channels can be sampled in round-robin
            fashion. One TI/ADI chip supplies single ADC channel with data,
            thus for 8-channel operation, 8 chips are required.
            A 3:8 chipselect demuxer is  required to connect the nCS line
            of the TI/ADI chips to the GyroADC, while MISO line of each
            TI/ADI ADC connects to a shared input pin of the GyroADC.
          maxim,max1162 or maxim,max11100
          - Maxim MAX1162 / Maxim MAX11100 compatible mode,  16bit sampling,
            up to 8 channels can be sampled in round-robin fashion. One
            Maxim chip supplies single ADC channel with data, thus for
            8-channel operation, 8 chips are required.
            A 3:8 chipselect demuxer is required to connect the nCS line
            of the MAX chips to the GyroADC, while MISO line of each Maxim
            ADC connects to a shared input pin of the GyroADC.
        enum:
          - adi,7476
          - fujitsu,mb88101a
          - maxim,max1162
          - maxim,max11100
          - ti,adcs7476
          - ti,adc121

      reg:
        minimum: 0
        maximum: 7

      vref-supply: true

    additionalProperties: false

    required:
      - compatible
      - reg
      - vref-supply

examples:
  - |
    #include <dt-bindings/clock/r8a7791-clock.h>
    #include <dt-bindings/power/r8a7791-sysc.h>
    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        adc@e6e54000 {
            compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
            reg = <0 0xe6e54000 0 64>;
            clocks = <&mstp9_clks R8A7791_CLK_GYROADC>;
            clock-names = "fck";
            power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;

            pinctrl-0 = <&adc_pins>;
            pinctrl-names = "default";

            #address-cells = <1>;
            #size-cells = <0>;

            adc@0 {
                reg = <0>;
                compatible = "maxim,max1162";
                vref-supply = <&vref_max1162>;
            };

            adc@1 {
                reg = <1>;
                compatible = "maxim,max1162";
                vref-supply = <&vref_max1162>;
            };
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/renesas,rzg2l-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas RZ/G2L ADC

maintainers:
  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

description: |
  A/D Converter block is a successive approximation analog-to-digital converter
  with a 12-bit accuracy. Up to eight analog input channels can be selected.
  Conversions can be performed in single or repeat mode. Result of the ADC is
  stored in a 32-bit data register corresponding to each channel.

properties:
  compatible:
    items:
      - enum:
          - renesas,r9a07g043-adc   # RZ/G2UL and RZ/Five
          - renesas,r9a07g044-adc   # RZ/G2L
          - renesas,r9a07g054-adc   # RZ/V2L
      - const: renesas,rzg2l-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: converter clock
      - description: peripheral clock

  clock-names:
    items:
      - const: adclk
      - const: pclk

  power-domains:
    maxItems: 1

  resets:
    maxItems: 2

  reset-names:
    items:
      - const: presetn
      - const: adrst-n

  '#address-cells':
    const: 1

  '#size-cells':
    const: 0

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - power-domains
  - resets
  - reset-names

patternProperties:
  "^channel@[0-7]$":
    $ref: "adc.yaml"
    type: object
    description: |
      Represents the external channels which are connected to the ADC.

    properties:
      reg:
        description: |
          The channel number.

    required:
      - reg

    additionalProperties: false

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: renesas,r9a07g043-adc
    then:
      patternProperties:
        "^channel@[2-7]$": false
        "^channel@[0-1]$":
          properties:
            reg:
              minimum: 0
              maximum: 1
    else:
      patternProperties:
        "^channel@[0-7]$":
          properties:
            reg:
              minimum: 0
              maximum: 7

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/r9a07g044-cpg.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    adc: adc@10059000 {
      compatible = "renesas,r9a07g044-adc", "renesas,rzg2l-adc";
      reg = <0x10059000 0x400>;
      interrupts = <GIC_SPI 347 IRQ_TYPE_EDGE_RISING>;
      clocks = <&cpg CPG_MOD R9A07G044_ADC_ADCLK>,
               <&cpg CPG_MOD R9A07G044_ADC_PCLK>;
      clock-names = "adclk", "pclk";
      power-domains = <&cpg>;
      resets = <&cpg R9A07G044_ADC_PRESETN>,
               <&cpg R9A07G044_ADC_ADRST_N>;
      reset-names = "presetn", "adrst-n";

      #address-cells = <1>;
      #size-cells = <0>;

      channel@0 {
        reg = <0>;
      };
      channel@1 {
        reg = <1>;
      };
      channel@2 {
        reg = <2>;
      };
      channel@3 {
        reg = <3>;
      };
      channel@4 {
        reg = <4>;
      };
      channel@5 {
        reg = <5>;
      };
      channel@6 {
        reg = <6>;
      };
      channel@7 {
        reg = <7>;
      };
    };


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/richtek,rtq6056.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: RTQ6056 Bi-Directional Current and Power Monitor with 16-bit ADC

maintainers:
  - ChiYuan Huang <cy_huang@richtek.com>

description: |
  The RTQ6056 is a high accuracy current-sense monitor with I2C and SMBus
  interface, and the device provides full information for system by reading
  out the loading current and power.

  The device monitors both of the drops across sense resistor and the BUS
  voltage, converts into the current in amperes, and power in watts through
  internal analog-to-digital converter ADC. The programmable calibration,
  adjustable conversion time, and averaging function are also built in for
  more design flexibility.

  Datasheet is available at
  https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf

properties:
  compatible:
    const: richtek,rtq6056

  reg:
    maxItems: 1

  "#io-channel-cells":
    const: 1

  shunt-resistor-micro-ohms:
    description: Shunt IN+/IN- sensing node resistor

required:
  - compatible
  - reg
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    i2c {
      #address-cells = <1>;
      #size-cells = <0>;
      adc@40 {
        compatible = "richtek,rtq6056";
        reg = <0x40>;
        #io-channel-cells = <1>;
      };
    };


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip Successive Approximation Register (SAR) A/D Converter

maintainers:
  - Heiko Stuebner <heiko@sntech.de>

properties:
  compatible:
    oneOf:
      - const: rockchip,saradc
      - const: rockchip,rk3066-tsadc
      - const: rockchip,rk3399-saradc
      - items:
          - enum:
              - rockchip,px30-saradc
              - rockchip,rk3308-saradc
              - rockchip,rk3328-saradc
              - rockchip,rk3568-saradc
              - rockchip,rv1108-saradc
              - rockchip,rv1126-saradc
          - const: rockchip,rk3399-saradc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: converter clock
      - description: peripheral clock

  clock-names:
    items:
      - const: saradc
      - const: apb_pclk

  resets:
    maxItems: 1

  reset-names:
    const: saradc-apb

  vref-supply:
    description:
      The regulator supply for the ADC reference voltage.

  "#io-channel-cells":
    const: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - vref-supply
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3288-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    saradc: saradc@2006c000 {
      compatible = "rockchip,saradc";
      reg = <0x2006c000 0x100>;
      interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
      clock-names = "saradc", "apb_pclk";
      resets = <&cru SRST_SARADC>;
      reset-names = "saradc-apb";
      vref-supply = <&vcc18>;
      #io-channel-cells = <1>;
    };


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos Analog to Digital Converter (ADC)

maintainers:
  - Krzysztof Kozlowski <krzk@kernel.org>

properties:
  compatible:
    enum:
      - samsung,exynos-adc-v1                 # Exynos5250
      - samsung,exynos-adc-v2
      - samsung,exynos3250-adc
      - samsung,exynos4212-adc                # Exynos4212 and Exynos4412
      - samsung,exynos7-adc
      - samsung,s3c2410-adc
      - samsung,s3c2416-adc
      - samsung,s3c2440-adc
      - samsung,s3c2443-adc
      - samsung,s3c6410-adc
      - samsung,s5pv210-adc

  reg:
    maxItems: 1

  clocks:
    description:
      Phandle to ADC bus clock. For Exynos3250 additional clock is needed.
    minItems: 1
    maxItems: 2

  clock-names:
    description:
      Must contain clock names (adc, sclk) matching phandles in clocks
      property.
    minItems: 1
    maxItems: 2

  interrupts:
    description:
      ADC interrupt followed by optional touchscreen interrupt.
    minItems: 1
    maxItems: 2

  "#io-channel-cells":
    const: 1

  vdd-supply: true

  samsung,syscon-phandle:
    $ref: '/schemas/types.yaml#/definitions/phandle'
    description:
      Phandle to the PMU system controller node (to access the ADC_PHY
      register on Exynos3250/4x12/5250/5420/5800).

  has-touchscreen:
    description:
      If present, indicates that a touchscreen is connected and usable.
    type: boolean

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - interrupts
  - "#io-channel-cells"
  - vdd-supply

additionalProperties:
  type: object

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - samsung,exynos-adc-v1
              - samsung,exynos-adc-v2
              - samsung,exynos3250-adc
              - samsung,exynos4212-adc
    then:
      required:
        - samsung,syscon-phandle

  - if:
      properties:
        compatible:
          contains:
            enum:
              - samsung,exynos3250-adc
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          items:
            - const: adc
            - const: sclk
    else:
      properties:
        clocks:
          minItems: 1
          maxItems: 1
        clock-names:
          items:
            - const: adc

  - if:
      required:
        - has-touchscreen
    then:
      properties:
        interrupts:
          minItems: 2
          maxItems: 2

examples:
  - |
    adc: adc@12d10000 {
        compatible = "samsung,exynos-adc-v1";
        reg = <0x12d10000 0x100>;
        interrupts = <0 106 0>;
        #io-channel-cells = <1>;

        clocks = <&clock 303>;
        clock-names = "adc";

        vdd-supply = <&buck5_reg>;
        samsung,syscon-phandle = <&pmu_system_controller>;

        /* NTC thermistor is a hwmon device */
        thermistor {
            compatible = "murata,ncp15wb473";
            pullup-uv = <1800000>;
            pullup-ohm = <47000>;
            pulldown-ohm = <0>;
            io-channels = <&adc 4>;
          };
    };

  - |
    #include <dt-bindings/clock/exynos3250.h>

    adc@126c0000 {
        compatible = "samsung,exynos3250-adc";
        reg = <0x126C0000 0x100>;
        interrupts = <0 137 0>;
        #io-channel-cells = <1>;

        clocks = <&cmu CLK_TSADC>,
                 <&cmu CLK_SCLK_TSADC>;
        clock-names = "adc", "sclk";

        vdd-supply = <&buck5_reg>;
        samsung,syscon-phandle = <&pmu_system_controller>;
    };


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/sigma-delta-modulator.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Device-Tree bindings for sigma delta modulator

maintainers:
  - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>

properties:
  compatible:
    description: |
      "sd-modulator" can be used as a generic SD modulator,
      if the modulator is not specified in the compatible list.
    enum:
      - sd-modulator
      - ads1201

  '#io-channel-cells':
    const: 0

required:
  - compatible
  - '#io-channel-cells'

additionalProperties: false

examples:
  - |
    ads1202: adc {
      compatible = "sd-modulator";
      #io-channel-cells = <0>;
    };

...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/sprd,sc2720-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Spreadtrum SC27XX series PMICs ADC binding

maintainers:
  - Baolin Wang <baolin.wang7@gmail.com>

description:
  Supports the ADC found on these PMICs.

properties:
  compatible:
    enum:
      - sprd,sc2720-adc
      - sprd,sc2721-adc
      - sprd,sc2723-adc
      - sprd,sc2730-adc
      - sprd,sc2731-adc
      - sprd,ump9620-adc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  "#io-channel-cells":
    const: 1

  hwlocks:
    maxItems: 1

  nvmem-cells: true

  nvmem-cell-names: true

allOf:
  - if:
      not:
        properties:
          compatible:
            contains:
              enum:
                - sprd,ump9620-adc
    then:
      properties:
        nvmem-cells:
          maxItems: 2
        nvmem-cell-names:
          items:
            - const: big_scale_calib
            - const: small_scale_calib

    else:
      properties:
        nvmem-cells:
          maxItems: 6
        nvmem-cell-names:
          items:
            - const: big_scale_calib1
            - const: big_scale_calib2
            - const: small_scale_calib1
            - const: small_scale_calib2
            - const: vbat_det_cal1
            - const: vbat_det_cal2

required:
  - compatible
  - reg
  - interrupts
  - "#io-channel-cells"
  - hwlocks
  - nvmem-cells
  - nvmem-cell-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    pmic {
        #address-cells = <1>;
        #size-cells = <0>;
        adc@480 {
            compatible = "sprd,sc2731-adc";
            reg = <0x480>;
            interrupt-parent = <&sc2731_pmic>;
            interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
            #io-channel-cells = <1>;
            hwlocks = <&hwlock 4>;
            nvmem-cells = <&adc_big_scale>, <&adc_small_scale>;
            nvmem-cell-names = "big_scale_calib", "small_scale_calib";
        };
    };

  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    pmic {
        #address-cells = <1>;
        #size-cells = <0>;
        adc@504 {
            compatible = "sprd,ump9620-adc";
            reg = <0x504>;
            interrupt-parent = <&ump9620_pmic>;
            interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
            #io-channel-cells = <1>;
            hwlocks = <&hwlock 4>;
            nvmem-cells = <&adc_bcal1>, <&adc_bcal2>,
                          <&adc_scal1>, <&adc_scal2>,
                          <&vbat_det_cal1>, <&vbat_det_cal2>;
            nvmem-cell-names = "big_scale_calib1", "big_scale_calib2",
                               "small_scale_calib1", "small_scale_calib2",
                               "vbat_det_cal1", "vbat_det_cal2";
        };
    };
...