code:
/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Header providing constants for i.MX28 pinctrl bindings.
 *
 * Copyright (C) 2013 Lothar Waßmann <LW@KARO-electronics.de>
 */

#ifndef __DT_BINDINGS_MX28_PINCTRL_H__
#define __DT_BINDINGS_MX28_PINCTRL_H__

#include "mxs-pinfunc.h"

#define MX28_PAD_GPMI_D00__GPMI_D0			0x0000
#define MX28_PAD_GPMI_D01__GPMI_D1			0x0010
#define MX28_PAD_GPMI_D02__GPMI_D2			0x0020
#define MX28_PAD_GPMI_D03__GPMI_D3			0x0030
#define MX28_PAD_GPMI_D04__GPMI_D4			0x0040
#define MX28_PAD_GPMI_D05__GPMI_D5			0x0050
#define MX28_PAD_GPMI_D06__GPMI_D6			0x0060
#define MX28_PAD_GPMI_D07__GPMI_D7			0x0070
#define MX28_PAD_GPMI_CE0N__GPMI_CE0N			0x0100
#define MX28_PAD_GPMI_CE1N__GPMI_CE1N			0x0110
#define MX28_PAD_GPMI_CE2N__GPMI_CE2N			0x0120
#define MX28_PAD_GPMI_CE3N__GPMI_CE3N			0x0130
#define MX28_PAD_GPMI_RDY0__GPMI_READY0			0x0140
#define MX28_PAD_GPMI_RDY1__GPMI_READY1			0x0150
#define MX28_PAD_GPMI_RDY2__GPMI_READY2			0x0160
#define MX28_PAD_GPMI_RDY3__GPMI_READY3			0x0170
#define MX28_PAD_GPMI_RDN__GPMI_RDN			0x0180
#define MX28_PAD_GPMI_WRN__GPMI_WRN			0x0190
#define MX28_PAD_GPMI_ALE__GPMI_ALE			0x01a0
#define MX28_PAD_GPMI_CLE__GPMI_CLE			0x01b0
#define MX28_PAD_GPMI_RESETN__GPMI_RESETN		0x01c0
#define MX28_PAD_LCD_D00__LCD_D0			0x1000
#define MX28_PAD_LCD_D01__LCD_D1			0x1010
#define MX28_PAD_LCD_D02__LCD_D2			0x1020
#define MX28_PAD_LCD_D03__LCD_D3			0x1030
#define MX28_PAD_LCD_D04__LCD_D4			0x1040
#define MX28_PAD_LCD_D05__LCD_D5			0x1050
#define MX28_PAD_LCD_D06__LCD_D6			0x1060
#define MX28_PAD_LCD_D07__LCD_D7			0x1070
#define MX28_PAD_LCD_D08__LCD_D8			0x1080
#define MX28_PAD_LCD_D09__LCD_D9			0x1090
#define MX28_PAD_LCD_D10__LCD_D10			0x10a0
#define MX28_PAD_LCD_D11__LCD_D11			0x10b0
#define MX28_PAD_LCD_D12__LCD_D12			0x10c0
#define MX28_PAD_LCD_D13__LCD_D13			0x10d0
#define MX28_PAD_LCD_D14__LCD_D14			0x10e0
#define MX28_PAD_LCD_D15__LCD_D15			0x10f0
#define MX28_PAD_LCD_D16__LCD_D16			0x1100
#define MX28_PAD_LCD_D17__LCD_D17			0x1110
#define MX28_PAD_LCD_D18__LCD_D18			0x1120
#define MX28_PAD_LCD_D19__LCD_D19			0x1130
#define MX28_PAD_LCD_D20__LCD_D20			0x1140
#define MX28_PAD_LCD_D21__LCD_D21			0x1150
#define MX28_PAD_LCD_D22__LCD_D22			0x1160
#define MX28_PAD_LCD_D23__LCD_D23			0x1170
#define MX28_PAD_LCD_RD_E__LCD_RD_E			0x1180
#define MX28_PAD_LCD_WR_RWN__LCD_WR_RWN			0x1190
#define MX28_PAD_LCD_RS__LCD_RS				0x11a0
#define MX28_PAD_LCD_CS__LCD_CS				0x11b0
#define MX28_PAD_LCD_VSYNC__LCD_VSYNC			0x11c0
#define MX28_PAD_LCD_HSYNC__LCD_HSYNC			0x11d0
#define MX28_PAD_LCD_DOTCLK__LCD_DOTCLK			0x11e0
#define MX28_PAD_LCD_ENABLE__LCD_ENABLE			0x11f0
#define MX28_PAD_SSP0_DATA0__SSP0_D0			0x2000
#define MX28_PAD_SSP0_DATA1__SSP0_D1			0x2010
#define MX28_PAD_SSP0_DATA2__SSP0_D2			0x2020
#define MX28_PAD_SSP0_DATA3__SSP0_D3			0x2030
#define MX28_PAD_SSP0_DATA4__SSP0_D4			0x2040
#define MX28_PAD_SSP0_DATA5__SSP0_D5			0x2050
#define MX28_PAD_SSP0_DATA6__SSP0_D6			0x2060
#define MX28_PAD_SSP0_DATA7__SSP0_D7			0x2070
#define MX28_PAD_SSP0_CMD__SSP0_CMD			0x2080
#define MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT		0x2090
#define MX28_PAD_SSP0_SCK__SSP0_SCK			0x20a0
#define MX28_PAD_SSP1_SCK__SSP1_SCK			0x20c0
#define MX28_PAD_SSP1_CMD__SSP1_CMD			0x20d0
#define MX28_PAD_SSP1_DATA0__SSP1_D0			0x20e0
#define MX28_PAD_SSP1_DATA3__SSP1_D3			0x20f0
#define MX28_PAD_SSP2_SCK__SSP2_SCK			0x2100
#define MX28_PAD_SSP2_MOSI__SSP2_CMD			0x2110
#define MX28_PAD_SSP2_MISO__SSP2_D0			0x2120
#define MX28_PAD_SSP2_SS0__SSP2_D3			0x2130
#define MX28_PAD_SSP2_SS1__SSP2_D4			0x2140
#define MX28_PAD_SSP2_SS2__SSP2_D5			0x2150
#define MX28_PAD_SSP3_SCK__SSP3_SCK			0x2180
#define MX28_PAD_SSP3_MOSI__SSP3_CMD			0x2190
#define MX28_PAD_SSP3_MISO__SSP3_D0			0x21a0
#define MX28_PAD_SSP3_SS0__SSP3_D3			0x21b0
#define MX28_PAD_AUART0_RX__AUART0_RX			0x3000
#define MX28_PAD_AUART0_TX__AUART0_TX			0x3010
#define MX28_PAD_AUART0_CTS__AUART0_CTS			0x3020
#define MX28_PAD_AUART0_RTS__AUART0_RTS			0x3030
#define MX28_PAD_AUART1_RX__AUART1_RX			0x3040
#define MX28_PAD_AUART1_TX__AUART1_TX			0x3050
#define MX28_PAD_AUART1_CTS__AUART1_CTS			0x3060
#define MX28_PAD_AUART1_RTS__AUART1_RTS			0x3070
#define MX28_PAD_AUART2_RX__AUART2_RX			0x3080
#define MX28_PAD_AUART2_TX__AUART2_TX			0x3090
#define MX28_PAD_AUART2_CTS__AUART2_CTS			0x30a0
#define MX28_PAD_AUART2_RTS__AUART2_RTS			0x30b0
#define MX28_PAD_AUART3_RX__AUART3_RX			0x30c0
#define MX28_PAD_AUART3_TX__AUART3_TX			0x30d0
#define MX28_PAD_AUART3_CTS__AUART3_CTS			0x30e0
#define MX28_PAD_AUART3_RTS__AUART3_RTS			0x30f0
#define MX28_PAD_PWM0__PWM_0				0x3100
#define MX28_PAD_PWM1__PWM_1				0x3110
#define MX28_PAD_PWM2__PWM_2				0x3120
#define MX28_PAD_SAIF0_MCLK__SAIF0_MCLK			0x3140
#define MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK		0x3150
#define MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK		0x3160
#define MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0		0x3170
#define MX28_PAD_I2C0_SCL__I2C0_SCL			0x3180
#define MX28_PAD_I2C0_SDA__I2C0_SDA			0x3190
#define MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0		0x31a0
#define MX28_PAD_SPDIF__SPDIF_TX			0x31b0
#define MX28_PAD_PWM3__PWM_3				0x31c0
#define MX28_PAD_PWM4__PWM_4				0x31d0
#define MX28_PAD_LCD_RESET__LCD_RESET			0x31e0
#define MX28_PAD_ENET0_MDC__ENET0_MDC			0x4000
#define MX28_PAD_ENET0_MDIO__ENET0_MDIO			0x4010
#define MX28_PAD_ENET0_RX_EN__ENET0_RX_EN		0x4020
#define MX28_PAD_ENET0_RXD0__ENET0_RXD0			0x4030
#define MX28_PAD_ENET0_RXD1__ENET0_RXD1			0x4040
#define MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK		0x4050
#define MX28_PAD_ENET0_TX_EN__ENET0_TX_EN		0x4060
#define MX28_PAD_ENET0_TXD0__ENET0_TXD0			0x4070
#define MX28_PAD_ENET0_TXD1__ENET0_TXD1			0x4080
#define MX28_PAD_ENET0_RXD2__ENET0_RXD2			0x4090
#define MX28_PAD_ENET0_RXD3__ENET0_RXD3			0x40a0
#define MX28_PAD_ENET0_TXD2__ENET0_TXD2			0x40b0
#define MX28_PAD_ENET0_TXD3__ENET0_TXD3			0x40c0
#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK		0x40d0
#define MX28_PAD_ENET0_COL__ENET0_COL			0x40e0
#define MX28_PAD_ENET0_CRS__ENET0_CRS			0x40f0
#define MX28_PAD_ENET_CLK__CLKCTRL_ENET			0x4100
#define MX28_PAD_JTAG_RTCK__JTAG_RTCK			0x4140
#define MX28_PAD_EMI_D00__EMI_DATA0			0x5000
#define MX28_PAD_EMI_D01__EMI_DATA1			0x5010
#define MX28_PAD_EMI_D02__EMI_DATA2			0x5020
#define MX28_PAD_EMI_D03__EMI_DATA3			0x5030
#define MX28_PAD_EMI_D04__EMI_DATA4			0x5040
#define MX28_PAD_EMI_D05__EMI_DATA5			0x5050
#define MX28_PAD_EMI_D06__EMI_DATA6			0x5060
#define MX28_PAD_EMI_D07__EMI_DATA7			0x5070
#define MX28_PAD_EMI_D08__EMI_DATA8			0x5080
#define MX28_PAD_EMI_D09__EMI_DATA9			0x5090
#define MX28_PAD_EMI_D10__EMI_DATA10			0x50a0
#define MX28_PAD_EMI_D11__EMI_DATA11			0x50b0
#define MX28_PAD_EMI_D12__EMI_DATA12			0x50c0
#define MX28_PAD_EMI_D13__EMI_DATA13			0x50d0
#define MX28_PAD_EMI_D14__EMI_DATA14			0x50e0
#define MX28_PAD_EMI_D15__EMI_DATA15			0x50f0
#define MX28_PAD_EMI_ODT0__EMI_ODT0			0x5100
#define MX28_PAD_EMI_DQM0__EMI_DQM0			0x5110
#define MX28_PAD_EMI_ODT1__EMI_ODT1			0x5120
#define MX28_PAD_EMI_DQM1__EMI_DQM1			0x5130
#define MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK	0x5140
#define MX28_PAD_EMI_CLK__EMI_CLK			0x5150
#define MX28_PAD_EMI_DQS0__EMI_DQS0			0x5160
#define MX28_PAD_EMI_DQS1__EMI_DQS1			0x5170
#define MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN		0x51a0
#define MX28_PAD_EMI_A00__EMI_ADDR0			0x6000
#define MX28_PAD_EMI_A01__EMI_ADDR1			0x6010
#define MX28_PAD_EMI_A02__EMI_ADDR2			0x6020
#define MX28_PAD_EMI_A03__EMI_ADDR3			0x6030
#define MX28_PAD_EMI_A04__EMI_ADDR4			0x6040
#define MX28_PAD_EMI_A05__EMI_ADDR5			0x6050
#define MX28_PAD_EMI_A06__EMI_ADDR6			0x6060
#define MX28_PAD_EMI_A07__EMI_ADDR7			0x6070
#define MX28_PAD_EMI_A08__EMI_ADDR8			0x6080
#define MX28_PAD_EMI_A09__EMI_ADDR9			0x6090
#define MX28_PAD_EMI_A10__EMI_ADDR10			0x60a0
#define MX28_PAD_EMI_A11__EMI_ADDR11			0x60b0
#define MX28_PAD_EMI_A12__EMI_ADDR12			0x60c0
#define MX28_PAD_EMI_A13__EMI_ADDR13			0x60d0
#define MX28_PAD_EMI_A14__EMI_ADDR14			0x60e0
#define MX28_PAD_EMI_BA0__EMI_BA0			0x6100
#define MX28_PAD_EMI_BA1__EMI_BA1			0x6110
#define MX28_PAD_EMI_BA2__EMI_BA2			0x6120
#define MX28_PAD_EMI_CASN__EMI_CASN			0x6130
#define MX28_PAD_EMI_RASN__EMI_RASN			0x6140
#define MX28_PAD_EMI_WEN__EMI_WEN			0x6150
#define MX28_PAD_EMI_CE0N__EMI_CE0N			0x6160
#define MX28_PAD_EMI_CE1N__EMI_CE1N			0x6170
#define MX28_PAD_EMI_CKE__EMI_CKE			0x6180
#define MX28_PAD_GPMI_D00__SSP1_D0			0x0001
#define MX28_PAD_GPMI_D01__SSP1_D1			0x0011
#define MX28_PAD_GPMI_D02__SSP1_D2			0x0021
#define MX28_PAD_GPMI_D03__SSP1_D3			0x0031
#define MX28_PAD_GPMI_D04__SSP1_D4			0x0041
#define MX28_PAD_GPMI_D05__SSP1_D5			0x0051
#define MX28_PAD_GPMI_D06__SSP1_D6			0x0061
#define MX28_PAD_GPMI_D07__SSP1_D7			0x0071
#define MX28_PAD_GPMI_CE0N__SSP3_D0			0x0101
#define MX28_PAD_GPMI_CE1N__SSP3_D3			0x0111
#define MX28_PAD_GPMI_CE2N__CAN1_TX			0x0121
#define MX28_PAD_GPMI_CE3N__CAN1_RX			0x0131
#define MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT		0x0141
#define MX28_PAD_GPMI_RDY1__SSP1_CMD			0x0151
#define MX28_PAD_GPMI_RDY2__CAN0_TX			0x0161
#define MX28_PAD_GPMI_RDY3__CAN0_RX			0x0171
#define MX28_PAD_GPMI_RDN__SSP3_SCK			0x0181
#define MX28_PAD_GPMI_WRN__SSP1_SCK			0x0191
#define MX28_PAD_GPMI_ALE__SSP3_D1			0x01a1
#define MX28_PAD_GPMI_CLE__SSP3_D2			0x01b1
#define MX28_PAD_GPMI_RESETN__SSP3_CMD			0x01c1
#define MX28_PAD_LCD_D03__ETM_DA8			0x1031
#define MX28_PAD_LCD_D04__ETM_DA9			0x1041
#define MX28_PAD_LCD_D08__ETM_DA3			0x1081
#define MX28_PAD_LCD_D09__ETM_DA4			0x1091
#define MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT		0x1141
#define MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN		0x1151
#define MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT		0x1161
#define MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN		0x1171
#define MX28_PAD_LCD_RD_E__LCD_VSYNC			0x1181
#define MX28_PAD_LCD_WR_RWN__LCD_HSYNC			0x1191
#define MX28_PAD_LCD_RS__LCD_DOTCLK			0x11a1
#define MX28_PAD_LCD_CS__LCD_ENABLE			0x11b1
#define MX28_PAD_LCD_VSYNC__SAIF1_SDATA0		0x11c1
#define MX28_PAD_LCD_HSYNC__SAIF1_SDATA1		0x11d1
#define MX28_PAD_LCD_DOTCLK__SAIF1_MCLK			0x11e1
#define MX28_PAD_SSP0_DATA4__SSP2_D0			0x2041
#define MX28_PAD_SSP0_DATA5__SSP2_D3			0x2051
#define MX28_PAD_SSP0_DATA6__SSP2_CMD			0x2061
#define MX28_PAD_SSP0_DATA7__SSP2_SCK			0x2071
#define MX28_PAD_SSP1_SCK__SSP2_D1			0x20c1
#define MX28_PAD_SSP1_CMD__SSP2_D2			0x20d1
#define MX28_PAD_SSP1_DATA0__SSP2_D6			0x20e1
#define MX28_PAD_SSP1_DATA3__SSP2_D7			0x20f1
#define MX28_PAD_SSP2_SCK__AUART2_RX			0x2101
#define MX28_PAD_SSP2_MOSI__AUART2_TX			0x2111
#define MX28_PAD_SSP2_MISO__AUART3_RX			0x2121
#define MX28_PAD_SSP2_SS0__AUART3_TX			0x2131
#define MX28_PAD_SSP2_SS1__SSP2_D1			0x2141
#define MX28_PAD_SSP2_SS2__SSP2_D2			0x2151
#define MX28_PAD_SSP3_SCK__AUART4_TX			0x2181
#define MX28_PAD_SSP3_MOSI__AUART4_RX			0x2191
#define MX28_PAD_SSP3_MISO__AUART4_RTS			0x21a1
#define MX28_PAD_SSP3_SS0__AUART4_CTS			0x21b1
#define MX28_PAD_AUART0_RX__I2C0_SCL			0x3001
#define MX28_PAD_AUART0_TX__I2C0_SDA			0x3011
#define MX28_PAD_AUART0_CTS__AUART4_RX			0x3021
#define MX28_PAD_AUART0_RTS__AUART4_TX			0x3031
#define MX28_PAD_AUART1_RX__SSP2_CARD_DETECT		0x3041
#define MX28_PAD_AUART1_TX__SSP3_CARD_DETECT		0x3051
#define MX28_PAD_AUART1_CTS__USB0_OVERCURRENT		0x3061
#define MX28_PAD_AUART1_RTS__USB0_ID			0x3071
#define MX28_PAD_AUART2_RX__SSP3_D1			0x3081
#define MX28_PAD_AUART2_TX__SSP3_D2			0x3091
#define MX28_PAD_AUART2_CTS__I2C1_SCL			0x30a1
#define MX28_PAD_AUART2_RTS__I2C1_SDA			0x30b1
#define MX28_PAD_AUART3_RX__CAN0_TX			0x30c1
#define MX28_PAD_AUART3_TX__CAN0_RX			0x30d1
#define MX28_PAD_AUART3_CTS__CAN1_TX			0x30e1
#define MX28_PAD_AUART3_RTS__CAN1_RX			0x30f1
#define MX28_PAD_PWM0__I2C1_SCL				0x3101
#define MX28_PAD_PWM1__I2C1_SDA				0x3111
#define MX28_PAD_PWM2__USB0_ID				0x3121
#define MX28_PAD_SAIF0_MCLK__PWM_3			0x3141
#define MX28_PAD_SAIF0_LRCLK__PWM_4			0x3151
#define MX28_PAD_SAIF0_BITCLK__PWM_5			0x3161
#define MX28_PAD_SAIF0_SDATA0__PWM_6			0x3171
#define MX28_PAD_I2C0_SCL__TIMROT_ROTARYA		0x3181
#define MX28_PAD_I2C0_SDA__TIMROT_ROTARYB		0x3191
#define MX28_PAD_SAIF1_SDATA0__PWM_7			0x31a1
#define MX28_PAD_LCD_RESET__LCD_VSYNC			0x31e1
#define MX28_PAD_ENET0_MDC__GPMI_CE4N			0x4001
#define MX28_PAD_ENET0_MDIO__GPMI_CE5N			0x4011
#define MX28_PAD_ENET0_RX_EN__GPMI_CE6N			0x4021
#define MX28_PAD_ENET0_RXD0__GPMI_CE7N			0x4031
#define MX28_PAD_ENET0_RXD1__GPMI_READY4		0x4041
#define MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER		0x4051
#define MX28_PAD_ENET0_TX_EN__GPMI_READY5		0x4061
#define MX28_PAD_ENET0_TXD0__GPMI_READY6		0x4071
#define MX28_PAD_ENET0_TXD1__GPMI_READY7		0x4081
#define MX28_PAD_ENET0_RXD2__ENET1_RXD0			0x4091
#define MX28_PAD_ENET0_RXD3__ENET1_RXD1			0x40a1
#define MX28_PAD_ENET0_TXD2__ENET1_TXD0			0x40b1
#define MX28_PAD_ENET0_TXD3__ENET1_TXD1			0x40c1
#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER		0x40d1
#define MX28_PAD_ENET0_COL__ENET1_TX_EN			0x40e1
#define MX28_PAD_ENET0_CRS__ENET1_RX_EN			0x40f1
#define MX28_PAD_GPMI_CE2N__ENET0_RX_ER			0x0122
#define MX28_PAD_GPMI_CE3N__SAIF1_MCLK			0x0132
#define MX28_PAD_GPMI_RDY0__USB0_ID			0x0142
#define MX28_PAD_GPMI_RDY2__ENET0_TX_ER			0x0162
#define MX28_PAD_GPMI_RDY3__HSADC_TRIGGER		0x0172
#define MX28_PAD_GPMI_ALE__SSP3_D4			0x01a2
#define MX28_PAD_GPMI_CLE__SSP3_D5			0x01b2
#define MX28_PAD_LCD_D00__ETM_DA0			0x1002
#define MX28_PAD_LCD_D01__ETM_DA1			0x1012
#define MX28_PAD_LCD_D02__ETM_DA2			0x1022
#define MX28_PAD_LCD_D03__ETM_DA3			0x1032
#define MX28_PAD_LCD_D04__ETM_DA4			0x1042
#define MX28_PAD_LCD_D05__ETM_DA5			0x1052
#define MX28_PAD_LCD_D06__ETM_DA6			0x1062
#define MX28_PAD_LCD_D07__ETM_DA7			0x1072
#define MX28_PAD_LCD_D08__ETM_DA8			0x1082
#define MX28_PAD_LCD_D09__ETM_DA9			0x1092
#define MX28_PAD_LCD_D10__ETM_DA10			0x10a2
#define MX28_PAD_LCD_D11__ETM_DA11			0x10b2
#define MX28_PAD_LCD_D12__ETM_DA12			0x10c2
#define MX28_PAD_LCD_D13__ETM_DA13			0x10d2
#define MX28_PAD_LCD_D14__ETM_DA14			0x10e2
#define MX28_PAD_LCD_D15__ETM_DA15			0x10f2
#define MX28_PAD_LCD_D16__ETM_DA7			0x1102
#define MX28_PAD_LCD_D17__ETM_DA6			0x1112
#define MX28_PAD_LCD_D18__ETM_DA5			0x1122
#define MX28_PAD_LCD_D19__ETM_DA4			0x1132
#define MX28_PAD_LCD_D20__ETM_DA3			0x1142
#define MX28_PAD_LCD_D21__ETM_DA2			0x1152
#define MX28_PAD_LCD_D22__ETM_DA1			0x1162
#define MX28_PAD_LCD_D23__ETM_DA0			0x1172
#define MX28_PAD_LCD_RD_E__ETM_TCTL			0x1182
#define MX28_PAD_LCD_WR_RWN__ETM_TCLK			0x1192
#define MX28_PAD_LCD_HSYNC__ETM_TCTL			0x11d2
#define MX28_PAD_LCD_DOTCLK__ETM_TCLK			0x11e2
#define MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT	0x20c2
#define MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN		0x20d2
#define MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT	0x20e2
#define MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN	0x20f2
#define MX28_PAD_SSP2_SCK__SAIF0_SDATA1			0x2102
#define MX28_PAD_SSP2_MOSI__SAIF0_SDATA2		0x2112
#define MX28_PAD_SSP2_MISO__SAIF1_SDATA1		0x2122
#define MX28_PAD_SSP2_SS0__SAIF1_SDATA2			0x2132
#define MX28_PAD_SSP2_SS1__USB1_OVERCURRENT		0x2142
#define MX28_PAD_SSP2_SS2__USB0_OVERCURRENT		0x2152
#define MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT	0x2182
#define MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN	0x2192
#define MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT	0x21a2
#define MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN		0x21b2
#define MX28_PAD_AUART0_RX__DUART_CTS			0x3002
#define MX28_PAD_AUART0_TX__DUART_RTS			0x3012
#define MX28_PAD_AUART0_CTS__DUART_RX			0x3022
#define MX28_PAD_AUART0_RTS__DUART_TX			0x3032
#define MX28_PAD_AUART1_RX__PWM_0			0x3042
#define MX28_PAD_AUART1_TX__PWM_1			0x3052
#define MX28_PAD_AUART1_CTS__TIMROT_ROTARYA		0x3062
#define MX28_PAD_AUART1_RTS__TIMROT_ROTARYB		0x3072
#define MX28_PAD_AUART2_RX__SSP3_D4			0x3082
#define MX28_PAD_AUART2_TX__SSP3_D5			0x3092
#define MX28_PAD_AUART2_CTS__SAIF1_BITCLK		0x30a2
#define MX28_PAD_AUART2_RTS__SAIF1_LRCLK		0x30b2
#define MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT	0x30c2
#define MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN	0x30d2
#define MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT	0x30e2
#define MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN	0x30f2
#define MX28_PAD_PWM0__DUART_RX				0x3102
#define MX28_PAD_PWM1__DUART_TX				0x3112
#define MX28_PAD_PWM2__USB1_OVERCURRENT			0x3122
#define MX28_PAD_SAIF0_MCLK__AUART4_CTS			0x3142
#define MX28_PAD_SAIF0_LRCLK__AUART4_RTS		0x3152
#define MX28_PAD_SAIF0_BITCLK__AUART4_RX		0x3162
#define MX28_PAD_SAIF0_SDATA0__AUART4_TX		0x3172
#define MX28_PAD_I2C0_SCL__DUART_RX			0x3182
#define MX28_PAD_I2C0_SDA__DUART_TX			0x3192
#define MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1		0x31a2
#define MX28_PAD_SPDIF__ENET1_RX_ER			0x31b2
#define MX28_PAD_ENET0_MDC__SAIF0_SDATA1		0x4002
#define MX28_PAD_ENET0_MDIO__SAIF0_SDATA2		0x4012
#define MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1		0x4022
#define MX28_PAD_ENET0_RXD0__SAIF1_SDATA2		0x4032
#define MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT	0x4052
#define MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT	0x4092
#define MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN	0x40a2
#define MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT	0x40b2
#define MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN	0x40c2
#define MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN	0x40d2
#define MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT	0x40e2
#define MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN	0x40f2
#define MX28_PAD_GPMI_D00__GPIO_0_0			0x0003
#define MX28_PAD_GPMI_D01__GPIO_0_1			0x0013
#define MX28_PAD_GPMI_D02__GPIO_0_2			0x0023
#define MX28_PAD_GPMI_D03__GPIO_0_3			0x0033
#define MX28_PAD_GPMI_D04__GPIO_0_4			0x0043
#define MX28_PAD_GPMI_D05__GPIO_0_5			0x0053
#define MX28_PAD_GPMI_D06__GPIO_0_6			0x0063
#define MX28_PAD_GPMI_D07__GPIO_0_7			0x0073
#define MX28_PAD_GPMI_CE0N__GPIO_0_16			0x0103
#define MX28_PAD_GPMI_CE1N__GPIO_0_17			0x0113
#define MX28_PAD_GPMI_CE2N__GPIO_0_18			0x0123
#define MX28_PAD_GPMI_CE3N__GPIO_0_19			0x0133
#define MX28_PAD_GPMI_RDY0__GPIO_0_20			0x0143
#define MX28_PAD_GPMI_RDY1__GPIO_0_21			0x0153
#define MX28_PAD_GPMI_RDY2__GPIO_0_22			0x0163
#define MX28_PAD_GPMI_RDY3__GPIO_0_23			0x0173
#define MX28_PAD_GPMI_RDN__GPIO_0_24			0x0183
#define MX28_PAD_GPMI_WRN__GPIO_0_25			0x0193
#define MX28_PAD_GPMI_ALE__GPIO_0_26			0x01a3
#define MX28_PAD_GPMI_CLE__GPIO_0_27			0x01b3
#define MX28_PAD_GPMI_RESETN__GPIO_0_28			0x01c3
#define MX28_PAD_LCD_D00__GPIO_1_0			0x1003
#define MX28_PAD_LCD_D01__GPIO_1_1			0x1013
#define MX28_PAD_LCD_D02__GPIO_1_2			0x1023
#define MX28_PAD_LCD_D03__GPIO_1_3			0x1033
#define MX28_PAD_LCD_D04__GPIO_1_4			0x1043
#define MX28_PAD_LCD_D05__GPIO_1_5			0x1053
#define MX28_PAD_LCD_D06__GPIO_1_6			0x1063
#define MX28_PAD_LCD_D07__GPIO_1_7			0x1073
#define MX28_PAD_LCD_D08__GPIO_1_8			0x1083
#define MX28_PAD_LCD_D09__GPIO_1_9			0x1093
#define MX28_PAD_LCD_D10__GPIO_1_10			0x10a3
#define MX28_PAD_LCD_D11__GPIO_1_11			0x10b3
#define MX28_PAD_LCD_D12__GPIO_1_12			0x10c3
#define MX28_PAD_LCD_D13__GPIO_1_13			0x10d3
#define MX28_PAD_LCD_D14__GPIO_1_14			0x10e3
#define MX28_PAD_LCD_D15__GPIO_1_15			0x10f3
#define MX28_PAD_LCD_D16__GPIO_1_16			0x1103
#define MX28_PAD_LCD_D17__GPIO_1_17			0x1113
#define MX28_PAD_LCD_D18__GPIO_1_18			0x1123
#define MX28_PAD_LCD_D19__GPIO_1_19			0x1133
#define MX28_PAD_LCD_D20__GPIO_1_20			0x1143
#define MX28_PAD_LCD_D21__GPIO_1_21			0x1153
#define MX28_PAD_LCD_D22__GPIO_1_22			0x1163
#define MX28_PAD_LCD_D23__GPIO_1_23			0x1173
#define MX28_PAD_LCD_RD_E__GPIO_1_24			0x1183
#define MX28_PAD_LCD_WR_RWN__GPIO_1_25			0x1193
#define MX28_PAD_LCD_RS__GPIO_1_26			0x11a3
#define MX28_PAD_LCD_CS__GPIO_1_27			0x11b3
#define MX28_PAD_LCD_VSYNC__GPIO_1_28			0x11c3
#define MX28_PAD_LCD_HSYNC__GPIO_1_29			0x11d3
#define MX28_PAD_LCD_DOTCLK__GPIO_1_30			0x11e3
#define MX28_PAD_LCD_ENABLE__GPIO_1_31			0x11f3
#define MX28_PAD_SSP0_DATA0__GPIO_2_0			0x2003
#define MX28_PAD_SSP0_DATA1__GPIO_2_1			0x2013
#define MX28_PAD_SSP0_DATA2__GPIO_2_2			0x2023
#define MX28_PAD_SSP0_DATA3__GPIO_2_3			0x2033
#define MX28_PAD_SSP0_DATA4__GPIO_2_4			0x2043
#define MX28_PAD_SSP0_DATA5__GPIO_2_5			0x2053
#define MX28_PAD_SSP0_DATA6__GPIO_2_6			0x2063
#define MX28_PAD_SSP0_DATA7__GPIO_2_7			0x2073
#define MX28_PAD_SSP0_CMD__GPIO_2_8			0x2083
#define MX28_PAD_SSP0_DETECT__GPIO_2_9			0x2093
#define MX28_PAD_SSP0_SCK__GPIO_2_10			0x20a3
#define MX28_PAD_SSP1_SCK__GPIO_2_12			0x20c3
#define MX28_PAD_SSP1_CMD__GPIO_2_13			0x20d3
#define MX28_PAD_SSP1_DATA0__GPIO_2_14			0x20e3
#define MX28_PAD_SSP1_DATA3__GPIO_2_15			0x20f3
#define MX28_PAD_SSP2_SCK__GPIO_2_16			0x2103
#define MX28_PAD_SSP2_MOSI__GPIO_2_17			0x2113
#define MX28_PAD_SSP2_MISO__GPIO_2_18			0x2123
#define MX28_PAD_SSP2_SS0__GPIO_2_19			0x2133
#define MX28_PAD_SSP2_SS1__GPIO_2_20			0x2143
#define MX28_PAD_SSP2_SS2__GPIO_2_21			0x2153
#define MX28_PAD_SSP3_SCK__GPIO_2_24			0x2183
#define MX28_PAD_SSP3_MOSI__GPIO_2_25			0x2193
#define MX28_PAD_SSP3_MISO__GPIO_2_26			0x21a3
#define MX28_PAD_SSP3_SS0__GPIO_2_27			0x21b3
#define MX28_PAD_AUART0_RX__GPIO_3_0			0x3003
#define MX28_PAD_AUART0_TX__GPIO_3_1			0x3013
#define MX28_PAD_AUART0_CTS__GPIO_3_2			0x3023
#define MX28_PAD_AUART0_RTS__GPIO_3_3			0x3033
#define MX28_PAD_AUART1_RX__GPIO_3_4			0x3043
#define MX28_PAD_AUART1_TX__GPIO_3_5			0x3053
#define MX28_PAD_AUART1_CTS__GPIO_3_6			0x3063
#define MX28_PAD_AUART1_RTS__GPIO_3_7			0x3073
#define MX28_PAD_AUART2_RX__GPIO_3_8			0x3083
#define MX28_PAD_AUART2_TX__GPIO_3_9			0x3093
#define MX28_PAD_AUART2_CTS__GPIO_3_10			0x30a3
#define MX28_PAD_AUART2_RTS__GPIO_3_11			0x30b3
#define MX28_PAD_AUART3_RX__GPIO_3_12			0x30c3
#define MX28_PAD_AUART3_TX__GPIO_3_13			0x30d3
#define MX28_PAD_AUART3_CTS__GPIO_3_14			0x30e3
#define MX28_PAD_AUART3_RTS__GPIO_3_15			0x30f3
#define MX28_PAD_PWM0__GPIO_3_16			0x3103
#define MX28_PAD_PWM1__GPIO_3_17			0x3113
#define MX28_PAD_PWM2__GPIO_3_18			0x3123
#define MX28_PAD_SAIF0_MCLK__GPIO_3_20			0x3143
#define MX28_PAD_SAIF0_LRCLK__GPIO_3_21			0x3153
#define MX28_PAD_SAIF0_BITCLK__GPIO_3_22		0x3163
#define MX28_PAD_SAIF0_SDATA0__GPIO_3_23		0x3173
#define MX28_PAD_I2C0_SCL__GPIO_3_24			0x3183
#define MX28_PAD_I2C0_SDA__GPIO_3_25			0x3193
#define MX28_PAD_SAIF1_SDATA0__GPIO_3_26		0x31a3
#define MX28_PAD_SPDIF__GPIO_3_27			0x31b3
#define MX28_PAD_PWM3__GPIO_3_28			0x31c3
#define MX28_PAD_PWM4__GPIO_3_29			0x31d3
#define MX28_PAD_LCD_RESET__GPIO_3_30			0x31e3
#define MX28_PAD_ENET0_MDC__GPIO_4_0			0x4003
#define MX28_PAD_ENET0_MDIO__GPIO_4_1			0x4013
#define MX28_PAD_ENET0_RX_EN__GPIO_4_2			0x4023
#define MX28_PAD_ENET0_RXD0__GPIO_4_3			0x4033
#define MX28_PAD_ENET0_RXD1__GPIO_4_4			0x4043
#define MX28_PAD_ENET0_TX_CLK__GPIO_4_5			0x4053
#define MX28_PAD_ENET0_TX_EN__GPIO_4_6			0x4063
#define MX28_PAD_ENET0_TXD0__GPIO_4_7			0x4073
#define MX28_PAD_ENET0_TXD1__GPIO_4_8			0x4083
#define MX28_PAD_ENET0_RXD2__GPIO_4_9			0x4093
#define MX28_PAD_ENET0_RXD3__GPIO_4_10			0x40a3
#define MX28_PAD_ENET0_TXD2__GPIO_4_11			0x40b3
#define MX28_PAD_ENET0_TXD3__GPIO_4_12			0x40c3
#define MX28_PAD_ENET0_RX_CLK__GPIO_4_13		0x40d3
#define MX28_PAD_ENET0_COL__GPIO_4_14			0x40e3
#define MX28_PAD_ENET0_CRS__GPIO_4_15			0x40f3
#define MX28_PAD_ENET_CLK__GPIO_4_16			0x4103
#define MX28_PAD_JTAG_RTCK__GPIO_4_20			0x4143

#endif /* __DT_BINDINGS_MX28_PINCTRL_H__ */


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (C) 2012 Marek Vasut <marex@denx.de>
 */

/dts-v1/;
#include "imx28.dtsi"

/ {
	model = "SchulerControl GmbH, SC SPS 1";
	compatible = "schulercontrol,imx28-sps1", "fsl,imx28";

	memory@40000000 {
		device_type = "memory";
		reg = <0x40000000 0x08000000>;
	};

	apb@80000000 {
		apbh@80000000 {
			pinctrl@80018000 {
				pinctrl-names = "default";
				pinctrl-0 = <&hog_pins_a>;

				hog_pins_a: hog-gpios@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_GPMI_D00__GPIO_0_0
						MX28_PAD_GPMI_D03__GPIO_0_3
						MX28_PAD_GPMI_D06__GPIO_0_6
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

			};

			ssp0: spi@80010000 {
				compatible = "fsl,imx28-mmc";
				pinctrl-names = "default";
				pinctrl-0 = <&mmc0_4bit_pins_a>;
				bus-width = <4>;
				status = "okay";
			};

			ssp2: spi@80014000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-spi";
				pinctrl-names = "default";
				pinctrl-0 = <&spi2_pins_a>;
				status = "okay";

				flash: flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "everspin,mr25h256", "mr25h256";
					spi-max-frequency = <40000000>;
					reg = <0>;
				};
			};
		};

		apbx@80040000 {
			i2c0: i2c@80058000 {
				pinctrl-names = "default";
				pinctrl-0 = <&i2c0_pins_a>;
				status = "okay";

				rtc: rtc@51 {
					compatible = "nxp,pcf8563";
					reg = <0x51>;
				};

				eeprom: eeprom@52 {
					compatible = "atmel,24c64";
					reg = <0x52>;
					pagesize = <32>;
				};
			};

			duart: serial@80074000 {
				pinctrl-names = "default";
				pinctrl-0 = <&duart_pins_a>;
				status = "okay";
			};

			usbphy0: usbphy@8007c000 {
				status = "okay";
			};

			auart0: serial@8006a000 {
				pinctrl-names = "default";
				pinctrl-0 = <&auart0_pins_a>;
				status = "okay";
			};
		};
	};

	ahb@80080000 {
		usb0: usb@80080000 {
			vbus-supply = <&reg_usb0_vbus>;
			pinctrl-names = "default";
			pinctrl-0 = <&usb0_pins_b>;
			status = "okay";
		};

		mac0: ethernet@800f0000 {
			phy-mode = "rmii";
			pinctrl-names = "default";
			pinctrl-0 = <&mac0_pins_a>;
			status = "okay";
		};

		mac1: ethernet@800f4000 {
			phy-mode = "rmii";
			pinctrl-names = "default";
			pinctrl-0 = <&mac1_pins_a>;
			status = "okay";
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usb0_vbus: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "usb0_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 9 0>;
		};
	};

	leds {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "gpio-leds";
		status = "okay";

		led@1 {
			label = "sps1-1:yellow:user";
			gpios = <&gpio0 6 0>;
			linux,default-trigger = "heartbeat";
			reg = <0>;
		};

		led@2 {
			label = "sps1-2:red:user";
			gpios = <&gpio0 3 0>;
			linux,default-trigger = "heartbeat";
			reg = <1>;
		};

		led@3 {
			label = "sps1-3:red:user";
			gpios = <&gpio0 0 0>;
			default-trigger = "heartbeat";
			reg = <2>;
		};

	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (C) 2016 Savoir-Faire Linux
 * Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
 */

/dts-v1/;
#include "imx28.dtsi"
#include "dt-bindings/gpio/gpio.h"

/ {

	model = "Technologic Systems i.MX28 TS-4600";
	compatible = "technologic,imx28-ts4600", "fsl,imx28";

	memory@40000000 {
		device_type = "memory";
		reg = <0x40000000 0x10000000>;   /* 256MB */
	};

	apb@80000000 {
		apbh@80000000 {
			ssp0: spi@80010000 {
				compatible = "fsl,imx28-mmc";
				pinctrl-names = "default";
				pinctrl-0 = <&mmc0_4bit_pins_a
					     &mmc0_sck_cfg
					     &en_sd_pwr>;
				broken-cd;
				bus-width = <4>;
				vmmc-supply = <&reg_vddio_sd0>;
				status = "okay";
			};

			pinctrl@80018000 {

				en_sd_pwr: en-sd-pwr@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_PWM3__GPIO_3_28
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

			};
		};

		apbx@80040000 {
			pwm: pwm@80064000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pwm2_pins_a>;
				status = "okay";
			};

			duart: serial@80074000 {
				pinctrl-names = "default";
				pinctrl-0 = <&duart_pins_a>;
				status = "okay";
			};
		};
	};

	reg_vddio_sd0: regulator-vddio-sd0 {
		compatible = "regulator-fixed";
		regulator-name = "vddio-sd0";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		gpio = <&gpio3 28 GPIO_ACTIVE_LOW>;
	};

};


code:
/*
 * Copyright 2012 Shawn Guo <shawn.guo@linaro.org>
 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "imx28.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "Ka-Ro electronics TX28 module";
	compatible = "karo,tx28", "fsl,imx28";

	aliases {
		can0 = &can0;
		can1 = &can1;
		display = &display0;
		ds1339 = &ds1339;
		gpio5 = &gpio5;
		lcdif = &lcdif;
		lcdif_23bit_pins = &tx28_lcdif_23bit_pins;
		lcdif_24bit_pins = &lcdif_24bit_pins_a;
		reg_can_xcvr = &reg_can_xcvr;
		spi_gpio = &spi_gpio;
		spi_mxs = &ssp3;
		stk5led = &user_led;
		usbotg = &usb0;
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0x40000000 0>; /* will be filled in by U-Boot */
	};

	onewire {
		compatible = "w1-gpio";
		gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
		status = "disabled";
	};

	reg_usb0_vbus: regulator-usb0-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb0_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb1_vbus: regulator-usb1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_2p5v: regulator-2p5v {
		compatible = "regulator-fixed";
		regulator-name = "2P5V";
		regulator-min-microvolt = <2500000>;
		regulator-max-microvolt = <2500000>;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_can_xcvr: regulator-can-xcvr {
		compatible = "regulator-fixed";
		regulator-name = "CAN XCVR";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&tx28_flexcan_xcvr_pins>;
	};

	reg_lcd: regulator-lcd-power {
		compatible = "regulator-fixed";
		regulator-name = "LCD POWER";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 31 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_lcd_reset: regulator-lcd-reset {
		compatible = "regulator-fixed";
		regulator-name = "LCD RESET";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <300000>;
		enable-active-high;
		regulator-always-on;
		regulator-boot-on;
	};

	mclk: clock-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <26000000>;
	};

	sound {
		compatible = "fsl,imx28-tx28-sgtl5000",
			     "fsl,mxs-audio-sgtl5000";
		model = "imx28-tx28-sgtl5000";
		saif-controllers = <&saif0 &saif1>;
		audio-codec = <&sgtl5000>;
	};

	leds {
		compatible = "gpio-leds";

		user_led: user {
			label = "Heartbeat";
			gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm 0 500000>;
		/*
		 * a silly way to create a 1:1 relationship between the
		 * PWM value and the actual duty cycle
		 */
		brightness-levels = < 0  1  2  3  4  5  6  7  8  9
				     10 11 12 13 14 15 16 17 18 19
				     20 21 22 23 24 25 26 27 28 29
				     30 31 32 33 34 35 36 37 38 39
				     40 41 42 43 44 45 46 47 48 49
				     50 51 52 53 54 55 56 57 58 59
				     60 61 62 63 64 65 66 67 68 69
				     70 71 72 73 74 75 76 77 78 79
				     80 81 82 83 84 85 86 87 88 89
				     90 91 92 93 94 95 96 97 98 99
				    100>;
		default-brightness-level = <50>;
	};

	matrix_keypad: matrix-keypad {
		compatible = "gpio-matrix-keypad";
		col-gpios = <
			&gpio5 0 GPIO_ACTIVE_HIGH
			&gpio5 1 GPIO_ACTIVE_HIGH
			&gpio5 2 GPIO_ACTIVE_HIGH
			&gpio5 3 GPIO_ACTIVE_HIGH
		>;
		row-gpios = <
			&gpio5 4 GPIO_ACTIVE_HIGH
			&gpio5 5 GPIO_ACTIVE_HIGH
			&gpio5 6 GPIO_ACTIVE_HIGH
			&gpio5 7 GPIO_ACTIVE_HIGH
		>;
		/* sample keymap */
		linux,keymap = <
			0x00000074 /* row 0, col 0, KEY_POWER */
			0x00010052 /* row 0, col 1, KEY_KP0 */
			0x0002004f /* row 0, col 2, KEY_KP1 */
			0x00030050 /* row 0, col 3, KEY_KP2 */
			0x01000051 /* row 1, col 0, KEY_KP3 */
			0x0101004b /* row 1, col 1, KEY_KP4 */
			0x0102004c /* row 1, col 2, KEY_KP5 */
			0x0103004d /* row 1, col 3, KEY_KP6 */
			0x02000047 /* row 2, col 0, KEY_KP7 */
			0x02010048 /* row 2, col 1, KEY_KP8 */
			0x02020049 /* row 2, col 2, KEY_KP9 */
		>;
		gpio-activelow;
		wakeup-source;
		debounce-delay-ms = <100>;
		col-scan-delay-us = <5000>;
		linux,no-autorepeat;
	};

	spi_gpio: spi {
		compatible = "spi-gpio";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&tx28_spi_gpio_pins>;

		gpio-sck = <&gpio2 24 GPIO_ACTIVE_HIGH>;
		gpio-mosi = <&gpio2 25 GPIO_ACTIVE_HIGH>;
		gpio-miso = <&gpio2 26 GPIO_ACTIVE_HIGH>;
		num-chipselects = <3>;
		cs-gpios = <
			&gpio2 27 GPIO_ACTIVE_LOW
			&gpio3 8 GPIO_ACTIVE_LOW
			&gpio3 9 GPIO_ACTIVE_LOW
		>;
		/* enable this and disable ssp3 below, if you need full duplex SPI transfer */
		status = "disabled";
	};
};

/* 2nd TX-Std UART - (A)UART1  */
&auart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&auart1_pins_a>;
	status = "okay";
};

/* 3rd TX-Std UART - (A)UART3  */
&auart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&auart3_pins_a>;
	status = "okay";
};

&can0 {
	pinctrl-names = "default";
	pinctrl-0 = <&can0_pins_a>;
	xceiver-supply = <&reg_can_xcvr>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&can1_pins_a>;
	xceiver-supply = <&reg_can_xcvr>;
	status = "okay";
};

&digctl {
	status = "okay";
};

/* 1st TX-Std UART - (D)UART */
&duart {
	pinctrl-names = "default";
	pinctrl-0 = <&duart_4pins_a>;
	status = "okay";
};

&gpmi {
	pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
	nand-on-flash-bbt;
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins_a>;
	clock-frequency = <400000>;
	status = "okay";

	sgtl5000: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
		clocks = <&mclk>;
	};

	gpio5: pca953x@20 {
		compatible = "nxp,pca9554";
		reg = <0x20>;
		pinctrl-names = "default";
		pinctrl-0 = <&tx28_pca9554_pins>;
		interrupt-parent = <&gpio3>;
		interrupts = <28 IRQ_TYPE_NONE>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	polytouch: edt-ft5x06@38 {
		compatible = "edt,edt-ft5x06";
		reg = <0x38>;
		pinctrl-names = "default";
		pinctrl-0 = <&tx28_edt_ft5x06_pins>;
		interrupt-parent = <&gpio2>;
		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
		reset-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
		wake-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
		wakeup-source;
	};

	touchscreen: tsc2007@48 {
		compatible = "ti,tsc2007";
		reg = <0x48>;
		pinctrl-names = "default";
		pinctrl-0 = <&tx28_tsc2007_pins>;
		interrupt-parent = <&gpio3>;
		interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
		pendown-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
		ti,x-plate-ohms = /bits/ 16 <660>;
	};

	ds1339: rtc@68 {
		compatible = "dallas,ds1339";
		reg = <0x68>;
		trickle-resistor-ohms = <250>;
		trickle-diode-disable;
	};
};

&lcdif {
	pinctrl-names = "default";
	pinctrl-0 = <&lcdif_24bit_pins_a &lcdif_sync_pins_a &tx28_lcdif_ctrl_pins>;
	lcd-supply = <&reg_lcd>;
	display = <&display0>;
	status = "okay";

	display0: display0 {
		bits-per-pixel = <32>;
		bus-width = <24>;
		display-timings {
			native-mode = <&timing5>;
			timing0: timing0 {
				panel-name = "VGA";
				clock-frequency = <25175000>;
				hactive = <640>;
				vactive = <480>;
				hback-porch = <48>;
				hsync-len = <96>;
				hfront-porch = <16>;
				vback-porch = <33>;
				vsync-len = <2>;
				vfront-porch = <10>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <1>;
			};

			timing1: timing1 {
				panel-name = "ETV570";
				clock-frequency = <25175000>;
				hactive = <640>;
				vactive = <480>;
				hback-porch = <114>;
				hsync-len = <30>;
				hfront-porch = <16>;
				vback-porch = <32>;
				vsync-len = <3>;
				vfront-porch = <10>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <1>;
			};

			timing2: timing2 {
				panel-name = "ET0350";
				clock-frequency = <6500000>;
				hactive = <320>;
				vactive = <240>;
				hback-porch = <34>;
				hsync-len = <34>;
				hfront-porch = <20>;
				vback-porch = <15>;
				vsync-len = <3>;
				vfront-porch = <4>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <1>;
			};

			timing3: timing3 {
				panel-name = "ET0430";
				clock-frequency = <9000000>;
				hactive = <480>;
				vactive = <272>;
				hback-porch = <2>;
				hsync-len = <41>;
				hfront-porch = <2>;
				vback-porch = <2>;
				vsync-len = <10>;
				vfront-porch = <2>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <1>;
			};

			timing4: timing4 {
				panel-name = "ET0500", "ET0700";
				clock-frequency = <33260000>;
				hactive = <800>;
				vactive = <480>;
				hback-porch = <88>;
				hsync-len = <128>;
				hfront-porch = <40>;
				vback-porch = <33>;
				vsync-len = <2>;
				vfront-porch = <10>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <1>;
			};

			timing5: timing5 {
				panel-name = "ETQ570";
				clock-frequency = <6400000>;
				hactive = <320>;
				vactive = <240>;
				hback-porch = <38>;
				hsync-len = <30>;
				hfront-porch = <30>;
				vback-porch = <16>;
				vsync-len = <3>;
				vfront-porch = <4>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <1>;
			};
		};
	};
};

&lradc {
	fsl,lradc-touchscreen-wires = <4>;
	status = "okay";
};

&mac0 {
	phy-mode = "rmii";
	pinctrl-names = "default", "gpio_mode";
	pinctrl-0 = <&mac0_pins_a>;
	pinctrl-1 = <&tx28_mac0_pins_gpio>;
	status = "okay";
};

&mac1 {
	phy-mode = "rmii";
	pinctrl-names = "default";
	pinctrl-0 = <&mac1_pins_a>;
	/* not enabled by default */
};

&mxs_rtc {
	status = "okay";
};

&ocotp {
	status = "okay";
};

&pwm {
	pinctrl-names = "default";
	pinctrl-0 = <&pwm0_pins_a>;
	status = "okay";
};

&pinctrl {
	pinctrl-names = "default";
	pinctrl-0 = <&hog_pins_a>;

	hog_pins_a: hog@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_ENET0_RXD3__GPIO_4_10 /* module LED */
		>;
		fsl,drive-strength = <MXS_DRIVE_4mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_edt_ft5x06_pins: tx28-edt-ft5x06-pins@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_SSP0_DATA6__GPIO_2_6 /* RESET */
			MX28_PAD_SSP0_DATA5__GPIO_2_5 /* IRQ */
			MX28_PAD_ENET0_RXD2__GPIO_4_9 /* WAKE */
		>;
		fsl,drive-strength = <MXS_DRIVE_4mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_flexcan_xcvr_pins: tx28-flexcan-xcvr-pins@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_LCD_D00__GPIO_1_0
		>;
		fsl,drive-strength = <MXS_DRIVE_4mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_lcdif_23bit_pins: tx28-lcdif-23bit@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			/* LCD_D00 may be used as Flexcan Transceiver Enable on STK5-V5 */
			MX28_PAD_LCD_D01__LCD_D1
			MX28_PAD_LCD_D02__LCD_D2
			MX28_PAD_LCD_D03__LCD_D3
			MX28_PAD_LCD_D04__LCD_D4
			MX28_PAD_LCD_D05__LCD_D5
			MX28_PAD_LCD_D06__LCD_D6
			MX28_PAD_LCD_D07__LCD_D7
			MX28_PAD_LCD_D08__LCD_D8
			MX28_PAD_LCD_D09__LCD_D9
			MX28_PAD_LCD_D10__LCD_D10
			MX28_PAD_LCD_D11__LCD_D11
			MX28_PAD_LCD_D12__LCD_D12
			MX28_PAD_LCD_D13__LCD_D13
			MX28_PAD_LCD_D14__LCD_D14
			MX28_PAD_LCD_D15__LCD_D15
			MX28_PAD_LCD_D16__LCD_D16
			MX28_PAD_LCD_D17__LCD_D17
			MX28_PAD_LCD_D18__LCD_D18
			MX28_PAD_LCD_D19__LCD_D19
			MX28_PAD_LCD_D20__LCD_D20
			MX28_PAD_LCD_D21__LCD_D21
			MX28_PAD_LCD_D22__LCD_D22
			MX28_PAD_LCD_D23__LCD_D23
		>;
		fsl,drive-strength = <MXS_DRIVE_4mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_lcdif_ctrl_pins: tx28-lcdif-ctrl@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_LCD_ENABLE__GPIO_1_31 /* Enable */
			MX28_PAD_LCD_RESET__GPIO_3_30  /* Reset */
		>;
		fsl,drive-strength = <MXS_DRIVE_4mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_mac0_pins_gpio: tx28-mac0-gpio-pins@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_ENET0_MDC__GPIO_4_0
			MX28_PAD_ENET0_MDIO__GPIO_4_1
			MX28_PAD_ENET0_RX_EN__GPIO_4_2
			MX28_PAD_ENET0_RXD0__GPIO_4_3
			MX28_PAD_ENET0_RXD1__GPIO_4_4
			MX28_PAD_ENET0_TX_EN__GPIO_4_6
			MX28_PAD_ENET0_TXD0__GPIO_4_7
			MX28_PAD_ENET0_TXD1__GPIO_4_8
			MX28_PAD_ENET_CLK__GPIO_4_16
		>;
		fsl,drive-strength = <MXS_DRIVE_4mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_pca9554_pins: tx28-pca9554-pins@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_PWM3__GPIO_3_28
		>;
		fsl,drive-strength = <MXS_DRIVE_4mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_spi_gpio_pins: spi-gpiogrp@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_AUART2_RX__GPIO_3_8
			MX28_PAD_AUART2_TX__GPIO_3_9
			MX28_PAD_SSP3_SCK__GPIO_2_24
			MX28_PAD_SSP3_MOSI__GPIO_2_25
			MX28_PAD_SSP3_MISO__GPIO_2_26
			MX28_PAD_SSP3_SS0__GPIO_2_27
		>;
		fsl,drive-strength = <MXS_DRIVE_8mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_tsc2007_pins: tx28-tsc2007-pins@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_SAIF0_MCLK__GPIO_3_20 /* TSC2007 IRQ */
		>;
		fsl,drive-strength = <MXS_DRIVE_4mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_usbphy0_pins: tx28-usbphy0-pins@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_GPMI_CE2N__GPIO_0_18 /* USBOTG_VBUSEN */
			MX28_PAD_GPMI_CE3N__GPIO_0_19 /* USBOTH_OC */
		>;
		fsl,drive-strength = <MXS_DRIVE_12mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	tx28_usbphy1_pins: tx28-usbphy1-pins@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_SPDIF__GPIO_3_27 /* USBH_VBUSEN */
			MX28_PAD_JTAG_RTCK__GPIO_4_20 /* USBH_OC */
		>;
		fsl,drive-strength = <MXS_DRIVE_12mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};
};

&saif0 {
	pinctrl-names = "default";
	pinctrl-0 = <&saif0_pins_b>;
	fsl,saif-master;
	status = "okay";
};

&saif1 {
	pinctrl-names = "default";
	pinctrl-0 = <&saif1_pins_a>;
	status = "okay";
};

&ssp0 {
	compatible = "fsl,imx28-mmc";
	pinctrl-names = "default", "special";
	pinctrl-0 = <&mmc0_4bit_pins_a
		     &mmc0_cd_cfg
		     &mmc0_sck_cfg>;
	bus-width = <4>;
	status = "okay";
};

&ssp3 {
	compatible = "fsl,imx28-spi";
	pinctrl-names = "default";
	pinctrl-0 = <&spi3_pins_a>;
	clock-frequency = <57600000>;
	status = "okay";
};

&usb0 {
	vbus-supply = <&reg_usb0_vbus>;
	disable-over-current;
	dr_mode = "peripheral";
	status = "okay";
};

&usb1 {
	vbus-supply = <&reg_usb1_vbus>;
	disable-over-current;
	dr_mode = "host";
	status = "okay";
};

&usbphy0 {
	pinctrl-names = "default";
	pinctrl-0 = <&tx28_usbphy0_pins>;
	phy_type = "utmi";
	status = "okay";
};

&usbphy1 {
	pinctrl-names = "default";
	pinctrl-0 = <&tx28_usbphy1_pins>;
	phy_type = "utmi";
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2021
 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
 */

/dts-v1/;
#include "imx28-lwe.dtsi"

/ {
	compatible = "lwn,imx28-xea", "fsl,imx28";
};

&can0 {
	pinctrl-names = "default";
	pinctrl-0 = <&can1_pins_a>;
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins_b>;
	status = "okay";
};

&pinctrl {
	pinctrl-names = "default";
	pinctrl-0 = <&hog_pins_a &hog_pins_tiva>;

	hog_pins_a: hog@0 {
		reg = <0>;
		fsl,pinmux-ids = <
			MX28_PAD_GPMI_D00__GPIO_0_0
			MX28_PAD_GPMI_D02__GPIO_0_2
			MX28_PAD_GPMI_D05__GPIO_0_5
			MX28_PAD_GPMI_CE1N__GPIO_0_17
			MX28_PAD_GPMI_RDY0__GPIO_0_20
			MX28_PAD_GPMI_RDY1__GPIO_0_21
			MX28_PAD_GPMI_RDY2__GPIO_0_22
			MX28_PAD_GPMI_RDN__GPIO_0_24
			MX28_PAD_GPMI_CLE__GPIO_0_27
			MX28_PAD_LCD_VSYNC__GPIO_1_28
			MX28_PAD_SSP1_SCK__GPIO_2_12
			MX28_PAD_SSP1_CMD__GPIO_2_13
			MX28_PAD_SSP2_SS1__GPIO_2_20
			MX28_PAD_SSP2_SS2__GPIO_2_21
			MX28_PAD_LCD_D00__GPIO_1_0
			MX28_PAD_LCD_D01__GPIO_1_1
			MX28_PAD_LCD_D02__GPIO_1_2
			MX28_PAD_LCD_D03__GPIO_1_3
			MX28_PAD_LCD_D04__GPIO_1_4
			MX28_PAD_LCD_D05__GPIO_1_5
			MX28_PAD_LCD_D06__GPIO_1_6
		>;
		fsl,drive-strength = <MXS_DRIVE_4mA>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	hog_pins_tiva: hog@1 {
		reg = <1>;
		fsl,pinmux-ids = <
			MX28_PAD_GPMI_RDY3__GPIO_0_23
			MX28_PAD_GPMI_WRN__GPIO_0_25
		>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};

	hog_pins_coding: hog@2 {
		reg = <2>;
		fsl,pinmux-ids = <
			MX28_PAD_GPMI_D01__GPIO_0_1
			MX28_PAD_GPMI_D03__GPIO_0_3
			MX28_PAD_GPMI_D04__GPIO_0_4
			MX28_PAD_GPMI_D06__GPIO_0_6
			MX28_PAD_GPMI_D07__GPIO_0_7
		>;
		fsl,voltage = <MXS_VOLTAGE_HIGH>;
		fsl,pull-up = <MXS_PULL_DISABLE>;
	};
};

&reg_fec_3v3 {
	gpio = <&gpio0 0 0>;
};

&reg_usb_5v {
	gpio = <&gpio0 2 0>;
};

&spi2_pins_a {
	fsl,pinmux-ids = <
		MX28_PAD_SSP2_SCK__SSP2_SCK
		MX28_PAD_SSP2_MOSI__SSP2_CMD
		MX28_PAD_SSP2_MISO__SSP2_D0
		MX28_PAD_SSP2_SS0__GPIO_2_19
	>;
};


code:
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.

#include <dt-bindings/gpio/gpio.h>
#include "imx28-pinfunc.h"

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	interrupt-parent = <&icoll>;
	/*
	 * The decompressor and also some bootloaders rely on a
	 * pre-existing /chosen node to be available to insert the
	 * command line and merge other ATAGS info.
	 */
	chosen {};

	aliases {
		ethernet0 = &mac0;
		ethernet1 = &mac1;
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		saif0 = &saif0;
		saif1 = &saif1;
		serial0 = &auart0;
		serial1 = &auart1;
		serial2 = &auart2;
		serial3 = &auart3;
		serial4 = &auart4;
		spi0 = &ssp1;
		spi1 = &ssp2;
		usbphy0 = &usbphy0;
		usbphy1 = &usbphy1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3c900>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx28-icoll", "fsl,icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			hsadc: hsadc@80002000 {
				reg = <0x80002000 0x2000>;
				interrupts = <13>;
				dmas = <&dma_apbh 12>;
				dma-names = "rx";
				status = "disabled";
			};

			dma_apbh: dma-apbh@80004000 {
				compatible = "fsl,imx28-dma-apbh";
				reg = <0x80004000 0x2000>;
				interrupts = <82 83 84 85
					      88 88 88 88
					      88 88 88 88
					      87 86 0 0>;
				interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
						  "gpmi0", "gmpi1", "gpmi2", "gmpi3",
						  "gpmi4", "gmpi5", "gpmi6", "gmpi7",
						  "hsadc", "lcdif", "empty", "empty";
				#dma-cells = <1>;
				dma-channels = <16>;
				clocks = <&clks 25>;
			};

			perfmon: perfmon@80006000 {
				reg = <0x80006000 0x800>;
				interrupts = <27>;
				status = "disabled";
			};

			gpmi: nand-controller@8000c000 {
				compatible = "fsl,imx28-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <41>;
				interrupt-names = "bch";
				clocks = <&clks 50>;
				clock-names = "gpmi_io";
				assigned-clocks = <&clks 13>;
				assigned-clock-parents = <&clks 10>;
				dmas = <&dma_apbh 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp0: spi@80010000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x80010000 0x2000>;
				interrupts = <96>;
				clocks = <&clks 46>;
				dmas = <&dma_apbh 0>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp1: spi@80012000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x80012000 0x2000>;
				interrupts = <97>;
				clocks = <&clks 47>;
				dmas = <&dma_apbh 1>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp2: spi@80014000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x80014000 0x2000>;
				interrupts = <98>;
				clocks = <&clks 48>;
				dmas = <&dma_apbh 2>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp3: spi@80016000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x80016000 0x2000>;
				interrupts = <99>;
				clocks = <&clks 49>;
				dmas = <&dma_apbh 3>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			pinctrl: pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					reg = <0>;
					interrupts = <127>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					reg = <1>;
					interrupts = <126>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					reg = <2>;
					interrupts = <125>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio3: gpio@3 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					reg = <3>;
					interrupts = <124>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio4: gpio@4 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					reg = <4>;
					interrupts = <123>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_PWM0__DUART_RX
						MX28_PAD_PWM1__DUART_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				duart_pins_b: duart@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART0_CTS__DUART_RX
						MX28_PAD_AUART0_RTS__DUART_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				duart_4pins_a: duart-4pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART0_CTS__DUART_RX
						MX28_PAD_AUART0_RTS__DUART_TX
						MX28_PAD_AUART0_RX__DUART_CTS
						MX28_PAD_AUART0_TX__DUART_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_GPMI_D00__GPMI_D0
						MX28_PAD_GPMI_D01__GPMI_D1
						MX28_PAD_GPMI_D02__GPMI_D2
						MX28_PAD_GPMI_D03__GPMI_D3
						MX28_PAD_GPMI_D04__GPMI_D4
						MX28_PAD_GPMI_D05__GPMI_D5
						MX28_PAD_GPMI_D06__GPMI_D6
						MX28_PAD_GPMI_D07__GPMI_D7
						MX28_PAD_GPMI_CE0N__GPMI_CE0N
						MX28_PAD_GPMI_RDY0__GPMI_READY0
						MX28_PAD_GPMI_RDN__GPMI_RDN
						MX28_PAD_GPMI_WRN__GPMI_WRN
						MX28_PAD_GPMI_ALE__GPMI_ALE
						MX28_PAD_GPMI_CLE__GPMI_CLE
						MX28_PAD_GPMI_RESETN__GPMI_RESETN
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_status_cfg: gpmi-status-cfg@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_GPMI_RDN__GPMI_RDN
						MX28_PAD_GPMI_WRN__GPMI_WRN
						MX28_PAD_GPMI_RESETN__GPMI_RESETN
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART0_RX__AUART0_RX
						MX28_PAD_AUART0_TX__AUART0_TX
						MX28_PAD_AUART0_CTS__AUART0_CTS
						MX28_PAD_AUART0_RTS__AUART0_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART0_RX__AUART0_RX
						MX28_PAD_AUART0_TX__AUART0_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart1_pins_a: auart1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART1_RX__AUART1_RX
						MX28_PAD_AUART1_TX__AUART1_TX
						MX28_PAD_AUART1_CTS__AUART1_CTS
						MX28_PAD_AUART1_RTS__AUART1_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart1_2pins_a: auart1-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART1_RX__AUART1_RX
						MX28_PAD_AUART1_TX__AUART1_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart2_2pins_a: auart2-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP2_SCK__AUART2_RX
						MX28_PAD_SSP2_MOSI__AUART2_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart2_2pins_b: auart2-2pins@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART2_RX__AUART2_RX
						MX28_PAD_AUART2_TX__AUART2_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart2_pins_a: auart2-pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART2_RX__AUART2_RX
						MX28_PAD_AUART2_TX__AUART2_TX
						MX28_PAD_AUART2_CTS__AUART2_CTS
						MX28_PAD_AUART2_RTS__AUART2_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart3_pins_a: auart3@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART3_RX__AUART3_RX
						MX28_PAD_AUART3_TX__AUART3_TX
						MX28_PAD_AUART3_CTS__AUART3_CTS
						MX28_PAD_AUART3_RTS__AUART3_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart3_2pins_a: auart3-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP2_MISO__AUART3_RX
						MX28_PAD_SSP2_SS0__AUART3_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart3_2pins_b: auart3-2pins@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART3_RX__AUART3_RX
						MX28_PAD_AUART3_TX__AUART3_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart4_2pins_a: auart4@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP3_SCK__AUART4_TX
						MX28_PAD_SSP3_MOSI__AUART4_RX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart4_2pins_b: auart4@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART0_CTS__AUART4_RX
						MX28_PAD_AUART0_RTS__AUART4_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mac0_pins_a: mac0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_ENET0_MDC__ENET0_MDC
						MX28_PAD_ENET0_MDIO__ENET0_MDIO
						MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
						MX28_PAD_ENET0_RXD0__ENET0_RXD0
						MX28_PAD_ENET0_RXD1__ENET0_RXD1
						MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
						MX28_PAD_ENET0_TXD0__ENET0_TXD0
						MX28_PAD_ENET0_TXD1__ENET0_TXD1
						MX28_PAD_ENET_CLK__CLKCTRL_ENET
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mac0_pins_b: mac0@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_ENET0_MDC__ENET0_MDC
						MX28_PAD_ENET0_MDIO__ENET0_MDIO
						MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
						MX28_PAD_ENET0_RXD0__ENET0_RXD0
						MX28_PAD_ENET0_RXD1__ENET0_RXD1
						MX28_PAD_ENET0_RXD2__ENET0_RXD2
						MX28_PAD_ENET0_RXD3__ENET0_RXD3
						MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
						MX28_PAD_ENET0_TXD0__ENET0_TXD0
						MX28_PAD_ENET0_TXD1__ENET0_TXD1
						MX28_PAD_ENET0_TXD2__ENET0_TXD2
						MX28_PAD_ENET0_TXD3__ENET0_TXD3
						MX28_PAD_ENET_CLK__CLKCTRL_ENET
						MX28_PAD_ENET0_COL__ENET0_COL
						MX28_PAD_ENET0_CRS__ENET0_CRS
						MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK
						MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK
						>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mac1_pins_a: mac1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_ENET0_CRS__ENET1_RX_EN
						MX28_PAD_ENET0_RXD2__ENET1_RXD0
						MX28_PAD_ENET0_RXD3__ENET1_RXD1
						MX28_PAD_ENET0_COL__ENET1_TX_EN
						MX28_PAD_ENET0_TXD2__ENET1_TXD0
						MX28_PAD_ENET0_TXD3__ENET1_TXD1
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP0_DATA0__SSP0_D0
						MX28_PAD_SSP0_DATA1__SSP0_D1
						MX28_PAD_SSP0_DATA2__SSP0_D2
						MX28_PAD_SSP0_DATA3__SSP0_D3
						MX28_PAD_SSP0_DATA4__SSP0_D4
						MX28_PAD_SSP0_DATA5__SSP0_D5
						MX28_PAD_SSP0_DATA6__SSP0_D6
						MX28_PAD_SSP0_DATA7__SSP0_D7
						MX28_PAD_SSP0_CMD__SSP0_CMD
						MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
						MX28_PAD_SSP0_SCK__SSP0_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP0_DATA0__SSP0_D0
						MX28_PAD_SSP0_DATA1__SSP0_D1
						MX28_PAD_SSP0_DATA2__SSP0_D2
						MX28_PAD_SSP0_DATA3__SSP0_D3
						MX28_PAD_SSP0_CMD__SSP0_CMD
						MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
						MX28_PAD_SSP0_SCK__SSP0_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_cd_cfg: mmc0-cd-cfg@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
					>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mmc0_sck_cfg: mmc0-sck-cfg@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP0_SCK__SSP0_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mmc1_4bit_pins_a: mmc1-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_GPMI_D00__SSP1_D0
						MX28_PAD_GPMI_D01__SSP1_D1
						MX28_PAD_GPMI_D02__SSP1_D2
						MX28_PAD_GPMI_D03__SSP1_D3
						MX28_PAD_GPMI_RDY1__SSP1_CMD
						MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
						MX28_PAD_GPMI_WRN__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc1_cd_cfg: mmc1-cd-cfg@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
					>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mmc1_sck_cfg: mmc1-sck-cfg@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_GPMI_WRN__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mmc2_4bit_pins_a: mmc2-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP0_DATA4__SSP2_D0
						MX28_PAD_SSP1_SCK__SSP2_D1
						MX28_PAD_SSP1_CMD__SSP2_D2
						MX28_PAD_SSP0_DATA5__SSP2_D3
						MX28_PAD_SSP0_DATA6__SSP2_CMD
						MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
						MX28_PAD_SSP0_DATA7__SSP2_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc2_4bit_pins_b: mmc2-4bit@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP2_SCK__SSP2_SCK
						MX28_PAD_SSP2_MOSI__SSP2_CMD
						MX28_PAD_SSP2_MISO__SSP2_D0
						MX28_PAD_SSP2_SS0__SSP2_D3
						MX28_PAD_SSP2_SS1__SSP2_D1
						MX28_PAD_SSP2_SS2__SSP2_D2
						MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc2_cd_cfg: mmc2-cd-cfg@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
					>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mmc2_sck_cfg_a: mmc2-sck-cfg@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP0_DATA7__SSP2_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mmc2_sck_cfg_b: mmc2-sck-cfg@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP2_SCK__SSP2_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				i2c0_pins_a: i2c0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_I2C0_SCL__I2C0_SCL
						MX28_PAD_I2C0_SDA__I2C0_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c0_pins_b: i2c0@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART0_RX__I2C0_SCL
						MX28_PAD_AUART0_TX__I2C0_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c1_pins_a: i2c1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_PWM0__I2C1_SCL
						MX28_PAD_PWM1__I2C1_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c1_pins_b: i2c1@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART2_CTS__I2C1_SCL
						MX28_PAD_AUART2_RTS__I2C1_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				saif0_pins_a: saif0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SAIF0_MCLK__SAIF0_MCLK
						MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
						MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
						MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				saif0_pins_b: saif0@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
						MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
						MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				saif1_pins_a: saif1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				pwm0_pins_a: pwm0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_PWM0__PWM_0
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_PWM2__PWM_2
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				pwm3_pins_a: pwm3@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_PWM3__PWM_3
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				pwm3_pins_b: pwm3@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_SAIF0_MCLK__PWM_3
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				pwm4_pins_a: pwm4@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_PWM4__PWM_4
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_LCD_D00__LCD_D0
						MX28_PAD_LCD_D01__LCD_D1
						MX28_PAD_LCD_D02__LCD_D2
						MX28_PAD_LCD_D03__LCD_D3
						MX28_PAD_LCD_D04__LCD_D4
						MX28_PAD_LCD_D05__LCD_D5
						MX28_PAD_LCD_D06__LCD_D6
						MX28_PAD_LCD_D07__LCD_D7
						MX28_PAD_LCD_D08__LCD_D8
						MX28_PAD_LCD_D09__LCD_D9
						MX28_PAD_LCD_D10__LCD_D10
						MX28_PAD_LCD_D11__LCD_D11
						MX28_PAD_LCD_D12__LCD_D12
						MX28_PAD_LCD_D13__LCD_D13
						MX28_PAD_LCD_D14__LCD_D14
						MX28_PAD_LCD_D15__LCD_D15
						MX28_PAD_LCD_D16__LCD_D16
						MX28_PAD_LCD_D17__LCD_D17
						MX28_PAD_LCD_D18__LCD_D18
						MX28_PAD_LCD_D19__LCD_D19
						MX28_PAD_LCD_D20__LCD_D20
						MX28_PAD_LCD_D21__LCD_D21
						MX28_PAD_LCD_D22__LCD_D22
						MX28_PAD_LCD_D23__LCD_D23
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				lcdif_18bit_pins_a: lcdif-18bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_LCD_D00__LCD_D0
						MX28_PAD_LCD_D01__LCD_D1
						MX28_PAD_LCD_D02__LCD_D2
						MX28_PAD_LCD_D03__LCD_D3
						MX28_PAD_LCD_D04__LCD_D4
						MX28_PAD_LCD_D05__LCD_D5
						MX28_PAD_LCD_D06__LCD_D6
						MX28_PAD_LCD_D07__LCD_D7
						MX28_PAD_LCD_D08__LCD_D8
						MX28_PAD_LCD_D09__LCD_D9
						MX28_PAD_LCD_D10__LCD_D10
						MX28_PAD_LCD_D11__LCD_D11
						MX28_PAD_LCD_D12__LCD_D12
						MX28_PAD_LCD_D13__LCD_D13
						MX28_PAD_LCD_D14__LCD_D14
						MX28_PAD_LCD_D15__LCD_D15
						MX28_PAD_LCD_D16__LCD_D16
						MX28_PAD_LCD_D17__LCD_D17
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				lcdif_16bit_pins_a: lcdif-16bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_LCD_D00__LCD_D0
						MX28_PAD_LCD_D01__LCD_D1
						MX28_PAD_LCD_D02__LCD_D2
						MX28_PAD_LCD_D03__LCD_D3
						MX28_PAD_LCD_D04__LCD_D4
						MX28_PAD_LCD_D05__LCD_D5
						MX28_PAD_LCD_D06__LCD_D6
						MX28_PAD_LCD_D07__LCD_D7
						MX28_PAD_LCD_D08__LCD_D8
						MX28_PAD_LCD_D09__LCD_D9
						MX28_PAD_LCD_D10__LCD_D10
						MX28_PAD_LCD_D11__LCD_D11
						MX28_PAD_LCD_D12__LCD_D12
						MX28_PAD_LCD_D13__LCD_D13
						MX28_PAD_LCD_D14__LCD_D14
						MX28_PAD_LCD_D15__LCD_D15
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				lcdif_sync_pins_a: lcdif-sync@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_LCD_RS__LCD_DOTCLK
						MX28_PAD_LCD_CS__LCD_ENABLE
						MX28_PAD_LCD_RD_E__LCD_VSYNC
						MX28_PAD_LCD_WR_RWN__LCD_HSYNC
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				can0_pins_a: can0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_GPMI_RDY2__CAN0_TX
						MX28_PAD_GPMI_RDY3__CAN0_RX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				can1_pins_a: can1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_GPMI_CE2N__CAN1_TX
						MX28_PAD_GPMI_CE3N__CAN1_RX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				spi2_pins_a: spi2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP2_SCK__SSP2_SCK
						MX28_PAD_SSP2_MOSI__SSP2_CMD
						MX28_PAD_SSP2_MISO__SSP2_D0
						MX28_PAD_SSP2_SS0__SSP2_D3
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				spi3_pins_a: spi3@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART2_RX__SSP3_D4
						MX28_PAD_AUART2_TX__SSP3_D5
						MX28_PAD_SSP3_SCK__SSP3_SCK
						MX28_PAD_SSP3_MOSI__SSP3_CMD
						MX28_PAD_SSP3_MISO__SSP3_D0
						MX28_PAD_SSP3_SS0__SSP3_D3
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				spi3_pins_b: spi3@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP3_SCK__SSP3_SCK
						MX28_PAD_SSP3_MOSI__SSP3_CMD
						MX28_PAD_SSP3_MISO__SSP3_D0
						MX28_PAD_SSP3_SS0__SSP3_D3
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				usb0_pins_a: usb0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP2_SS2__USB0_OVERCURRENT
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				usb0_pins_b: usb0@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART1_CTS__USB0_OVERCURRENT
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				usb1_pins_a: usb1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_SSP2_SS1__USB1_OVERCURRENT
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				usb1_pins_b: usb1@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX28_PAD_PWM2__USB1_OVERCURRENT
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				usb0_id_pins_a: usb0id@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_AUART1_RTS__USB0_ID
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				usb0_id_pins_b: usb0id1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX28_PAD_PWM2__USB0_ID
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

			};

			digctl: digctl@8001c000 {
				compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
				reg = <0x8001c000 0x2000>;
				interrupts = <89>;
				status = "disabled";
			};

			etm: etm@80022000 {
				reg = <0x80022000 0x2000>;
				status = "disabled";
			};

			dma_apbx: dma-apbx@80024000 {
				compatible = "fsl,imx28-dma-apbx";
				reg = <0x80024000 0x2000>;
				interrupts = <78 79 66 0
					      80 81 68 69
					      70 71 72 73
					      74 75 76 77>;
				interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
						  "saif0", "saif1", "i2c0", "i2c1",
						  "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
						  "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
				#dma-cells = <1>;
				dma-channels = <16>;
				clocks = <&clks 26>;
			};

			dcp: crypto@80028000 {
				compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
				reg = <0x80028000 0x2000>;
				interrupts = <52 53 54>;
				status = "okay";
			};

			pxp: pxp@8002a000 {
				reg = <0x8002a000 0x2000>;
				interrupts = <39>;
				status = "disabled";
			};

			ocotp: efuse@8002c000 {
				compatible = "fsl,imx28-ocotp", "fsl,ocotp";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8002c000 0x2000>;
				clocks = <&clks 25>;
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 0x2000>;
				status = "disabled";
			};

			lcdif: lcdif@80030000 {
				compatible = "fsl,imx28-lcdif";
				reg = <0x80030000 0x2000>;
				interrupts = <38>;
				clocks = <&clks 55>;
				dmas = <&dma_apbh 13>;
				dma-names = "rx";
				status = "disabled";
			};

			can0: can@80032000 {
				compatible = "fsl,imx28-flexcan";
				reg = <0x80032000 0x2000>;
				interrupts = <8>;
				clocks = <&clks 58>, <&clks 58>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			can1: can@80034000 {
				compatible = "fsl,imx28-flexcan";
				reg = <0x80034000 0x2000>;
				interrupts = <9>;
				clocks = <&clks 59>, <&clks 59>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			simdbg: simdbg@8003c000 {
				reg = <0x8003c000 0x200>;
				status = "disabled";
			};

			simgpmisel: simgpmisel@8003c200 {
				reg = <0x8003c200 0x100>;
				status = "disabled";
			};

			simsspsel: simsspsel@8003c300 {
				reg = <0x8003c300 0x100>;
				status = "disabled";
			};

			simmemsel: simmemsel@8003c400 {
				reg = <0x8003c400 0x100>;
				status = "disabled";
			};

			gpiomon: gpiomon@8003c500 {
				reg = <0x8003c500 0x100>;
				status = "disabled";
			};

			simenet: simenet@8003c700 {
				reg = <0x8003c700 0x100>;
				status = "disabled";
			};

			armjtag: armjtag@8003c800 {
				reg = <0x8003c800 0x100>;
				status = "disabled";
			};
		};

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clks: clkctrl@80040000 {
				compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
				reg = <0x80040000 0x2000>;
				#clock-cells = <1>;
			};

			saif0: saif@80042000 {
				#sound-dai-cells = <0>;
				compatible = "fsl,imx28-saif";
				reg = <0x80042000 0x2000>;
				interrupts = <59>;
				#clock-cells = <0>;
				clocks = <&clks 53>;
				dmas = <&dma_apbx 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			power: power@80044000 {
				reg = <0x80044000 0x2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				#sound-dai-cells = <0>;
				compatible = "fsl,imx28-saif";
				reg = <0x80046000 0x2000>;
				interrupts = <58>;
				clocks = <&clks 54>;
				dmas = <&dma_apbx 5>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			lradc: lradc@80050000 {
				compatible = "fsl,imx28-lradc";
				reg = <0x80050000 0x2000>;
				interrupts = <10 14 15 16 17 18 19
						20 21 22 23 24 25>;
				status = "disabled";
				clocks = <&clks 41>;
				#io-channel-cells = <1>;
			};

			spdif: spdif@80054000 {
				reg = <0x80054000 0x2000>;
				interrupts = <45>;
				dmas = <&dma_apbx 2>;
				dma-names = "tx";
				status = "disabled";
			};

			mxs_rtc: rtc@80056000 {
				compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x80056000 0x2000>;
				interrupts = <29>;
			};

			i2c0: i2c@80058000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
				reg = <0x80058000 0x2000>;
				interrupts = <111>;
				clock-frequency = <100000>;
				dmas = <&dma_apbx 6>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			i2c1: i2c@8005a000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
				reg = <0x8005a000 0x2000>;
				interrupts = <110>;
				clock-frequency = <100000>;
				dmas = <&dma_apbx 7>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
				reg = <0x80064000 0x2000>;
				clocks = <&clks 44>;
				#pwm-cells = <2>;
				fsl,pwm-number = <8>;
				status = "disabled";
			};

			timer: timrot@80068000 {
				compatible = "fsl,imx28-timrot", "fsl,timrot";
				reg = <0x80068000 0x2000>;
				interrupts = <48 49 50 51>;
				clocks = <&clks 26>;
			};

			auart0: serial@8006a000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x8006a000 0x2000>;
				interrupts = <112>;
				dmas = <&dma_apbx 8>, <&dma_apbx 9>;
				dma-names = "rx", "tx";
				clocks = <&clks 45>;
				status = "disabled";
			};

			auart1: serial@8006c000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <113>;
				dmas = <&dma_apbx 10>, <&dma_apbx 11>;
				dma-names = "rx", "tx";
				clocks = <&clks 45>;
				status = "disabled";
			};

			auart2: serial@8006e000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <114>;
				dmas = <&dma_apbx 12>, <&dma_apbx 13>;
				dma-names = "rx", "tx";
				clocks = <&clks 45>;
				status = "disabled";
			};

			auart3: serial@80070000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x80070000 0x2000>;
				interrupts = <115>;
				dmas = <&dma_apbx 14>, <&dma_apbx 15>;
				dma-names = "rx", "tx";
				clocks = <&clks 45>;
				status = "disabled";
			};

			auart4: serial@80072000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x80072000 0x2000>;
				interrupts = <116>;
				dmas = <&dma_apbx 0>, <&dma_apbx 1>;
				dma-names = "rx", "tx";
				clocks = <&clks 45>;
				status = "disabled";
			};

			duart: serial@80074000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80074000 0x1000>;
				interrupts = <47>;
				clocks = <&clks 45>, <&clks 26>;
				clock-names = "uart", "apb_pclk";
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
				reg = <0x8007c000 0x2000>;
				clocks = <&clks 62>;
				status = "disabled";
			};

			usbphy1: usbphy@8007e000 {
				compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
				reg = <0x8007e000 0x2000>;
				clocks = <&clks 63>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usb0: usb@80080000 {
			compatible = "fsl,imx28-usb", "fsl,imx27-usb";
			reg = <0x80080000 0x10000>;
			interrupts = <93>;
			clocks = <&clks 60>;
			fsl,usbphy = <&usbphy0>;
			status = "disabled";
		};

		usb1: usb@80090000 {
			compatible = "fsl,imx28-usb", "fsl,imx27-usb";
			reg = <0x80090000 0x10000>;
			interrupts = <92>;
			clocks = <&clks 61>;
			fsl,usbphy = <&usbphy1>;
			dr_mode = "host";
			status = "disabled";
		};

		dflpt: dflpt@800c0000 {
			reg = <0x800c0000 0x10000>;
			status = "disabled";
		};

		mac0: ethernet@800f0000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f0000 0x4000>;
			interrupts = <101>;
			clocks = <&clks 57>, <&clks 57>, <&clks 64>;
			clock-names = "ipg", "ahb", "enet_out";
			status = "disabled";
		};

		mac1: ethernet@800f4000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f4000 0x4000>;
			interrupts = <102>;
			clocks = <&clks 57>, <&clks 57>;
			clock-names = "ipg", "ahb";
			status = "disabled";
		};

		eth_switch: switch@800f8000 {
			reg = <0x800f8000 0x8000>;
			status = "disabled";
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&lradc 8>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
 */

/dts-v1/;
#include "imx31.dtsi"

/ {
	model = "Buglabs i.MX31 Bug 1.x";
	compatible = "buglabs,imx31-bug", "fsl,imx31";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x8000000>; /* 128M */
	};
};

&uart5 {
	uart-has-rtscts;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>

/dts-v1/;

#include "imx31.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "LogicPD i.MX31 Lite";
	compatible = "logicpd,imx31-lite", "fsl,imx31";

	chosen {
		stdout-path = &uart1;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x8000000>;
	};

	leds {
		compatible = "gpio-leds";

		led0 {
			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
		};

		led1 {
			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
		};
	};
};

&ata {
	status = "okay";
};

&nfc {
	nand-bus-width = <8>;
	nand-ecc-mode = "hw";
	nand-on-flash-bbt;
	status = "okay";
};

&sdhci1 {
	bus-width = <4>;
	cd-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
	wp-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&spi2 {
	status = "okay";

	pmic@0 {
		compatible = "fsl,mc13783";
		reg = <0>;
		spi-cs-high;
		spi-max-frequency = <1000000>;
		interrupt-parent = <&gpio1>;
		interrupts = <3 IRQ_TYPE_EDGE_RISING>;

		fsl,mc13xxx-uses-adc;
		fsl,mc13xxx-uses-rtc;

		regulators {
			sw1a {		/* QVCC */
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1500000>;
				regulator-always-on;
				regulator-boot-on;
			};

			sw1b {		/* QVCC */
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1500000>;
				regulator-always-on;
				regulator-boot-on;
			};

			sw2a {		/* 1.8V_DDR, NVCC2, NVCC21 and NVCC22 */
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				regulator-boot-on;
			};

			sw2b {		/* NVCC10 */
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				regulator-boot-on;
			};

			violo {		/* NVCC1 and NVCC7 */
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				regulator-boot-on;
			};

			viohi {		/* VIOHI */
				regulator-min-microvolt = <2775000>;
				regulator-max-microvolt = <2775000>;
				regulator-always-on;
				regulator-boot-on;
			};

			vaudio {	/* VAUDIO */
				regulator-min-microvolt = <2775000>;
				regulator-max-microvolt = <2775000>;
			};

			vcam {		/* NVCC4 */
				regulator-min-microvolt = <2800000>;
				regulator-max-microvolt = <2800000>;
			};

			vgen {		/* NVCC5 / NVCC8 and NVCC6 / NVCC9 */
				regulator-min-microvolt = <2775000>;
				regulator-max-microvolt = <2775000>;
				regulator-always-on;
				regulator-boot-on;
			};

			vmmc2 {		/* NVCC3 */
				regulator-min-microvolt = <1600000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
				regulator-boot-on;
			};
		};
	};
};

&uart1 {
	uart-has-rtscts;
	status = "okay";
};

/* Routed to the extension board */
&uart2 {
	uart-has-rtscts;
	status = "okay";
};

/* Routed to the extension board */
&uart3 {
	uart-has-rtscts;
	status = "okay";
};

&weim {
	status = "okay";

	nor@0,0 {
		compatible = "cfi-flash";
		reg = <0 0x0 0x200000>;
		bank-width = <2>;
		linux,mtd-name = "physmap-flash.0";
		fsl,weim-cs-timing = <0x0000cf03 0xa0330d01 0x00220800>;
	};

	ethernet@4,0 {
		compatible = "smsc,lan9117", "smsc,lan9115";
		reg = <4 0x0 0x100>;
		interrupt-parent = <&gpio1>;
		interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
		phy-mode = "mii";
		reg-io-width = <2>;
		smsc,irq-push-pull;
		fsl,weim-cs-timing = <0x00008701 0x04000541 0x00010000>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
// Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	/*
	 * The decompressor and also some bootloaders rely on a
	 * pre-existing /chosen node to be available to insert the
	 * command line and merge other ATAGS info.
	 */
	chosen {};

	aliases {
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		spi0 = &spi1;
		spi1 = &spi2;
		spi2 = &spi3;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm1136jf-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	avic: interrupt-controller@68000000 {
		compatible = "fsl,imx31-avic", "fsl,avic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x68000000 0x100000>;
	};

	soc: soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&avic>;
		ranges;

		iram: sram@1fffc000 {
			compatible = "mmio-sram";
			reg = <0x1fffc000 0x4000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x1fffc000 0x4000>;
		};

		aips1: bus@43f00000 { /* AIPS1 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x43f00000 0x100000>;
			ranges;

			i2c1: i2c@43f80000 {
				compatible = "fsl,imx31-i2c", "fsl,imx21-i2c";
				reg = <0x43f80000 0x4000>;
				interrupts = <10>;
				clocks = <&clks 33>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c3: i2c@43f84000 {
				compatible = "fsl,imx31-i2c", "fsl,imx21-i2c";
				reg = <0x43f84000 0x4000>;
				interrupts = <3>;
				clocks = <&clks 35>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			ata: ata@43f8c000 {
				compatible = "fsl,imx31-pata", "fsl,imx27-pata";
				reg = <0x43f8c000 0x4000>;
				interrupts = <15>;
				clocks = <&clks 26>;
				status = "disabled";
			};

			uart1: serial@43f90000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x43f90000 0x4000>;
				interrupts = <45>;
				clocks = <&clks 10>, <&clks 30>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart2: serial@43f94000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x43f94000 0x4000>;
				interrupts = <32>;
				clocks = <&clks 10>, <&clks 31>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			i2c2: i2c@43f98000 {
				compatible = "fsl,imx31-i2c", "fsl,imx21-i2c";
				reg = <0x43f98000 0x4000>;
				interrupts = <4>;
				clocks = <&clks 34>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			spi1: spi@43fa4000 {
				compatible = "fsl,imx31-cspi";
				reg = <0x43fa4000 0x4000>;
				interrupts = <14>;
				clocks = <&clks 10>, <&clks 53>;
				clock-names = "ipg", "per";
				dmas = <&sdma 8 8 0>, <&sdma 9 8 0>;
				dma-names = "rx", "tx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			kpp: kpp@43fa8000 {
				compatible = "fsl,imx31-kpp", "fsl,imx21-kpp";
				reg = <0x43fa8000 0x4000>;
				interrupts = <24>;
				clocks = <&clks 46>;
				status = "disabled";
			};

			uart4: serial@43fb0000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x43fb0000 0x4000>;
				clocks = <&clks 10>, <&clks 49>;
				clock-names = "ipg", "per";
				interrupts = <46>;
				status = "disabled";
			};

			uart5: serial@43fb4000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x43fb4000 0x4000>;
				interrupts = <47>;
				clocks = <&clks 10>, <&clks 50>;
				clock-names = "ipg", "per";
				status = "disabled";
			};
		};

		spba-bus@50000000 {
			compatible = "fsl,spba-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x50000000 0x100000>;
			ranges;

			sdhci1: mmc@50004000 {
				compatible = "fsl,imx31-mmc";
				reg = <0x50004000 0x4000>;
				interrupts = <9>;
				clocks = <&clks 10>, <&clks 20>;
				clock-names = "ipg", "per";
				dmas = <&sdma 20 3 0>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			sdhci2: mmc@50008000 {
				compatible = "fsl,imx31-mmc";
				reg = <0x50008000 0x4000>;
				interrupts = <8>;
				clocks = <&clks 10>, <&clks 21>;
				clock-names = "ipg", "per";
				dmas = <&sdma 21 3 0>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			uart3: serial@5000c000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x5000c000 0x4000>;
				interrupts = <18>;
				clocks = <&clks 10>, <&clks 48>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			spi2: spi@50010000 {
				compatible = "fsl,imx31-cspi";
				reg = <0x50010000 0x4000>;
				interrupts = <13>;
				clocks = <&clks 10>, <&clks 54>;
				clock-names = "ipg", "per";
				dmas = <&sdma 6 8 0>, <&sdma 7 8 0>;
				dma-names = "rx", "tx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			iim: efuse@5001c000 {
				compatible = "fsl,imx31-iim", "fsl,imx27-iim";
				reg = <0x5001c000 0x1000>;
				interrupts = <19>;
				clocks = <&clks 25>;
			};
		};

		bus@53f00000 { /* AIPS2 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x53f00000 0x100000>;
			ranges;

			clks: ccm@53f80000{
				compatible = "fsl,imx31-ccm";
				reg = <0x53f80000 0x4000>;
				interrupts = <31>, <53>;
				#clock-cells = <1>;
			};

			spi3: spi@53f84000 {
				compatible = "fsl,imx31-cspi";
				reg = <0x53f84000 0x4000>;
				interrupts = <17>;
				clocks = <&clks 10>, <&clks 28>;
				clock-names = "ipg", "per";
				dmas = <&sdma 10 8 0>, <&sdma 11 8 0>;
				dma-names = "rx", "tx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			gpt: timer@53f90000 {
				compatible = "fsl,imx31-gpt";
				reg = <0x53f90000 0x4000>;
				interrupts = <29>;
				clocks = <&clks 10>, <&clks 22>;
				clock-names = "ipg", "per";
			};

			gpio3: gpio@53fa4000 {
				compatible = "fsl,imx31-gpio";
				reg = <0x53fa4000 0x4000>;
				interrupts = <56>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			rng@53fb0000 {
				compatible = "fsl,imx31-rnga";
				reg = <0x53fb0000 0x4000>;
				interrupts = <22>;
				clocks = <&clks 29>;
			};

			gpio1: gpio@53fcc000 {
				compatible = "fsl,imx31-gpio";
				reg = <0x53fcc000 0x4000>;
				interrupts = <52>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			gpio2: gpio@53fd0000 {
				compatible = "fsl,imx31-gpio";
				reg = <0x53fd0000 0x4000>;
				interrupts = <51>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			sdma: dma-controller@53fd4000 {
				compatible = "fsl,imx31-sdma";
				reg = <0x53fd4000 0x4000>;
				interrupts = <34>;
				clocks = <&clks 10>, <&clks 27>;
				clock-names = "ipg", "ahb";
				#dma-cells = <3>;
				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx31.bin";
			};

			rtc: rtc@53fd8000 {
				compatible = "fsl,imx31-rtc", "fsl,imx21-rtc";
				reg = <0x53fd8000 0x4000>;
				interrupts = <25>;
				clocks = <&clks 2>, <&clks 40>;
				clock-names = "ref", "ipg";
			};

			wdog: watchdog@53fdc000 {
				compatible = "fsl,imx31-wdt", "fsl,imx21-wdt";
				reg = <0x53fdc000 0x4000>;
				clocks = <&clks 41>;
				interrupts = <55>;
			};

			pwm: pwm@53fe0000 {
				compatible = "fsl,imx31-pwm", "fsl,imx27-pwm";
				reg = <0x53fe0000 0x4000>;
				interrupts = <26>;
				clocks = <&clks 10>, <&clks 42>;
				clock-names = "ipg", "per";
				#pwm-cells = <3>;
				status = "disabled";
			};
		};

		emi@b8000000 { /* External Memory Interface */
			compatible = "simple-bus";
			reg = <0xb8000000 0x5000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;

			nfc: nand@b8000000 {
				compatible = "fsl,imx31-nand", "fsl,imx27-nand";
				reg = <0xb8000000 0x1000>;
				interrupts = <33>;
				clocks = <&clks 9>;
				dmas = <&sdma 30 17 0>;
				dma-names = "rx-tx";
				#address-cells = <1>;
				#size-cells = <1>;
				status = "disabled";
			};

			weim: weim@b8002000 {
				compatible = "fsl,imx31-weim", "fsl,imx27-weim";
				reg = <0xb8002000 0x1000>;
				clocks = <&clks 56>;
				#address-cells = <2>;
				#size-cells = <1>;
				ranges = <0 0 0xa0000000 0x08000000
					  1 0 0xa8000000 0x08000000
					  2 0 0xb0000000 0x02000000
					  3 0 0xb2000000 0x02000000
					  4 0 0xb4000000 0x02000000
					  5 0 0xb6000000 0x02000000>;
				status = "disabled";
			};
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
 */

#include "imx35.dtsi"

/ {
	model = "Eukrea CPUIMX35";
	compatible = "eukrea,cpuimx35", "fsl,imx35";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x8000000>; /* 128M */
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec>;
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pcf8563@51 {
		compatible = "nxp,pcf8563";
		reg = <0x51>;
	};

	tsc2007: tsc2007@48 {
		compatible = "ti,tsc2007";
		gpios = <&gpio3 2 0>;
		interrupt-parent = <&gpio3>;
		interrupts = <0x2 0x8>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_tsc2007_1>;
		reg = <0x48>;
		ti,x-plate-ohms = <180>;
	};
};

&iomuxc {
	imx35-eukrea {
		pinctrl_fec: fecgrp {
			fsl,pins = <
				MX35_PAD_FEC_TX_CLK__FEC_TX_CLK		0x80000000
				MX35_PAD_FEC_RX_CLK__FEC_RX_CLK		0x80000000
				MX35_PAD_FEC_RX_DV__FEC_RX_DV		0x80000000
				MX35_PAD_FEC_COL__FEC_COL		0x80000000
				MX35_PAD_FEC_RDATA0__FEC_RDATA_0	0x80000000
				MX35_PAD_FEC_TDATA0__FEC_TDATA_0	0x80000000
				MX35_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
				MX35_PAD_FEC_MDC__FEC_MDC		0x80000000
				MX35_PAD_FEC_MDIO__FEC_MDIO		0x80000000
				MX35_PAD_FEC_TX_ERR__FEC_TX_ERR		0x80000000
				MX35_PAD_FEC_RX_ERR__FEC_RX_ERR		0x80000000
				MX35_PAD_FEC_CRS__FEC_CRS		0x80000000
				MX35_PAD_FEC_RDATA1__FEC_RDATA_1	0x80000000
				MX35_PAD_FEC_TDATA1__FEC_TDATA_1	0x80000000
				MX35_PAD_FEC_RDATA2__FEC_RDATA_2	0x80000000
				MX35_PAD_FEC_TDATA2__FEC_TDATA_2	0x80000000
				MX35_PAD_FEC_RDATA3__FEC_RDATA_3	0x80000000
				MX35_PAD_FEC_TDATA3__FEC_TDATA_3	0x80000000
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX35_PAD_I2C1_CLK__I2C1_SCL		0x80000000
				MX35_PAD_I2C1_DAT__I2C1_SDA		0x80000000
			>;
		};

		pinctrl_tsc2007_1: tsc2007grp-1 {
			fsl,pins = <MX35_PAD_ATA_DA2__GPIO3_2 0x80000000>;
		};
	};
};

&nfc {
	nand-bus-width = <8>;
	nand-ecc-mode = "hw";
	nand-on-flash-bbt;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "imx35-eukrea-cpuimx35.dtsi"

/ {
	model = "Eukrea CPUIMX35";
	compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35";

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_bp1>;

		button {
			label = "BP1";
			gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_MISC>;
			wakeup-source;
			linux,input-type = <1>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_led1>;

		led1 {
			label = "led1";
			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "heartbeat";
		};
	};

	sound {
		compatible = "eukrea,asoc-tlv320";
		eukrea,model = "imx35-eukrea-tlv320aic23";
		ssi-controller = <&ssi1>;
		fsl,mux-int-port = <1>;
		fsl,mux-ext-port = <4>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&esdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc1>;
	cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&i2c1 {
	tlv320aic23: codec@1a {
		compatible = "ti,tlv320aic23";
		reg = <0x1a>;
	};
};

&iomuxc {
	imx35-eukrea {
		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS	0x80000000
				MX35_PAD_STXD4__AUDMUX_AUD4_TXD		0x80000000
				MX35_PAD_SRXD4__AUDMUX_AUD4_RXD		0x80000000
				MX35_PAD_SCK4__AUDMUX_AUD4_TXC		0x80000000
			>;
		};

		pinctrl_bp1: bp1grp {
			fsl,pins = <MX35_PAD_LD19__GPIO3_25  0x80000000>;
		};

		pinctrl_esdhc1: esdhc1grp {
			fsl,pins = <
				MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000
				MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000
				MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000
				MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000
				MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000
				MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000
				MX35_PAD_LD18__GPIO3_24			0x80000000 /* CD */
			>;
		};

		pinctrl_led1: led1grp {
			fsl,pins = <MX35_PAD_LD23__GPIO3_29  0x80000000>;
		};

		pinctrl_reg_lcd_3v3: reg-lcd-3v3 {
			fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5
				MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5
				MX35_PAD_CTS1__UART1_CTS		0x1c5
				MX35_PAD_RTS1__UART1_RTS		0x1c5
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX35_PAD_RXD2__UART2_RXD_MUX		0x1c5
				MX35_PAD_TXD2__UART2_TXD_MUX		0x1c5
				MX35_PAD_RTS2__UART2_RTS		0x1c5
				MX35_PAD_CTS2__UART2_CTS		0x1c5
			>;
		};
	};
};

&ssi1 {
	codec-handle = <&tlv320aic23>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	uart-has-rtscts;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	uart-has-rtscts;
	status = "okay";
};

&usbhost1 {
	phy_type = "serial";
	dr_mode = "host";
	status = "okay";
};

&usbotg {
	phy_type = "utmi";
	dr_mode = "otg";
	external-vbus-divider;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
// Copyright 2014 Freescale Semiconductor, Inc.

/dts-v1/;
#include "imx35.dtsi"

/ {
	model = "Freescale i.MX35 Product Development Kit";
	compatible = "fsl,imx35-pdk", "fsl,imx35";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x8000000>,
		      <0x90000000 0x8000000>;
	};
};

&esdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc1>;
	status = "okay";
};

&iomuxc {
	imx35-pdk {
		pinctrl_esdhc1: esdhc1grp {
			fsl,pins = <
				MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000
				MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000
				MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000
				MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000
				MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000
				MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5
				MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5
				MX35_PAD_CTS1__UART1_CTS		0x1c5
				MX35_PAD_RTS1__UART1_RTS		0x1c5
			>;
		};
	};
};

&nfc {
	nand-bus-width = <16>;
	nand-ecc-mode = "hw";
	nand-on-flash-bbt;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	uart-has-rtscts;
	status = "okay";
};