code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP4 clock data
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 */
&cm1_clocks {
	extalt_clkin_ck: extalt_clkin_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "extalt_clkin_ck";
		clock-frequency = <59000000>;
	};

	pad_clks_src_ck: pad_clks_src_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "pad_clks_src_ck";
		clock-frequency = <12000000>;
	};

	pad_clks_ck: pad_clks_ck@108 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "pad_clks_ck";
		clocks = <&pad_clks_src_ck>;
		ti,bit-shift = <8>;
		reg = <0x0108>;
	};

	pad_slimbus_core_clks_ck: pad_slimbus_core_clks_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "pad_slimbus_core_clks_ck";
		clock-frequency = <12000000>;
	};

	secure_32k_clk_src_ck: secure_32k_clk_src_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "secure_32k_clk_src_ck";
		clock-frequency = <32768>;
	};

	slimbus_src_clk: slimbus_src_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "slimbus_src_clk";
		clock-frequency = <12000000>;
	};

	slimbus_clk: slimbus_clk@108 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "slimbus_clk";
		clocks = <&slimbus_src_clk>;
		ti,bit-shift = <10>;
		reg = <0x0108>;
	};

	sys_32k_ck: sys_32k_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "sys_32k_ck";
		clock-frequency = <32768>;
	};

	virt_12000000_ck: virt_12000000_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_12000000_ck";
		clock-frequency = <12000000>;
	};

	virt_13000000_ck: virt_13000000_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_13000000_ck";
		clock-frequency = <13000000>;
	};

	virt_16800000_ck: virt_16800000_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_16800000_ck";
		clock-frequency = <16800000>;
	};

	virt_19200000_ck: virt_19200000_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_19200000_ck";
		clock-frequency = <19200000>;
	};

	virt_26000000_ck: virt_26000000_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_26000000_ck";
		clock-frequency = <26000000>;
	};

	virt_27000000_ck: virt_27000000_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_27000000_ck";
		clock-frequency = <27000000>;
	};

	virt_38400000_ck: virt_38400000_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "virt_38400000_ck";
		clock-frequency = <38400000>;
	};

	tie_low_clock_ck: tie_low_clock_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "tie_low_clock_ck";
		clock-frequency = <0>;
	};

	utmi_phy_clkout_ck: utmi_phy_clkout_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "utmi_phy_clkout_ck";
		clock-frequency = <60000000>;
	};

	xclk60mhsp1_ck: xclk60mhsp1_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "xclk60mhsp1_ck";
		clock-frequency = <60000000>;
	};

	xclk60mhsp2_ck: xclk60mhsp2_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "xclk60mhsp2_ck";
		clock-frequency = <60000000>;
	};

	xclk60motg_ck: xclk60motg_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "xclk60motg_ck";
		clock-frequency = <60000000>;
	};

	dpll_abe_ck: dpll_abe_ck@1e0 {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-m4xen-clock";
		clock-output-names = "dpll_abe_ck";
		clocks = <&abe_dpll_refclk_mux_ck>, <&abe_dpll_bypass_clk_mux_ck>;
		reg = <0x01e0>, <0x01e4>, <0x01ec>, <0x01e8>;
	};

	dpll_abe_x2_ck: dpll_abe_x2_ck@1f0 {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-x2-clock";
		clock-output-names = "dpll_abe_x2_ck";
		clocks = <&dpll_abe_ck>;
		reg = <0x01f0>;
	};

	dpll_abe_m2x2_ck: dpll_abe_m2x2_ck@1f0 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_abe_m2x2_ck";
		clocks = <&dpll_abe_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x01f0>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	abe_24m_fclk: abe_24m_fclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "abe_24m_fclk";
		clocks = <&dpll_abe_m2x2_ck>;
		clock-mult = <1>;
		clock-div = <8>;
	};

	abe_clk: abe_clk@108 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "abe_clk";
		clocks = <&dpll_abe_m2x2_ck>;
		ti,max-div = <4>;
		reg = <0x0108>;
		ti,index-power-of-two;
	};

	dpll_abe_m3x2_ck: dpll_abe_m3x2_ck@1f4 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_abe_m3x2_ck";
		clocks = <&dpll_abe_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x01f4>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	core_hsd_byp_clk_mux_ck: core_hsd_byp_clk_mux_ck@12c {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "core_hsd_byp_clk_mux_ck";
		clocks = <&sys_clkin_ck>, <&dpll_abe_m3x2_ck>;
		ti,bit-shift = <23>;
		reg = <0x012c>;
	};

	dpll_core_ck: dpll_core_ck@120 {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-core-clock";
		clock-output-names = "dpll_core_ck";
		clocks = <&sys_clkin_ck>, <&core_hsd_byp_clk_mux_ck>;
		reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
	};

	dpll_core_x2_ck: dpll_core_x2_ck {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-x2-clock";
		clock-output-names = "dpll_core_x2_ck";
		clocks = <&dpll_core_ck>;
	};

	dpll_core_m6x2_ck: dpll_core_m6x2_ck@140 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_core_m6x2_ck";
		clocks = <&dpll_core_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x0140>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_core_m2_ck: dpll_core_m2_ck@130 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_core_m2_ck";
		clocks = <&dpll_core_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x0130>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	ddrphy_ck: ddrphy_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "ddrphy_ck";
		clocks = <&dpll_core_m2_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	dpll_core_m5x2_ck: dpll_core_m5x2_ck@13c {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_core_m5x2_ck";
		clocks = <&dpll_core_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x013c>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	div_core_ck: div_core_ck@100 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "div_core_ck";
		clocks = <&dpll_core_m5x2_ck>;
		reg = <0x0100>;
		ti,max-div = <2>;
	};

	div_iva_hs_clk: div_iva_hs_clk@1dc {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "div_iva_hs_clk";
		clocks = <&dpll_core_m5x2_ck>;
		ti,max-div = <4>;
		reg = <0x01dc>;
		ti,index-power-of-two;
	};

	div_mpu_hs_clk: div_mpu_hs_clk@19c {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "div_mpu_hs_clk";
		clocks = <&dpll_core_m5x2_ck>;
		ti,max-div = <4>;
		reg = <0x019c>;
		ti,index-power-of-two;
	};

	dpll_core_m4x2_ck: dpll_core_m4x2_ck@138 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_core_m4x2_ck";
		clocks = <&dpll_core_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x0138>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dll_clk_div_ck: dll_clk_div_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "dll_clk_div_ck";
		clocks = <&dpll_core_m4x2_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	dpll_abe_m2_ck: dpll_abe_m2_ck@1f0 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_abe_m2_ck";
		clocks = <&dpll_abe_ck>;
		ti,max-div = <31>;
		reg = <0x01f0>;
		ti,index-starts-at-one;
	};

	dpll_core_m3x2_gate_ck: dpll_core_m3x2_gate_ck@134 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clock-output-names = "dpll_core_m3x2_gate_ck";
		clocks = <&dpll_core_x2_ck>;
		ti,bit-shift = <8>;
		reg = <0x0134>;
	};

	dpll_core_m3x2_div_ck: dpll_core_m3x2_div_ck@134 {
		#clock-cells = <0>;
		compatible = "ti,composite-divider-clock";
		clock-output-names = "dpll_core_m3x2_div_ck";
		clocks = <&dpll_core_x2_ck>;
		ti,max-div = <31>;
		reg = <0x0134>;
		ti,index-starts-at-one;
	};

	dpll_core_m3x2_ck: dpll_core_m3x2_ck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clock-output-names = "dpll_core_m3x2_ck";
		clocks = <&dpll_core_m3x2_gate_ck>, <&dpll_core_m3x2_div_ck>;
	};

	dpll_core_m7x2_ck: dpll_core_m7x2_ck@144 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_core_m7x2_ck";
		clocks = <&dpll_core_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x0144>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	iva_hsd_byp_clk_mux_ck: iva_hsd_byp_clk_mux_ck@1ac {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "iva_hsd_byp_clk_mux_ck";
		clocks = <&sys_clkin_ck>, <&div_iva_hs_clk>;
		ti,bit-shift = <23>;
		reg = <0x01ac>;
	};

	dpll_iva_ck: dpll_iva_ck@1a0 {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-clock";
		clock-output-names = "dpll_iva_ck";
		clocks = <&sys_clkin_ck>, <&iva_hsd_byp_clk_mux_ck>;
		reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
		assigned-clocks = <&dpll_iva_ck>;
		assigned-clock-rates = <931200000>;
	};

	dpll_iva_x2_ck: dpll_iva_x2_ck {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-x2-clock";
		clock-output-names = "dpll_iva_x2_ck";
		clocks = <&dpll_iva_ck>;
	};

	dpll_iva_m4x2_ck: dpll_iva_m4x2_ck@1b8 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_iva_m4x2_ck";
		clocks = <&dpll_iva_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x01b8>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
		assigned-clocks = <&dpll_iva_m4x2_ck>;
		assigned-clock-rates = <465600000>;
	};

	dpll_iva_m5x2_ck: dpll_iva_m5x2_ck@1bc {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_iva_m5x2_ck";
		clocks = <&dpll_iva_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x01bc>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
		assigned-clocks = <&dpll_iva_m5x2_ck>;
		assigned-clock-rates = <266100000>;
	};

	dpll_mpu_ck: dpll_mpu_ck@160 {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-clock";
		clock-output-names = "dpll_mpu_ck";
		clocks = <&sys_clkin_ck>, <&div_mpu_hs_clk>;
		reg = <0x0160>, <0x0164>, <0x016c>, <0x0168>;
	};

	dpll_mpu_m2_ck: dpll_mpu_m2_ck@170 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_mpu_m2_ck";
		clocks = <&dpll_mpu_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x0170>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	per_hs_clk_div_ck: per_hs_clk_div_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "per_hs_clk_div_ck";
		clocks = <&dpll_abe_m3x2_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	usb_hs_clk_div_ck: usb_hs_clk_div_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "usb_hs_clk_div_ck";
		clocks = <&dpll_abe_m3x2_ck>;
		clock-mult = <1>;
		clock-div = <3>;
	};

	l3_div_ck: l3_div_ck@100 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "l3_div_ck";
		clocks = <&div_core_ck>;
		ti,bit-shift = <4>;
		ti,max-div = <2>;
		reg = <0x0100>;
	};

	l4_div_ck: l4_div_ck@100 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "l4_div_ck";
		clocks = <&l3_div_ck>;
		ti,bit-shift = <8>;
		ti,max-div = <2>;
		reg = <0x0100>;
	};

	lp_clk_div_ck: lp_clk_div_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "lp_clk_div_ck";
		clocks = <&dpll_abe_m2x2_ck>;
		clock-mult = <1>;
		clock-div = <16>;
	};

	mpu_periphclk: mpu_periphclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "mpu_periphclk";
		clocks = <&dpll_mpu_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	ocp_abe_iclk: ocp_abe_iclk@528 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "ocp_abe_iclk";
		clocks = <&abe_clkctrl OMAP4_AESS_CLKCTRL 24>;
		ti,bit-shift = <24>;
		reg = <0x0528>;
		ti,dividers = <2>, <1>;
	};

	per_abe_24m_fclk: per_abe_24m_fclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "per_abe_24m_fclk";
		clocks = <&dpll_abe_m2_ck>;
		clock-mult = <1>;
		clock-div = <4>;
	};

	dummy_ck: dummy_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-output-names = "dummy_ck";
		clock-frequency = <0>;
	};
};

&prm_clocks {
	sys_clkin_ck: sys_clkin_ck@110 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "sys_clkin_ck";
		clocks = <&virt_12000000_ck>, <&virt_13000000_ck>, <&virt_16800000_ck>, <&virt_19200000_ck>, <&virt_26000000_ck>, <&virt_27000000_ck>, <&virt_38400000_ck>;
		reg = <0x0110>;
		ti,index-starts-at-one;
	};

	abe_dpll_bypass_clk_mux_ck: abe_dpll_bypass_clk_mux_ck@108 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "abe_dpll_bypass_clk_mux_ck";
		clocks = <&sys_clkin_ck>, <&sys_32k_ck>;
		ti,bit-shift = <24>;
		reg = <0x0108>;
	};

	abe_dpll_refclk_mux_ck: abe_dpll_refclk_mux_ck@10c {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "abe_dpll_refclk_mux_ck";
		clocks = <&sys_clkin_ck>, <&sys_32k_ck>;
		reg = <0x010c>;
	};

	dbgclk_mux_ck: dbgclk_mux_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "dbgclk_mux_ck";
		clocks = <&sys_clkin_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	l4_wkup_clk_mux_ck: l4_wkup_clk_mux_ck@108 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "l4_wkup_clk_mux_ck";
		clocks = <&sys_clkin_ck>, <&lp_clk_div_ck>;
		reg = <0x0108>;
	};

	syc_clk_div_ck: syc_clk_div_ck@100 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "syc_clk_div_ck";
		clocks = <&sys_clkin_ck>;
		reg = <0x0100>;
		ti,max-div = <2>;
	};

	usim_ck: usim_ck@1858 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "usim_ck";
		clocks = <&dpll_per_m4x2_ck>;
		ti,bit-shift = <24>;
		reg = <0x1858>;
		ti,dividers = <14>, <18>;
	};

	usim_fclk: usim_fclk@1858 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "usim_fclk";
		clocks = <&usim_ck>;
		ti,bit-shift = <8>;
		reg = <0x1858>;
	};

	trace_clk_div_ck: trace_clk_div_ck {
		#clock-cells = <0>;
		compatible = "ti,clkdm-gate-clock";
		clock-output-names = "trace_clk_div_ck";
		clocks = <&emu_sys_clkctrl OMAP4_DEBUGSS_CLKCTRL 24>;
	};
};

&prm_clockdomains {
	emu_sys_clkdm: emu_sys_clkdm {
		compatible = "ti,clockdomain";
		clock-output-names = "emu_sys_clkdm";
		clocks = <&trace_clk_div_ck>;
	};
};

&cm2_clocks {
	per_hsd_byp_clk_mux_ck: per_hsd_byp_clk_mux_ck@14c {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "per_hsd_byp_clk_mux_ck";
		clocks = <&sys_clkin_ck>, <&per_hs_clk_div_ck>;
		ti,bit-shift = <23>;
		reg = <0x014c>;
	};

	dpll_per_ck: dpll_per_ck@140 {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-clock";
		clock-output-names = "dpll_per_ck";
		clocks = <&sys_clkin_ck>, <&per_hsd_byp_clk_mux_ck>;
		reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
	};

	dpll_per_m2_ck: dpll_per_m2_ck@150 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_per_m2_ck";
		clocks = <&dpll_per_ck>;
		ti,max-div = <31>;
		reg = <0x0150>;
		ti,index-starts-at-one;
	};

	dpll_per_x2_ck: dpll_per_x2_ck@150 {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-x2-clock";
		clock-output-names = "dpll_per_x2_ck";
		clocks = <&dpll_per_ck>;
		reg = <0x0150>;
	};

	dpll_per_m2x2_ck: dpll_per_m2x2_ck@150 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_per_m2x2_ck";
		clocks = <&dpll_per_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x0150>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_per_m3x2_gate_ck: dpll_per_m3x2_gate_ck@154 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clock-output-names = "dpll_per_m3x2_gate_ck";
		clocks = <&dpll_per_x2_ck>;
		ti,bit-shift = <8>;
		reg = <0x0154>;
	};

	dpll_per_m3x2_div_ck: dpll_per_m3x2_div_ck@154 {
		#clock-cells = <0>;
		compatible = "ti,composite-divider-clock";
		clock-output-names = "dpll_per_m3x2_div_ck";
		clocks = <&dpll_per_x2_ck>;
		ti,max-div = <31>;
		reg = <0x0154>;
		ti,index-starts-at-one;
	};

	dpll_per_m3x2_ck: dpll_per_m3x2_ck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clock-output-names = "dpll_per_m3x2_ck";
		clocks = <&dpll_per_m3x2_gate_ck>, <&dpll_per_m3x2_div_ck>;
	};

	dpll_per_m4x2_ck: dpll_per_m4x2_ck@158 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_per_m4x2_ck";
		clocks = <&dpll_per_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x0158>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_per_m5x2_ck: dpll_per_m5x2_ck@15c {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_per_m5x2_ck";
		clocks = <&dpll_per_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x015c>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_per_m6x2_ck: dpll_per_m6x2_ck@160 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_per_m6x2_ck";
		clocks = <&dpll_per_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x0160>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_per_m7x2_ck: dpll_per_m7x2_ck@164 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_per_m7x2_ck";
		clocks = <&dpll_per_x2_ck>;
		ti,max-div = <31>;
		ti,autoidle-shift = <8>;
		reg = <0x0164>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	dpll_usb_ck: dpll_usb_ck@180 {
		#clock-cells = <0>;
		compatible = "ti,omap4-dpll-j-type-clock";
		clock-output-names = "dpll_usb_ck";
		clocks = <&sys_clkin_ck>, <&usb_hs_clk_div_ck>;
		reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
	};

	dpll_usb_clkdcoldo_ck: dpll_usb_clkdcoldo_ck@1b4 {
		#clock-cells = <0>;
		compatible = "ti,fixed-factor-clock";
		clock-output-names = "dpll_usb_clkdcoldo_ck";
		clocks = <&dpll_usb_ck>;
		ti,clock-div = <1>;
		ti,autoidle-shift = <8>;
		reg = <0x01b4>;
		ti,clock-mult = <1>;
		ti,invert-autoidle-bit;
	};

	dpll_usb_m2_ck: dpll_usb_m2_ck@190 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "dpll_usb_m2_ck";
		clocks = <&dpll_usb_ck>;
		ti,max-div = <127>;
		ti,autoidle-shift = <8>;
		reg = <0x0190>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
	};

	ducati_clk_mux_ck: ducati_clk_mux_ck@100 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "ducati_clk_mux_ck";
		clocks = <&div_core_ck>, <&dpll_per_m6x2_ck>;
		reg = <0x0100>;
	};

	func_12m_fclk: func_12m_fclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "func_12m_fclk";
		clocks = <&dpll_per_m2x2_ck>;
		clock-mult = <1>;
		clock-div = <16>;
	};

	func_24m_clk: func_24m_clk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "func_24m_clk";
		clocks = <&dpll_per_m2_ck>;
		clock-mult = <1>;
		clock-div = <4>;
	};

	func_24mc_fclk: func_24mc_fclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "func_24mc_fclk";
		clocks = <&dpll_per_m2x2_ck>;
		clock-mult = <1>;
		clock-div = <8>;
	};

	func_48m_fclk: func_48m_fclk@108 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "func_48m_fclk";
		clocks = <&dpll_per_m2x2_ck>;
		reg = <0x0108>;
		ti,dividers = <4>, <8>;
	};

	func_48mc_fclk: func_48mc_fclk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clock-output-names = "func_48mc_fclk";
		clocks = <&dpll_per_m2x2_ck>;
		clock-mult = <1>;
		clock-div = <4>;
	};

	func_64m_fclk: func_64m_fclk@108 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "func_64m_fclk";
		clocks = <&dpll_per_m4x2_ck>;
		reg = <0x0108>;
		ti,dividers = <2>, <4>;
	};

	func_96m_fclk: func_96m_fclk@108 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "func_96m_fclk";
		clocks = <&dpll_per_m2x2_ck>;
		reg = <0x0108>;
		ti,dividers = <2>, <4>;
	};

	init_60m_fclk: init_60m_fclk@104 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "init_60m_fclk";
		clocks = <&dpll_usb_m2_ck>;
		reg = <0x0104>;
		ti,dividers = <1>, <8>;
	};

	per_abe_nc_fclk: per_abe_nc_fclk@108 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "per_abe_nc_fclk";
		clocks = <&dpll_abe_m2_ck>;
		reg = <0x0108>;
		ti,max-div = <2>;
	};

	usb_phy_cm_clk32k: usb_phy_cm_clk32k@640 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clock-output-names = "usb_phy_cm_clk32k";
		clocks = <&sys_32k_ck>;
		ti,bit-shift = <8>;
		reg = <0x0640>;
	};
};

&cm2_clockdomains {
	l3_init_clkdm: l3_init_clkdm {
		compatible = "ti,clockdomain";
		clock-output-names = "l3_init_clkdm";
		clocks = <&dpll_usb_ck>;
	};
};

&scrm_clocks {
	auxclk0_src_gate_ck: auxclk0_src_gate_ck@310 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clock-output-names = "auxclk0_src_gate_ck";
		clocks = <&dpll_core_m3x2_ck>;
		ti,bit-shift = <8>;
		reg = <0x0310>;
	};

	auxclk0_src_mux_ck: auxclk0_src_mux_ck@310 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clock-output-names = "auxclk0_src_mux_ck";
		clocks = <&sys_clkin_ck>, <&dpll_core_m3x2_ck>, <&dpll_per_m3x2_ck>;
		ti,bit-shift = <1>;
		reg = <0x0310>;
	};

	auxclk0_src_ck: auxclk0_src_ck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clock-output-names = "auxclk0_src_ck";
		clocks = <&auxclk0_src_gate_ck>, <&auxclk0_src_mux_ck>;
	};

	auxclk0_ck: auxclk0_ck@310 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "auxclk0_ck";
		clocks = <&auxclk0_src_ck>;
		ti,bit-shift = <16>;
		ti,max-div = <16>;
		reg = <0x0310>;
	};

	auxclk1_src_gate_ck: auxclk1_src_gate_ck@314 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clock-output-names = "auxclk1_src_gate_ck";
		clocks = <&dpll_core_m3x2_ck>;
		ti,bit-shift = <8>;
		reg = <0x0314>;
	};

	auxclk1_src_mux_ck: auxclk1_src_mux_ck@314 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clock-output-names = "auxclk1_src_mux_ck";
		clocks = <&sys_clkin_ck>, <&dpll_core_m3x2_ck>, <&dpll_per_m3x2_ck>;
		ti,bit-shift = <1>;
		reg = <0x0314>;
	};

	auxclk1_src_ck: auxclk1_src_ck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clock-output-names = "auxclk1_src_ck";
		clocks = <&auxclk1_src_gate_ck>, <&auxclk1_src_mux_ck>;
	};

	auxclk1_ck: auxclk1_ck@314 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "auxclk1_ck";
		clocks = <&auxclk1_src_ck>;
		ti,bit-shift = <16>;
		ti,max-div = <16>;
		reg = <0x0314>;
	};

	auxclk2_src_gate_ck: auxclk2_src_gate_ck@318 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clock-output-names = "auxclk2_src_gate_ck";
		clocks = <&dpll_core_m3x2_ck>;
		ti,bit-shift = <8>;
		reg = <0x0318>;
	};

	auxclk2_src_mux_ck: auxclk2_src_mux_ck@318 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clock-output-names = "auxclk2_src_mux_ck";
		clocks = <&sys_clkin_ck>, <&dpll_core_m3x2_ck>, <&dpll_per_m3x2_ck>;
		ti,bit-shift = <1>;
		reg = <0x0318>;
	};

	auxclk2_src_ck: auxclk2_src_ck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clock-output-names = "auxclk2_src_ck";
		clocks = <&auxclk2_src_gate_ck>, <&auxclk2_src_mux_ck>;
	};

	auxclk2_ck: auxclk2_ck@318 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "auxclk2_ck";
		clocks = <&auxclk2_src_ck>;
		ti,bit-shift = <16>;
		ti,max-div = <16>;
		reg = <0x0318>;
	};

	auxclk3_src_gate_ck: auxclk3_src_gate_ck@31c {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clock-output-names = "auxclk3_src_gate_ck";
		clocks = <&dpll_core_m3x2_ck>;
		ti,bit-shift = <8>;
		reg = <0x031c>;
	};

	auxclk3_src_mux_ck: auxclk3_src_mux_ck@31c {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clock-output-names = "auxclk3_src_mux_ck";
		clocks = <&sys_clkin_ck>, <&dpll_core_m3x2_ck>, <&dpll_per_m3x2_ck>;
		ti,bit-shift = <1>;
		reg = <0x031c>;
	};

	auxclk3_src_ck: auxclk3_src_ck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clock-output-names = "auxclk3_src_ck";
		clocks = <&auxclk3_src_gate_ck>, <&auxclk3_src_mux_ck>;
	};

	auxclk3_ck: auxclk3_ck@31c {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "auxclk3_ck";
		clocks = <&auxclk3_src_ck>;
		ti,bit-shift = <16>;
		ti,max-div = <16>;
		reg = <0x031c>;
	};

	auxclk4_src_gate_ck: auxclk4_src_gate_ck@320 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clock-output-names = "auxclk4_src_gate_ck";
		clocks = <&dpll_core_m3x2_ck>;
		ti,bit-shift = <8>;
		reg = <0x0320>;
	};

	auxclk4_src_mux_ck: auxclk4_src_mux_ck@320 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clock-output-names = "auxclk4_src_mux_ck";
		clocks = <&sys_clkin_ck>, <&dpll_core_m3x2_ck>, <&dpll_per_m3x2_ck>;
		ti,bit-shift = <1>;
		reg = <0x0320>;
	};

	auxclk4_src_ck: auxclk4_src_ck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clock-output-names = "auxclk4_src_ck";
		clocks = <&auxclk4_src_gate_ck>, <&auxclk4_src_mux_ck>;
	};

	auxclk4_ck: auxclk4_ck@320 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "auxclk4_ck";
		clocks = <&auxclk4_src_ck>;
		ti,bit-shift = <16>;
		ti,max-div = <16>;
		reg = <0x0320>;
	};

	auxclk5_src_gate_ck: auxclk5_src_gate_ck@324 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clock-output-names = "auxclk5_src_gate_ck";
		clocks = <&dpll_core_m3x2_ck>;
		ti,bit-shift = <8>;
		reg = <0x0324>;
	};

	auxclk5_src_mux_ck: auxclk5_src_mux_ck@324 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clock-output-names = "auxclk5_src_mux_ck";
		clocks = <&sys_clkin_ck>, <&dpll_core_m3x2_ck>, <&dpll_per_m3x2_ck>;
		ti,bit-shift = <1>;
		reg = <0x0324>;
	};

	auxclk5_src_ck: auxclk5_src_ck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clock-output-names = "auxclk5_src_ck";
		clocks = <&auxclk5_src_gate_ck>, <&auxclk5_src_mux_ck>;
	};

	auxclk5_ck: auxclk5_ck@324 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clock-output-names = "auxclk5_ck";
		clocks = <&auxclk5_src_ck>;
		ti,bit-shift = <16>;
		ti,max-div = <16>;
		reg = <0x0324>;
	};

	auxclkreq0_ck: auxclkreq0_ck@210 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "auxclkreq0_ck";
		clocks = <&auxclk0_ck>, <&auxclk1_ck>, <&auxclk2_ck>, <&auxclk3_ck>, <&auxclk4_ck>, <&auxclk5_ck>;
		ti,bit-shift = <2>;
		reg = <0x0210>;
	};

	auxclkreq1_ck: auxclkreq1_ck@214 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "auxclkreq1_ck";
		clocks = <&auxclk0_ck>, <&auxclk1_ck>, <&auxclk2_ck>, <&auxclk3_ck>, <&auxclk4_ck>, <&auxclk5_ck>;
		ti,bit-shift = <2>;
		reg = <0x0214>;
	};

	auxclkreq2_ck: auxclkreq2_ck@218 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "auxclkreq2_ck";
		clocks = <&auxclk0_ck>, <&auxclk1_ck>, <&auxclk2_ck>, <&auxclk3_ck>, <&auxclk4_ck>, <&auxclk5_ck>;
		ti,bit-shift = <2>;
		reg = <0x0218>;
	};

	auxclkreq3_ck: auxclkreq3_ck@21c {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "auxclkreq3_ck";
		clocks = <&auxclk0_ck>, <&auxclk1_ck>, <&auxclk2_ck>, <&auxclk3_ck>, <&auxclk4_ck>, <&auxclk5_ck>;
		ti,bit-shift = <2>;
		reg = <0x021c>;
	};

	auxclkreq4_ck: auxclkreq4_ck@220 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "auxclkreq4_ck";
		clocks = <&auxclk0_ck>, <&auxclk1_ck>, <&auxclk2_ck>, <&auxclk3_ck>, <&auxclk4_ck>, <&auxclk5_ck>;
		ti,bit-shift = <2>;
		reg = <0x0220>;
	};

	auxclkreq5_ck: auxclkreq5_ck@224 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clock-output-names = "auxclkreq5_ck";
		clocks = <&auxclk0_ck>, <&auxclk1_ck>, <&auxclk2_ck>, <&auxclk3_ck>, <&auxclk4_ck>, <&auxclk5_ck>;
		ti,bit-shift = <2>;
		reg = <0x0224>;
	};
};

&cm1 {
	mpuss_cm: mpuss_cm@300 {
		compatible = "ti,omap4-cm";
		clock-output-names = "mpuss_cm";
		reg = <0x300 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x300 0x100>;

		mpuss_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "mpuss_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	tesla_cm: tesla_cm@400 {
		compatible = "ti,omap4-cm";
		clock-output-names = "tesla_cm";
		reg = <0x400 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x400 0x100>;

		tesla_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "tesla_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	abe_cm: abe_cm@500 {
		compatible = "ti,omap4-cm";
		clock-output-names = "abe_cm";
		reg = <0x500 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x500 0x100>;

		abe_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "abe_clkctrl";
			reg = <0x20 0x6c>;
			#clock-cells = <2>;
		};
	};

};

&cm2 {
	l4_ao_cm: l4_ao_cm@600 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l4_ao_cm";
		reg = <0x600 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x600 0x100>;

		l4_ao_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l4_ao_clkctrl";
			reg = <0x20 0x1c>;
			#clock-cells = <2>;
		};
	};

	l3_1_cm: l3_1_cm@700 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l3_1_cm";
		reg = <0x700 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x700 0x100>;

		l3_1_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3_1_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	l3_2_cm: l3_2_cm@800 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l3_2_cm";
		reg = <0x800 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x800 0x100>;

		l3_2_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3_2_clkctrl";
			reg = <0x20 0x14>;
			#clock-cells = <2>;
		};
	};

	ducati_cm: ducati_cm@900 {
		compatible = "ti,omap4-cm";
		clock-output-names = "ducati_cm";
		reg = <0x900 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x900 0x100>;

		ducati_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "ducati_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	l3_dma_cm: l3_dma_cm@a00 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l3_dma_cm";
		reg = <0xa00 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0xa00 0x100>;

		l3_dma_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3_dma_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	l3_emif_cm: l3_emif_cm@b00 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l3_emif_cm";
		reg = <0xb00 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0xb00 0x100>;

		l3_emif_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3_emif_clkctrl";
			reg = <0x20 0x1c>;
			#clock-cells = <2>;
		};
	};

	d2d_cm: d2d_cm@c00 {
		compatible = "ti,omap4-cm";
		clock-output-names = "d2d_cm";
		reg = <0xc00 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0xc00 0x100>;

		d2d_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "d2d_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	l4_cfg_cm: l4_cfg_cm@d00 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l4_cfg_cm";
		reg = <0xd00 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0xd00 0x100>;

		l4_cfg_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l4_cfg_clkctrl";
			reg = <0x20 0x14>;
			#clock-cells = <2>;
		};
	};

	l3_instr_cm: l3_instr_cm@e00 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l3_instr_cm";
		reg = <0xe00 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0xe00 0x100>;

		l3_instr_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3_instr_clkctrl";
			reg = <0x20 0x24>;
			#clock-cells = <2>;
		};
	};

	ivahd_cm: ivahd_cm@f00 {
		compatible = "ti,omap4-cm";
		clock-output-names = "ivahd_cm";
		reg = <0xf00 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0xf00 0x100>;

		ivahd_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "ivahd_clkctrl";
			reg = <0x20 0xc>;
			#clock-cells = <2>;
		};
	};

	iss_cm: iss_cm@1000 {
		compatible = "ti,omap4-cm";
		clock-output-names = "iss_cm";
		reg = <0x1000 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x1000 0x100>;

		iss_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "iss_clkctrl";
			reg = <0x20 0xc>;
			#clock-cells = <2>;
		};
	};

	l3_dss_cm: l3_dss_cm@1100 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l3_dss_cm";
		reg = <0x1100 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x1100 0x100>;

		l3_dss_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3_dss_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	l3_gfx_cm: l3_gfx_cm@1200 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l3_gfx_cm";
		reg = <0x1200 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x1200 0x100>;

		l3_gfx_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3_gfx_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};

	l3_init_cm: l3_init_cm@1300 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l3_init_cm";
		reg = <0x1300 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x1300 0x100>;

		l3_init_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l3_init_clkctrl";
			reg = <0x20 0xc4>;
			#clock-cells = <2>;
		};
	};

	l4_per_cm: clock@1400 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l4_per_cm";
		reg = <0x1400 0x200>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x1400 0x200>;

		l4_per_clkctrl: clock@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l4_per_clkctrl";
			reg = <0x20 0x144>;
			#clock-cells = <2>;
		};

		l4_secure_clkctrl: clock@1a0 {
			compatible = "ti,clkctrl";
			clock-output-names = "l4_secure_clkctrl";
			reg = <0x1a0 0x3c>;
			#clock-cells = <2>;
		};
	};
};

&prm {
	l4_wkup_cm: l4_wkup_cm@1800 {
		compatible = "ti,omap4-cm";
		clock-output-names = "l4_wkup_cm";
		reg = <0x1800 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x1800 0x100>;

		l4_wkup_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "l4_wkup_clkctrl";
			reg = <0x20 0x5c>;
			#clock-cells = <2>;
		};
	};

	emu_sys_cm: emu_sys_cm@1a00 {
		compatible = "ti,omap4-cm";
		clock-output-names = "emu_sys_cm";
		reg = <0x1a00 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x1a00 0x100>;

		emu_sys_clkctrl: clk@20 {
			compatible = "ti,clkctrl";
			clock-output-names = "emu_sys_clkctrl";
			reg = <0x20 0x4>;
			#clock-cells = <2>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 */
#include "omap5.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	aliases {
		display0 = &hdmi0;
	};

	chosen {
		stdout-path = &uart3;
	};

	vmain: fixedregulator-vmain {
		compatible = "regulator-fixed";
		regulator-name = "vmain";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	vsys_cobra: fixedregulator-vsys_cobra {
		compatible = "regulator-fixed";
		regulator-name = "vsys_cobra";
		vin-supply = <&vmain>;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	vmmcsd_fixed: fixedregulator-mmcsd {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <3000000>;
		regulator-max-microvolt = <3000000>;
	};

	mmc3_pwrseq: sdhci0_pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&clk32kgaudio>;
		clock-names = "ext_clock";
	};

	vmmcsdio_fixed: fixedregulator-mmcsdio {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsdio_fixed";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio5 12 GPIO_ACTIVE_HIGH>;	/* gpio140 WLAN_EN */
		enable-active-high;
		startup-delay-us = <70000>;
		pinctrl-names = "default";
		pinctrl-0 = <&wlan_pins>;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
		clocks = <&auxclk1_ck>;
		clock-names = "main_clk";
		clock-frequency = <19200000>;
		#phy-cells = <0>;
	};

	/* HS USB Host PHY on PORT 3 */
	hsusb3_phy: hsusb3_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
		#phy-cells = <0>;
	};

	tpd12s015: encoder {
		compatible = "ti,tpd12s015";

		pinctrl-names = "default";
		pinctrl-0 = <&tpd12s015_pins>;

		/* gpios defined in the board specific dts */

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tpd12s015_in: endpoint {
					remote-endpoint = <&hdmi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tpd12s015_out: endpoint {
					remote-endpoint = <&hdmi_connector_in>;
				};
			};
		};
	};

	hdmi0: connector {
		compatible = "hdmi-connector";
		label = "hdmi";

		type = "b";

		port {
			hdmi_connector_in: endpoint {
				remote-endpoint = <&tpd12s015_out>;
			};
		};
	};

	sound: sound {
		compatible = "ti,abe-twl6040";
		ti,model = "omap5-uevm";

		ti,jack-detection;
		ti,mclk-freq = <19200000>;

		ti,mcpdm = <&mcpdm>;

		ti,twl6040 = <&twl6040>;

		/* Audio routing */
		ti,audio-routing =
			"Headset Stereophone", "HSOL",
			"Headset Stereophone", "HSOR",
			"Line Out", "AUXL",
			"Line Out", "AUXR",
			"HSMIC", "Headset Mic",
			"Headset Mic", "Headset Mic Bias",
			"AFML", "Line In",
			"AFMR", "Line In";
	};
};

&gpio8 {
	/* TI trees use GPIO instead of msecure, see also muxing */
	msecure-hog {
		gpio-hog;
		gpios = <10 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "gpio8_234/msecure";
	};
};

&omap5_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&usbhost_pins
			&led_gpio_pins
	>;

	twl6040_pins: pinmux_twl6040_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6)	/* mcspi1_somi.gpio5_141 */
		>;
	};

	mcpdm_pins: pinmux_mcpdm_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x182, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_clks.abe_clks */
			OMAP5_IOPAD(0x19c, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_ul_data.abemcpdm_ul_data */
			OMAP5_IOPAD(0x19e, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_dl_data.abemcpdm_dl_data */
			OMAP5_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE0)	/* abemcpdm_frame.abemcpdm_frame */
			OMAP5_IOPAD(0x1a2, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_lb_clk.abemcpdm_lb_clk */
		>;
	};

	mcbsp1_pins: pinmux_mcbsp1_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x18c, PIN_INPUT | MUX_MODE1)		/* abedmic_clk2.abemcbsp1_fsx */
			OMAP5_IOPAD(0x18e, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* abedmic_clk3.abemcbsp1_dx */
			OMAP5_IOPAD(0x190, PIN_INPUT | MUX_MODE1)		/* abeslimbus1_clock.abemcbsp1_clkx */
			OMAP5_IOPAD(0x192, PIN_INPUT_PULLDOWN | MUX_MODE1)	/* abeslimbus1_data.abemcbsp1_dr */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x194, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dr.abemcbsp2_dr */
			OMAP5_IOPAD(0x196, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dx.abemcbsp2_dx */
			OMAP5_IOPAD(0x198, PIN_INPUT | MUX_MODE0)		/* abemcbsp2_fsx.abemcbsp2_fsx */
			OMAP5_IOPAD(0x19a, PIN_INPUT | MUX_MODE0)		/* abemcbsp2_clkx.abemcbsp2_clkx */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x1f2, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
			OMAP5_IOPAD(0x1f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
		>;
	};

	mcspi2_pins: pinmux_mcspi2_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0)		/*  mcspi2_clk */
			OMAP5_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0)		/*  mcspi2_simo */
			OMAP5_IOPAD(0x100, PIN_INPUT_PULLUP | MUX_MODE0)	/*  mcspi2_somi */
			OMAP5_IOPAD(0x102, PIN_OUTPUT | MUX_MODE0)		/*  mcspi2_cs0 */
		>;
	};

	mcspi3_pins: pinmux_mcspi3_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0b8, PIN_INPUT | MUX_MODE1)		/*  mcspi3_somi */
			OMAP5_IOPAD(0x0ba, PIN_INPUT | MUX_MODE1)		/*  mcspi3_cs0 */
			OMAP5_IOPAD(0x0bc, PIN_INPUT | MUX_MODE1)		/*  mcspi3_simo */
			OMAP5_IOPAD(0x0be, PIN_INPUT | MUX_MODE1)		/*  mcspi3_clk */
		>;
	};

	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x01a4, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_clk */
			OMAP5_IOPAD(0x01a6, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_cmd */
			OMAP5_IOPAD(0x01a8, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data0 */
			OMAP5_IOPAD(0x01aa, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data1 */
			OMAP5_IOPAD(0x01ac, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data2 */
			OMAP5_IOPAD(0x01ae, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data3 */
		>;
	};

	wlan_pins: pinmux_wlan_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE6) /* mcspi1_clk.gpio5_140 */
		>;
	};

	/* TI trees use GPIO mode; msecure mode does not work reliably? */
	palmas_msecure_pins: palmas_msecure_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */
		>;
	};

	usbhost_pins: pinmux_usbhost_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
			OMAP5_IOPAD(0x0c6, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */

			OMAP5_IOPAD(0x1de, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
			OMAP5_IOPAD(0x1e0, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */

			OMAP5_IOPAD(0x0b0, PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
			OMAP5_IOPAD(0x0ae, PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
		>;
	};

	led_gpio_pins: pinmux_led_gpio_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x1d6, PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0a0, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
			OMAP5_IOPAD(0x0a2, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
			OMAP5_IOPAD(0x0a4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
			OMAP5_IOPAD(0x0a6, PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x1da, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
			OMAP5_IOPAD(0x1dc, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
		>;
	};

	uart5_pins: pinmux_uart5_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x1b0, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
			OMAP5_IOPAD(0x1b2, PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
			OMAP5_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
			OMAP5_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
		>;
	};

	dss_hdmi_pins: pinmux_dss_hdmi_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x13c, PIN_INPUT | MUX_MODE0)	/* hdmi_cec.hdmi_cec */
			OMAP5_IOPAD(0x140, PIN_INPUT | MUX_MODE0)	/* hdmi_ddc_scl.hdmi_ddc_scl */
			OMAP5_IOPAD(0x142, PIN_INPUT | MUX_MODE0)	/* hdmi_ddc_sda.hdmi_ddc_sda */
		>;
	};

	tpd12s015_pins: pinmux_tpd12s015_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x13e, PIN_INPUT_PULLDOWN | MUX_MODE6)	/* hdmi_hpd.gpio7_193 */
		>;
	};
};

&omap5_pmx_wkup {
	pinctrl-names = "default";
	pinctrl-0 = <
			&usbhost_wkup_pins
	>;

	palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
		pinctrl-single,pins = <
			/* sys_nirq1 is pulled down as the SoC is inverting it for GIC */
			OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0)
		>;
	};

	usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
		>;
	};

	wlcore_irq_pin: pinmux_wlcore_irq_pin {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x40, PIN_INPUT | MUX_MODE6)	/* llia_wakereqin.gpio1_wk14 */
		>;
	};
};

&mmc1 {
	vmmc-supply = <&ldo9_reg>;
	bus-width = <4>;
};

&mmc2 {
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <8>;
	ti,non-removable;
};

&mmc3 {
	vmmc-supply = <&vmmcsdio_fixed>;
	mmc-pwrseq = <&mmc3_pwrseq>;
	bus-width = <4>;
	non-removable;
	cap-power-off-card;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc3_pins>;
	interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
			       &omap5_pmx_core 0x16a>;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		pinctrl-names = "default";
		pinctrl-0 = <&wlcore_irq_pin>;
		interrupt-parent = <&gpio1>;
		interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;	/* gpio 14 */
		ref-clock-frequency = <26000000>;
	};
};

&mmc4 {
	status = "disabled";
};

&mmc5 {
	status = "disabled";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <400000>;

	palmas: palmas@48 {
		compatible = "ti,palmas";
		/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
		reg = <0x48>;
		interrupt-controller;
		#interrupt-cells = <2>;
		ti,system-power-controller;
		ti,mux-pad1 = <0xa1>;
		ti,mux-pad2 = <0x1b>;
		pinctrl-names = "default";
		pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;

		palmas_gpio: gpio {
			compatible = "ti,palmas-gpio";
			gpio-controller;
			#gpio-cells = <2>;
		};

		extcon_usb3: palmas_usb {
			compatible = "ti,palmas-usb-vid";
			ti,enable-vbus-detection;
			ti,enable-id-detection;
			ti,wakeup;
			id-gpios = <&palmas_gpio 0 GPIO_ACTIVE_HIGH>;
		};

		clk32kgaudio: palmas_clk32k@1 {
			compatible = "ti,palmas-clk32kgaudio";
			#clock-cells = <0>;
		};

		rtc {
			compatible = "ti,palmas-rtc";
			interrupt-parent = <&palmas>;
			interrupts = <8 IRQ_TYPE_NONE>;
			ti,backup-battery-chargeable;
			ti,backup-battery-charge-high-current;
		};

		gpadc: gpadc {
			compatible = "ti,palmas-gpadc";
			interrupts = <18 0
				      16 0
				      17 0>;
			#io-channel-cells = <1>;
			ti,channel0-current-microamp = <5>;
			ti,channel3-current-microamp = <10>;
		};

		palmas_pmic {
			compatible = "ti,palmas-pmic";
			interrupt-parent = <&palmas>;
			interrupts = <14 IRQ_TYPE_NONE>;
			interrupt-names = "short-irq";

			ti,ldo6-vibrator;

			smps123-in-supply = <&vsys_cobra>;
			smps45-in-supply = <&vsys_cobra>;
			smps6-in-supply = <&vsys_cobra>;
			smps7-in-supply = <&vsys_cobra>;
			smps8-in-supply = <&vsys_cobra>;
			smps9-in-supply = <&vsys_cobra>;
			smps10_out2-in-supply = <&vsys_cobra>;
			smps10_out1-in-supply = <&vsys_cobra>;
			ldo1-in-supply = <&vsys_cobra>;
			ldo2-in-supply = <&vsys_cobra>;
			ldo3-in-supply = <&vdds_1v8_main>;
			ldo4-in-supply = <&vdds_1v8_main>;
			ldo5-in-supply = <&vsys_cobra>;
			ldo6-in-supply = <&vdds_1v8_main>;
			ldo7-in-supply = <&vsys_cobra>;
			ldo8-in-supply = <&vsys_cobra>;
			ldo9-in-supply = <&vmmcsd_fixed>;
			ldoln-in-supply = <&vsys_cobra>;
			ldousb-in-supply = <&vsys_cobra>;

			regulators {
				smps123_reg: smps123 {
					/* VDD_OPP_MPU */
					regulator-name = "smps123";
					regulator-min-microvolt = < 600000>;
					regulator-max-microvolt = <1500000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps45_reg: smps45 {
					/* VDD_OPP_MM */
					regulator-name = "smps45";
					regulator-min-microvolt = < 600000>;
					regulator-max-microvolt = <1310000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps6_reg: smps6 {
					/* VDD_DDR3 - over VDD_SMPS6 */
					regulator-name = "smps6";
					regulator-min-microvolt = <1350000>;
					regulator-max-microvolt = <1350000>;
					regulator-always-on;
					regulator-boot-on;
				};

				vdds_1v8_main:
				smps7_reg: smps7 {
					/* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
					regulator-name = "smps7";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps8_reg: smps8 {
					/* VDD_OPP_CORE */
					regulator-name = "smps8";
					regulator-min-microvolt = < 600000>;
					regulator-max-microvolt = <1310000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps9_reg: smps9 {
					/* VDDA_2v1_AUD over VDD_2v1 */
					regulator-name = "smps9";
					regulator-min-microvolt = <2100000>;
					regulator-max-microvolt = <2100000>;
					ti,smps-range = <0x80>;
				};

				smps10_out2_reg: smps10_out2 {
					/* VBUS_5V_OTG */
					regulator-name = "smps10_out2";
					regulator-min-microvolt = <5000000>;
					regulator-max-microvolt = <5000000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps10_out1_reg: smps10_out1 {
					/* VBUS_5V_OTG */
					regulator-name = "smps10_out1";
					regulator-min-microvolt = <5000000>;
					regulator-max-microvolt = <5000000>;
				};

				ldo1_reg: ldo1 {
					/* VDDAPHY_CAM: vdda_csiport */
					regulator-name = "ldo1";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo2_reg: ldo2 {
					/* VCC_2V8_DISP: Does not go anywhere */
					regulator-name = "ldo2";
					regulator-min-microvolt = <2800000>;
					regulator-max-microvolt = <2800000>;
					/* Unused */
					status = "disabled";
				};

				ldo3_reg: ldo3 {
					/* VDDAPHY_MDM: vdda_lli */
					regulator-name = "ldo3";
					regulator-min-microvolt = <1500000>;
					regulator-max-microvolt = <1500000>;
					regulator-boot-on;
					/* Only if Modem is used */
					status = "disabled";
				};

				ldo4_reg: ldo4 {
					/* VDDAPHY_DISP: vdda_dsiport/hdmi */
					regulator-name = "ldo4";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo5_reg: ldo5 {
					/* VDDA_1V8_PHY: usb/sata/hdmi.. */
					regulator-name = "ldo5";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldo6_reg: ldo6 {
					/* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
					regulator-name = "ldo6";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldo7_reg: ldo7 {
					/* VDD_VPP: vpp1 */
					regulator-name = "ldo7";
					regulator-min-microvolt = <2000000>;
					regulator-max-microvolt = <2000000>;
					/* Only for efuse reprograming! */
					status = "disabled";
				};

				ldo8_reg: ldo8 {
					/* VDD_3v0: Does not go anywhere */
					regulator-name = "ldo8";
					regulator-min-microvolt = <3000000>;
					regulator-max-microvolt = <3000000>;
					regulator-boot-on;
					/* Unused */
					status = "disabled";
				};

				ldo9_reg: ldo9 {
					/* VCC_DV_SDIO: vdds_sdcard */
					regulator-name = "ldo9";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <3000000>;
					regulator-boot-on;
				};

				ldoln_reg: ldoln {
					/* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
					regulator-name = "ldoln";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldousb_reg: ldousb {
					/* VDDA_3V_USB: VDDA_USBHS33 */
					regulator-name = "ldousb";
					regulator-min-microvolt = <3250000>;
					regulator-max-microvolt = <3250000>;
					regulator-always-on;
					regulator-boot-on;
				};

				regen3_reg: regen3 {
					/* REGEN3 controls LDO9 supply to card */
					regulator-name = "regen3";
					regulator-always-on;
					regulator-boot-on;
				};
			};
		};

		palmas_power_button: palmas_power_button {
			compatible = "ti,palmas-pwrbutton";
			interrupt-parent = <&palmas>;
			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
			wakeup-source;
		};
	};

	twl6040: twl@4b {
		compatible = "ti,twl6040";
		#clock-cells = <0>;
		reg = <0x4b>;

		pinctrl-names = "default";
		pinctrl-0 = <&twl6040_pins>;

		/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_LOW>;

		/* audpwron gpio defined in the board specific dts */

		vio-supply = <&smps7_reg>;
		v2v1-supply = <&smps9_reg>;
		enable-active-high;

		clocks = <&clk32kgaudio>, <&fref_xtal_ck>;
		clock-names = "clk32k", "mclk";
	};
};

&mcpdm_module {
	/* Module on the SoC needs external clock from the PMIC */
	pinctrl-names = "default";
	pinctrl-0 = <&mcpdm_pins>;
	status = "okay";
};

&mcpdm {
	clocks = <&twl6040>;
	clock-names = "pdmclk";
};

&mcbsp1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp1_pins>;
	status = "okay";
};

&mcbsp2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
	status = "okay";
};

&usbhshost {
	port2-mode = "ehci-hsic";
	port3-mode = "ehci-hsic";
};

&usbhsehci {
	phys = <0 &hsusb2_phy &hsusb3_phy>;
};

&usb3 {
	extcon = <&extcon_usb3>;
	vbus-supply = <&smps10_out1_reg>;
};

&dwc3 {
	extcon = <&extcon_usb3>;
	dr_mode = "otg";
};

&mcspi1 {

};

&mcspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi2_pins>;
};

&mcspi3 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi3_pins>;
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
			      <&omap5_pmx_core 0x19c>;
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart5_pins>;
};

&cpu0 {
	cpu0-supply = <&smps123_reg>;
};

&dss {
	status = "okay";
};

&hdmi {
	status = "okay";

	/* vdda-supply populated in board specific dts file */

	pinctrl-names = "default";
	pinctrl-0 = <&dss_hdmi_pins>;

	port {
		hdmi_out: endpoint {
			remote-endpoint = <&tpd12s015_in>;
		};
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Support for CompuLab CM-T54
 */
/dts-v1/;

#include "omap5.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	model = "CompuLab CM-T54";
	compatible = "compulab,omap5-cm-t54", "ti,omap5";

	memory@80000000 {
		device_type = "memory";
		reg = <0 0x80000000 0 0x7f000000>; /* 2048 MB */
	};

	aliases {
		display0 = &hdmi0;
		display1 = &dvi0;
		display2 = &lcd0;
	};

	vmmcsd_fixed: fixed-regulator-mmcsd {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	vwlan_pdn_fixed: fixed-regulator-vwlan-pdn {
		compatible = "regulator-fixed";
		regulator-name = "vwlan_pdn_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&ldo2_reg>;
		gpio = <&gpio4 13 GPIO_ACTIVE_HIGH>;   /* gpio4_109 */
		startup-delay-us = <1000>;
		enable-active-high;
	};

	vwlan_fixed: fixed-regulator-vwlan {
		compatible = "regulator-fixed";
		regulator-name = "vwlan_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&vwlan_pdn_fixed>;
		gpio = <&gpio4 14 GPIO_ACTIVE_HIGH>;   /* gpio4_110 */
		startup-delay-us = <1000>;
		enable-active-high;
	};

	ads7846reg: ads7846-reg {
		compatible = "regulator-fixed";
		regulator-name = "ads7846-reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; /* gpio3_76 HUB_RESET */
		#phy-cells = <0>;
	};

	/* HS USB Host PHY on PORT 3 */
	hsusb3_phy: hsusb3_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; /* gpio3_83 ETH_RESET */
		#phy-cells = <0>;
	};

	leds {
		compatible = "gpio-leds";
		led1 {
			label = "Heartbeat";
			gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 ACT_LED */
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};
	};

	lcd0: display {
		compatible = "startek,startek-kd050c", "panel-dpi";
		label = "lcd";

		pinctrl-names = "default";
		pinctrl-0 = <&lcd_pins>;

		enable-gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;

		panel-timing {
			clock-frequency = <33000000>;
			hactive = <800>;
			vactive = <480>;
			hfront-porch = <40>;
			hback-porch = <40>;
			hsync-len = <43>;
			vback-porch = <29>;
			vfront-porch = <13>;
			vsync-len = <3>;
			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_lcd_out>;
			};
		};
	};

	hdmi0: connector0 {
		compatible = "hdmi-connector";
		label = "hdmi";

		type = "a";

		pinctrl-names = "default";
		pinctrl-0 = <&hdmi_conn_pins>;

		hpd-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */

		port {
			hdmi_connector_in: endpoint {
				remote-endpoint = <&hdmi_out>;
			};
		};
	};

	tfp410: encoder0 {
		compatible = "ti,tfp410";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint {
					remote-endpoint = <&dpi_dvi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector1 {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c2>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};
};

&omap5_pmx_wkup {

	ads7846_pins: pinmux_ads7846_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0042, PIN_INPUT_PULLDOWN | MUX_MODE6)  /* llib_wakereqin.gpio1_wk15 */
		>;
	};

	palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
		pinctrl-single,pins = <
			/* sys_nirq1 is pulled down as the SoC is inverting it for GIC */
			OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0)
		>;
	};
};

&omap5_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&led_gpio_pins
			&usbhost_pins
	>;

	led_gpio_pins: pinmux_led_gpio_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x00b0, PIN_OUTPUT | MUX_MODE6) /* hsi2_caflag.gpio3_80 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x01f2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_pmic_scl */
			OMAP5_IOPAD(0x01f4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_pmic_sda */
		>;
	};

	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x01b8, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
			OMAP5_IOPAD(0x01ba, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x01e2, PIN_INPUT_PULLUP | MUX_MODE0) /* sdcard_clk */
			OMAP5_IOPAD(0x01e4, PIN_INPUT_PULLUP | MUX_MODE0) /* sdcard_cmd */
			OMAP5_IOPAD(0x01e6, PIN_INPUT_PULLUP | MUX_MODE0) /* sdcard_data2 */
			OMAP5_IOPAD(0x01e8, PIN_INPUT_PULLUP | MUX_MODE0) /* sdcard_data3 */
			OMAP5_IOPAD(0x01ea, PIN_INPUT_PULLUP | MUX_MODE0) /* sdcard_data0 */
			OMAP5_IOPAD(0x01ec, PIN_INPUT_PULLUP | MUX_MODE0) /* sdcard_data1 */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0040, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_clk */
			OMAP5_IOPAD(0x0042, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_cmd */
			OMAP5_IOPAD(0x0044, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_data0 */
			OMAP5_IOPAD(0x0046, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_data1 */
			OMAP5_IOPAD(0x0048, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_data2 */
			OMAP5_IOPAD(0x004a, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_data3 */
			OMAP5_IOPAD(0x004c, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_data4 */
			OMAP5_IOPAD(0x004e, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_data5 */
			OMAP5_IOPAD(0x0050, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_data6 */
			OMAP5_IOPAD(0x0052, PIN_INPUT_PULLUP | MUX_MODE0) /* emmc_data7 */
		>;
	};

	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x01a4, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_clk */
			OMAP5_IOPAD(0x01a6, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_cmd */
			OMAP5_IOPAD(0x01a8, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data0 */
			OMAP5_IOPAD(0x01aa, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data1 */
			OMAP5_IOPAD(0x01ac, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data2 */
			OMAP5_IOPAD(0x01ae, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data3 */
		>;
	};

	wlan_gpios_pins: pinmux_wlan_gpios_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x019c, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* abemcpdm_ul_data.gpio4_109 */
			OMAP5_IOPAD(0x019e, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* abemcpdm_dl_data.gpio4_110 */
		>;
	};

	usbhost_pins: pinmux_usbhost_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x00c4, PIN_INPUT | MUX_MODE0)  /* usbb2_hsic_strobe */
			OMAP5_IOPAD(0x00c6, PIN_INPUT | MUX_MODE0)  /* usbb2_hsic_data */

			OMAP5_IOPAD(0x01dc, PIN_INPUT | MUX_MODE0)  /* usbb3_hsic_strobe */
			OMAP5_IOPAD(0x01de, PIN_INPUT | MUX_MODE0)  /* usbb3_hsic_data */

			OMAP5_IOPAD(0x00a8, PIN_OUTPUT | MUX_MODE6) /* hsi2_caready.gpio3_76 */
			OMAP5_IOPAD(0x00b6, PIN_OUTPUT | MUX_MODE6) /* hsi2_acdata.gpio3_83 */
		>;
	};

	dss_hdmi_pins: pinmux_dss_hdmi_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x013c, PIN_INPUT | MUX_MODE0) /* hdmi_cec */
			OMAP5_IOPAD(0x0140, PIN_INPUT | MUX_MODE0) /* hdmi_ddc_scl */
			OMAP5_IOPAD(0x0142, PIN_INPUT | MUX_MODE0) /* hdmi_ddc_sda */
		>;
	};

	lcd_pins: pinmux_lcd_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0172, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* timer11_pwm_evt.gpio8_227 */
		>;
	};

	hdmi_conn_pins: pinmux_hdmi_conn_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x013e, PIN_INPUT | MUX_MODE6) /* hdmi_hpd.gpio7_193 */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0104, PIN_OUTPUT | MUX_MODE3) /* rfbi_data15.dispc_data15 */
			OMAP5_IOPAD(0x0106, PIN_OUTPUT | MUX_MODE3) /* rfbi_data14.dispc_data14 */
			OMAP5_IOPAD(0x0108, PIN_OUTPUT | MUX_MODE3) /* rfbi_data13.dispc_data13 */
			OMAP5_IOPAD(0x010a, PIN_OUTPUT | MUX_MODE3) /* rfbi_data12.dispc_data12 */
			OMAP5_IOPAD(0x010c, PIN_OUTPUT | MUX_MODE3) /* rfbi_data11.dispc_data11 */
			OMAP5_IOPAD(0x010e, PIN_OUTPUT | MUX_MODE3) /* rfbi_data10.dispc_data10 */
			OMAP5_IOPAD(0x0110, PIN_OUTPUT | MUX_MODE3) /* rfbi_data9.dispc_data9 */
			OMAP5_IOPAD(0x0112, PIN_OUTPUT | MUX_MODE3) /* rfbi_data8.dispc_data8 */
			OMAP5_IOPAD(0x0114, PIN_OUTPUT | MUX_MODE3) /* rfbi_data7.dispc_data7 */
			OMAP5_IOPAD(0x0116, PIN_OUTPUT | MUX_MODE3) /* rfbi_data6.dispc_data6 */
			OMAP5_IOPAD(0x0118, PIN_OUTPUT | MUX_MODE3) /* rfbi_data5.dispc_data5 */
			OMAP5_IOPAD(0x011a, PIN_OUTPUT | MUX_MODE3) /* rfbi_data4.dispc_data4 */
			OMAP5_IOPAD(0x011c, PIN_OUTPUT | MUX_MODE3) /* rfbi_data3.dispc_data3 */
			OMAP5_IOPAD(0x011e, PIN_OUTPUT | MUX_MODE3) /* rfbi_data2.dispc_data2 */
			OMAP5_IOPAD(0x0120, PIN_OUTPUT | MUX_MODE3) /* rfbi_data1.dispc_data1 */
			OMAP5_IOPAD(0x0122, PIN_OUTPUT | MUX_MODE3) /* rfbi_data0.dispc_data0 */
			OMAP5_IOPAD(0x0124, PIN_OUTPUT | MUX_MODE3) /* rfbi_we.dispc_vsync */
			OMAP5_IOPAD(0x0126, PIN_OUTPUT | MUX_MODE3) /* rfbi_cs0.dispc_hsync */
			OMAP5_IOPAD(0x0128, PIN_OUTPUT | MUX_MODE3) /* rfbi_a0.dispc_de */
			OMAP5_IOPAD(0x012a, PIN_OUTPUT | MUX_MODE3) /* rfbi_re.dispc_pclk */
			OMAP5_IOPAD(0x012c, PIN_OUTPUT | MUX_MODE3) /* rfbi_hsync0.dispc_data17 */
			OMAP5_IOPAD(0x012e, PIN_OUTPUT | MUX_MODE3) /* rfbi_te_vsync0.dispc_data16 */
			OMAP5_IOPAD(0x0130, PIN_OUTPUT | MUX_MODE3) /* gpio6_182.dispc_data18 */
			OMAP5_IOPAD(0x0132, PIN_OUTPUT | MUX_MODE3) /* gpio6_183.dispc_data19 */
			OMAP5_IOPAD(0x0134, PIN_OUTPUT | MUX_MODE3) /* gpio6_184.dispc_data20 */
			OMAP5_IOPAD(0x0136, PIN_OUTPUT | MUX_MODE3) /* gpio6_185.dispc_data21 */
			OMAP5_IOPAD(0x0138, PIN_OUTPUT | MUX_MODE3) /* gpio6_186.dispc_data22 */
			OMAP5_IOPAD(0x013a, PIN_OUTPUT | MUX_MODE3) /* gpio6_187.dispc_data23 */
		>;
	};

	mcspi2_pins: pinmux_mcspi1_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x00fc, PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
			OMAP5_IOPAD(0x00fe, PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
			OMAP5_IOPAD(0x0100, PIN_INPUT | MUX_MODE0) /* mcspi2_somi */
			OMAP5_IOPAD(0x0102, PIN_INPUT | MUX_MODE0) /* mcspi2_cs0 */
		>;
	};
};

&mcspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi2_pins>;

	/* touch controller */
	ads7846@0 {
		pinctrl-names = "default";
		pinctrl-0 = <&ads7846_pins>;

		compatible = "ti,ads7846";
		vcc-supply = <&ads7846reg>;

		reg = <0>;				/* CS0 */
		spi-max-frequency = <1500000>;

		interrupt-parent = <&gpio1>;
		interrupts = <15 0>;			/* gpio1_wk15 */
		pendown-gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;

		ti,x-min = /bits/ 16 <0x0>;
		ti,x-max = /bits/ 16 <0x0fff>;
		ti,y-min = /bits/ 16 <0x0>;
		ti,y-max = /bits/ 16 <0x0fff>;

		ti,x-plate-ohms = /bits/ 16 <180>;
		ti,pressure-max = /bits/ 16 <255>;

		ti,debounce-max = /bits/ 16 <30>;
		ti,debounce-tol = /bits/ 16 <10>;
		ti,debounce-rep = /bits/ 16 <1>;

		wakeup-source;
	};
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&ldo9_reg>;
	bus-width = <4>;
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <8>;
	ti,non-removable;
};

&mmc3 {
	pinctrl-names = "default";
	pinctrl-0 = <
		&mmc3_pins
		&wlan_gpios_pins
	>;
	vmmc-supply = <&vwlan_fixed>;
	bus-width = <4>;
	ti,non-removable;
};

&mmc4 {
	status = "disabled";
};

&mmc5 {
	status = "disabled";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <400000>;

	at24@50 {
		compatible = "atmel,24c02";
		pagesize = <16>;
		reg = <0x50>;
	};

	palmas: palmas@48 {
		compatible = "ti,palmas";
		reg = <0x48>;
		pinctrl-0 = <&palmas_sys_nirq_pins>;
		pinctrl-names = "default";
		/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <2>;
		ti,system-power-controller;

		extcon_usb3: palmas_usb {
			compatible = "ti,palmas-usb-vid";
			ti,enable-vbus-detection;
			ti,enable-id-detection;
			ti,wakeup;
		};

		rtc {
			compatible = "ti,palmas-rtc";
			interrupt-parent = <&palmas>;
			interrupts = <8 IRQ_TYPE_NONE>;
		};

		palmas_pmic {
			compatible = "ti,palmas-pmic";
			interrupt-parent = <&palmas>;
			interrupts = <14 IRQ_TYPE_NONE>;
			interrupt-names = "short-irq";

			ti,ldo6-vibrator;

			regulators {
				smps123_reg: smps123 {
					/* VDD_OPP_MPU */
					regulator-name = "smps123";
					regulator-min-microvolt = < 600000>;
					regulator-max-microvolt = <1500000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps45_reg: smps45 {
					/* VDD_OPP_MM */
					regulator-name = "smps45";
					regulator-min-microvolt = < 600000>;
					regulator-max-microvolt = <1310000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps6_reg: smps6 {
					/* VDD_DDR3 - over VDD_SMPS6 */
					regulator-name = "smps6";
					regulator-min-microvolt = <1500000>;
					regulator-max-microvolt = <1500000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps7_reg: smps7 {
					/* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
					regulator-name = "smps7";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps8_reg: smps8 {
					/* VDD_OPP_CORE */
					regulator-name = "smps8";
					regulator-min-microvolt = < 600000>;
					regulator-max-microvolt = <1310000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps9_reg: smps9 {
					/* VDDA_2v1_AUD over VDD_2v1 */
					regulator-name = "smps9";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					ti,smps-range = <0x80>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps10_out2_reg: smps10_out2 {
					/* VBUS_5V_OTG */
					regulator-name = "smps10_out2";
					regulator-min-microvolt = <5000000>;
					regulator-max-microvolt = <5000000>;
					regulator-always-on;
					regulator-boot-on;
				};

				smps10_out1_reg: smps10_out1 {
					/* VBUS_5V_OTG */
					regulator-name = "smps10_out1";
					regulator-min-microvolt = <5000000>;
					regulator-max-microvolt = <5000000>;
				};

				ldo1_reg: ldo1 {
					/* VDDAPHY_CAM: vdda_csiport */
					regulator-name = "ldo1";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo2_reg: ldo2 {
					/* VDD_3V3_WLAN */
					regulator-name = "ldo2";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					startup-delay-us = <1000>;
				};

				ldo3_reg: ldo3 {
					/* VCC_1V5_AUD */
					regulator-name = "ldo3";
					regulator-min-microvolt = <1500000>;
					regulator-max-microvolt = <1500000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldo4_reg: ldo4 {
					/* VDDAPHY_DISP: vdda_dsiport/hdmi */
					regulator-name = "ldo4";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo5_reg: ldo5 {
					/* VDDA_1V8_PHY: usb/sata/hdmi.. */
					regulator-name = "ldo5";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldo6_reg: ldo6 {
					/* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
					regulator-name = "ldo6";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldo7_reg: ldo7 {
					/* VDD_VPP: vpp1 */
					regulator-name = "ldo7";
					regulator-min-microvolt = <2000000>;
					regulator-max-microvolt = <2000000>;
					/* Only for efuse reprograming! */
					status = "disabled";
				};

				ldo8_reg: ldo8 {
					/* VDD_3V_GP: act led/serial console */
					regulator-name = "ldo8";
					regulator-min-microvolt = <3000000>;
					regulator-max-microvolt = <3000000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldo9_reg: ldo9 {
					/* VCC_DV_SDIO: vdds_sdcard */
					regulator-name = "ldo9";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <3000000>;
					regulator-boot-on;
				};

				ldoln_reg: ldoln {
					/* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
					regulator-name = "ldoln";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
					regulator-boot-on;
				};

				ldousb_reg: ldousb {
					/* VDDA_3V_USB: VDDA_USBHS33 */
					regulator-name = "ldousb";
					regulator-min-microvolt = <3250000>;
					regulator-max-microvolt = <3250000>;
					regulator-always-on;
					regulator-boot-on;
				};

				regen3_reg: regen3 {
					/* REGEN3 controls LDO9 supply to card */
					regulator-name = "regen3";
					regulator-always-on;
					regulator-boot-on;
				};
			};
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;

	clock-frequency = <100000>;
};

&usbhshost {
	port2-mode = "ehci-hsic";
	port3-mode = "ehci-hsic";
};

&usbhsehci {
	phys = <0 &hsusb2_phy &hsusb3_phy>;
};

&usb3 {
	extcon = <&extcon_usb3>;
	vbus-supply = <&smps10_out1_reg>;
};

&cpu0 {
	cpu0-supply = <&smps123_reg>;
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_dpi_pins>;

	port {
		#address-cells = <1>;
		#size-cells = <0>;

		dpi_dvi_out: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};

		dpi_lcd_out: endpoint@1 {
			reg = <1>;
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};

&dsi2 {
	status = "okay";
	vdd-supply = <&ldo4_reg>;
};

&hdmi {
	status = "okay";
	vdda-supply = <&ldo4_reg>;

	pinctrl-names = "default";
	pinctrl-0 = <&dss_hdmi_pins>;

	port {
		hdmi_out: endpoint {
			remote-endpoint = <&hdmi_connector_in>;
			lanes = <1 0 3 2 5 4 7 6>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP543x SoC CORE thermal
 *
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 * Contact: Eduardo Valentin <eduardo.valentin@ti.com>
 */

#include <dt-bindings/thermal/thermal.h>

core_thermal: core_thermal {
	polling-delay-passive = <250>; /* milliseconds */
	polling-delay = <500>; /* milliseconds */

			/* sensor       ID */
	thermal-sensors = <&bandgap     2>;

	trips {
		core_crit: core_crit {
			temperature = <125000>; /* milliCelsius */
			hysteresis = <2000>; /* milliCelsius */
			type = "critical";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP543x SoC GPU thermal
 *
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 * Contact: Eduardo Valentin <eduardo.valentin@ti.com>
 */

#include <dt-bindings/thermal/thermal.h>

gpu_thermal: gpu_thermal {
	polling-delay-passive = <250>; /* milliseconds */
	polling-delay = <500>; /* milliseconds */

			/* sensor       ID */
	thermal-sensors = <&bandgap     1>;

	trips {
		gpu_crit: gpu_crit {
			temperature = <125000>; /* milliCelsius */
			hysteresis = <2000>; /* milliCelsius */
			type = "critical";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz/
 */
/dts-v1/;

#include <dt-bindings/input/input.h>
#include "omap5-board-common.dtsi"

/ {
	model = "IGEPv5";
	compatible = "isee,omap5-igep0050", "ti,omap5";

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0 0x7f000000>;	/* 2032 MB */
	};

	aliases {
		ethernet = &ethernet;
	};

	gpio_keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&power_button_pin>;
		pinctrl-names = "default";

		power-button {
			label = "Power Button";
			linux,code = <KEY_POWER>;
			gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
		};
	};

	leds {
		compatible = "gpio-leds";
		led@1 {
			label = "board:green:usr0";
			gpios = <&tca6416 1 0>;
			default-state = "off";
		};
		led@2 {
			label = "board:red:usr1";
			gpios = <&tca6416 2 0>;
			default-state = "off";
		};
		led@3 {
			label = "board:blue:usr1";
			gpios = <&tca6416 3 0>;
			default-state = "off";
		};
	};
};

&hdmi {
	vdda-supply = <&ldo7_reg>;
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4_pins>;

	tca6416: tca6416@21 {
		compatible = "ti,tca6416";
		reg = <0x21>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

/* LDO4 is VPP1 - ball AD9 */
&ldo4_reg {
	regulator-min-microvolt = <2000000>;
	regulator-max-microvolt = <2000000>;
};

/*
 * LDO7 is used for HDMI: VDDA_DSIPORTA - ball AA33, VDDA_DSIPORTC - ball AE33,
 * VDDA_HDMI - ball AN25
 */
&ldo7_reg {
	status = "okay";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
};

&omap5_pmx_core {
	i2c4_pins: pinmux_i2c4_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0)	/* i2c4_scl */
			OMAP5_IOPAD(0x0fa, PIN_INPUT | MUX_MODE0)	/* i2c4_sda */
		>;
	};

	power_button_pin: pinctrl_power_button_pin {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x086, PIN_INPUT | MUX_MODE6)	/* gpio4_118 */
		>;
	};
};

&tpd12s015 {
	gpios = <&tca6416 11 0>,	/* TCA6416 P01, CT_CP_HDP */
		<&tca6416 12 0>,	/* TCA6416 P00, LS_OE*/
		<&gpio7 1 0>,		/* 193, HPD */
		<&gpio7 2 0>,		/* 194, SCL */
		<&gpio7 3 0>;		/* 195, SDA */
};

&twl6040 {
	ti,audpwron-gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>;  /* gpio line 144 */
};

&twl6040_pins {
	pinctrl-single,pins = <
		OMAP5_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE6)	/* mcspi1_somi.gpio5_144 */
		OMAP5_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE6)	/* perslimbus2_clock.gpio5_145 */
	>;
};

&usbhsehci {
	#address-cells = <1>;
	#size-cells = <0>;

	hub@2 {
		compatible = "usb424,3503";
		reg = <2>;
		#address-cells = <1>;
		#size-cells = <0>;

		ethernet: ethernet@3 {
			compatible = "usb424,7500";
			reg = <3>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Suppport for CompuLab CM-T54 on SB-T54 baseboard
 */

#include "omap5-cm-t54.dts"

/ {
	model = "CompuLab CM-T54 on SB-T54";
	compatible = "compulab,omap5-sbc-t54", "compulab,omap5-cm-t54", "ti,omap5";
};

&omap5_pmx_core {
	i2c4_pins: pinmux_i2c4_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x00f8, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
			OMAP5_IOPAD(0x00fa, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
		>;
	};

	mmc1_aux_pins: pinmux_mmc1_aux_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0174, PIN_INPUT_PULLUP | MUX_MODE6) /* timer5_pwm_evt.gpio8_228 */
			OMAP5_IOPAD(0x0176, PIN_INPUT_PULLUP | MUX_MODE6) /* timer6_pwm_evt.gpio8_229 */
		>;
	};
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <
		&mmc1_pins
		&mmc1_aux_pins
	>;
	cd-inverted;
	wp-inverted;
	cd-gpios = <&gpio8 4 GPIO_ACTIVE_LOW>; /* gpio8_228 */
	wp-gpios = <&gpio8 5 GPIO_ACTIVE_LOW>; /* gpio8_229 */
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4_pins>;

	clock-frequency = <400000>;

	at24@50 {
		compatible = "atmel,24c02";
		pagesize = <16>;
		reg = <0x50>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap5-board-common.dtsi"

/ {
	model = "TI OMAP5 uEVM board";
	compatible = "ti,omap5-uevm", "ti,omap5";

	memory@80000000 {
		device_type = "memory";
		reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		dsp_memory_region: dsp-memory@95000000 {
			compatible = "shared-dma-pool";
			reg = <0 0x95000000 0 0x800000>;
			reusable;
			status = "okay";
		};

		ipu_memory_region: ipu-memory@95800000 {
			compatible = "shared-dma-pool";
			reg = <0 0x95800000 0 0x3800000>;
			reusable;
			status = "okay";
		};
	};

	aliases {
		ethernet = &ethernet;
	};

	leds {
		compatible = "gpio-leds";
		led1 {
			label = "omap5:blue:usr1";
			gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};
	};

	evm_keys {
		compatible = "gpio-keys";

		pinctrl-names = "default";
		pinctrl-0 = <&evm_keys_pins>;

		#address-cells = <7>;
		#size-cells = <0>;

		btn1 {
			label = "BTN1";
			linux,code = <169>;
			gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;	/* gpio3_83 */
			wakeup-source;
			autorepeat;
			debounce-interval = <50>;
		};
	};

	evm_leds {
		compatible = "gpio-leds";

		led1 {
			label = "omap5:red:led";
			gpios = <&gpio9 17 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led2 {
			label = "omap5:green:led";
			gpios = <&gpio9 18 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};

		led3 {
			label = "omap5:blue:led";
			gpios = <&gpio9 19 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc2";
			default-state = "off";
		};

		led4 {
			label = "omap5:green:led1";
			gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led5 {
			label = "omap5:green:led2";
			gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "default-on";
			default-state = "off";
		};

		led6 {
			label = "omap5:green:led3";
			gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led7 {
			label = "omap5:green:led4";
			gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "default-on";
			default-state = "off";
		};

		led8 {
			label = "omap5:green:led5";
			gpios = <&gpio9 6 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};
	};
};

&hdmi {
	vdda-supply = <&ldo4_reg>;
};

&i2c1 {
	eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
	};
};

&i2c5 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c5_pins>;

	clock-frequency = <400000>;

	gpio9: gpio@22 {
		compatible = "ti,tca6424";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;

	cd-gpios = <&gpio5 24 GPIO_ACTIVE_LOW>;	/* gpio5_152 */
};

&omap5_pmx_core {
	evm_keys_pins: pinmux_evm_keys_gpio_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x0b6, PIN_INPUT | MUX_MODE6)	/* gpio3_83 */
		>;
	};

	i2c5_pins: pinmux_i2c5_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x1c6, PIN_INPUT | MUX_MODE0)		/* i2c5_scl */
			OMAP5_IOPAD(0x1c8, PIN_INPUT | MUX_MODE0)		/* i2c5_sda */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x1d4, PIN_INPUT_PULLUP | MUX_MODE6)	/* gpio5_152 */
		>;
	};
};

&tpd12s015 {
	gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>,	/* TCA6424A P01, CT CP HPD */
		<&gpio9 1 GPIO_ACTIVE_HIGH>,	/* TCA6424A P00, LS OE */
		<&gpio7 1 GPIO_ACTIVE_HIGH>;	/* GPIO 193, HPD */
};

&twl6040 {
	ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>;  /* gpio line 141 */
};

&twl6040_pins {
	pinctrl-single,pins = <
		OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6)	/* mcspi1_somi.gpio5_141 */
	>;
};

&usbhsehci {
	#address-cells = <1>;
	#size-cells = <0>;

	hub@2 {
		compatible = "usb424,3503";
		reg = <2>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	ethernet: ethernet@3 {
		compatible = "usb424,9730";
		reg = <3>;
	};
};

&wlcore {
	compatible = "ti,wl1837";
};

&dsp {
	status = "okay";
	memory-region = <&dsp_memory_region>;
	ti,timers = <&timer5>;
	ti,watchdog-timers = <&timer6>;
};

&ipu {
	status = "okay";
	memory-region = <&ipu_memory_region>;
	ti,timers = <&timer3>;
	ti,watchdog-timers = <&timer9>, <&timer11>;
};