code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 *  Copyright (C) 2019 Lubomir Rintel <lkundrak@v3.sk>
 */

#include <dt-bindings/clock/marvell,mmp2.h>
#include <dt-bindings/power/marvell,mmp2.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "marvell,mmp3-smp";

		cpu@0 {
			compatible = "marvell,pj4b";
			device_type = "cpu";
			next-level-cache = <&l2>;
			reg = <0>;
		};

		cpu@1 {
			compatible = "marvell,pj4b";
			device_type = "cpu";
			next-level-cache = <&l2>;
			reg = <1>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&gic>;
		ranges;

		axi@d4200000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0xd4200000 0x00200000>;
			ranges;

			interrupt-controller@d4282000 {
				compatible = "marvell,mmp3-intc";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0xd4282000 0x1000>,
				      <0xd4284000 0x100>;
				mrvl,intc-nr-irqs = <64>;
			};

			pmic_mux: interrupt-controller@d4282150 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x150 0x4>, <0x168 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <4>;
			};

			rtc_mux: interrupt-controller@d4282154 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x154 0x4>, <0x16c 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <2>;
			};

			hsi3_mux: interrupt-controller@d42821bc {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x1bc 0x4>, <0x1a4 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <3>;
			};

			gpu_mux: interrupt-controller@d42821c0 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x1c0 0x4>, <0x1a8 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <3>;
			};

			twsi_mux: interrupt-controller@d4282158 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x158 0x4>, <0x170 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <5>;
			};

			hsi2_mux: interrupt-controller@d42821c4 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x1c4 0x4>, <0x1ac 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <2>;
			};

			dxo_mux: interrupt-controller@d42821c8 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x1c8 0x4>, <0x1b0 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <2>;
			};

			misc1_mux: interrupt-controller@d428215c {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x15c 0x4>, <0x174 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <31>;
			};

			ci_mux: interrupt-controller@d42821cc {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x1cc 0x4>, <0x1b4 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <2>;
			};

			ssp_mux: interrupt-controller@d4282160 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x160 0x4>, <0x178 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <2>;
			};

			hsi1_mux: interrupt-controller@d4282184 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x184 0x4>, <0x17c 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <4>;
			};

			misc2_mux: interrupt-controller@d4282188 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x188 0x4>, <0x180 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <20>;
			};

			hsi0_mux: interrupt-controller@d42821d0 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x1d0 0x4>, <0x1b8 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <5>;
			};

			usb_otg_phy0: usb-phy@d4207000 {
				compatible = "marvell,mmp3-usb-phy";
				reg = <0xd4207000 0x40>;
				#phy-cells = <0>;
				status = "disabled";
			};

			usb_otg0: usb@d4208000 {
				compatible = "marvell,pxau2o-ehci";
				reg = <0xd4208000 0x200>;
				interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&soc_clocks MMP2_CLK_USB>;
				clock-names = "USBCLK";
				phys = <&usb_otg_phy0>;
				phy-names = "usb";
				status = "disabled";
			};

			hsic_phy0: usb-phy@f0001800 {
				compatible = "marvell,mmp3-hsic-phy";
				reg = <0xf0001800 0x40>;
				#phy-cells = <0>;
				status = "disabled";
			};

			hsic0: usb@f0001000 {
				compatible = "marvell,pxau2o-ehci";
				reg = <0xf0001000 0x200>;
				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&soc_clocks MMP2_CLK_USBHSIC0>;
				clock-names = "USBCLK";
				phys = <&hsic_phy0>;
				phy-names = "usb";
				phy_type = "hsic";
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
			};

			hsic_phy1: usb-phy@f0002800 {
				compatible = "marvell,mmp3-hsic-phy";
				reg = <0xf0002800 0x40>;
				#phy-cells = <0>;
				status = "disabled";
			};

			hsic1: usb@f0002000 {
				compatible = "marvell,pxau2o-ehci";
				reg = <0xf0002000 0x200>;
				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&soc_clocks MMP2_CLK_USBHSIC1>;
				clock-names = "USBCLK";
				phys = <&hsic_phy1>;
				phy-names = "usb";
				phy_type = "hsic";
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
			};

			mmc1: mmc@d4280000 {
				compatible = "mrvl,pxav3-mmc";
				reg = <0xd4280000 0x120>;
				clocks = <&soc_clocks MMP2_CLK_SDH0>;
				clock-names = "io";
				interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			mmc2: mmc@d4280800 {
				compatible = "mrvl,pxav3-mmc";
				reg = <0xd4280800 0x120>;
				clocks = <&soc_clocks MMP2_CLK_SDH1>;
				clock-names = "io";
				interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			mmc3: mmc@d4281000 {
				compatible = "mrvl,pxav3-mmc";
				reg = <0xd4281000 0x120>;
				clocks = <&soc_clocks MMP2_CLK_SDH2>;
				clock-names = "io";
				interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			mmc4: mmc@d4281800 {
				compatible = "mrvl,pxav3-mmc";
				reg = <0xd4281800 0x120>;
				clocks = <&soc_clocks MMP2_CLK_SDH3>;
				clock-names = "io";
				interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			mmc5: mmc@d4217000 {
				compatible = "mrvl,pxav3-mmc";
				reg = <0xd4217000 0x120>;
				clocks = <&soc_clocks MMP3_CLK_SDH4>;
				clock-names = "io";
				interrupt-parent = <&hsi1_mux>;
				interrupts = <0>;
				status = "disabled";
			};

			camera0: camera@d420a000 {
				compatible = "marvell,mmp2-ccic";
				reg = <0xd420a000 0x800>;
				interrupts = <1>;
				interrupt-parent = <&ci_mux>;
				clocks = <&soc_clocks MMP2_CLK_CCIC0>;
				clock-names = "axi";
				power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
				#clock-cells = <0>;
				clock-output-names = "mclk";
				status = "disabled";
			};

			camera1: camera@d420a800 {
				compatible = "marvell,mmp2-ccic";
				reg = <0xd420a800 0x800>;
				interrupts = <2>;
				interrupt-parent = <&ci_mux>;
				clocks = <&soc_clocks MMP2_CLK_CCIC1>;
				clock-names = "axi";
				power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
				#clock-cells = <0>;
				clock-output-names = "mclk";
				status = "disabled";
			};

			gpu_3d: gpu@d420d000 {
				compatible = "vivante,gc";
				reg = <0xd420d000 0x2000>;
				interrupt-parent = <&gpu_mux>;
				interrupts = <0>;
				status = "disabled";
				clocks = <&soc_clocks MMP3_CLK_GPU_3D>,
					 <&soc_clocks MMP3_CLK_GPU_BUS>;
				clock-names = "core", "bus";
				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>;
			};

			gpu_2d: gpu@d420f000 {
				compatible = "vivante,gc";
				reg = <0xd420f000 0x2000>;
				interrupt-parent = <&gpu_mux>;
				interrupts = <2>;
				status = "disabled";
				clocks = <&soc_clocks MMP3_CLK_GPU_2D>,
					 <&soc_clocks MMP3_CLK_GPU_BUS>;
				clock-names = "core", "bus";
				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>;
			};
		};

		apb@d4000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0xd4000000 0x00200000>;
			ranges;

			timer: timer@d4014000 {
				compatible = "mrvl,mmp-timer";
				reg = <0xd4014000 0x100>;
				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&soc_clocks MMP2_CLK_TIMER>;
			};

			uart1: serial@d4030000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4030000 0x1000>;
				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&soc_clocks MMP2_CLK_UART0>;
				resets = <&soc_clocks MMP2_CLK_UART0>;
				reg-shift = <2>;
				status = "disabled";
			};

			uart2: serial@d4017000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4017000 0x1000>;
				interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&soc_clocks MMP2_CLK_UART1>;
				resets = <&soc_clocks MMP2_CLK_UART1>;
				reg-shift = <2>;
				status = "disabled";
			};

			uart3: serial@d4018000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4018000 0x1000>;
				interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&soc_clocks MMP2_CLK_UART2>;
				resets = <&soc_clocks MMP2_CLK_UART2>;
				reg-shift = <2>;
				status = "disabled";
			};

			uart4: serial@d4016000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4016000 0x1000>;
				interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&soc_clocks MMP2_CLK_UART3>;
				resets = <&soc_clocks MMP2_CLK_UART3>;
				reg-shift = <2>;
				status = "disabled";
			};

			gpio: gpio@d4019000 {
				compatible = "marvell,mmp2-gpio";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0xd4019000 0x1000>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "gpio_mux";
				clocks = <&soc_clocks MMP2_CLK_GPIO>;
				resets = <&soc_clocks MMP2_CLK_GPIO>;
				interrupt-controller;
				#interrupt-cells = <2>;
				ranges;

				gcb0: gpio@d4019000 {
					reg = <0xd4019000 0x4>;
				};

				gcb1: gpio@d4019004 {
					reg = <0xd4019004 0x4>;
				};

				gcb2: gpio@d4019008 {
					reg = <0xd4019008 0x4>;
				};

				gcb3: gpio@d4019100 {
					reg = <0xd4019100 0x4>;
				};

				gcb4: gpio@d4019104 {
					reg = <0xd4019104 0x4>;
				};

				gcb5: gpio@d4019108 {
					reg = <0xd4019108 0x4>;
				};
			};

			twsi1: i2c@d4011000 {
				compatible = "mrvl,mmp-twsi";
				reg = <0xd4011000 0x70>;
				interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&soc_clocks MMP2_CLK_TWSI0>;
				resets = <&soc_clocks MMP2_CLK_TWSI0>;
				#address-cells = <1>;
				#size-cells = <0>;
				mrvl,i2c-fast-mode;
				status = "disabled";
			};

			twsi2: i2c@d4031000 {
				compatible = "mrvl,mmp-twsi";
				reg = <0xd4031000 0x70>;
				interrupt-parent = <&twsi_mux>;
				interrupts = <0>;
				clocks = <&soc_clocks MMP2_CLK_TWSI1>;
				resets = <&soc_clocks MMP2_CLK_TWSI1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			twsi3: i2c@d4032000 {
				compatible = "mrvl,mmp-twsi";
				reg = <0xd4032000 0x70>;
				interrupt-parent = <&twsi_mux>;
				interrupts = <1>;
				clocks = <&soc_clocks MMP2_CLK_TWSI2>;
				resets = <&soc_clocks MMP2_CLK_TWSI2>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			twsi4: i2c@d4033000 {
				compatible = "mrvl,mmp-twsi";
				reg = <0xd4033000 0x70>;
				interrupt-parent = <&twsi_mux>;
				interrupts = <2>;
				clocks = <&soc_clocks MMP2_CLK_TWSI3>;
				resets = <&soc_clocks MMP2_CLK_TWSI3>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			twsi5: i2c@d4033800 {
				compatible = "mrvl,mmp-twsi";
				reg = <0xd4033800 0x70>;
				interrupt-parent = <&twsi_mux>;
				interrupts = <3>;
				clocks = <&soc_clocks MMP2_CLK_TWSI4>;
				resets = <&soc_clocks MMP2_CLK_TWSI4>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			twsi6: i2c@d4034000 {
				compatible = "mrvl,mmp-twsi";
				reg = <0xd4034000 0x70>;
				interrupt-parent = <&twsi_mux>;
				interrupts = <4>;
				clocks = <&soc_clocks MMP2_CLK_TWSI5>;
				resets = <&soc_clocks MMP2_CLK_TWSI5>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			rtc: rtc@d4010000 {
				compatible = "mrvl,mmp-rtc";
				reg = <0xd4010000 0x1000>;
				interrupts = <1>, <0>;
				interrupt-names = "rtc 1Hz", "rtc alarm";
				interrupt-parent = <&rtc_mux>;
				clocks = <&soc_clocks MMP2_CLK_RTC>;
				resets = <&soc_clocks MMP2_CLK_RTC>;
				status = "disabled";
			};

			ssp1: spi@d4035000 {
				compatible = "marvell,mmp2-ssp";
				reg = <0xd4035000 0x1000>;
				clocks = <&soc_clocks MMP2_CLK_SSP0>;
				interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			ssp2: spi@d4036000 {
				compatible = "marvell,mmp2-ssp";
				reg = <0xd4036000 0x1000>;
				clocks = <&soc_clocks MMP2_CLK_SSP1>;
				interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			ssp3: spi@d4037000 {
				compatible = "marvell,mmp2-ssp";
				reg = <0xd4037000 0x1000>;
				clocks = <&soc_clocks MMP2_CLK_SSP2>;
				interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			ssp4: spi@d4039000 {
				compatible = "marvell,mmp2-ssp";
				reg = <0xd4039000 0x1000>;
				clocks = <&soc_clocks MMP2_CLK_SSP3>;
				interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		l2: cache-controller@d0020000 {
			compatible = "marvell,tauros3-cache", "arm,pl310-cache";
			reg = <0xd0020000 0x1000>;
			cache-unified;
			cache-level = <2>;
		};

		soc_clocks: clocks@d4050000 {
			compatible = "marvell,mmp3-clock";
			reg = <0xd4050000 0x2000>,
			      <0xd4282800 0x400>,
			      <0xd4015000 0x1000>;
			reg-names = "mpmu", "apmu", "apbc";
			#clock-cells = <1>;
			#reset-cells = <1>;
			#power-domain-cells = <1>;
		};

		snoop-control-unit@e0000000 {
			compatible = "arm,arm11mp-scu";
			reg = <0xe0000000 0x100>;
		};

		gic: interrupt-controller@e0001000 {
			compatible = "arm,arm11mp-gic";
			interrupt-controller;
			#interrupt-cells = <3>;
			reg = <0xe0001000 0x1000>,
			      <0xe0000100 0x100>;
		};

		local-timer@e0000600 {
			compatible = "arm,arm11mp-twd-timer";
			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
						  IRQ_TYPE_EDGE_RISING)>;
			reg = <0xe0000600 0x20>;
		};

		watchdog@e0000620 {
			compatible = "arm,arm11mp-twd-wdt";
			reg = <0xe0000620 0x20>;
			interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
						  IRQ_TYPE_EDGE_RISING)>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Common CPCAP configuration used on Motorola phones
 */

&mcspi1 {
	cpcap: pmic@0 {
		compatible = "motorola,cpcap", "st,6556002";
		reg = <0>;	/* cs0 */
		interrupt-parent = <&gpio1>;
		interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-controller;
		#interrupt-cells = <2>;
		#address-cells = <1>;
		#size-cells = <0>;
		spi-max-frequency = <9600000>;
		spi-cs-high;
		spi-cpol;
		spi-cpha;

		cpcap_adc: adc {
			compatible = "motorola,mapphone-cpcap-adc";
			interrupts-extended = <&cpcap 8 0>;
			interrupt-names = "adcdone";
			#io-channel-cells = <1>;
		};

		cpcap_battery: battery {
			compatible = "motorola,cpcap-battery";
			interrupts-extended =
				<&cpcap 6 0>, <&cpcap 5 0>, <&cpcap 3 0>,
				<&cpcap 20 0>, <&cpcap 54 0>, <&cpcap 57 0>;
			interrupt-names =
				"eol", "lowbph", "lowbpl",
				"chrgcurr1", "battdetb", "cccal";
			io-channels = <&cpcap_adc 0>, <&cpcap_adc 1>,
				      <&cpcap_adc 5>, <&cpcap_adc 6>;
			io-channel-names = "battdetb", "battp",
					   "chg_isense", "batti";
			power-supplies = <&cpcap_charger>;
		};

		cpcap_charger: charger {
			compatible = "motorola,mapphone-cpcap-charger";
			interrupts-extended =
				<&cpcap 13 0>, <&cpcap 12 0>, <&cpcap 29 0>,
				<&cpcap 28 0>, <&cpcap 22 0>, <&cpcap 21 0>,
				<&cpcap 20 0>, <&cpcap 19 0>, <&cpcap 54 0>;
			interrupt-names =
				"chrg_det", "rvrs_chrg", "chrg_se1b",
				"se0conn", "rvrs_mode", "chrgcurr2",
				"chrgcurr1", "vbusvld", "battdetb";
			mode-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>,
				     <&gpio3 23 GPIO_ACTIVE_LOW>;
			io-channels = <&cpcap_adc 0>, <&cpcap_adc 1>,
				      <&cpcap_adc 2>, <&cpcap_adc 5>,
				      <&cpcap_adc 6>;
			io-channel-names = "battdetb", "battp",
					   "vbus", "chg_isense",
					   "batti";
		};

		cpcap_regulator: regulator {
			compatible = "motorola,mapphone-cpcap-regulator";

			cpcap_regulators: regulators {
			};
		};

		cpcap_audio: audio-codec {
			#sound-dai-cells = <1>;

			port@0 {
				cpcap_audio_codec0: endpoint {
				};
			};
			port@1 {
				cpcap_audio_codec1: endpoint {
				};
			};
		};

		cpcap_rtc: rtc {
			compatible = "motorola,cpcap-rtc";

			interrupt-parent = <&cpcap>;
			interrupts = <39 IRQ_TYPE_NONE>, <26 IRQ_TYPE_NONE>;
		};

		power_button: button {
			compatible = "motorola,cpcap-pwrbutton";

			interrupts = <23 IRQ_TYPE_NONE>;
		};

		cpcap_usb2_phy: phy {
			compatible = "motorola,mapphone-cpcap-usb-phy";
			pinctrl-0 = <&usb_gpio_mux_sel1>, <&usb_gpio_mux_sel2>;
			pinctrl-1 = <&usb_ulpi_pins>;
			pinctrl-2 = <&usb_utmi_pins>;
			pinctrl-3 = <&uart3_pins>;
			pinctrl-names = "default", "ulpi", "utmi", "uart";
			#phy-cells = <0>;
			interrupts-extended =
				<&cpcap 15 0>, <&cpcap 14 0>, <&cpcap 28 0>,
				<&cpcap 19 0>, <&cpcap 18 0>, <&cpcap 17 0>,
				<&cpcap 16 0>, <&cpcap 49 0>, <&cpcap 48 0>;
			interrupt-names =
				"id_ground", "id_float", "se0conn",
				"vbusvld", "sessvld", "sessend",
				"se1", "dm", "dp";
			mode-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>,
				     <&gpio1 0 GPIO_ACTIVE_HIGH>;
			io-channels = <&cpcap_adc 2>, <&cpcap_adc 7>;
			io-channel-names = "vbus", "id";
			vusb-supply = <&vusb>;
		};

		led_red: led-red {
			compatible = "motorola,cpcap-led-red";
			vdd-supply = <&sw5>;
			label = "status-led:red";
		};

		led_green: led-green {
			compatible = "motorola,cpcap-led-green";
			vdd-supply = <&sw5>;
			label = "status-led:green";
		};

		led_blue: led-blue {
			compatible = "motorola,cpcap-led-blue";
			vdd-supply = <&sw5>;
			label = "status-led:blue";
		};

		led_adl: led-adl {
			compatible = "motorola,cpcap-led-adl";
			vdd-supply = <&sw5>;
			label = "button-backlight";
		};

		led_cp: led-cp {
			compatible = "motorola,cpcap-led-cp";
			vdd-supply = <&sw5>;
			label = "shift-key-light";
		};
	};
};

&cpcap_regulators {
	sw5: SW5 {
		regulator-min-microvolt = <5050000>;
		regulator-max-microvolt = <5050000>;
		regulator-enable-ramp-delay = <50000>;
		regulator-boot-on;
	};

	vcam: VCAM {
		regulator-min-microvolt = <2900000>;
		regulator-max-microvolt = <2900000>;
		regulator-enable-ramp-delay = <1000>;
	};

	/* Used by DSS and is the "zerov_regulator" trigger for SoC off mode */
	vcsi: VCSI {
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-enable-ramp-delay = <1000>;
		regulator-always-on;
	};

	vdac: VDAC {
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vdig: VDIG {
		regulator-min-microvolt = <1875000>;
		regulator-max-microvolt = <1875000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vfuse: VFUSE {
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <3150000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vhvio: VHVIO {
		regulator-min-microvolt = <2775000>;
		regulator-max-microvolt = <2775000>;
		regulator-enable-ramp-delay = <1000>;
		regulator-always-on;
	};

	/* Used by eMMC at mmc2 */
	vsdio: VSDIO {
		regulator-min-microvolt = <2900000>;
		regulator-max-microvolt = <2900000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vpll: VPLL {
		regulator-min-microvolt = <1200000>;
		regulator-max-microvolt = <1800000>;
		regulator-enable-ramp-delay = <100>;
	};

	vrf1: VRF1 {
		regulator-min-microvolt = <2775000>;
		regulator-max-microvolt = <2775000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vrf2: VRF2 {
		regulator-min-microvolt = <2775000>;
		regulator-max-microvolt = <2775000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vrfref: VRFREF {
		regulator-min-microvolt = <2500000>;
		regulator-max-microvolt = <2775000>;
		regulator-enable-ramp-delay = <100>;
	};

	vwlan1: VWLAN1 {
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1900000>;
		regulator-enable-ramp-delay = <1000>;
	};

	/* Used by micro-SDIO at mmc1 */
	vwlan2: VWLAN2 {
		regulator-min-microvolt = <3000000>;
		regulator-max-microvolt = <3000000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vsim: VSIM {
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <2900000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vsimcard: VSIMCARD {
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <2900000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vvib: VVIB {
		regulator-min-microvolt = <1300000>;
		regulator-max-microvolt = <3000000>;
		regulator-enable-ramp-delay = <500>;
	};

	vusb: VUSB {
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-enable-ramp-delay = <1000>;
	};

	vaudio: VAUDIO {
		regulator-min-microvolt = <2775000>;
		regulator-max-microvolt = <2775000>;
		regulator-enable-ramp-delay = <1000>;
		regulator-initial-mode = <0x00>; /* NORMAL */
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;

#include <dt-bindings/input/input.h>
#include "omap443x.dtsi"
#include "motorola-cpcap-mapphone.dtsi"

/ {
	chosen {
		stdout-path = &uart3;
	};

	aliases {
		display0 = &lcd0;
		display1 = &hdmi0;
	};

	/*
	 * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
	 * then 1023 - 1024 seems to contain mbm.
	 */
	memory {
		device_type = "memory";
		reg = <0x80000000 0x3fd00000>;	/* 1021 MB */
	};

	/* Poweroff GPIO probably connected to CPCAP */
	gpio-poweroff {
		compatible = "gpio-poweroff";
		pinctrl-0 = <&poweroff_gpio>;
		pinctrl-names = "default";
		gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;	/* gpio50 */
	};

	hdmi0: connector {
		compatible = "hdmi-connector";
		pinctrl-0 = <&hdmi_hpd_gpio>;
		pinctrl-names = "default";
		label = "hdmi";
		type = "d";

		hpd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;	/* gpio63 */

		port {
			hdmi_connector_in: endpoint {
				remote-endpoint = <&hdmi_out>;
			};
		};
	};

	/*
	 * HDMI 5V regulator probably sourced from battery. Let's keep
	 * keep this as always enabled for HDMI to work until we've
	 * figured what the encoder chip is.
	 */
	hdmi_regulator: regulator-hdmi {
		compatible = "regulator-fixed";
		regulator-name = "hdmi";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>;	/* gpio59 */
		enable-active-high;
		regulator-always-on;
	};

	/* FS USB Host PHY on port 1 for mdm6600 */
	fsusb1_phy: usb-phy@1 {
		compatible = "motorola,mapphone-mdm6600";
		pinctrl-0 = <&usb_mdm6600_pins>;
		pinctrl-names = "default";
		enable-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;     /* gpio_95 */
		power-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;	/* gpio_54 */
		reset-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;	/* gpio_49 */
		/* mode: gpio_148 gpio_149 */
		motorola,mode-gpios = <&gpio5 20 GPIO_ACTIVE_HIGH>,
				      <&gpio5 21 GPIO_ACTIVE_HIGH>;
		/* cmd: gpio_103 gpio_104 gpio_142 */
		motorola,cmd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>,
				     <&gpio4 8 GPIO_ACTIVE_HIGH>,
				     <&gpio5 14 GPIO_ACTIVE_HIGH>;
		/* status: gpio_52 gpio_53 gpio_55 */
		motorola,status-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>,
					<&gpio2 21 GPIO_ACTIVE_HIGH>,
					<&gpio2 23 GPIO_ACTIVE_HIGH>;
		#phy-cells = <0>;
	};

	/* HS USB host TLL nop-phy on port 2 for w3glte */
	hsusb2_phy: usb-phy@2 {
		compatible = "usb-nop-xceiv";
		#phy-cells = <0>;
	};

	/* LCD regulator from sw5 source */
	lcd_regulator: regulator-lcd {
		compatible = "regulator-fixed";
		regulator-name = "lcd";
		regulator-min-microvolt = <5050000>;
		regulator-max-microvolt = <5050000>;
		gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;	/* gpio96 */
		enable-active-high;
		vin-supply = <&sw5>;
	};

	/* This is probably coming straight from the battery.. */
	wl12xx_vmmc: regulator-wl12xx {
		compatible = "regulator-fixed";
		regulator-name = "vwl1271";
		regulator-min-microvolt = <1650000>;
		regulator-max-microvolt = <1650000>;
		gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;	/* gpio94 */
		startup-delay-us = <70000>;
		enable-active-high;
	};

	soundcard {
		compatible = "audio-graph-card";
		label = "Mapphone Audio";

		widgets =
			"Speaker", "Earpiece",
			"Speaker", "Loudspeaker",
			"Headphone", "Headphone Jack",
			"Microphone", "Internal Mic";

		routing =
			"Earpiece", "EP",
			"Loudspeaker", "SPKR",
			"Headphone Jack", "HSL",
			"Headphone Jack", "HSR",
			"MICR", "Internal Mic";

		dais = <&mcbsp2_port>, <&mcbsp3_port>;
	};

	pwm8: pwm-8 {
		pinctrl-names = "default";
		pinctrl-0 = <&vibrator_direction_pin>;

		compatible = "ti,omap-dmtimer-pwm";
		#pwm-cells = <3>;
		ti,timers = <&timer8>;
		ti,clock-source = <0x01>;
	};

	pwm9: pwm-9 {
		pinctrl-names = "default";
		pinctrl-0 = <&vibrator_enable_pin>;

		compatible = "ti,omap-dmtimer-pwm";
		#pwm-cells = <3>;
		ti,timers = <&timer9>;
		ti,clock-source = <0x01>;
	};

	vibrator {
		compatible = "pwm-vibrator";
		pwms = <&pwm9 0 10000000 0>, <&pwm8 0 10000000 0>;
		pwm-names = "enable", "direction";
		direction-duty-cycle-ns = <10000000>;
	};

	backlight: backlight {
		compatible = "led-backlight";

		leds = <&backlight_led>;
		brightness-levels = <31 63 95 127 159 191 223 255>;
		default-brightness-level = <6>;
	};
};

&cpu_thermal {
	polling-delay = <10000>; /* milliseconds */
};

&cpu_alert0 {
        temperature = <80000>; /* millicelsius */
};

&cpu0 {
        /*
	 * Note that the 1.2GiHz mode is enabled for all SoC variants for
	 * the Motorola Android Linux v3.0.8 based kernel.
	 */
        operating-points = <
	        /* kHz    uV */
	        300000  1025000
	        600000  1200000
	        800000  1313000
	        1008000 1375000
		1200000 1375000
        >;
};

&dss {
	status = "okay";
};

&dsi1 {
	status = "okay";
	vdd-supply = <&vcsi>;

	port {
		dsi1_out_ep: endpoint {
			remote-endpoint = <&lcd0_in>;
			lanes = <0 1 2 3 4 5>;
		};
	};

	lcd0: panel@0 {
		compatible = "motorola,droid4-panel", "panel-dsi-cm";
		reg = <0>;
		label = "lcd0";
		vddi-supply = <&lcd_regulator>;
		reset-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;	/* gpio101 */

		backlight = <&backlight>;

		width-mm = <50>;
		height-mm = <89>;
		rotation = <90>;

		panel-timing {
			clock-frequency = <0>;		/* Calculated by dsi */

			hback-porch = <2>;
			hactive = <540>;
			hfront-porch = <0>;
			hsync-len = <2>;

			vback-porch = <1>;
			vactive = <960>;
			vfront-porch = <0>;
			vsync-len = <1>;

			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};

		port {
			lcd0_in: endpoint {
				remote-endpoint = <&dsi1_out_ep>;
			};
		};
	};
};

&hdmi {
	status = "okay";
	pinctrl-0 = <&dss_hdmi_pins>;
	pinctrl-names = "default";
	vdda-supply = <&vdac>;

	port {
		hdmi_out: endpoint {
			remote-endpoint = <&hdmi_connector_in>;
			lanes = <1 0 3 2 5 4 7 6>;
		};
	};
};

/* Battery NVRAM on 1-wire handled by w1_ds250x driver */
&hdqw1w {
	pinctrl-0 = <&hdq_pins>;
	pinctrl-names = "default";
	ti,mode = "1w";
};

&i2c1 {
	tmp105@48 {
		compatible = "ti,tmp105";
		reg = <0x48>;
		pinctrl-0 = <&tmp105_irq>;
		pinctrl-names = "default";
		/* kpd_row0.gpio_178 */
		interrupts-extended = <&gpio6 18 IRQ_TYPE_EDGE_FALLING
				       &omap4_pmx_core 0x14e>;
		interrupt-names = "irq", "wakeup";
		wakeup-source;
	};
};

&mmc1 {
	vmmc-supply = <&vwlan2>;
	bus-width = <4>;
	cd-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;	/* gpio176 */
};

&mmc2 {
	vmmc-supply = <&vsdio>;
	bus-width = <8>;
	ti,non-removable;
};

&mmc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc3_pins>;
	vmmc-supply = <&wl12xx_vmmc>;
	/* uart2_tx.sdmmc3_dat1 pad as wakeirq */
	interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core 0xde>;
	interrupt-names = "irq", "wakeup";
	non-removable;
	bus-width = <4>;
	cap-power-off-card;
	keep-power-in-suspend;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1285";
		reg = <2>;
		/* gpio_100 with gpmc_wait2 pad as wakeirq */
		interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>,
				      <&omap4_pmx_core 0x4e>;
		interrupt-names = "irq", "wakeup";
		ref-clock-frequency = <26000000>;
		tcxo-clock-frequency = <26000000>;
	};
};

&i2c2 {
	touchscreen@4a {
		compatible = "atmel,maxtouch";
		reg = <0x4a>;
		pinctrl-names = "default";
		pinctrl-0 = <&touchscreen_pins>;

		reset-gpios = <&gpio6 13 GPIO_ACTIVE_LOW>; /* gpio173 */

		/* gpio_183 with sys_nirq2 pad as wakeup */
		interrupts-extended = <&gpio6 23 IRQ_TYPE_LEVEL_LOW>,
				      <&omap4_pmx_core 0x160>;
		interrupt-names = "irq", "wakeup";
		wakeup-source;
	};

	isl29030@44 {
		compatible = "isil,isl29030";
		reg = <0x44>;

		pinctrl-names = "default";
		pinctrl-0 = <&als_proximity_pins>;

		interrupt-parent = <&gpio6>;
		interrupts = <17 IRQ_TYPE_LEVEL_LOW>; /* gpio177 */
	};
};

&omap4_pmx_core {

	/* hdmi_hpd.gpio_63 */
	hdmi_hpd_gpio: pinmux_hdmi_hpd_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
		>;
	};

	hdq_pins: pinmux_hdq_pins {
		pinctrl-single,pins = <
		/* 0x4a100120 hdq_sio.hdq_sio aa27 */
		OMAP4_IOPAD(0x120, PIN_INPUT | MUX_MODE0)
		>;
	};

	/* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */
	dss_hdmi_pins: pinmux_dss_hdmi_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)
		OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
		OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
		>;
	};

	/*
	 * Android uses PIN_OFF_INPUT_PULLDOWN | PIN_INPUT_PULLUP | MUX_MODE3
	 * for gpio_100, but the internal pull makes wlan flakey on some
	 * devices. Off mode value should be tested if we have off mode working
	 * later on.
	 */
	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
		/* 0x4a10008e gpmc_wait2.gpio_100 d23 */
		OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)

		/* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */
		OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1)

		/* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */
		OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1)

		/* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */
		OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1)

		/* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */
		OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1)

		/* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */
		OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1)

		/* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */
		OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
		>;
	};

	/* gpmc_ncs0.gpio_50 */
	poweroff_gpio: pinmux_poweroff_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
		>;
	};

	/* kpd_row0.gpio_178 */
	tmp105_irq: pinmux_tmp105_irq {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
		>;
	};

	usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
		/* gpio_60 */
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
		>;
	};

	touchscreen_pins: pinmux_touchscreen_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3)
		OMAP4_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE3)
		>;
	};

	als_proximity_pins: pinmux_als_proximity_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3)
		>;
	};

	usb_mdm6600_pins: pinmux_usb_mdm6600_pins {
		pinctrl-single,pins = <
		/* enable 0x4a1000d8 usbb1_ulpitll_dat7.gpio_95 ag16 */
		OMAP4_IOPAD(0x0d8, PIN_INPUT | MUX_MODE3)

		/* power 0x4a10007c gpmc_nwp.gpio_54 c25 */
		OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3)

		/* reset 0x4a100072 gpmc_a25.gpio_49 d20 */
		OMAP4_IOPAD(0x072, PIN_OUTPUT | MUX_MODE3)

		/* mode0/bpwake 0x4a10014e sdmmc5_dat1.gpio_148 af4 */
		OMAP4_IOPAD(0x14e, PIN_OUTPUT | MUX_MODE3)

		/* mode1/apwake 0x4a100150 sdmmc5_dat2.gpio_149 ag3 */
		OMAP4_IOPAD(0x150, PIN_OFF_OUTPUT_LOW | PIN_INPUT | MUX_MODE3)

		/* status0 0x4a10007e gpmc_clk.gpio_55 b22 */
		OMAP4_IOPAD(0x07e, PIN_INPUT | MUX_MODE3)

		/* status1 0x4a10007a gpmc_ncs3.gpio_53 c22 */
		OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)

		/* status2 0x4a100078 gpmc_ncs2.gpio_52 d21 */
		OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3)

		/* cmd0 0x4a100094 gpmc_ncs6.gpio_103 c24 */
		OMAP4_IOPAD(0x094, PIN_OUTPUT | MUX_MODE3)

		/* cmd1 0x4a100096 gpmc_ncs7.gpio_104 d24 */
		OMAP4_IOPAD(0x096, PIN_OUTPUT | MUX_MODE3)

		/* cmd2 0x4a100142 uart3_rts_sd.gpio_142 f28 */
		OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE3)
		>;
	};

	usb_ulpi_pins: pinmux_usb_ulpi_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x196, MUX_MODE7)
		OMAP4_IOPAD(0x198, MUX_MODE7)
		OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0)
		OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
		>;
	};

	/* usb0_otg_dp and usb0_otg_dm */
	usb_utmi_pins: pinmux_usb_utmi_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
		OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
		OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
		>;
	};

	/*
	 * Note that the v3.0.8 stock userspace dynamically remuxes uart1
	 * rts pin probably for PM purposes to PIN_INPUT_PULLUP | MUX_MODE7
	 * when not used. If needed, we can add rts pin remux later based
	 * on power measurements.
	 */
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
		/* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
		OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)

		/* 0x4a10013e mcspi1_cs3.uart1_rts ah23 */
		OMAP4_IOPAD(0x13e, MUX_MODE1)

		/* 0x4a100140 uart3_cts_rctx.uart1_tx f27 */
		OMAP4_IOPAD(0x140, PIN_OUTPUT | MUX_MODE1)

		/* 0x4a1001ca dpm_emu14.uart1_rx aa3 */
		OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
		>;
	};

	/* uart3_tx_irtx and uart3_rx_irrx */
	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x196, MUX_MODE7)
		OMAP4_IOPAD(0x198, MUX_MODE7)
		OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1ba, MUX_MODE2)
		OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2)
		OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
		OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
		>;
	};

	uart4_pins: pinmux_uart4_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0)		/* uart4_rx */
		OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0)		/* uart4_tx */
		OMAP4_IOPAD(0x110, PIN_INPUT_PULLUP | MUX_MODE5)	/* uart4_cts */
		OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5)	/* uart4_rts */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0)	/* abe_mcbsp2_clkx */
		OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0)	/* abe_mcbsp2_dr */
		OMAP4_IOPAD(0x0fa, PIN_OUTPUT | MUX_MODE0)	/* abe_mcbsp2_dx */
		OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0)	/* abe_mcbsp2_fsx */
		>;
	};

	mcbsp3_pins: pinmux_mcbsp3_pins {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1)	/* abe_mcbsp3_dr */
		OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1)	/* abe_mcbsp3_dx */
		OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1)	/* abe_mcbsp3_clkx */
		OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1)	/* abe_mcbsp3_fsx */
		>;
	};

	vibrator_direction_pin: pinmux_vibrator_direction_pin {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE1)	/* dmtimer8_pwm_evt (gpio_27) */
		>;
	};

	vibrator_enable_pin: pinmux_vibrator_enable_pin {
		pinctrl-single,pins = <
		OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1)	/* dmtimer9_pwm_evt (gpio_28) */
		>;
	};
};

&omap4_pmx_wkup {
	usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
		/* gpio_wk0 */
		pinctrl-single,pins = <
		OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
		>;
	};
};

/* RNG is used by secure mode and not accessible */
&rng_target {
	status = "disabled";
};

/* Configure pwm clock source for timers 8 & 9 */
&timer8 {
	assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
	assigned-clock-parents = <&sys_clkin_ck>;
};

&timer9 {
	assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
	assigned-clock-parents = <&sys_clkin_ck>;
};

/*
 * The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149
 * for wake-up events for both the USB PHY and the UART. We can use gpio_149
 * pad as the shared wakeirq for the UART rather than the RX or CTS pad as we
 * have gpio_149 trigger before the UART transfer starts.
 */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
	interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core 0x110>;
	uart-has-rtscts;
	current-speed = <115200>;
};

&uart3 {
	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
			       &omap4_pmx_core 0x17c>;
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins>;

	bluetooth {
		compatible = "ti,wl1285-st";
		enable-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; /* gpio 174 */
		max-speed = <3686400>;
	};
};

&usbhsohci {
	phys = <&fsusb1_phy>;
	phy-names = "usb";
};

&usbhsehci {
	phys = <&hsusb2_phy>;
};

&usbhshost {
	port1-mode = "ohci-phy-4pin-dpdm";
	port2-mode = "ehci-tll";
};

/* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */
&usb_otg_hs {
	interface-type = <1>;
	mode = <3>;

	/*
	 * Max 300 mA steps based on similar PMIC MC13783UG.pdf "Table 10-4.
	 * VBUS Regulator Main Characteristics". Binding uses 2 mA units.
	 */
	power = <150>;
};

&i2c4 {
	ak8975: magnetometer@c {
		compatible = "asahi-kasei,ak8975";
		reg = <0x0c>;

		vdd-supply = <&vhvio>;

		interrupt-parent = <&gpio6>;
		interrupts = <15 IRQ_TYPE_EDGE_RISING>; /* gpio175 */

		rotation-matrix = "-1", "0", "0",
				  "0", "1", "0",
				  "0", "0", "-1";

	};
};

&mcbsp2 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
	status = "okay";

	mcbsp2_port: port {
		cpu_dai2: endpoint {
			dai-format = "i2s";
			remote-endpoint = <&cpcap_audio_codec0>;
			frame-master = <&cpcap_audio_codec0>;
			bitclock-master = <&cpcap_audio_codec0>;
		};
	};
};

&mcbsp3 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp3_pins>;
	status = "okay";

	mcbsp3_port: port {
		cpu_dai3: endpoint {
			dai-format = "dsp_a";
			frame-master = <&cpcap_audio_codec1>;
			bitclock-master = <&cpcap_audio_codec1>;
			remote-endpoint = <&cpcap_audio_codec1>;
		};
	};
};

&cpcap_audio_codec0 {
	remote-endpoint = <&cpu_dai2>;
};

&cpcap_audio_codec1 {
	remote-endpoint = <&cpu_dai3>;
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX
 *
 * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
 */

/dts-v1/;
#include "moxart.dtsi"

/ {
	model = "MOXA UC-7112-LX";
	compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart";

	memory {
		device_type = "memory";
		reg = <0x0 0x2000000>;
	};

	clocks {
		ref12: ref12M {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <12000000>;
		};
	};

	flash@80000000,0 {
		compatible = "numonyx,js28f128", "cfi-flash";
		reg = <0x80000000 0x1000000>;
		bank-width = <2>;
		#address-cells = <1>;
		#size-cells = <1>;
		partition@0 {
			label = "bootloader";
			reg = <0x0 0x40000>;
		};
		partition@40000 {
			label = "linux kernel";
			reg = <0x40000 0x1C0000>;
		};
		partition@200000 {
			label = "root filesystem";
			reg = <0x200000 0x800000>;
		};
		partition@a00000 {
			label = "user filesystem";
			reg = <0xa00000 0x600000>;
		};
	};

	leds {
		compatible = "gpio-leds";
		user-led {
			label = "ready-led";
			gpios = <&gpio 27 0x1>;
			default-state = "on";
			linux,default-trigger = "default-on";
		};
	};

	gpio_keys_polled {
		compatible = "gpio-keys-polled";
		#address-cells = <1>;
		#size-cells = <0>;
		poll-interval = <500>;
		button@25 {
			label = "GPIO Reset";
			linux,code = <116>;
			gpios = <&gpio 25 1>;
		};
	};

	chosen {
		bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/mmcblk0p1 rw rootwait";
	};
};

&clk_pll {
	clocks = <&ref12>;
};

&mmc {
	status = "okay";
};

&mdio0 {
	status = "okay";

	ethphy0: ethernet-phy@1 {
		device_type = "ethernet-phy";
		compatible = "moxa,moxart-rtl8201cp", "ethernet-phy-ieee802.3-c22";
		reg = <1>;
	};
};

&mdio1 {
	status = "okay";

	ethphy1: ethernet-phy@1 {
		device_type = "ethernet-phy";
		compatible = "moxa,moxart-rtl8201cp", "ethernet-phy-ieee802.3-c22";
		reg = <1>;
	};
};

&mac0 {
	status = "okay";
};

&mac1 {
	status = "okay";
};

&uart0 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/* moxart.dtsi - Device Tree Include file for MOXA ART family SoC
 *
 * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
 */

#include <dt-bindings/interrupt-controller/irq.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "moxa,moxart";
	model = "MOXART";
	interrupt-parent = <&intc>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "faraday,fa526";
			reg = <0>;
		};
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <0>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x90000000 0x10000000>;
		ranges;

		intc: interrupt-controller@98800000 {
			compatible = "moxa,moxart-ic", "faraday,ftintc010";
			reg = <0x98800000 0x100>;
			interrupt-controller;
			#interrupt-cells = <2>;
			interrupt-mask = <0x00080000>;
		};

		clk_pll: clk_pll@98100000 {
			compatible = "moxa,moxart-pll-clock";
			#clock-cells = <0>;
			reg = <0x98100000 0x34>;
		};

		clk_apb: clk_apb@98100000 {
			compatible = "moxa,moxart-apb-clock";
			#clock-cells = <0>;
			reg = <0x98100000 0x34>;
			clocks = <&clk_pll>;
		};

		timer: timer@98400000 {
			compatible = "moxa,moxart-timer", "faraday,fttmr010";
			reg = <0x98400000 0x42>;
			interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
			clocks = <&clk_apb>;
			clock-names = "PCLK";
		};

		gpio: gpio@98700000 {
			gpio-controller;
			#gpio-cells = <2>;
			compatible = "moxa,moxart-gpio", "faraday,ftgpio010";
			reg = <0x98700000 0x100>;
		};

		rtc: rtc {
			compatible = "moxa,moxart-rtc";
			gpio-rtc-sclk = <&gpio 5 0>;
			gpio-rtc-data = <&gpio 6 0>;
			gpio-rtc-reset = <&gpio 7 0>;
		};

		dma: dma@90500000 {
			compatible = "moxa,moxart-dma";
			reg = <0x90500080 0x40>;
			interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
			#dma-cells = <1>;
		};

		watchdog: watchdog@98500000 {
			compatible = "moxa,moxart-watchdog", "faraday,ftwdt010";
			reg = <0x98500000 0x10>;
			clocks = <&clk_apb>;
			clock-names = "PCLK";
		};

		mmc: mmc@98e00000 {
			compatible = "moxa,moxart-mmc";
			reg = <0x98e00000 0x5C>;
			interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_apb>;
			dmas =  <&dma 5>,
				<&dma 5>;
			dma-names = "tx", "rx";
			status = "disabled";
		};

		mdio0: mdio@90900090 {
			compatible = "moxa,moxart-mdio";
			reg = <0x90900090 0x8>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		mdio1: mdio@92000090 {
			compatible = "moxa,moxart-mdio";
			reg = <0x92000090 0x8>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		mac0: mac@90900000 {
			compatible = "moxa,moxart-mac";
			reg = <0x90900000 0x90>;
			interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
			phy-handle = <&ethphy0>;
			phy-mode = "mii";
			status = "disabled";
		};

		mac1: mac@92000000 {
			compatible = "moxa,moxart-mac";
			reg = <0x92000000 0x90>;
			interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
			phy-handle = <&ethphy1>;
			phy-mode = "mii";
			status = "disabled";
		};

		uart0: uart@98200000 {
			compatible = "ns16550a";
			reg = <0x98200000 0x20>;
			interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clock-frequency = <14745600>;
			status = "disabled";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * mpa1600.dts - Device Tree file for Phontech MPA 1600
 *
 *  Copyright (C) 2013 Joachim Eastwood <manabian@gmail.com>
 */
/dts-v1/;
#include "at91rm9200.dtsi"

/ {
	model = "Phontech MPA 1600";
	compatible = "phontech,mpa1600", "atmel,at91rm9200";

	memory@20000000 {
		reg = <0x20000000 0x4000000>;
	};

	clocks {
		slow_xtal {
			clock-frequency = <32768>;
		};

		main_xtal {
			clock-frequency = <18432000>;
		};
	};

	ahb {
		apb {
			dbgu: serial@fffff200 {
				status = "okay";
			};

			tcb0: timer@fffa0000 {
				timer@0 {
					compatible = "atmel,tcb-timer";
					reg = <0>, <1>;
				};

				timer@2 {
					compatible = "atmel,tcb-timer";
					reg = <2>;
				};
			};

			macb0: ethernet@fffbc000 {
				phy-mode = "rmii";
				status = "okay";
			};

			ssc0: ssc@fffd0000 {
				status = "okay";
			};

			ssc1: ssc@fffd4000 {
				status = "okay";
			};
		};

		usb0: ohci@300000 {
			num-ports = <1>;
			status = "okay";
		};
	};

	i2c-gpio-0 {
		status = "okay";
	};

	gpio_keys {
		compatible = "gpio-keys";

		monitor_mute {
			label = "Monitor mute";
			gpios = <&pioC 1 GPIO_ACTIVE_LOW>;
			linux,code = <113>;
		};
	};
};


code:
/*
 * Copyright (C) 2015 ARM Limited
 *
 * Author: Vladimir Murzin <vladimir.murzin@arm.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;

#include "mps2.dtsi"

/ {
	model = "ARM MPS2 Application Note 385/386";
	compatible = "arm,mps2";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		bootargs = "earlycon";
		stdout-path = "serial0:9600n8";
	};

	memory@21000000 {
		device_type = "memory";
		reg = <0x21000000 0x1000000>;
	};

	smb {
		ethernet@0,0 {
			compatible = "smsc,lan9220", "smsc,lan9115";
			reg = <0 0x0 0x10000>;
			interrupts = <13>;
			interrupt-parent = <&nvic>;
			smsc,irq-active-high;
		};
	};
};

&uart0 {
	status = "okay";
};

&timer0 {
	status = "okay";
};

&timer1 {
	status = "okay";
};

&wdt {
	status = "okay";
};


code:
/*
 * Copyright (C) 2015 ARM Limited
 *
 * Author: Vladimir Murzin <vladimir.murzin@arm.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;

#include "mps2.dtsi"

/ {
	model = "ARM MPS2 Application Note 399/400";
	compatible = "arm,mps2";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		bootargs = "earlycon";
		stdout-path = "serial0:9600n8";
	};

	memory@60000000 {
		device_type = "memory";
		reg = <0x60000000 0x1000000>;
	};

	smb {
		ethernet@1,0 {
			compatible = "smsc,lan9220", "smsc,lan9115";
			reg = <1 0x0 0x10000>;
			interrupts = <13>;
			interrupt-parent = <&nvic>;
			smsc,irq-active-high;
		};
	};
};

&uart0 {
	status = "okay";
};

&timer0 {
	status = "okay";
};

&timer1 {
	status = "okay";
};

&wdt {
	status = "okay";
};


code:
/*
 * Copyright (C) 2015 ARM Limited
 *
 * Author: Vladimir Murzin <vladimir.murzin@arm.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include "armv7-m.dtsi"

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	oscclk0: clk-osc0 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <50000000>;
	};

	oscclk1: clk-osc1 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};

	oscclk2: clk-osc2 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};

	cfgclk: clk-cfg {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <5000000>;
	};

	spicfgclk: clk-spicfg {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <75000000>;
	};

	sysclk: clk-sys {
		compatible = "fixed-factor-clock";
		clocks = <&oscclk0>;
		#clock-cells = <0>;
		clock-div = <2>;
		clock-mult = <1>;
	};

	audmclk: clk-audm {
		compatible = "fixed-factor-clock";
		clocks = <&oscclk1>;
		#clock-cells = <0>;
		clock-div = <2>;
		clock-mult = <1>;
	};

	audsclk: clk-auds {
		compatible = "fixed-factor-clock";
		clocks = <&oscclk1>;
		#clock-cells = <0>;
		clock-div = <8>;
		clock-mult = <1>;
	};

	spiclcd: clk-cpiclcd {
		compatible = "fixed-factor-clock";
		clocks = <&oscclk0>;
		#clock-cells = <0>;
		clock-div = <2>;
		clock-mult = <1>;
	};

	spicon: clk-spicon {
		compatible = "fixed-factor-clock";
		clocks = <&oscclk0>;
		#clock-cells = <0>;
		clock-div = <2>;
		clock-mult = <1>;
	};

	i2cclcd: clk-i2cclcd {
		compatible = "fixed-factor-clock";
		clocks = <&oscclk0>;
		#clock-cells = <0>;
		clock-div = <2>;
		clock-mult = <1>;
	};

	i2caud: clk-i2caud {
		compatible = "fixed-factor-clock";
		clocks = <&oscclk0>;
		#clock-cells = <0>;
		clock-div = <2>;
		clock-mult = <1>;
	};

	soc {
		compatible = "simple-bus";
		ranges;

		apb@40000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x40000000 0x10000>;

			timer0: mps2-timer0@0 {
				compatible = "arm,mps2-timer";
				reg = <0x0 0x1000>;
				interrupts = <8>;
				clocks = <&sysclk>;
				status = "disabled";
			};

			timer1: mps2-timer1@1000 {
				compatible = "arm,mps2-timer";
				reg = <0x1000 0x1000>;
				interrupts = <9>;
				clocks = <&sysclk>;
				status = "disabled";
			};

			timer2: dual-timer@2000 {
				compatible = "arm,sp804", "arm,primecell";
				reg = <0x2000 0x1000>;
				clocks = <&sysclk>, <&sysclk>, <&sysclk>;
				clock-names = "timer0clk", "timer1clk",
					       "apb_pclk";
				interrupts = <10>;
				status = "disabled";
			};

			uart0: serial@4000 {
				compatible = "arm,mps2-uart";
				reg = <0x4000 0x1000>;
				interrupts = <0>, <1>, <12>;
				clocks = <&sysclk>;
				status = "disabled";
			};

			uart1: serial@5000 {
				compatible = "arm,mps2-uart";
				reg = <0x5000 0x1000>;
				interrupts = <2>, <3>, <12>;
				clocks = <&sysclk>;
				status = "disabled";
			};

			uart2: serial@6000 {
				compatible = "arm,mps2-uart";
				reg = <0x6000 0x1000>;
				interrupts = <4>, <5>, <12>;
				clocks = <&sysclk>;
				status = "disabled";
			};

			wdt: watchdog@8000 {
				compatible = "arm,sp805", "arm,primecell";
				arm,primecell-periphid = <0x00141805>;
				reg = <0x8000 0x1000>;
				interrupts = <0>;
				clocks = <&sysclk>, <&sysclk>;
				clock-names = "wdog_clk", "apb_pclk";
				status = "disabled";
			};
		};
	};

	fpga@40020000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x40020000 0x10000>;

		fpgaio@8000 {
			compatible = "syscon", "simple-mfd";
			reg = <0x8000 0x10>;

			ranges = <0x0 0x8000 0x10>;
			#address-cells = <1>;
			#size-cells = <1>;

			led@0,0 {
				compatible = "register-bit-led";
				reg = <0x00 0x04>;
				offset = <0x0>;
				mask = <0x01>;
				label = "userled:0";
				linux,default-trigger = "heartbeat";
				default-state = "on";
			};

			led@0,1 {
				compatible = "register-bit-led";
				reg = <0x00 0x04>;
				offset = <0x0>;
				mask = <0x02>;
				label = "userled:1";
				linux,default-trigger = "usr";
				default-state = "off";
			};
		};
	};

	smb {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges = <0 0 0x40200000 0x10000>,
			 <1 0 0xa0000000 0x10000>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include <dt-bindings/gpio/gpio.h>

/ {
	vcc_core: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vcc_core";
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		regulator-boot-on;
	};

	vcc_dram: fixedregulator@1 {
		compatible = "regulator-fixed";
		regulator-name = "vcc_dram";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
	};

	vcc_io: fixedregulator@2 {
		compatible = "regulator-fixed";
		regulator-name = "vcc_io";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
	};

	leds {
		compatible = "gpio-leds";
		red {
			gpios = <&gpio MSC313_GPIO_SR_IO16 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "activity";
		};
		yellow {
			gpios = <&gpio MSC313_GPIO_SR_IO17 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};
};

&cpu0 {
	cpu-supply = <&vcc_core>;
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2019 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

/dts-v1/;
#include "mstar-infinity-msc313.dtsi"
#include "mstar-infinity-breadbee-common.dtsi"

/ {
	model = "BreadBee Crust";
	compatible = "thingyjp,breadbee-crust", "mstar,infinity";

	aliases {
		serial0 = &pm_uart;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&pm_uart {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include "mstar-infinity.dtsi"

/ {
	memory@20000000 {
		device_type = "memory";
		reg = <0x20000000 0x4000000>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include "mstar-v7.dtsi"

#include <dt-bindings/gpio/msc313-gpio.h>

/ {
	cpu0_opp_table: opp_table0 {
		compatible = "operating-points-v2";
		opp-shared;

		opp-240000000 {
			opp-hz = /bits/ 64 <240000000>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <300000>;
		};

		opp-400000000 {
			opp-hz = /bits/ 64 <400000000>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <300000>;
		};
		opp-600000000 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <300000>;
		};

		opp-800000000 {
			opp-hz = /bits/ 64 <800000000>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <300000>;
		};
	};
};

&cpu0 {
	operating-points-v2 = <&cpu0_opp_table>;
};

&imi {
	reg = <0xa0000000 0x16000>;
};

&gpio {
	compatible = "mstar,msc313-gpio";
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2021 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 * Author: Romain Perier <romain.perier@gmail.com>
 */

/ {
	reg_vcc_dram: regulator-vcc-dram {
		compatible = "regulator-fixed";
		regulator-name = "vcc_dram";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
	};
};

&pm_uart {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2021 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

/dts-v1/;
#include "mstar-infinity2m-ssd202d.dtsi"

/ {
	model = "DongShanPi One";
	compatible = "100ask,dongshanpione", "mstar,infinity2m";

	aliases {
		serial0 = &pm_uart;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&pm_uart {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2021 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

/dts-v1/;
#include "mstar-infinity2m-ssd202d.dtsi"

/ {
	model = "Miyoo Mini";
	compatible = "miyoo,miyoo-mini", "mstar,infinity2m";

	aliases {
		serial0 = &pm_uart;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&pm_uart {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

/dts-v1/;
#include "mstar-infinity2m-ssd202d.dtsi"

/ {
	model = "SSD201_HT_V2";
	compatible = "honestar,ssd201htv2", "mstar,infinity2m";

	aliases {
		serial0 = &pm_uart;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&pm_uart {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2021 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

/dts-v1/;
#include "mstar-infinity2m-ssd202d.dtsi"

/ {
	model = "UnitV2";
	compatible = "m5stack,unitv2", "mstar,infinity2m";

	aliases {
		serial0 = &pm_uart;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&pm_uart {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2021 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 * Author: Romain Perier <romain.perier@gmail.com>
 */

/dts-v1/;
#include "mstar-infinity2m-ssd202d-wirelesstag-ido-som2d01.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Wireless Tag IDO-SBC2D06-1VB-22W";
	compatible = "wirelesstag,ido-sbc2d06-v1b-22w", "mstar,infinity2m";

	leds {
		compatible = "gpio-leds";
		sys_led {
			gpios = <&gpio SSD20XD_GPIO_GPIO85 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "heartbeat";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2021 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 * Author: Romain Perier <romain.perier@gmail.com>
 */

/dts-v1/;
#include "mstar-infinity2m-ssd202d.dtsi"
#include "mstar-infinity2m-ssd201-som2d01.dtsi"

/ {
	model = "Wireless Tag IDO-SOM2D01 (SSD202D)";
	compatible = "wirelesstag,ido-som2d01", "mstar,infinity2m";

	aliases {
		serial0 = &pm_uart;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&reg_vcc_dram {
	regulator-min-microvolt = <1500000>;
	regulator-max-microvolt = <1500000>;
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include "mstar-infinity2m-ssd20xd.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x20000000 0x8000000>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include "mstar-infinity2m.dtsi"

&gpio {
	compatible = "sstar,ssd20xd-gpio";
	status = "okay";
};

&smpctrl {
	compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl";
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include "mstar-infinity.dtsi"

&cpu0_opp_table {
		opp-1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <300000>;
		};

		opp-1200000000 {
			opp-hz = /bits/ 64 <1200000000>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <300000>;
		};
};

&cpus {
	cpu1: cpu@1 {
		device_type = "cpu";
		compatible = "arm,cortex-a7";
		operating-points-v2 = <&cpu0_opp_table>;
		reg = <0x1>;
		clocks = <&cpupll>;
		clock-names = "cpuclk";
	};
};

&riu {
	smpctrl: smpctrl@204000 {
		reg = <0x204000 0x200>;
		status = "disabled";
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2019 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

/dts-v1/;
#include "mstar-infinity3-msc313e.dtsi"
#include "mstar-infinity-breadbee-common.dtsi"

/ {
	model = "BreadBee";
	compatible = "thingyjp,breadbee", "mstar,infinity3";

	aliases {
		serial0 = &pm_uart;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&pm_uart {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include "mstar-infinity3.dtsi"

/ {
	memory@20000000 {
		device_type = "memory";
		reg = <0x20000000 0x4000000>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include "mstar-infinity.dtsi"

&cpu0_opp_table {
	opp-1008000000 {
		opp-hz = /bits/ 64 <1008000000>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <300000>;
	};

	// overclock frequencies below, shown to work fine up to 1.3 GHz
	opp-108000000 {
		opp-hz = /bits/ 64 <1080000000>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <300000>;
		turbo-mode;
	};

	opp-1188000000 {
		opp-hz = /bits/ 64 <1188000000>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <300000>;
		turbo-mode;
	};

	opp-1296000000 {
		opp-hz = /bits/ 64 <1296000000>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <300000>;
		turbo-mode;
	};

	opp-1350000000 {
		opp-hz = /bits/ 64 <1350000000>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <300000>;
		turbo-mode;
	};

	opp-1404000000 {
		opp-hz = /bits/ 64 <1404000000>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <300000>;
		turbo-mode;
	};

	opp-1458000000 {
		opp-hz = /bits/ 64 <1458000000>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <300000>;
		turbo-mode;
	};

	opp-1512000000 {
		opp-hz = /bits/ 64 <1512000000>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <300000>;
		turbo-mode;
	};
};

&imi {
	reg = <0xa0000000 0x20000>;
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

/dts-v1/;
#include "mstar-mercury5-ssc8336n.dtsi"

/ {
	model = "70mai Midrive D08";
	compatible = "70mai,midrived08", "mstar,mercury5";

	aliases {
		serial0 = &pm_uart;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&pm_uart {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include "mstar-mercury5.dtsi"

/ {
	memory@20000000 {
		device_type = "memory";
		reg = <0x20000000 0x4000000>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include "mstar-v7.dtsi"

&imi {
	reg = <0xa0000000 0x20000>;
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2020 thingy.jp.
 * Author: Daniel Palmer <daniel@thingy.jp>
 */

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mstar-msc313-mpll.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&gic>;

	cpus: cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			reg = <0x0>;
			clocks = <&cpupll>;
			clock-names = "cpuclk";
		};
	};

	arch_timer {
		compatible = "arm,armv7-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2)
				| IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2)
				| IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2)
				| IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2)
				| IRQ_TYPE_LEVEL_LOW)>;
		/*
		 * we shouldn't need this but the vendor
		 * u-boot is broken
		 */
		clock-frequency = <6000000>;
		arm,cpu-registers-not-fw-configured;
	};

	pmu: pmu {
		compatible = "arm,cortex-a7-pmu";
		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>;
	};

	clocks: clocks {
		xtal: xtal {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
		};

		rtc_xtal: rtc_xtal {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
			status = "disabled";
		};

		xtal_div2: xtal_div2 {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&xtal>;
			clock-div = <2>;
			clock-mult = <1>;
		};
	};

	soc: soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x16001000 0x16001000 0x00007000>,
			 <0x1f000000 0x1f000000 0x00400000>,
			 <0xa0000000 0xa0000000 0x20000>;

		gic: interrupt-controller@16001000 {
			compatible = "arm,cortex-a7-gic";
			reg = <0x16001000 0x1000>,
			      <0x16002000 0x2000>,
			      <0x16004000 0x2000>,
			      <0x16006000 0x2000>;
			#interrupt-cells = <3>;
			interrupt-controller;
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2)
					| IRQ_TYPE_LEVEL_LOW)>;
		};

		riu: bus@1f000000 {
			compatible = "simple-bus";
			reg = <0x1f000000 0x00400000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x1f000000 0x00400000>;

			pmsleep: syscon@1c00 {
				compatible = "mstar,msc313-pmsleep", "syscon";
				reg = <0x1c00 0x100>;
			};

			reboot {
				compatible = "syscon-reboot";
				regmap = <&pmsleep>;
				offset = <0xb8>;
				mask = <0x79>;
			};

			rtc@2400 {
				compatible = "mstar,msc313-rtc";
				reg = <0x2400 0x40>;
				clocks = <&xtal_div2>;
				interrupts-extended = <&intc_irq GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
			};

			watchdog@6000 {
				compatible = "mstar,msc313e-wdt";
				reg = <0x6000 0x1f>;
				clocks = <&xtal_div2>;
			};

			intc_fiq: interrupt-controller@201310 {
				compatible = "mstar,mst-intc";
				reg = <0x201310 0x40>;
				#interrupt-cells = <3>;
				interrupt-controller;
				interrupt-parent = <&gic>;
				mstar,irqs-map-range = <96 127>;
			};

			intc_irq: interrupt-controller@201350 {
				compatible = "mstar,mst-intc";
				reg = <0x201350 0x40>;
				#interrupt-cells = <3>;
				interrupt-controller;
				interrupt-parent = <&gic>;
				mstar,irqs-map-range = <32 95>;
				mstar,intc-no-eoi;
			};

			l3bridge: l3bridge@204400 {
				compatible = "mstar,l3bridge";
				reg = <0x204400 0x200>;
			};

			mpll: mpll@206000 {
				compatible = "mstar,msc313-mpll";
				#clock-cells = <1>;
				reg = <0x206000 0x200>;
				clocks = <&xtal>;
			};

			cpupll: cpupll@206400 {
				compatible = "mstar,msc313-cpupll";
				reg = <0x206400 0x200>;
				#clock-cells = <0>;
				clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>;
			};

			gpio: gpio@207800 {
				#gpio-cells = <2>;
				reg = <0x207800 0x200>;
				gpio-controller;
				#interrupt-cells = <2>;
				interrupt-controller;
				interrupt-parent = <&intc_fiq>;
				status = "disabled";
			};

			pm_uart: uart@221000 {
				compatible = "ns16550a";
				reg = <0x221000 0x100>;
				reg-shift = <3>;
				interrupts-extended = <&intc_irq GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
				clock-frequency = <172000000>;
				status = "disabled";
			};
		};

		imi: sram@a0000000 {
			compatible = "mmio-sram";
			reg = <0xa0000000 0x10000>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2015 MediaTek Inc.
 * Author: Erin Lo <erin.lo@mediatek.com>
 *
 */

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "mt2701.dtsi"

/ {
	model = "MediaTek MT2701 evaluation board";
	compatible = "mediatek,mt2701-evb", "mediatek,mt2701";

	memory {
		device_type = "memory";
		reg = <0 0x80000000 0 0x40000000>;
	};

	sound:sound {
		compatible = "mediatek,mt2701-cs42448-machine";
		mediatek,platform = <&afe>;
		/* CS42448 Machine name */
		audio-routing =
		"Line Out Jack", "AOUT1L",
		"Line Out Jack", "AOUT1R",
		"Line Out Jack", "AOUT2L",
		"Line Out Jack", "AOUT2R",
		"Line Out Jack", "AOUT3L",
		"Line Out Jack", "AOUT3R",
		"Line Out Jack", "AOUT4L",
		"Line Out Jack", "AOUT4R",
		"AIN1L", "AMIC",
		"AIN1R", "AMIC",
		"AIN2L", "Tuner In",
		"AIN2R", "Tuner In",
		"AIN3L", "Satellite Tuner In",
		"AIN3R", "Satellite Tuner In",
		"AIN3L", "AUX In",
		"AIN3R", "AUX In";
		mediatek,audio-codec = <&cs42448>;
		mediatek,audio-codec-bt-mrg = <&bt_sco_codec>;
		pinctrl-names = "default";
		pinctrl-0 = <&aud_pins_default>;
		i2s1-in-sel-gpio1 = <&pio 53 0>;
		i2s1-in-sel-gpio2 = <&pio 54 0>;
		status = "okay";
	};

	bt_sco_codec:bt_sco_codec {
		compatible = "linux,bt-sco";
	};

	backlight_lcd: backlight_lcd {
		compatible = "pwm-backlight";
		pwms = <&bls 0 100000>;
		brightness-levels = <
			  0  16  32  48  64  80  96 112
			128 144 160 176 192 208 224 240
			255
		>;
		default-brightness-level = <9>;
	};

	usb_vbus: regulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "usb_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&pio 45 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&auxadc {
	status = "okay";
};

&bls {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pwm_bls_gpio>;
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins_a>;
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins_a>;
	status = "okay";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins_a>;
	status = "okay";
	cs42448: cs42448@48 {
		compatible = "cirrus,cs42448";
		reg = <0x48>;
		clocks = <&topckgen CLK_TOP_AUD_I2S1_MCLK>;
		clock-names = "mclk";
	};
};

&pio {
	i2c0_pins_a: i2c0@0 {
		pins1 {
			pinmux = <MT2701_PIN_75_SDA0__FUNC_SDA0>,
				 <MT2701_PIN_76_SCL0__FUNC_SCL0>;
			bias-disable;
		};
	};

	i2c1_pins_a: i2c1@0 {
		pins1 {
			pinmux = <MT2701_PIN_57_SDA1__FUNC_SDA1>,
				 <MT2701_PIN_58_SCL1__FUNC_SCL1>;
			bias-disable;
		};
	};

	i2c2_pins_a: i2c2@0 {
		pins1 {
			pinmux = <MT2701_PIN_77_SDA2__FUNC_SDA2>,
				 <MT2701_PIN_78_SCL2__FUNC_SCL2>;
			bias-disable;
		};
	};

	pwm_bls_gpio: pwm_bls_gpio {
		pins_cmd_dat {
			pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>;
		};
	};

	spi_pins_a: spi0@0 {
		pins_spi {
			pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>,
				 <MT2701_PIN_54_SPI0_CK__FUNC_SPI0_CK>,
				 <MT2701_PIN_55_SPI0_MI__FUNC_SPI0_MI>,
				 <MT2701_PIN_56_SPI0_MO__FUNC_SPI0_MO>;
			bias-disable;
		};
	};

	aud_pins_default: audiodefault {
		pins_cmd_dat {
			pinmux = <MT2701_PIN_49_I2S0_DATA__FUNC_I2S0_DATA>,
				 <MT2701_PIN_72_I2S0_DATA_IN__FUNC_I2S0_DATA_IN>,
				 <MT2701_PIN_73_I2S0_LRCK__FUNC_I2S0_LRCK>,
				 <MT2701_PIN_74_I2S0_BCK__FUNC_I2S0_BCK>,
				 <MT2701_PIN_126_I2S0_MCLK__FUNC_I2S0_MCLK>,
				 <MT2701_PIN_33_I2S1_DATA__FUNC_I2S1_DATA>,
				 <MT2701_PIN_34_I2S1_DATA_IN__FUNC_I2S1_DATA_IN>,
				 <MT2701_PIN_35_I2S1_BCK__FUNC_I2S1_BCK>,
				 <MT2701_PIN_36_I2S1_LRCK__FUNC_I2S1_LRCK>,
				 <MT2701_PIN_37_I2S1_MCLK__FUNC_I2S1_MCLK>,
				 <MT2701_PIN_203_PWM0__FUNC_I2S2_DATA>,
				 <MT2701_PIN_204_PWM1__FUNC_I2S3_DATA>,
				 <MT2701_PIN_53_SPI0_CSN__FUNC_GPIO53>,
				 <MT2701_PIN_54_SPI0_CK__FUNC_GPIO54>,
				 <MT2701_PIN_18_PCM_CLK__FUNC_MRG_CLK>,
				 <MT2701_PIN_19_PCM_SYNC__FUNC_MRG_SYNC>,
				 <MT2701_PIN_20_PCM_RX__FUNC_MRG_TX>,
				 <MT2701_PIN_21_PCM_TX__FUNC_MRG_RX>;
			drive-strength = <MTK_DRIVE_12mA>;
			bias-pull-down;
		};
	};

	spi_pins_b: spi1@0 {
		pins_spi {
			pinmux = <MT2701_PIN_7_SPI1_CSN__FUNC_SPI1_CS>,
				 <MT2701_PIN_8_SPI1_MI__FUNC_SPI1_MI>,
				 <MT2701_PIN_9_SPI1_MO__FUNC_SPI1_MO>,
				 <MT2701_PIN_199_SPI1_CLK__FUNC_SPI1_CK>;
			bias-disable;
		};
	};

	spi_pins_c: spi2@0 {
		pins_spi {
			pinmux = <MT2701_PIN_101_SPI2_CSN__FUNC_SPI2_CS>,
				 <MT2701_PIN_102_SPI2_MI__FUNC_SPI2_MI>,
				 <MT2701_PIN_103_SPI2_MO__FUNC_SPI2_MO>,
				 <MT2701_PIN_104_SPI2_CLK__FUNC_SPI2_CK>;
			bias-disable;
		};
	};
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi_pins_a>;
	status = "disabled";
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi_pins_b>;
	status = "disabled";
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi_pins_c>;
	status = "disabled";
};

&nor_flash {
	pinctrl-names = "default";
	pinctrl-0 = <&nor_pins_default>;
	status = "okay";
	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
	};
};

&pio {
	nor_pins_default: nor {
		pins1 {
			pinmux = <MT2701_PIN_240_EXT_XCS__FUNC_EXT_XCS>,
				 <MT2701_PIN_241_EXT_SCK__FUNC_EXT_SCK>,
				 <MT2701_PIN_239_EXT_SDIO0__FUNC_EXT_SDIO0>,
				 <MT2701_PIN_238_EXT_SDIO1__FUNC_EXT_SDIO1>,
				 <MT2701_PIN_237_EXT_SDIO2__FUNC_EXT_SDIO2>,
				 <MT2701_PIN_236_EXT_SDIO3__FUNC_EXT_SDIO3>;
			drive-strength = <MTK_DRIVE_4mA>;
			bias-pull-up;
		};
	};
};

&uart0 {
	status = "okay";
};

&usb2 {
	status = "okay";
	usb-role-switch;
	connector{
		compatible = "gpio-usb-b-connector", "usb-b-connector";
		type = "micro";
		id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
		vbus-supply = <&usb_vbus>;
	};
};