code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright 2019 Gateworks Corporation
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		led0 = &led0;
		led1 = &led1;
		led2 = &led2;
	};

	chosen {
		stdout-path = &uart2;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x20000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-pb {
			label = "user_pb";
			gpios = <&gsc_gpio 2 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};

		user-pb1x {
			label = "user_pb1x";
			linux,code = <BTN_1>;
			interrupt-parent = <&gsc>;
			interrupts = <0>;
		};

		key-erased {
			label = "key-erased";
			linux,code = <BTN_2>;
			interrupt-parent = <&gsc>;
			interrupts = <1>;
		};

		eeprom-wp {
			label = "eeprom_wp";
			linux,code = <BTN_3>;
			interrupt-parent = <&gsc>;
			interrupts = <2>;
		};

		tamper {
			label = "tamper";
			linux,code = <BTN_4>;
			interrupt-parent = <&gsc>;
			interrupts = <5>;
		};

		switch-hold {
			label = "switch_hold";
			linux,code = <BTN_5>;
			interrupt-parent = <&gsc>;
			interrupts = <7>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led1: user2 {
			label = "user2";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
			default-state = "off";
		};

		led2: user3 {
			label = "user3";
			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
			default-state = "off";
		};
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_5p0v: regulator-5p0v {
		compatible = "regulator-fixed";
		regulator-name = "5P0V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	reg_wl: regulator-wl {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_wl>;
		compatible = "regulator-fixed";
		regulator-name = "wl";
		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <100>;
		enable-active-high;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&ecspi3 {
	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	gsc: gsc@20 {
		compatible = "gw,gsc";
		reg = <0x20>;
		interrupt-parent = <&gpio1>;
		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		#size-cells = <0>;

		adc {
			compatible = "gw,gsc-adc";
			#address-cells = <1>;
			#size-cells = <0>;

			channel@6 {
				gw,mode = <0>;
				reg = <0x06>;
				label = "temp";
			};

			channel@8 {
				gw,mode = <3>;
				reg = <0x08>;
				label = "vdd_bat";
			};

			channel@82 {
				gw,mode = <2>;
				reg = <0x82>;
				label = "vdd_vin";
				gw,voltage-divider-ohms = <22100 1000>;
				gw,voltage-offset-microvolt = <800000>;
			};

			channel@84 {
				gw,mode = <2>;
				reg = <0x84>;
				label = "vdd_5p0";
				gw,voltage-divider-ohms = <22100 10000>;
			};

			channel@86 {
				gw,mode = <2>;
				reg = <0x86>;
				label = "vdd_3p3";
				gw,voltage-divider-ohms = <10000 10000>;
			};

			channel@88 {
				gw,mode = <2>;
				reg = <0x88>;
				label = "vdd_2p5";
				gw,voltage-divider-ohms = <10000 10000>;
			};

			channel@8c {
				gw,mode = <2>;
				reg = <0x8c>;
				label = "vdd_3p0";
			};

			channel@8e {
				gw,mode = <2>;
				reg = <0x8e>;
				label = "vdd_arm";
			};

			channel@90 {
				gw,mode = <2>;
				reg = <0x90>;
				label = "vdd_soc";
			};

			channel@92 {
				gw,mode = <2>;
				reg = <0x92>;
				label = "vdd_1p5";
			};

			channel@98 {
				gw,mode = <2>;
				reg = <0x98>;
				label = "vdd_1p8";
			};

			channel@9a {
				gw,mode = <2>;
				reg = <0x9a>;
				label = "vdd_1p0";
				gw,voltage-divider-ohms = <10000 10000>;
			};

			channel@9c {
				gw,mode = <2>;
				reg = <0x9c>;
				label = "vdd_an1";
				gw,voltage-divider-ohms = <10000 10000>;
			};

			channel@a2 {
				gw,mode = <2>;
				reg = <0xa2>;
				label = "vdd_gsc";
				gw,voltage-divider-ohms = <10000 10000>;
			};
		};
	};

	gsc_gpio: gpio@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gsc>;
		interrupts = <4>;
	};

	eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	rtc@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	accel@19 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_accel>;
		compatible = "st,lis2de12";
		reg = <0x19>;
		st,drdy-int-pin = <1>;
		interrupt-parent = <&gpio7>;
		interrupts = <13 0>;
		interrupt-names = "INT1";
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

/* off-board RS232 */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

/* serial console */
&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

/* cc1352 */
&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	uart-has-rtscts;
	status = "okay";
};

/* Sterling-LWB Bluetooth */
&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>,<&pinctrl_bten>;
	uart-has-rtscts;
	status = "okay";

	bluetooth {
		compatible = "brcm,bcm4330-bt";
		shutdown-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
	};
};

/* GPS */
&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_5p0v>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

/* Sterling-LWB SDIO WiFi */
&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	vmmc-supply = <&reg_wl>;
	non-removable;
	bus-width = <4>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	pinctrl_accel: accelmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b1
		>;
	};

	pinctrl_bten: btengrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b1
		>;
	};

	pinctrl_ecspi3: escpi3grp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x100b1
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x1b0b0
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x1b0b0
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15  0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x0001b0b0
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x1b0b0
		>;
	};

	pinctrl_pps: ppsgrp {
		fsl,pins = <
			MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16	0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_reg_wl: regwlgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__GPIO1_IO05		0x1b0b1
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D23__UART3_RTS_B		0x1b0b1
			MX6QDL_PAD_EIM_D31__UART3_CTS_B		0x1b0b1
			MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x4001b0b1 /* DIO20 */
			MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x4001b0b1 /* DIO14 */
			MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06	0x4001b0b1 /* DIO15 */
			MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08	0x1b0b1 /* TMS */
			MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09	0x1b0b1 /* TCK */
			MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10	0x1b0b1 /* TDO */
			MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11	0x1b0b1 /* TDI */
			MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x4001b0b1 /* RST# */
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B	0x1b0b1
			MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x13059
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x17059 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x17059
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x170b9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170b9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170b9
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170f9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright 2019 Gateworks Corporation
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		led0 = &led0;
		led1 = &led1;
		led2 = &led2;
		nand = &gpmi;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	chosen {
		stdout-path = &uart2;
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-pb {
			label = "user_pb";
			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};

		user-pb1x {
			label = "user_pb1x";
			linux,code = <BTN_1>;
			interrupt-parent = <&gsc>;
			interrupts = <0>;
		};

		key-erased {
			label = "key-erased";
			linux,code = <BTN_2>;
			interrupt-parent = <&gsc>;
			interrupts = <1>;
		};

		eeprom-wp {
			label = "eeprom_wp";
			linux,code = <BTN_3>;
			interrupt-parent = <&gsc>;
			interrupts = <2>;
		};

		tamper {
			label = "tamper";
			linux,code = <BTN_4>;
			interrupt-parent = <&gsc>;
			interrupts = <5>;
		};

		switch-hold {
			label = "switch_hold";
			linux,code = <BTN_5>;
			interrupt-parent = <&gsc>;
			interrupts = <7>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led1: user2 {
			label = "user2";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
			default-state = "off";
		};

		led2: user3 {
			label = "user3";
			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
			default-state = "off";
		};
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_usb_vbus: regulator-5p0v {
		compatible = "regulator-fixed";
		regulator-name = "usb_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&ecspi2 {
	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	gsc: gsc@20 {
		compatible = "gw,gsc";
		reg = <0x20>;
		interrupt-parent = <&gpio1>;
		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		adc {
			compatible = "gw,gsc-adc";
			#address-cells = <1>;
			#size-cells = <0>;

			channel@0 {
				gw,mode = <0>;
				reg = <0x00>;
				label = "temp";
			};

			channel@2 {
				gw,mode = <1>;
				reg = <0x02>;
				label = "vdd_vin";
			};

			channel@5 {
				gw,mode = <1>;
				reg = <0x05>;
				label = "vdd_3p3";
			};

			channel@8 {
				gw,mode = <1>;
				reg = <0x08>;
				label = "vdd_bat";
			};

			channel@b {
				gw,mode = <1>;
				reg = <0x0b>;
				label = "vdd_5p0";
			};

			channel@e {
				gw,mode = <1>;
				reg = <0xe>;
				label = "vdd_arm";
			};

			channel@11 {
				gw,mode = <1>;
				reg = <0x11>;
				label = "vdd_soc";
			};

			channel@14 {
				gw,mode = <1>;
				reg = <0x14>;
				label = "vdd_3p0";
			};

			channel@17 {
				gw,mode = <1>;
				reg = <0x17>;
				label = "vdd_1p5";
			};

			channel@1d {
				gw,mode = <1>;
				reg = <0x1d>;
				label = "vdd_1p8";
			};

			channel@20 {
				gw,mode = <1>;
				reg = <0x20>;
				label = "vdd_1p0";
			};

			channel@23 {
				gw,mode = <1>;
				reg = <0x23>;
				label = "vdd_2p5";
			};
		};

		fan-controller@a {
			compatible = "gw,gsc-fan";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0a>;
		};
	};

	gsc_gpio: gpio@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gsc>;
		interrupts = <4>;
	};

	eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	rtc@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	accel@19 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_accel>;
		compatible = "st,lis2de12";
		reg = <0x19>;
		st,drdy-int-pin = <1>;
		interrupt-parent = <&gpio7>;
		interrupts = <13 0>;
		interrupt-names = "INT1";
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
	status = "disabled";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

&pwm4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
	status = "disabled";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	dr_mode = "host";
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_vbus>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	no-1-8-v; /* firmware will remove if board revision supports */
	status = "okay";
};

&wdog1 {
	status = "disabled";
};

&wdog2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&iomuxc {
	pinctrl_accel: accelmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b1
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
		>;
	};

	pinctrl_ecspi2: escpi2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK	0x100b1
			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI	0x100b1
			MX6QDL_PAD_EIM_OE__ECSPI2_MISO	0x100b1
			MX6QDL_PAD_EIM_RW__GPIO2_IO26	0x100b1
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x4001b0b0
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x0001b0b0
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x1b0b0
		>;
	};

	pinctrl_pps: ppsgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__GPIO1_IO05		0x1b0b1
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__PWM1_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT2__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x4001b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11		0x4001b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x13059
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x17059 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x17059
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170b9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170b9
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170f9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT3__WDOG2_B		0x1b0b0
		>;
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright 2019 Gateworks Corporation
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		led0 = &led0;
		led1 = &led1;
		nand = &gpmi;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	chosen {
		stdout-path = &uart2;
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-pb {
			label = "user_pb";
			gpios = <&gsc_gpio 2 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};

		user-pb1x {
			label = "user_pb1x";
			linux,code = <BTN_1>;
			interrupt-parent = <&gsc>;
			interrupts = <0>;
		};

		key-erased {
			label = "key-erased";
			linux,code = <BTN_2>;
			interrupt-parent = <&gsc>;
			interrupts = <1>;
		};

		eeprom-wp {
			label = "eeprom_wp";
			linux,code = <BTN_3>;
			interrupt-parent = <&gsc>;
			interrupts = <2>;
		};

		tamper {
			label = "tamper";
			linux,code = <BTN_4>;
			interrupt-parent = <&gsc>;
			interrupts = <5>;
		};

		switch-hold {
			label = "switch_hold";
			linux,code = <BTN_5>;
			interrupt-parent = <&gsc>;
			interrupts = <7>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led1: user2 {
			label = "user2";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
			default-state = "off";
		};
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x20000000>;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_5p0v: regulator-5p0v {
		compatible = "regulator-fixed";
		regulator-name = "5P0V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	gsc: gsc@20 {
		compatible = "gw,gsc";
		reg = <0x20>;
		interrupt-parent = <&gpio1>;
		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		#size-cells = <0>;

		adc {
			compatible = "gw,gsc-adc";
			#address-cells = <1>;
			#size-cells = <0>;

			channel@6 {
				gw,mode = <0>;
				reg = <0x06>;
				label = "temp";
			};

			channel@8 {
				gw,mode = <3>;
				reg = <0x08>;
				label = "vdd_bat";
			};

			channel@82 {
				gw,mode = <2>;
				reg = <0x82>;
				label = "vdd_vin";
				gw,voltage-divider-ohms = <22100 1000>;
				gw,voltage-offset-microvolt = <800000>;
			};

			channel@84 {
				gw,mode = <2>;
				reg = <0x84>;
				label = "vdd_5p0";
				gw,voltage-divider-ohms = <22100 10000>;
			};

			channel@86 {
				gw,mode = <2>;
				reg = <0x86>;
				label = "vdd_3p3";
				gw,voltage-divider-ohms = <10000 10000>;
			};

			channel@88 {
				gw,mode = <2>;
				reg = <0x88>;
				label = "vdd_2p5";
				gw,voltage-divider-ohms = <10000 10000>;
			};

			channel@8c {
				gw,mode = <2>;
				reg = <0x8c>;
				label = "vdd_arm";
			};

			channel@8e {
				gw,mode = <2>;
				reg = <0x8e>;
				label = "vdd_soc";
			};

			channel@90 {
				gw,mode = <2>;
				reg = <0x90>;
				label = "vdd_1p5";
			};

			channel@92 {
				gw,mode = <2>;
				reg = <0x92>;
				label = "vdd_1p0";
			};

			channel@98 {
				gw,mode = <2>;
				reg = <0x98>;
				label = "vdd_3p0";
			};

			channel@9a {
				gw,mode = <2>;
				reg = <0x9a>;
				label = "vdd_an1";
				gw,voltage-divider-ohms = <10000 10000>;
			};

			channel@a2 {
				gw,mode = <2>;
				reg = <0xa2>;
				label = "vdd_gsc";
				gw,voltage-divider-ohms = <10000 10000>;
			};
		};
	};

	gsc_gpio: gpio@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gsc>;
		interrupts = <4>;
	};

	eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	rtc@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

&pwm4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
	status = "disabled";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x0001b0b0
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0
		>;
	};

	pinctrl_pps: ppsgrp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
		>;
	};
};


code:
/*
 * Copyright (C) 2013,2014 Russell King
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	/* Will be filled by the bootloader */
	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0>;
	};

	chosen {
		stdout-path = &uart1;
	};

	ir_recv: ir-receiver {
		compatible = "gpio-ir-receiver";
		gpios = <&gpio3 5 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>;
	};

	v_3v2: regulator-v-3v2 {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-max-microvolt = <3300000>;
		regulator-min-microvolt = <3300000>;
		regulator-name = "v_3v2";
		vin-supply = <&v_5v0>;
	};

	v_5v0: regulator-v-5v0 {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_5v0";
	};

	v_sd: regulator-v-sd {
		compatible = "regulator-fixed";
		gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard_vmmc>;
		regulator-boot-on;
		regulator-max-microvolt = <3300000>;
		regulator-min-microvolt = <3300000>;
		regulator-name = "v_sd";
		startup-delay-us = <1000>;
		vin-supply = <&v_3v2>;
	};

	v_usb2: regulator-v-usb2 {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_usb2";
		vin-supply = <&v_5v0>;
	};

	v_usb1: regulator-v-usb1 {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_usb1";
		vin-supply = <&v_5v0>;
	};

	audio: sound-sgtl5000 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "On-board Codec";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_codec>;
		simple-audio-card,frame-master = <&sound_codec>;
		simple-audio-card,widgets =
			"Microphone", "Headphone Jack",
			"Headphone", "Headphone Jack";
		simple-audio-card,routing =
			"MIC_IN", "Headphone Jack",
			"Headphone Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";

		sound_cpu: simple-audio-card,cpu {
			sound-dai = <&ssi1>;
		};

		sound_codec: simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
		};
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "On-board SPDIF";
		/* IMX6 doesn't implement this yet */
		spdif-controller = <&spdif>;
		spdif-out;
	};
};

&audmux {
	status = "okay";

	ssi1 {
		fsl,audmux-port = <0>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_SYN |
			 IMX_AUDMUX_V2_PTCR_TFSEL(4) |
			 IMX_AUDMUX_V2_PTCR_TCSEL(4) |
			 IMX_AUDMUX_V2_PTCR_TFSDIR |
			 IMX_AUDMUX_V2_PTCR_TCLKDIR)
			 IMX_AUDMUX_V2_PDCR_RXDSEL(4)
		>;
	};

	pins5 {
		fsl,audmux-port = <4>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(0)
		>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard_flexcan1>;
	status = "okay";
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard_hdmi>;
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard_i2c1>;
	status = "okay";

	/* Pro baseboard model */
	rtc@68 {
		compatible = "nxp,pcf8523";
		reg = <0x68>;
	};

	/* Pro baseboard model */
	sgtl5000: codec@a {
		clocks = <&clks IMX6QDL_CLK_CKO>;
		compatible = "fsl,sgtl5000";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard_sgtl5000>;
		#sound-dai-cells = <0>;
		reg = <0x0a>;
		VDDA-supply = <&v_3v2>;
		VDDIO-supply = <&v_3v2>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard_i2c2>;
	status = "okay";
};

&iomuxc {
	hummingboard {
		pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
			fsl,pins = <
				MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
				MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
			>;
		};

		pinctrl_hummingboard_gpio3_5: hummingboard-gpio3_5 {
			fsl,pins = <
				MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1
			>;
		};

		pinctrl_hummingboard_hdmi: hummingboard-hdmi {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
			>;
		};

		pinctrl_hummingboard_i2c1: hummingboard-i2c1 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
			>;
		};

		pinctrl_hummingboard_i2c2: hummingboard-i2c2 {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
			>;
		};

		pinctrl_hummingboard_pcie_reset: hummingboard-pcie-reset {
			fsl,pins = <
				MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1
			>;
		};

		pinctrl_hummingboard_pwm1: pwm1grp {
			fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1>;
		};

		pinctrl_hummingboard_sgtl5000: hummingboard-sgtl5000 {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
				MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
				MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0
				MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
				MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
			>;
		};

		pinctrl_hummingboard_spdif: hummingboard-spdif {
			fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
		};

		pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {
			fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
		};

		pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
			/*
			 * We want it pulled down for a fixed host connection.
			 */
			fsl,pins = <MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059>;
		};

		pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
			fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
		};

		pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-aux {
			fsl,pins = <
				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071
			>;
		};

		pinctrl_hummingboard_usdhc2: hummingboard-usdhc2 {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
			>;
		};
		pinctrl_hummingboard_vmmc: hummingboard-vmmc {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
			>;
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard_pcie_reset>;
	reset-gpio = <&gpio3 4 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm1 {
	 pinctrl-names = "default";
	 pinctrl-0 = <&pinctrl_hummingboard_pwm1>;
	 status = "okay";
};

&pwm2 {
	 pinctrl-names = "default";
	 status = "okay";
};

&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard_spdif>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&usbh1 {
	disable-over-current;
	vbus-supply = <&v_usb2>;
	status = "okay";
};

&usbotg {
	disable-over-current;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
	vbus-supply = <&v_usb1>;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <
		&pinctrl_hummingboard_usdhc2_aux
		&pinctrl_hummingboard_usdhc2
	>;
	vmmc-supply = <&v_sd>;
	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&vcc_3v3 {
	vin-supply = <&v_3v2>;
};


code:
/*
 * Device Tree file for SolidRun HummingBoard2
 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

&iomuxc {
	hummingboard2 {
		pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3 {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
				MX6QDL_PAD_SD3_RST__SD3_RESET  0x17059
			>;
		};
	};
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_usdhc3>;
	vmmc-supply = <&v_3v2>;
	vqmmc-supply = <&v_3v2>;
	bus-width = <8>;
	non-removable;
	status = "okay";
};


code:
/*
 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	/* Will be filled by the bootloader */
	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0>;
	};

	chosen {
		stdout-path = &uart1;
	};

	ir_recv: ir-receiver {
		compatible = "gpio-ir-receiver";
		gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>;
		linux,rc-map-name = "rc-rc6-mce";
	};

	v_3v2: regulator-v-3v2 {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-max-microvolt = <3300000>;
		regulator-min-microvolt = <3300000>;
		regulator-name = "v_3v2";
	};

	v_5v0: regulator-v-5v0 {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_5v0";
	};

	vcc_1p8: regulator-vcc-1p8 {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-max-microvolt = <1800000>;
		regulator-min-microvolt = <1800000>;
		regulator-name = "vcc_1p8";
		vin-supply = <&v_3v2>;
	};

	v_sd: regulator-v-sd {
		compatible = "regulator-fixed";
		gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard2_vmmc>;
		regulator-boot-on;
		regulator-max-microvolt = <3300000>;
		regulator-min-microvolt = <3300000>;
		regulator-name = "v_sd";
		startup-delay-us = <1000>;
		vin-supply = <&v_3v2>;
	};

	v_usb1: regulator-v-usb1 {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>;
		regulator-always-on;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_usb1";
		vin-supply = <&v_5v0>;
	};

	v_usb2: regulator-v-usb2 {
		/* USB hub port 1 */
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>;
		regulator-always-on;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_usb2";
		vin-supply = <&v_5v0>;
	};

	v_usb3: regulator-v-usb3 {
		/* USB hub port 3 */
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>;
		regulator-always-on;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_usb3";
		vin-supply = <&v_5v0>;
	};

	v_usb4: regulator-v-usb4 {
		/* USB hub port 4 */
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>;
		regulator-always-on;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_usb4";
		vin-supply = <&v_5v0>;
	};

	audio: sound-sgtl5000 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "On-board Codec";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_codec>;
		simple-audio-card,frame-master = <&sound_codec>;
		simple-audio-card,widgets =
			"Microphone", "Mic Jack",
			"Headphone", "Headphone Jack";
		simple-audio-card,routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";

		sound_cpu: simple-audio-card,cpu {
			sound-dai = <&ssi1>;
		};

		sound_codec: simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
		};
	};
};

&audmux {
	status = "okay";

	ssi1 {
		fsl,audmux-port = <0>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_SYN |
			 IMX_AUDMUX_V2_PTCR_TFSEL(4) |
			 IMX_AUDMUX_V2_PTCR_TCSEL(4) |
			 IMX_AUDMUX_V2_PTCR_TFSDIR |
			 IMX_AUDMUX_V2_PTCR_TCLKDIR)
			 IMX_AUDMUX_V2_PDCR_RXDSEL(4)
		>;
	};

	pins5 {
		fsl,audmux-port = <4>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(0)
		>;
	};
};

&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>;
	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_hdmi>;
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_i2c1>;
	status = "okay";

	pcf8523: rtc@68 {
		compatible = "nxp,pcf8523";
		reg = <0x68>;
	};

	sgtl5000: codec@a {
		clocks = <&clks IMX6QDL_CLK_CKO>;
		compatible = "fsl,sgtl5000";
		#sound-dai-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hummingboard2_sgtl5000>;
		reg = <0x0a>;
		VDDA-supply = <&v_3v2>;
		VDDD-supply = <&vcc_1p8>;
		VDDIO-supply = <&v_3v2>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_i2c3>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	hummingboard2 {
		pinctrl_hog: hoggrp {
		fsl,pins = <
				/*
				 * 36 pin headers GPIO description. The pins
				 * numbering as following -
				 *
				 * 	3.2v	5v	74	75
				 *	73	72	71	70
				 *	69	68	67	66
				 *
				 *	77	78	79	76
				 *	65	64	61	60
				 *	53	52	51	50
				 *	49	48	166	132
				 *	95	94	90	91
				 *	GND	54	24	204
				 *
				 * The GPIO numbers can be extracted using
				 * signal name from below.
				 * Example -
				 * MX6QDL_PAD_EIM_DA10__GPIO3_IO10 is
				 * GPIO(3,10) which is (3-1)*32+10 = gpio 74
				 *
				 * i.e. The mapping of GPIO(X,Y) to Linux gpio
				 * number is : gpio number = (X-1) * 32 + Y
				 */
				/* DI1_PIN15 */
				MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1
				/* DI1_PIN02 */
				MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1
				/* DISP1_DATA00 */
				MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1
				/* DISP1_DATA01 */
				MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1
				/* DISP1_DATA02 */
				MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1
				/* DISP1_DATA03 */
				MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1
				/* DISP1_DATA04 */
				MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1
				/* DISP1_DATA05 */
				MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1
				/* DISP1_DATA06 */
				MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1
				/* DISP1_DATA07 */
				MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1
				/* DI1_D0_CS */
				MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1
				/* DI1_D1_CS */
				MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1
				/* DI1_PIN01 */
				MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1
				/* DI1_PIN03 */
				MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1
				/* DISP1_DATA08 */
				MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1
				/* DISP1_DATA09 */
				MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1
				/* DISP1_DATA10 */
				MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1
				/* DISP1_DATA11 */
				MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1
				/* DISP1_DATA12 */
				MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1
				/* DISP1_DATA13 */
				MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1
				/* DISP1_DATA14 */
				MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1
				/* DISP1_DATA15 */
				MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1
				/* DISP1_DATA16 */
				MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1
				/* DISP1_DATA17 */
				MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1
				/* DISP1_DATA18 */
				MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1
				/* DISP1_DATA19 */
				MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1
				/* DISP1_DATA20 */
				MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1
				/* DISP1_DATA21 */
				MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1
				/* DISP1_DATA22 */
				MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1
				/* DISP1_DATA23 */
				MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1
				/* DI1_DISP_CLK */
				MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1
				/* SPDIF_IN */
				MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1
				/* SPDIF_OUT */
				MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1

				/* MikroBUS GPIO pin number 10 */
				MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1
			>;
		};

		pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_OE__ECSPI2_MISO	0x100b1
				MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI	0x100b1
				MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK	0x100b1
				MX6QDL_PAD_EIM_RW__GPIO2_IO26	0x000b1 /* CS */
			>;
		};

		pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9 {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000
			>;
		};

		pinctrl_hummingboard2_hdmi: hummingboard2-hdmi {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
			>;
		};

		pinctrl_hummingboard2_i2c1: hummingboard2-i2c1 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
			>;
		};

		pinctrl_hummingboard2_i2c2: hummingboard2-i2c2 {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
			>;
		};

		pinctrl_hummingboard2_i2c3: hummingboard2-i2c3 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
			>;
		};

		pinctrl_hummingboard2_mipi: hummingboard2_mipi {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1
				MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1
				MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
			>;
		};

		pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-reset {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1
			>;
		};

		pinctrl_hummingboard2_pwm1: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
			>;
		};

		pinctrl_hummingboard2_pwm3: pwm3grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
			>;
		};

		pinctrl_hummingboard2_sgtl5000: hummingboard2-sgtl5000 {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
				MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
				MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0
				MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
				MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
			>;
		};

		pinctrl_hummingboard2_usbh1_vbus: hummingboard2-usbh1-vbus {
			fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
		};

		pinctrl_hummingboard2_usbh2_vbus: hummingboard2-usbh2-vbus {
			fsl,pins = <MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0>;
		};

		pinctrl_hummingboard2_usbh3_vbus: hummingboard2-usbh3-vbus {
			fsl,pins = <MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0>;
		};

		pinctrl_hummingboard2_usbotg_id: hummingboard2-usbotg-id {
			/*
			 * We want it pulled down for a fixed host connection.
			 */
			fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
		};

		pinctrl_hummingboard2_usbotg_vbus: hummingboard2-usbotg-vbus {
			fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
		};

		pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux {
			fsl,pins = <
				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071
				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
			>;
		};

		pinctrl_hummingboard2_usdhc2: hummingboard2-usdhc2 {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
			>;
		};

		pinctrl_hummingboard2_usdhc2_100mhz: hummingboard2-usdhc2-100mhz {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170b9
				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100b9
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9
			>;
		};

		pinctrl_hummingboard2_usdhc2_200mhz: hummingboard2-usdhc2-200mhz {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170f9
				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100f9
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9
			>;
		};

		pinctrl_hummingboard2_vmmc: hummingboard2-vmmc {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
			>;
		};

		pinctrl_hummingboard2_uart3: hummingboard2-uart3 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D25__UART3_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D24__UART3_RX_DATA	0x40013000
			>;
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>;
	reset-gpio = <&gpio2 11 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_pwm1>;
	status = "okay";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_pwm3>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&usbh1 {
	disable-over-current;
	status = "okay";
};

&usbotg {
	disable-over-current;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_usbotg_id>;
	vbus-supply = <&v_usb1>;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <
		&pinctrl_hummingboard2_usdhc2_aux
		&pinctrl_hummingboard2_usdhc2
	>;
	pinctrl-1 = <
		&pinctrl_hummingboard2_usdhc2_aux
		&pinctrl_hummingboard2_usdhc2_100mhz
	>;
	pinctrl-2 = <
		&pinctrl_hummingboard2_usdhc2_aux
		&pinctrl_hummingboard2_usdhc2_200mhz
	>;
	vmmc-supply = <&v_sd>;
	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hummingboard2_uart3>;
	status = "okay";
};

&vcc_3v3 {
	vin-supply = <&v_3v2>;
};


code:
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2018 Jacopo Mondi <jacopo@jmondi.org>
 */

#include "imx6qdl-icore.dtsi"

&iomuxc {
	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0b0
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b0
		>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	clocks = <&clks IMX6QDL_CLK_ENET>,
		 <&clks IMX6QDL_CLK_ENET>,
		 <&clks IMX6QDL_CLK_ENET_REF>;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright (C) 2015 Amarula Solutions B.V.
 * Copyright (C) 2015 Engicam S.r.l.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x80000000>;
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "1P8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_2p5v: regulator-2p5v {
		compatible = "regulator-fixed";
		regulator-name = "2P5V";
		regulator-min-microvolt = <2500000>;
		regulator-max-microvolt = <2500000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_sd3_vmmc: regulator-sd3-vmmc {
		compatible = "regulator-fixed";
		regulator-name = "P3V3_SD3_SWITCHED";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
		enable-active-high;
	};

	reg_sd4_vmmc: regulator-sd4-vmmc {
		compatible = "regulator-fixed";
		regulator-name = "P3V3_SD4_SWITCHED";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_usb_h1_vbus: regulator-usb-h1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};

	usb_hub: usb-hub {
		compatible = "smsc,usb3503a";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbhub>;
		reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
		clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
		clock-names = "refclk";
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "imx6qdl-icore-rqs-sgtl5000";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&dailink_master>;
		simple-audio-card,frame-master = <&dailink_master>;
		simple-audio-card,widgets =
			"Microphone", "Mic Jack",
			"Headphone", "Headphone Jack",
			"Line", "Line In Jack",
			"Speaker", "Line Out Jack",
			"Speaker", "Ext Spk";
		simple-audio-card,routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";

		simple-audio-card,cpu {
			sound-dai = <&ssi1>;
		};

		dailink_master: simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";

	audmux_ssi1 {
		fsl,audmux-port = <MX51_AUDMUX_PORT1_SSI0>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_TFSDIR |
			IMX_AUDMUX_V2_PTCR_TFSEL(MX51_AUDMUX_PORT4) |
			IMX_AUDMUX_V2_PTCR_TCLKDIR |
			IMX_AUDMUX_V2_PTCR_TCSEL(MX51_AUDMUX_PORT4) |
			IMX_AUDMUX_V2_PTCR_SYN)
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT4)
		>;
	};

	audmux_aud4 {
		fsl,audmux-port = <MX51_AUDMUX_PORT4>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT1_SSI0)
		>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	xceiver-supply = <&reg_3p3v>;
	status = "okay";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
	xceiver-supply = <&reg_3p3v>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-handle = <&eth_phy>;
	phy-mode = "rgmii";
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		eth_phy: ethernet-phy@0 {
			reg = <0x0>;
			rxc-skew-ps = <1140>;
			txc-skew-ps = <1140>;
			txen-skew-ps = <600>;
			rxdv-skew-ps = <240>;
			rxd0-skew-ps = <420>;
			rxd1-skew-ps = <600>;
			rxd2-skew-ps = <420>;
			rxd3-skew-ps = <240>;
			txd0-skew-ps = <60>;
			txd1-skew-ps = <60>;
			txd2-skew-ps = <60>;
			txd3-skew-ps = <240>;
		};
	};
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	sgtl5000: codec@a {
		#sound-dai-cells = <0>;
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
		VDDD-supply = <&reg_1p8v>;
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&ssi1 {
	fsl,mode = "i2s-slave";
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	disable-over-current;
	clocks = <&clks IMX6QDL_CLK_USBOH3>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	no-1-8-v;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	vmcc-supply = <&reg_sd3_vmmc>;
	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	no-1-8-v;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc4>;
	pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
	vmcc-supply = <&reg_sd4_vmmc>;
	bus-width = <8>;
	no-1-8-v;
	non-removable;
	status = "okay";
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
			MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x110b0
			MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
			MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN     0x1b0b0
		>;
	};

	pinctrl_can1: can1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020
		>;
	};

	pinctrl_can2: can2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b020
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b020
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
			MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
			MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059	/* PCIe Reset */
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
		>;
	};

	pinctrl_usbhub: usbhubgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_6__GPIO1_IO06  0x1f059	/* HUB USB Reset */
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17070
			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10070
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
			MX6QDL_PAD_GPIO_1__GPIO1_IO01  0x1f059	/* CD */
			MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1f059	/* PWR */
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170B1
			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100B1
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170F9
			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100F9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
		>;
	};

	pinctrl_usdhc4: usdhc4grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_CMD__SD4_CMD    0x17070
			MX6QDL_PAD_SD4_CLK__SD4_CLK    0x10070
			MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
			MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
			MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
			MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
			MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
			MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
			MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
			MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
		>;
	};

	pinctrl_usdhc4_100mhz: usdhc4grp_100mhz {
		fsl,pins = <
			MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170B1
			MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100B1
			MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
			MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
			MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
			MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
			MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
			MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
			MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
			MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
		>;
	};

	pinctrl_usdhc4_200mhz: usdhc4grp_200mhz {
		fsl,pins = <
			MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170F9
			MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100F9
			MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
			MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
			MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
			MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
			MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
			MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
			MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
			MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright (C) 2016 Amarula Solutions B.V.
 * Copyright (C) 2016 Engicam S.r.l.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x80000000>;
	};

	chosen {
		stdout-path = &uart4;
	};

	backlight_lvds: backlight-lvds {
		compatible = "pwm-backlight";
		pwms = <&pwm3 0 100000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "1P8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_2p5v: regulator-2p5v {
		compatible = "regulator-fixed";
		regulator-name = "2P5V";
		regulator-min-microvolt = <2500000>;
		regulator-max-microvolt = <2500000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_usb_h1_vbus: regulator-usb-h1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};

	rmii_clk: clock-rmii-clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;  /* 25MHz for example */
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "imx6qdl-icore-sgtl5000";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&dailink_master>;
		simple-audio-card,frame-master = <&dailink_master>;
		simple-audio-card,widgets =
			"Microphone", "Mic Jack",
			"Headphone", "Headphone Jack",
			"Line", "Line In Jack",
			"Speaker", "Line Out Jack",
			"Speaker", "Ext Spk";
		simple-audio-card,routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";

		simple-audio-card,cpu {
			sound-dai = <&ssi1>;
		};

		dailink_master: simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";

	audmux_ssi1 {
		fsl,audmux-port = <MX51_AUDMUX_PORT1_SSI0>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_TFSDIR |
			IMX_AUDMUX_V2_PTCR_TFSEL(MX51_AUDMUX_PORT4) |
			IMX_AUDMUX_V2_PTCR_TCLKDIR |
			IMX_AUDMUX_V2_PTCR_TCSEL(MX51_AUDMUX_PORT4) |
			IMX_AUDMUX_V2_PTCR_SYN)
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT4)
		>;
	};

	audmux_aud4 {
		fsl,audmux-port = <MX51_AUDMUX_PORT4>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT1_SSI0)
		>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	xceiver-supply = <&reg_3p3v>;
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	xceiver-supply = <&reg_3p3v>;
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&rmii_clk>;
	phy-mode = "rmii";
	phy-handle = <&eth_phy>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		eth_phy: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
			reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
			reset-assert-us = <4000>;
			reset-deassert-us = <4000>;
		};
	};
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	nand-on-flash-bbt;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ov5640>;
		reg = <0x3c>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		clock-names = "xclk";
		DOVDD-supply = <&reg_1p8v>;
		AVDD-supply = <&reg_3p3v>;
		DVDD-supply = <&reg_3p3v>;
		powerdown-gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpio5 31 GPIO_ACTIVE_LOW>;
		status = "disabled";

		port {
			ov5640_to_mipi_csi2: endpoint {
				remote-endpoint = <&mipi_csi2_in>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};

	sgtl5000: codec@a {
		#sound-dai-cells = <0>;
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
		VDDD-supply = <&reg_1p8v>;
	};
};

&mipi_csi {
	status = "disabled";

	port@0 {
		reg = <0>;

		mipi_csi2_in: endpoint {
			remote-endpoint = <&ov5640_to_mipi_csi2>;
			clock-lanes = <0>;
			data-lanes = <1 2>;
		};
	};
};

&pwm3 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&ssi1 {
	fsl,mode = "i2s-slave";
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	disable-over-current;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
	no-1-8-v;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	no-1-8-v;
	non-removable;
	status = "disabled";
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
			MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x110b0
			MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
			MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x1b0b1
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23	0x1b0b0
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b0
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b020
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b020
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B   0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
			MX6QDL_PAD_SD4_DAT0__NAND_DQS      0x00b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_EB2__I2C2_SCL  0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
			MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
		>;
	};

	pinctrl_ov5640: ov5640grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x1b0b0
			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x1b0b0
			MX6QDL_PAD_GPIO_0__CCM_CLKO1	  0x130b0
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17070
			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10070
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17070
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070
			MX6QDL_PAD_GPIO_1__GPIO1_IO01  0x1b0b0
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
		>;
	};
};