code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source
 *
 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
 *
 * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as
 * device tree nodes in this file.
 */

#include "exynos-pinctrl.h"

&pinctrl_alive {
	gpa0: gpa0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		interrupt-parent = <&gic>;
		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
	};

	gpa1: gpa1-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		interrupt-parent = <&gic>;
		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
	};

	dp0_hpd: dp0-hpd-pins {
		samsung,pins = "gpa1-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
	};

	dp1_hpd: dp1-hpd-pins {
		samsung,pins = "gpa1-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
	};

	gpq0: gpq0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	speedy0_bus: speedy0-bus-pins {
		samsung,pins = "gpq0-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
	};

	speedy1_bus: speedy1-bus-pins {
		samsung,pins = "gpa0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
	};
};

&pinctrl_aud {
	gpb0: gpb0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpb1: gpb1-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpb2: gpb2-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpb3: gpb3-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	aud_codec_mclk: aud-codec-mclk-pins {
		samsung,pins = "gpb0-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_codec_mclk_idle: aud-codec-mclk-idle-pins {
		samsung,pins = "gpb0-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s0_bus: aud-i2s0-pins {
		samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s0_idle: aud-i2s0-idle-pins {
		samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s1_bus: aud-i2s1-pins {
		samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s1_idle: aud-i2s1-idle-pins {
		samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s2_bus: aud-i2s2-pins {
		samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s2_idle: aud-i2s2-idle-pins {
		samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s3_bus: aud-i2s3-pins {
		samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s3_idle: aud-i2s3-idle-pins {
		samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s4_bus: aud-i2s4-pins {
		samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s4_idle: aud-i2s4-idle-pins {
		samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s5_bus: aud-i2s5-pins {
		samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s5_idle: aaud-i2s5-idle-pins {
		samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s6_bus: aud-i2s6-pins {
		samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};

	aud_i2s6_idle: aaud-i2s6-idle-pins {
		samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
	};
};

&pinctrl_fsys0 {
	gpf0: gpf0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf1: gpf1-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	pcie_clkreq0: pcie-clkreq0-pins {
		samsung,pins = "gpf0-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
		samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>;
	};

	pcie_perst0_out: pcie-perst0-out-pins {
		samsung,pins = "gpf0-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_perst0_in: pcie-perst0-in-pins {
		samsung,pins = "gpf0-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_clkreq1: pcie-clkreq1-pins {
		samsung,pins = "gpf0-2";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
		samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>;
	};

	pcie_perst1_out: pcie-perst1-out-pins {
		samsung,pins = "gpf0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_perst1_in: pcie-perst1-in-pins {
		samsung,pins = "gpf0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_clkreq2: pcie-clkreq2-pins {
		samsung,pins = "gpf0-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
		samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>;
	};

	pcie_perst2_out: pcie-perst2-out-pins {
		samsung,pins = "gpf0-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_perst2_in: pcie-perst2-in-pins {
		samsung,pins = "gpf0-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_clkreq3: pcie-clkreq3-pins {
		samsung,pins = "gpf1-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
		samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>;
	};

	pcie_perst3_out: pcie-perst3-out-pins {
		samsung,pins = "gpf1-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_perst3_in: pcie-perst3-in-pins {
		samsung,pins = "gpf1-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_clkreq4: pcie-clkreq4-pins {
		samsung,pins = "gpf1-2";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
		samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>;
	};

	pcie_perst4_out: pcie-perst4-out-pins {
		samsung,pins = "gpf1-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_perst4_in: pcie-perst4-in-pins {
		samsung,pins = "gpf1-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_clkreq5: pcie-clkreq5-pins {
		samsung,pins = "gpf1-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
		samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>;
	};

	pcie_perst5_out: pcie-perst5-out-pins {
		samsung,pins = "gpf1-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	pcie_perst5_in: pcie-perst5-in-pins {
		samsung,pins = "gpf1-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};
};

&pinctrl_fsys1 {
	gpf8: gpf8-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	sd2_clk: sd2-clk-pins {
		samsung,pins = "gpf8-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <2>;	/* 2x drive strength */
	};

	sd2_cmd: sd2-cmd-pins {
		samsung,pins = "gpf8-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <2>;	/* 2x drive strength */
	};

	sd2_bus1: sd2-bus-width1-pins {
		samsung,pins = "gpf8-2";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <2>;	/* 2x drive strength */
	};

	sd2_bus4: sd2-bus-width4-pins {
		samsung,pins = "gpf8-3", "gpf8-4", "gpf8-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <2>;	/* 2x drive strength */
	};
};

&pinctrl_fsys2 {
	gpf2: gpf2-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf3: gpf3-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf4: gpf4-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf5: gpf5-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpf6: gpf6-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	ufs_rst_n: ufs-rst-n-pins {
		samsung,pins = "gpf2-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	ufs_refclk_out: ufs-refclk-out-pins {
		samsung,pins = "gpf2-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	ufs_rst_n_1: ufs-rst-n-1-pins {
		samsung,pins = "gpf2-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	ufs_refclk_out_1: ufs-refclk-out-1-pins {
		samsung,pins = "gpf2-2";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
	};

	eth0_mdc_mdio: eth0-mdc-mdio-pins {
		samsung,pins = "gpf4-5", "gpf4-6";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
	};

	eth0_rgmii: eth0-rgmii-pins {
		samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4",
			       "gpf3-5", "gpf3-6", "gpf3-7", "gpf4-0",
			       "gpf4-1", "gpf4-2", "gpf4-3", "gpf4-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
	};

	eth0_pps_out: eth0-pps-out-pins {
		samsung,pins = "gpf3-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	eth1_mdc_mdio: eth1-mdc-mdio-pins {
		samsung,pins = "gpf6-5", "gpf6-6";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
	};

	eth1_rgmii: eth1-rgmii-pins {
		samsung,pins = "gpf5-1", "gpf5-2", "gpf5-3", "gpf5-4",
			       "gpf5-5", "gpf5-6", "gpf5-7", "gpf6-0",
			       "gpf6-1", "gpf6-2", "gpf6-3", "gpf6-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
	};

	eth1_pps_out: eth1-pps-out-pins {
		samsung,pins = "gpf5-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};
};

&pinctrl_peric0 {
	gpp0: gpp0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpp1: gpp1-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpp2: gpp2-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpg0: gpg0-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	pwm_tout0: pwm-tout0-pins {
		samsung,pins = "gpg0-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	pwm_tout1: pwm-tout1-pins {
		samsung,pins = "gpg0-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	pwm_tout2: pwm-tout2-pins {
		samsung,pins = "gpg0-2";
		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	pwm_tout3: pwm-tout3-pins {
		samsung,pins = "gpg0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI00  */
	hsi2c0_bus: hsi2c0-bus-pins {
		samsung,pins = "gpp0-0", "gpp0-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI00_I2C */
	hsi2c1_bus: hsi2c1-bus-pins {
		samsung,pins = "gpp0-2", "gpp0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI01 */
	hsi2c2_bus: hsi2c2-bus-pins {
		samsung,pins = "gpp0-4", "gpp0-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI01_I2C */
	hsi2c3_bus: hsi2c3-bus-pins {
		samsung,pins = "gpp0-6", "gpp0-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI02 */
	hsi2c4_bus: hsi2c4-bus-pins {
		samsung,pins = "gpp1-0", "gpp1-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI02_I2C */
	hsi2c5_bus: hsi2c5-bus-pins {
		samsung,pins = "gpp1-2", "gpp1-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI03 */
	hsi2c6_bus: hsi2c6-bus-pins {
		samsung,pins = "gpp1-4", "gpp1-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI03_I2C */
	hsi2c7_bus: hsi2c7-bus-pins {
		samsung,pins = "gpp1-6", "gpp1-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI04 */
	hsi2c8_bus: hsi2c8-bus-pins {
		samsung,pins = "gpp2-0", "gpp2-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI04_I2C */
	hsi2c9_bus: hsi2c9-bus-pins {
		samsung,pins = "gpp2-2", "gpp2-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI05 */
	hsi2c10_bus: hsi2c10-bus-pins {
		samsung,pins = "gpp2-4", "gpp2-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI05_I2C */
	hsi2c11_bus: hsi2c11-bus-pins {
		samsung,pins = "gpp2-6", "gpp2-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* SPI USI_PERIC0_USI00_SPI */
	spi0_bus: spi0-bus-pins {
		samsung,pins = "gpp0-2", "gpp0-1", "gpp0-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi0_cs: spi0-cs-pins {
		samsung,pins = "gpp0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi0_cs_func: spi0-cs-func-pins {
		samsung,pins = "gpp0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI01_SPI */
	spi1_bus: spi1-bus-pins {
		samsung,pins = "gpp0-6", "gpp0-5", "gpp0-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi1_cs: spi1-cs-pins {
		samsung,pins = "gpp0-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi1_cs_func: spi1-cs-func-pins {
		samsung,pins = "gpp0-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI02_SPI */
	spi2_bus: spi2-bus-pins {
		samsung,pins = "gpp1-2", "gpp1-1", "gpp1-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi2_cs: spi2-cs-pins {
		samsung,pins = "gpp1-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi2_cs_func: spi2-cs-func-pins {
		samsung,pins = "gpp1-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI03_SPI */
	spi3_bus: spi3-bus-pins {
		samsung,pins = "gpp1-6", "gpp1-5", "gpp1-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi3_cs: spi3-cs-pins {
		samsung,pins = "gpp1-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi3_cs_func: spi3-cs-func-pins {
		samsung,pins = "gpp1-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI04_SPI */
	spi4_bus: spi4-bus-pins {
		samsung,pins = "gpp2-2", "gpp2-1", "gpp2-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi4_cs: spi4-cs-pins {
		samsung,pins = "gpp2-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi4_cs_func: spi4-cs-func-pins {
		samsung,pins = "gpp2-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* PERIC0 USI05_SPI */
	spi5_bus: spi5-bus-pins {
		samsung,pins = "gpp2-6", "gpp2-5", "gpp2-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi5_cs: spi5-cs-pins {
		samsung,pins = "gpp2-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	spi5_cs_func: spi5-cs-func-pins {
		samsung,pins = "gpp2-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC0_USI00_UART */
	uart0_bus: uart0-bus-pins {
		samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart0_bus_dual: uart0-bus-dual-pins {
		samsung,pins = "gpp0-0", "gpp0-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC0_USI01_UART */
	uart1_bus: uart1-bus-pins {
		samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart1_bus_dual: uart1-bus-dual-pins {
		samsung,pins = "gpp0-4", "gpp0-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC0_USI02_UART */
	uart2_bus: uart2-bus-pins {
		samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart2_bus_dual: uart2-bus-dual-pins {
		samsung,pins = "gpp1-0", "gpp1-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC0_USI03_UART */
	uart3_bus: uart3-bus-pins {
		samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart3_bus_dual: uart3-bus-dual-pins {
		samsung,pins = "gpp1-4", "gpp1-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC0_USI04_UART */
	uart4_bus: uart4-bus-pins {
		samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart4_bus_dual: uart4-bus-dual-pins {
		samsung,pins = "gpp2-0", "gpp2-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC0_USI05_UART */
	uart5_bus: uart5-bus-pins {
		samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart5_bus_dual: uart5-bus-dual-pins {
		samsung,pins = "gpp2-4", "gpp2-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};
};

&pinctrl_peric1 {
	gpp3: gpp3-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpp4: gpp4-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpp5: gpp5-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpg1: gpg1-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpg2: gpg2-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpg3: gpg3-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;

		interrupt-controller;
		#interrupt-cells = <2>;
	};

	/* PERIC1 USI06 */
	hsi2c12_bus: hsi2c12-bus-pins {
		samsung,pins = "gpp3-0", "gpp3-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI06_I2C */
	hsi2c13_bus: hsi2c13-bus-pins {
		samsung,pins = "gpp3-2", "gpp3-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI07 */
	hsi2c14_bus: hsi2c14-bus-pins {
		samsung,pins = "gpp3-4", "gpp3-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI07_I2C */
	hsi2c15_bus: hsi2c15-bus-pins {
		samsung,pins = "gpp3-6", "gpp3-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI08 */
	hsi2c16_bus: hsi2c16-bus-pins {
		samsung,pins = "gpp4-0", "gpp4-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI08_I2C */
	hsi2c17_bus: hsi2c17-bus-pins {
		samsung,pins = "gpp4-2", "gpp4-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI09 */
	hsi2c18_bus: hsi2c18-bus-pins {
		samsung,pins = "gpp4-4", "gpp4-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI09_I2C */
	hsi2c19_bus: hsi2c19-bus-pins {
		samsung,pins = "gpp4-6", "gpp4-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI10 */
	hsi2c20_bus: hsi2c20-bus-pins {
		samsung,pins = "gpp5-0", "gpp5-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI10_I2C */
	hsi2c21_bus: hsi2c21-bus-pins {
		samsung,pins = "gpp5-2", "gpp5-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI11 */
	hsi2c22_bus: hsi2c22-bus-pins {
		samsung,pins = "gpp5-4", "gpp5-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI11_I2C */
	hsi2c23_bus: hsi2c23-bus-pins {
		samsung,pins = "gpp5-6", "gpp5-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI06_SPI */
	spi6_bus: spi6-bus-pins {
		samsung,pins = "gpp3-2", "gpp3-1", "gpp3-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi6_cs: spi6-cs-pins {
		samsung,pins = "gpp3-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi6_cs_func: spi6-cs-func-pins {
		samsung,pins = "gpp3-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI07_SPI */
	spi7_bus: spi7-bus-pins {
		samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi7_cs: spi7-cs-pins {
		samsung,pins = "gpp3-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi7_cs_func: spi7-cs-func-pins {
		samsung,pins = "gpp3-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI08_SPI */
	spi8_bus: spi8-bus-pins {
		samsung,pins = "gpp4-2", "gpp4-1", "gpp4-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi8_cs: spi8-cs-pins {
		samsung,pins = "gpp4-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi8_cs_func: spi8-cs-func-pins {
		samsung,pins = "gpp4-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI09_SPI */
	spi9_bus: spi9-bus-pins {
		samsung,pins = "gpp4-6", "gpp4-5", "gpp4-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi9_cs: spi9-cs-pins {
		samsung,pins = "gpp4-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi9_cs_func: spi9-cs-func-pins {
		samsung,pins = "gpp4-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI10_SPI */
	spi10_bus: spi10-pins {
		samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi10_cs: spi10-cs-pins {
		samsung,pins = "gpp5-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi10_cs_func: spi10-cs-func-pins {
		samsung,pins = "gpp5-3";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* PERIC1 USI11_SPI */
	spi11_bus: spi11-pins {
		samsung,pins = "gpp5-6", "gpp5-5", "gpp5-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi11_cs: spi11-cs-pins {
		samsung,pins = "gpp5-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	spi11_cs_func: spi11-cs-func-pins {
		samsung,pins = "gpp5-7";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
	};

	/* USI_PERIC1_USI06_UART */
	uart6_bus: uart6-bus-pins {
		samsung,pins = "gpp3-3", "gpp3-2", "gpp3-1", "gpp3-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart6_bus_dual: uart6-bus-dual-pins {
		samsung,pins = "gpp3-0", "gpp3-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC1_USI07_UART */
	uart7_bus: uart7-bus-pins {
		samsung,pins = "gpp3-7", "gpp3-6", "gpp3-5", "gpp3-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart7_bus_dual: uart7-bus-dual-pins {
		samsung,pins = "gpp3-4", "gpp3-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC1_USI08_UART */
	uart8_bus: uart8-bus-pins {
		samsung,pins = "gpp4-3", "gpp4-2", "gpp4-1", "gpp4-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart8_bus_dual: uart8-bus-dual-pins {
		samsung,pins = "gpp4-0", "gpp4-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC1_USI09_UART */
	uart9_bus: uart9-bus-pins {
		samsung,pins = "gpp4-7", "gpp4-6", "gpp4-5", "gpp4-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart9_bus_dual: uart9-bus-dual-pins {
		samsung,pins = "gpp4-4", "gpp4-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC1_USI10_UART */
	uart10_bus: uart10-bus-pins {
		samsung,pins = "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart10_bus_dual: uart10-bus-dual-pins {
		samsung,pins = "gpp5-0", "gpp5-1";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	/* USI_PERIC1_USI11_UART */
	uart11_bus: uart11-bus-pins {
		samsung,pins = "gpp5-7", "gpp5-6", "gpp5-5", "gpp5-4";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};

	uart11_bus_dual: uart11-bus-dual-pins {
		samsung,pins = "gpp5-4", "gpp5-5";
		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung ExynosAutov9 SADK board device tree source
 *
 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
 *
 */

/dts-v1/;
#include "exynosautov9.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Samsung ExynosAuto v9 SADK board";
	compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9";

	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		serial0 = &serial_0;
	};

	chosen {
		stdout-path = &serial_0;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x77000000>,
		      <0x8 0x80000000 0x1 0x7ba00000>,
		      <0xa 0x00000000 0x2 0x00000000>;
	};

	ufs_0_fixed_vcc_reg: regulator-0 {
		compatible = "regulator-fixed";
		regulator-name = "ufs-vcc";
		gpio = <&gpq0 1 GPIO_ACTIVE_HIGH>;
		regulator-boot-on;
		enable-active-high;
	};

	ufs_1_fixed_vcc_reg: regulator-1 {
		compatible = "regulator-fixed";
		regulator-name = "ufs-vcc";
		gpio = <&gpg2 2 GPIO_ACTIVE_HIGH>;
		regulator-boot-on;
		enable-active-high;
	};
};

&serial_0 {
	pinctrl-0 = <&uart0_bus_dual>;
	status = "okay";
};

&ufs_0_phy {
	status = "okay";
};

&ufs_1_phy {
	status = "okay";
};

&ufs_0 {
	status = "okay";
	vcc-supply = <&ufs_0_fixed_vcc_reg>;
	vcc-fixed-regulator;
};

&ufs_1 {
	status = "okay";
	vcc-supply = <&ufs_1_fixed_vcc_reg>;
	vcc-fixed-regulator;
};

&usi_0 {
	samsung,clkreq-on; /* needed for UART mode */
	status = "okay";
};

&xtcxo {
	clock-frequency = <26000000>;
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's ExynosAuto v9 SoC device tree source
 *
 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
 *
 */

#include <dt-bindings/clock/samsung,exynosautov9.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/samsung,boot-mode.h>
#include <dt-bindings/soc/samsung,exynos-usi.h>

/ {
	compatible = "samsung,exynosautov9";
	#address-cells = <2>;
	#size-cells = <1>;

	interrupt-parent = <&gic>;

	aliases {
		pinctrl0 = &pinctrl_alive;
		pinctrl1 = &pinctrl_aud;
		pinctrl2 = &pinctrl_fsys0;
		pinctrl3 = &pinctrl_fsys1;
		pinctrl4 = &pinctrl_fsys2;
		pinctrl5 = &pinctrl_peric0;
		pinctrl6 = &pinctrl_peric1;
	};

	arm-pmu {
		compatible = "arm,cortex-a76-pmu";
		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
				     <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu1>;
				};
				core2 {
					cpu = <&cpu2>;
				};
				core3 {
					cpu = <&cpu3>;
				};
			};

			cluster1 {
				core0 {
					cpu = <&cpu4>;
				};
				core1 {
					cpu = <&cpu5>;
				};
				core2 {
					cpu = <&cpu6>;
				};
				core3 {
					cpu = <&cpu7>;
				};
			};
		};

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x0>;
			enable-method = "psci";
		};

		cpu1: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x100>;
			enable-method = "psci";
		};

		cpu2: cpu@200 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x200>;
			enable-method = "psci";
		};

		cpu3: cpu@300 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x300>;
			enable-method = "psci";
		};

		cpu4: cpu@10000 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x10000>;
			enable-method = "psci";
		};

		cpu5: cpu@10100 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x10100>;
			enable-method = "psci";
		};

		cpu6: cpu@10200 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x10200>;
			enable-method = "psci";
		};

		cpu7: cpu@10300 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x10300>;
			enable-method = "psci";
		};
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
		cpu_suspend = <0xc4000001>;
		cpu_off = <0x84000002>;
		cpu_on = <0xc4000003>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
	};

	fixed-rate-clocks {
		xtcxo: clock {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-output-names = "oscclk";
		};
	};

	soc: soc@0 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x0 0x20000000>;

		chipid@10000000 {
			compatible = "samsung,exynos850-chipid";
			reg = <0x10000000 0x24>;
		};

		cmu_peris: clock-controller@10020000 {
			compatible = "samsung,exynosautov9-cmu-peris";
			reg = <0x10020000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_PERIS_BUS>;
			clock-names = "oscclk",
				      "dout_clkcmu_peris_bus";
		};

		cmu_peric0: clock-controller@10200000 {
			compatible = "samsung,exynosautov9-cmu-peric0";
			reg = <0x10200000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_PERIC0_BUS>,
				 <&cmu_top DOUT_CLKCMU_PERIC0_IP>;
			clock-names = "oscclk",
				      "dout_clkcmu_peric0_bus",
				      "dout_clkcmu_peric0_ip";
		};

		cmu_peric1: clock-controller@10800000 {
			compatible = "samsung,exynosautov9-cmu-peric1";
			reg = <0x10800000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_PERIC1_BUS>,
				 <&cmu_top DOUT_CLKCMU_PERIC1_IP>;
			clock-names = "oscclk",
				      "dout_clkcmu_peric1_bus",
				      "dout_clkcmu_peric1_ip";
		};

		cmu_fsys1: clock-controller@17040000 {
			compatible = "samsung,exynosautov9-cmu-fsys1";
			reg = <0x17040000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_FSYS1_BUS>,
				 <&cmu_top GOUT_CLKCMU_FSYS1_MMC_CARD>,
				 <&cmu_top DOUT_CLKCMU_FSYS1_USBDRD>;
			clock-names = "oscclk",
				      "dout_clkcmu_fsys1_bus",
				      "gout_clkcmu_fsys1_mmc_card",
				      "dout_clkcmu_fsys1_usbdrd";
		};

		cmu_fsys0: clock-controller@17700000 {
			compatible = "samsung,exynosautov9-cmu-fsys0";
			reg = <0x17700000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_FSYS0_BUS>,
				 <&cmu_top DOUT_CLKCMU_FSYS0_PCIE>;
			clock-names = "oscclk",
				      "dout_clkcmu_fsys0_bus",
				      "dout_clkcmu_fsys0_pcie";
		};

		cmu_fsys2: clock-controller@17c00000 {
			compatible = "samsung,exynosautov9-cmu-fsys2";
			reg = <0x17c00000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
				 <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
				 <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;
			clock-names = "oscclk",
				      "dout_clkcmu_fsys2_bus",
				      "dout_fsys2_clkcmu_ufs_embd",
				      "dout_fsys2_clkcmu_ethernet";
		};

		cmu_core: clock-controller@1b030000 {
			compatible = "samsung,exynosautov9-cmu-core";
			reg = <0x1b030000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_CORE_BUS>;
			clock-names = "oscclk",
				      "dout_clkcmu_core_bus";
		};

		cmu_busmc: clock-controller@1b200000 {
			compatible = "samsung,exynosautov9-cmu-busmc";
			reg = <0x1b200000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_BUSMC_BUS>;
			clock-names = "oscclk",
				      "dout_clkcmu_busmc_bus";
		};

		cmu_top: clock-controller@1b240000 {
			compatible = "samsung,exynosautov9-cmu-top";
			reg = <0x1b240000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>;
			clock-names = "oscclk";
		};

		gic: interrupt-controller@10101000 {
			compatible = "arm,gic-400";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x10101000 0x1000>,
			      <0x10102000 0x2000>,
			      <0x10104000 0x2000>,
			      <0x10106000 0x2000>;
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |
						 IRQ_TYPE_LEVEL_HIGH)>;
		};

		pdma0: dma-controller@1b2e0000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x1b2e0000 0x1000>;
			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_busmc CLK_GOUT_BUSMC_PDMA0_PCLK>;
			clock-names = "apb_pclk";
			arm,pl330-broken-no-flushp;
			#dma-cells = <1>;
		};

		pinctrl_alive: pinctrl@10450000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x10450000 0x1000>;

			wakeup-interrupt-controller {
				compatible = "samsung,exynosautov9-wakeup-eint";
			};
		};

		pinctrl_aud: pinctrl@19c60000{
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x19c60000 0x1000>;
		};

		pinctrl_fsys0: pinctrl@17740000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x17740000 0x1000>;
			interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
		};

		pinctrl_fsys1: pinctrl@17060000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x17060000 0x1000>;
			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
		};

		pinctrl_fsys2: pinctrl@17c30000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x17c30000 0x1000>;
			interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
		};

		pinctrl_peric0: pinctrl@10230000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x10230000 0x1000>;
			interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
		};

		pinctrl_peric1: pinctrl@10830000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x10830000 0x1000>;
			interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
		};

		pmu_system_controller: system-controller@10460000 {
			compatible = "samsung,exynos7-pmu", "syscon";
			reg = <0x10460000 0x10000>;

			reboot: syscon-reboot {
				compatible = "syscon-reboot";
				regmap = <&pmu_system_controller>;
				offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
				value = <0x2>;
				mask = <0x2>;
			};

			reboot-mode {
				compatible = "syscon-reboot-mode";
				offset = <0x810>; /* SYSIP_DAT0 */
				mode-bootloader = <EXYNOSAUTOV9_BOOT_BOOTLOADER>;
				mode-fastboot = <EXYNOSAUTOV9_BOOT_FASTBOOT>;
				mode-recovery = <EXYNOSAUTOV9_BOOT_RECOVERY>;
			};
		};

		syscon_fsys2: syscon@17c20000 {
			compatible = "samsung,exynosautov9-sysreg", "syscon";
			reg = <0x17c20000 0x1000>;
		};

		syscon_peric0: syscon@10220000 {
			compatible = "samsung,exynosautov9-sysreg", "syscon";
			reg = <0x10220000 0x2000>;
		};

		syscon_peric1: syscon@10820000 {
			compatible = "samsung,exynosautov9-sysreg", "syscon";
			reg = <0x10820000 0x2000>;
		};

		usi_0: usi@103000c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103000c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1000>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_0: serial@10300000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10300000 0xc0>;
				interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart0_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <256>;
				status = "disabled";
			};

			spi_0: spi@10300000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10300000 0x30>;
				interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi0_bus &spi0_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 1>, <&pdma0 0>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_0: i2c@10300000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10300000 0xc0>;
				interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c0_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_0: usi@103100c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103100c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1004>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_1: i2c@10310000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10310000 0xc0>;
				interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c1_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_1: usi@103200c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103200c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1008>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_1: serial@10320000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10320000 0xc0>;
				interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart1_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <256>;
				status = "disabled";
			};

			spi_1: spi@10320000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10320000 0x30>;
				interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi1_bus &spi1_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 3>, <&pdma0 2>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_2: i2c@10320000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10320000 0xc0>;
				interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c2_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_1: usi@103300c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103300c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x100c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_3: i2c@10330000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10330000 0xc0>;
				interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c3_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_2: usi@103400c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103400c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1010>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_2: serial@10340000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10340000 0xc0>;
				interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart2_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_2: spi@10340000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10340000 0x30>;
				interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi2_bus &spi2_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 5>, <&pdma0 4>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_4: i2c@10340000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10340000 0xc0>;
				interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c4_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_2: usi@103500c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103500c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1014>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_5: i2c@10350000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10350000 0xc0>;
				interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c5_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_3: usi@103600c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103600c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1018>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_3: serial@10360000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10360000 0xc0>;
				interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart3_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_3: spi@10360000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10360000 0x30>;
				interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi3_bus &spi3_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 7>, <&pdma0 6>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_6: i2c@10360000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10360000 0xc0>;
				interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c6_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_3: usi@103700c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103700c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x101c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_7: i2c@10370000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10370000 0xc0>;
				interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c7_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_4: usi@103800c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103800c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1020>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_4: serial@10380000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10380000 0xc0>;
				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart4_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_4: spi@10380000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10380000 0x30>;
				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi4_bus &spi4_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 9>, <&pdma0 8>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_8: i2c@10380000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10380000 0xc0>;
				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c8_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_4: usi@103900c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103900c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1024>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_9: i2c@10390000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10390000 0xc0>;
				interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c9_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_5: usi@103a00c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103a00c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1028>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_5: serial@103a0000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x103a0000 0xc0>;
				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart5_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_5: spi@103a0000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x103a0000 0x30>;
				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi5_bus &spi5_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 11>, <&pdma0 10>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_10: i2c@103a0000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x103a0000 0xc0>;
				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c10_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_5: usi@103b00c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103b00c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x102c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_11: i2c@103b0000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x103b0000 0xc0>;
				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c11_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_6: usi@109000c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109000c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1000>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_6: serial@10900000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10900000 0xc0>;
				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart6_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <256>;
				status = "disabled";
			};

			spi_6: spi@10900000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10900000 0x30>;
				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi6_bus &spi6_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI06_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 13>, <&pdma0 12>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_12: i2c@10900000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10900000 0xc0>;
				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c12_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_6: usi@109100c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109100c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1004>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_13: i2c@10910000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10910000 0xc0>;
				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c13_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_7: usi@109200c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109200c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1008>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_7: serial@10920000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10920000 0xc0>;
				interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart7_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_7: spi@10920000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10920000 0x30>;
				interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi7_bus &spi7_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI07_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 15>, <&pdma0 14>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_14: i2c@10920000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10920000 0xc0>;
				interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c14_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_7: usi@109300c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109300c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x100c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_15: i2c@10930000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10930000 0xc0>;
				interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c15_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_8: usi@109400c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109400c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1010>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_8: serial@10940000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10940000 0xc0>;
				interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart8_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_8: spi@10940000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10940000 0x30>;
				interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi8_bus &spi8_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI08_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 17>, <&pdma0 16>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_16: i2c@10940000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10940000 0xc0>;
				interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c16_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_8: usi@109500c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109500c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1014>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_17: i2c@10950000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10950000 0xc0>;
				interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c17_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_9: usi@109600c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109600c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1018>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_9: serial@10960000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10960000 0xc0>;
				interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart9_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_9: spi@10960000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10960000 0x30>;
				interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi9_bus &spi9_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 19>, <&pdma0 18>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_18: i2c@10960000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10960000 0xc0>;
				interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c18_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_9: usi@109700c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109700c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x101c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_19: i2c@10970000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10970000 0xc0>;
				interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c19_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_10: usi@109800c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109800c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1020>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_10: serial@10980000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10980000 0xc0>;
				interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart10_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_10: spi@10980000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10980000 0x30>;
				interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi10_bus &spi10_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 21>, <&pdma0 20>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_20: i2c@10980000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10980000 0xc0>;
				interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c20_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_10: usi@109900c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109900c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1024>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_21: i2c@10990000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10990000 0xc0>;
				interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c21_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_11: usi@109a00c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109a00c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1028>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_11: serial@109a0000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x109a0000 0xc0>;
				interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart11_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_11: spi@109a0000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x109a0000 0x30>;
				interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi11_bus &spi11_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			hsi2c_22: i2c@109a0000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x109a0000 0xc0>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c22_bus>;
				interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_11: usi@109b00c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109b00c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x102c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_23: i2c@109b0000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x109b0000 0xc0>;
				interrupts = <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c23_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		ufs_0_phy: phy@17e04000 {
			compatible = "samsung,exynosautov9-ufs-phy";
			reg = <0x17e04000 0xc00>;
			reg-names = "phy-pma";
			samsung,pmu-syscon = <&pmu_system_controller>;
			#phy-cells = <0>;
			clocks = <&xtcxo>;
			clock-names = "ref_clk";
			status = "disabled";
		};

		ufs_0: ufs@17e00000 {
			compatible = "samsung,exynosautov9-ufs";

			reg = <0x17e00000 0x100>,
			      <0x17e01100 0x410>,
			      <0x17e80000 0x8000>,
			      <0x17dc0000 0x2200>;
			reg-names = "hci", "vs_hci", "unipro", "ufsp";
			interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_ACLK>,
				 <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_UNIPRO>;
			clock-names = "core_clk", "sclk_unipro_main";
			freq-table-hz = <0 0>, <0 0>;
			pinctrl-names = "default";
			pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
			phys = <&ufs_0_phy>;
			phy-names = "ufs-phy";
			samsung,sysreg = <&syscon_fsys2 0x710>;
			status = "disabled";
		};

		ufs_1_phy: phy@17f04000 {
			compatible = "samsung,exynosautov9-ufs-phy";
			reg = <0x17f04000 0xc00>;
			reg-names = "phy-pma";
			samsung,pmu-syscon = <&pmu_system_controller 0x72c>;
			#phy-cells = <0>;
			clocks = <&xtcxo>;
			clock-names = "ref_clk";
			status = "disabled";
		};

		ufs_1: ufs@17f00000 {
			compatible = "samsung,exynosautov9-ufs";

			reg = <0x17f00000 0x100>,
			      <0x17f01100 0x410>,
			      <0x17f80000 0x8000>,
			      <0x17de0000 0x2200>;
			reg-names = "hci", "vs_hci", "unipro", "ufsp";
			interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_ACLK>,
				 <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_UNIPRO>;
			clock-names = "core_clk", "sclk_unipro_main";
			freq-table-hz = <0 0>, <0 0>;
			pinctrl-names = "default";
			pinctrl-0 = <&ufs_rst_n_1 &ufs_refclk_out_1>;
			phys = <&ufs_1_phy>;
			phy-names = "ufs-phy";
			samsung,sysreg = <&syscon_fsys2 0x714>;
			status = "disabled";
		};

		watchdog_cl0: watchdog@10050000 {
			compatible = "samsung,exynosautov9-wdt";
			reg = <0x10050000 0x100>;
			interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER0>, <&xtcxo>;
			clock-names = "watchdog", "watchdog_src";
			samsung,syscon-phandle = <&pmu_system_controller>;
			samsung,cluster-index = <0>;
		};

		watchdog_cl1: watchdog@10060000 {
			compatible = "samsung,exynosautov9-wdt";
			reg = <0x10060000 0x100>;
			interrupts = <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER1>, <&xtcxo>;
			clock-names = "watchdog", "watchdog_src";
			samsung,syscon-phandle = <&pmu_system_controller>;
			samsung,cluster-index = <1>;
		};
	};
};

#include "exynosautov9-pinctrl.dtsi"


code:
# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-oxalis.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-kbox-a-230-ls.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var1.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var2.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var3-ads2.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var4.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-ten64.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-bluebox3.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-bluebox3-rev-a.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb

fsl-ls1028a-qds-13bb-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-13bb.dtbo
fsl-ls1028a-qds-65bb-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-65bb.dtbo
fsl-ls1028a-qds-7777-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-7777.dtbo
fsl-ls1028a-qds-85bb-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-85bb.dtbo
fsl-ls1028a-qds-899b-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-899b.dtbo
fsl-ls1028a-qds-9999-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-9999.dtbo

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-13bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-65bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-7777.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-85bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-899b.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-9999.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8dxl-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-innocomm-wb15-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-bl.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-bl-osm-s.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phg.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7903.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7904.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr3l-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-kontron-pitx-imx8m.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-tqma8mq-mba8mx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-mnt-reform2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-nitrogen.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-phanbell.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-thor96.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb

imx8mm-venice-gw72xx-0x-imx219-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-imx219.dtbo
imx8mm-venice-gw72xx-0x-rs232-rts-dtbs	:= imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs232-rts.dtbo
imx8mm-venice-gw72xx-0x-rs422-dtbs	:= imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs422.dtbo
imx8mm-venice-gw72xx-0x-rs485-dtbs	:= imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs485.dtbo
imx8mm-venice-gw73xx-0x-imx219-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-imx219.dtbo
imx8mm-venice-gw73xx-0x-rs232-rts-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-rs232-rts.dtbo
imx8mm-venice-gw73xx-0x-rs422-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-rs422.dtbo
imx8mm-venice-gw73xx-0x-rs485-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-rs485.dtbo

dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x-imx219.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x-rs232-rts.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x-rs422.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x-rs485.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-imx219.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs232-rts.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs422.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs485.dtb

dtb-$(CONFIG_ARCH_S32) += s32g274a-evb.dtb
dtb-$(CONFIG_ARCH_S32) += s32g274a-rdb2.dtb
dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Freescale LS1012A Freedom Board.
 *
 * Copyright 2016 Freescale Semiconductor, Inc.
 *
 */
/dts-v1/;

#include <dt-bindings/interrupt-controller/irq.h>
#include "fsl-ls1012a.dtsi"

/ {
	model = "LS1012A Freedom Board";
	compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";

	sys_mclk: clock-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "1P8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,widgets =
			"Microphone", "Microphone Jack",
			"Headphone", "Headphone Jack",
			"Speaker", "Speaker Ext",
			"Line", "Line In Jack";
		simple-audio-card,routing =
			"MIC_IN", "Microphone Jack",
			"Microphone Jack", "Mic Bias",
			"LINE_IN", "Line In Jack",
			"Headphone Jack", "HP_OUT",
			"Speaker Ext", "LINE_OUT";

		simple-audio-card,cpu {
			sound-dai = <&sai2>;
			frame-master;
			bitclock-master;
		};

		simple-audio-card,codec {
			sound-dai = <&codec>;
			frame-master;
			bitclock-master;
			system-clock-frequency = <25000000>;
		};
	};
};

&dspi {
	bus-num = <0>;
	status = "okay";

	serial@0 {
		compatible = "nxp,sc16is740";
		reg = <0>;
		spi-max-frequency = <4000000>;
		clocks = <&sc16is7xx_clk>;
		interrupt-parent = <&gpio1>;
		interrupts = <13 IRQ_TYPE_EDGE_FALLING>;

		sc16is7xx_clk: clock-sc16is7xx {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <24000000>;
		};
	};
};

&duart0 {
	status = "okay";
};

&i2c0 {
	status = "okay";

	codec: sgtl5000@a {
		#sound-dai-cells = <0>;
		compatible = "fsl,sgtl5000";
		reg = <0xa>;
		VDDA-supply = <&reg_1p8v>;
		VDDIO-supply = <&reg_1p8v>;
		clocks = <&sys_mclk>;
	};
};

&qspi {
	status = "okay";

	s25fs512s0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		m25p,fast-read;
		reg = <0>;
		spi-rx-bus-width = <2>;
		spi-tx-bus-width = <2>;
	};
};

&sai2 {
	status = "okay";
};

&sata {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Freescale LS1012A FRWY Board.
 *
 * Copyright 2018 NXP
 *
 * Pramod Kumar <pramod.kumar_1@nxp.com>
 *
 */
/dts-v1/;

#include "fsl-ls1012a.dtsi"

/ {
	model = "LS1012A FRWY Board";
	compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
};

&duart0 {
	status = "okay";
};

&i2c0 {
	status = "okay";
};

&pcie1 {
	status = "okay";
};

&qspi {
	status = "okay";

	w25q16dw0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		m25p,fast-read;
		spi-max-frequency = <50000000>;
		reg = <0>;
		spi-rx-bus-width = <2>;
		spi-tx-bus-width = <2>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Oxalis
 *
 * Copyright (c) 2019 Manivannan Sadhasivam
 *
 */

/dts-v1/;

#include "fsl-ls1012a.dtsi"

/ {
	model = "Oxalis";
	compatible = "ebs-systart,oxalis", "fsl,ls1012a";

	sys_mclk: clock-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "1P8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,widgets =
			"Microphone", "Microphone Jack",
			"Headphone", "Headphone Jack",
			"Speaker", "Speaker Ext",
			"Line", "Line In Jack";
		simple-audio-card,routing =
			"MIC_IN", "Microphone Jack",
			"Microphone Jack", "Mic Bias",
			"LINE_IN", "Line In Jack",
			"Headphone Jack", "HP_OUT",
			"Speaker Ext", "LINE_OUT";

		simple-audio-card,cpu {
			sound-dai = <&sai2>;
			frame-master;
			bitclock-master;
		};

		simple-audio-card,codec {
			sound-dai = <&codec>;
			frame-master;
			bitclock-master;
			system-clock-frequency = <25000000>;
		};
	};
};

&duart0 {
	status = "okay";
};

&duart1 {
	status = "okay";
};

&esdhc1 {
	status = "okay";
};

&i2c0 {
	status = "okay";

	codec: audio-codec@a {
		#sound-dai-cells = <0>;
		compatible = "fsl,sgtl5000";
		reg = <0xa>;
		VDDA-supply = <&reg_1p8v>;
		VDDIO-supply = <&reg_1p8v>;
		clocks = <&sys_mclk>;
	};
};

&i2c1 {
	status = "okay";
};

&pcie1 {
	status = "okay";
};

&sai2 {
	status = "okay";
};

&sata {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Freescale LS1012A QDS Board.
 *
 * Copyright 2016 Freescale Semiconductor, Inc.
 *
 */
/dts-v1/;

#include "fsl-ls1012a.dtsi"

/ {
	model = "LS1012A QDS Board";
	compatible = "fsl,ls1012a-qds", "fsl,ls1012a";

	aliases {
		mmc0 = &esdhc0;
		mmc1 = &esdhc1;
	};

	sys_mclk: clock-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,widgets =
			"Microphone", "Microphone Jack",
			"Headphone", "Headphone Jack",
			"Speaker", "Speaker Ext",
			"Line", "Line In Jack";
		simple-audio-card,routing =
			"MIC_IN", "Microphone Jack",
			"Microphone Jack", "Mic Bias",
			"LINE_IN", "Line In Jack",
			"Headphone Jack", "HP_OUT",
			"Speaker Ext", "LINE_OUT";

		simple-audio-card,cpu {
			sound-dai = <&sai2>;
			frame-master;
			bitclock-master;
		};

		simple-audio-card,codec {
			sound-dai = <&codec>;
			frame-master;
			bitclock-master;
			system-clock-frequency = <24576000>;
		};
	};
};

&dspi {
	bus-num = <0>;
	status = "okay";

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "micron,n25q128a11", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;
	};

	flash@1 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "sst25wf040b", "jedec,spi-nor";
		spi-cpol;
		spi-cpha;
		reg = <1>;
		spi-max-frequency = <10000000>;
	};

	flash@2 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "en25s64", "jedec,spi-nor";
		spi-cpol;
		spi-cpha;
		reg = <2>;
		spi-max-frequency = <10000000>;
	};
};

&duart0 {
	status = "okay";
};

&esdhc0 {
	status = "okay";
};

&esdhc1 {
	status = "okay";
};

&i2c0 {
	status = "okay";

	pca9547@77 {
		compatible = "nxp,pca9547";
		reg = <0x77>;
		#address-cells = <1>;
		#size-cells = <0>;

		i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4>;

			codec: sgtl5000@a {
				#sound-dai-cells = <0>;
				compatible = "fsl,sgtl5000";
				reg = <0xa>;
				VDDA-supply = <&reg_3p3v>;
				VDDIO-supply = <&reg_3p3v>;
				clocks = <&sys_mclk>;
			};
		};
	};
};

&qspi {
	status = "okay";

	s25fs512s0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		m25p,fast-read;
		reg = <0>;
		spi-rx-bus-width = <2>;
		spi-tx-bus-width = <2>;
	};
};

&sai2 {
	status = "okay";
};

&sata {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Freescale LS1012A RDB Board.
 *
 * Copyright 2016 Freescale Semiconductor, Inc.
 *
 */
/dts-v1/;

#include <dt-bindings/interrupt-controller/irq.h>
#include "fsl-ls1012a.dtsi"

/ {
	model = "LS1012A RDB Board";
	compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";

	aliases {
		serial0 = &duart0;
		mmc0 = &esdhc0;
		mmc1 = &esdhc1;
	};
};

&duart0 {
	status = "okay";
};

&esdhc0 {
	sd-uhs-sdr104;
	sd-uhs-sdr50;
	sd-uhs-sdr25;
	sd-uhs-sdr12;
	status = "okay";
};

&esdhc1 {
	mmc-hs200-1_8v;
	status = "okay";
};

&i2c0 {
	status = "okay";

	accelerometer@1e {
		compatible = "nxp,fxos8700";
		reg = <0x1e>;
		interrupt-parent = <&gpio26>;
		interrupts = <13 IRQ_TYPE_EDGE_RISING>;
		interrupt-names = "INT1";
	};

	gyroscope@20 {
		compatible = "nxp,fxas21002c";
		reg = <0x20>;
	};

	gpio@24 {
		compatible = "nxp,pcal9555a";
		reg = <0x24>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	gpio@25 {
		compatible = "nxp,pcal9555a";
		reg = <0x25>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	gpio26: gpio@26 {
		compatible = "nxp,pcal9555a";
		reg = <0x26>;
		interrupt-parent = <&gpio0>;
		interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	current-sensor@40 {
		compatible = "ti,ina220";
		reg = <0x40>;
		shunt-resistor = <2000>;
	};
};

&qspi {
	status = "okay";

	s25fs512s0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		m25p,fast-read;
		reg = <0>;
		spi-rx-bus-width = <2>;
		spi-tx-bus-width = <2>;
	};
};

&sata {
	status = "okay";
};