code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2016 ARM Ltd.

#include <arm/sunxi-h3-h5.dtsi>

#include <dt-bindings/thermal/thermal.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			clock-latency-ns = <244144>; /* 8 32k periods */
			#cooling-cells = <2>;
		};

		cpu1: cpu@1 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <1>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			clock-latency-ns = <244144>; /* 8 32k periods */
			#cooling-cells = <2>;
		};

		cpu2: cpu@2 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <2>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			clock-latency-ns = <244144>; /* 8 32k periods */
			#cooling-cells = <2>;
		};

		cpu3: cpu@3 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <3>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			clock-latency-ns = <244144>; /* 8 32k periods */
			#cooling-cells = <2>;
		};
	};

	pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	timer {
		compatible = "arm,armv8-timer";
		arm,no-tick-in-suspend;
		interrupts = <GIC_PPI 13
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
	};

	soc {
		syscon: system-control@1c00000 {
			compatible = "allwinner,sun50i-h5-system-control";
			reg = <0x01c00000 0x1000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			sram_c1: sram@18000 {
				compatible = "mmio-sram";
				reg = <0x00018000 0x1c000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x00018000 0x1c000>;

				ve_sram: sram-section@0 {
					compatible = "allwinner,sun50i-h5-sram-c1",
						     "allwinner,sun4i-a10-sram-c1";
					reg = <0x000000 0x1c000>;
				};
			};
		};

		video-codec@1c0e000 {
			compatible = "allwinner,sun50i-h5-video-engine";
			reg = <0x01c0e000 0x1000>;
			clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
				 <&ccu CLK_DRAM_VE>;
			clock-names = "ahb", "mod", "ram";
			resets = <&ccu RST_BUS_VE>;
			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
			allwinner,sram = <&ve_sram 1>;
		};

		crypto: crypto@1c15000 {
			compatible = "allwinner,sun50i-h5-crypto";
			reg = <0x01c15000 0x1000>;
			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
			clock-names = "bus", "mod";
			resets = <&ccu RST_BUS_CE>;
		};

		deinterlace: deinterlace@1e00000 {
			compatible = "allwinner,sun8i-h3-deinterlace";
			reg = <0x01e00000 0x20000>;
			clocks = <&ccu CLK_BUS_DEINTERLACE>,
				 <&ccu CLK_DEINTERLACE>,
				 <&ccu CLK_DRAM_DEINTERLACE>;
			clock-names = "bus", "mod", "ram";
			resets = <&ccu RST_BUS_DEINTERLACE>;
			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
			interconnects = <&mbus 9>;
			interconnect-names = "dma-mem";
		};

		mali: gpu@1e80000 {
			compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
			reg = <0x01e80000 0x30000>;
			/*
			 * While the datasheet lists an interrupt for the
			 * PMU, the actual silicon does not have the PMU
			 * block. Reads all return zero, and writes are
			 * ignored.
			 */
			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "gp",
					  "gpmmu",
					  "pp",
					  "pp0",
					  "ppmmu0",
					  "pp1",
					  "ppmmu1",
					  "pp2",
					  "ppmmu2",
					  "pp3",
					  "ppmmu3";
			clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
			clock-names = "bus", "core";
			resets = <&ccu RST_BUS_GPU>;

			assigned-clocks = <&ccu CLK_GPU>;
			assigned-clock-rates = <384000000>;
		};

		ths: thermal-sensor@1c25000 {
			compatible = "allwinner,sun50i-h5-ths";
			reg = <0x01c25000 0x400>;
			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
			resets = <&ccu RST_BUS_THS>;
			clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
			clock-names = "bus", "mod";
			nvmem-cells = <&ths_calibration>;
			nvmem-cell-names = "calibration";
			#thermal-sensor-cells = <1>;
		};
	};

	thermal-zones {
		cpu_thermal: cpu-thermal {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&ths 0>;

			trips {
				cpu_hot_trip: cpu-hot {
					temperature = <80000>;
					hysteresis = <2000>;
					type = "passive";
				};

				cpu_very_hot_trip: cpu-very-hot {
					temperature = <100000>;
					hysteresis = <0>;
					type = "critical";
				};
			};

			cooling-maps {
				cpu-hot-limit {
					trip = <&cpu_hot_trip>;
					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		gpu-thermal {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&ths 1>;
		};
	};
};

&ccu {
	compatible = "allwinner,sun50i-h5-ccu";
};

&display_clocks {
	compatible = "allwinner,sun50i-h5-de2-clk";
};

&mbus {
	compatible = "allwinner,sun50i-h5-mbus";
};

&mmc0 {
	compatible = "allwinner,sun50i-h5-mmc",
		     "allwinner,sun50i-a64-mmc";
	clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
	clock-names = "ahb", "mmc";
};

&mmc1 {
	compatible = "allwinner,sun50i-h5-mmc",
		     "allwinner,sun50i-a64-mmc";
	clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
	clock-names = "ahb", "mmc";
};

&mmc2 {
	compatible = "allwinner,sun50i-h5-emmc",
		     "allwinner,sun50i-a64-emmc";
	clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
	clock-names = "ahb", "mmc";
};

&pio {
	interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
	compatible = "allwinner,sun50i-h5-pinctrl";
};

&rtc {
	compatible = "allwinner,sun50i-h5-rtc";
};

&sid {
	compatible = "allwinner,sun50i-h5-sid";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2019 Clément Péron <peron.clem@gmail.com>

/dts-v1/;

#include "sun50i-h6.dtsi"
#include "sun50i-h6-cpu-opp.dtsi"
#include "sun50i-h6-gpu-opp.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Beelink GS1";
	compatible = "azw,beelink-gs1", "allwinner,sun50i-h6";

	aliases {
		ethernet0 = &emac;
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	connector {
		compatible = "hdmi-connector";
		type = "a";
		ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */

		port {
			hdmi_con_in: endpoint {
				remote-endpoint = <&hdmi_out_con>;
			};
		};
	};

	ext_osc32k: ext_osc32k_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
		clock-output-names = "ext_osc32k";
	};

	leds {
		compatible = "gpio-leds";

		led {
			label = "beelink:white:power";
			gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
			default-state = "on";
		};
	};

	reg_vcc5v: vcc5v {
		/* board wide 5V supply directly from the DC jack */
		compatible = "regulator-fixed";
		regulator-name = "vcc-5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	sound-spdif {
		compatible = "simple-audio-card";
		simple-audio-card,name = "sun50i-h6-spdif";

		simple-audio-card,cpu {
			sound-dai = <&spdif>;
		};

		simple-audio-card,codec {
			sound-dai = <&spdif_out>;
		};
	};

	spdif_out: spdif-out {
		#sound-dai-cells = <0>;
		compatible = "linux,spdif-dit";
	};
};

&cpu0 {
	cpu-supply = <&reg_dcdca>;
};

&de {
	status = "okay";
};

&dwc3 {
	status = "okay";
};

&ehci0 {
	status = "okay";
};

&emac {
	pinctrl-names = "default";
	pinctrl-0 = <&ext_rgmii_pins>;
	phy-mode = "rgmii-id";
	phy-handle = <&ext_rgmii_phy>;
	phy-supply = <&reg_aldo2>;
	status = "okay";
};

&gpu {
	mali-supply = <&reg_dcdcc>;
	status = "okay";
};

&hdmi {
	status = "okay";
};

&hdmi_out {
	hdmi_out_con: endpoint {
		remote-endpoint = <&hdmi_con_in>;
	};
};

&mdio {
	ext_rgmii_phy: ethernet-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <1>;
	};
};

&mmc0 {
	vmmc-supply = <&reg_cldo1>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	status = "okay";
};

&mmc2 {
	vmmc-supply = <&reg_cldo1>;
	vqmmc-supply = <&reg_bldo2>;
	non-removable;
	cap-mmc-hw-reset;
	bus-width = <8>;
	status = "okay";
};

&ohci0 {
	status = "okay";
};

&pio {
	vcc-pd-supply = <&reg_cldo1>;
	vcc-pg-supply = <&reg_aldo1>;
};

&r_ir {
	linux,rc-map-name = "rc-beelink-gs1";
	status = "okay";
};

&r_pio {
	/*
	 * FIXME: We can't add that supply for now since it would
	 * create a circular dependency between pinctrl, the regulator
	 * and the RSB Bus.
	 *
	 * vcc-pl-supply = <&reg_aldo1>;
	 */
	vcc-pm-supply = <&reg_aldo1>;
};

&r_rsb {
	status = "okay";

	axp805: pmic@745 {
		compatible = "x-powers,axp805", "x-powers,axp806";
		reg = <0x745>;
		interrupt-parent = <&r_intc>;
		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		x-powers,self-working-mode;
		vina-supply = <&reg_vcc5v>;
		vinb-supply = <&reg_vcc5v>;
		vinc-supply = <&reg_vcc5v>;
		vind-supply = <&reg_vcc5v>;
		vine-supply = <&reg_vcc5v>;
		aldoin-supply = <&reg_vcc5v>;
		bldoin-supply = <&reg_vcc5v>;
		cldoin-supply = <&reg_vcc5v>;

		regulators {
			reg_aldo1: aldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-pl";
			};

			reg_aldo2: aldo2 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-ac200";
				regulator-enable-ramp-delay = <100000>;
			};

			reg_aldo3: aldo3 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc25-dram";
			};

			reg_bldo1: bldo1 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-bias-pll";
			};

			reg_bldo2: bldo2 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-efuse-pcie-hdmi-io";
			};

			reg_bldo3: bldo3 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-dcxoio";
			};

			bldo4 {
				/* unused */
			};

			reg_cldo1: cldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-3v3";
			};

			reg_cldo2: cldo2 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-wifi-1";
			};

			reg_cldo3: cldo3 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-wifi-2";
			};

			reg_dcdca: dcdca {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1160000>;
				regulator-ramp-delay = <2500>;
				regulator-name = "vdd-cpu";
			};

			reg_dcdcc: dcdcc {
				regulator-enable-ramp-delay = <32000>;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1080000>;
				regulator-ramp-delay = <2500>;
				regulator-name = "vdd-gpu";
			};

			reg_dcdcd: dcdcd {
				regulator-always-on;
				regulator-min-microvolt = <960000>;
				regulator-max-microvolt = <960000>;
				regulator-name = "vdd-sys";
			};

			reg_dcdce: dcdce {
				regulator-always-on;
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-name = "vcc-dram";
			};

			sw {
				/* unused */
			};
		};
	};
};

&spdif {
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ph_pins>;
	status = "okay";
};

&usb2otg {
	dr_mode = "host";
	status = "okay";
};

&usb2phy {
	usb0_vbus-supply = <&reg_vcc5v>;
	status = "okay";
};

&usb3phy {
	status = "okay";
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>

/dts-v1/;

#include "sun50i-h6.dtsi"
#include "sun50i-h6-cpu-opp.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "OrangePi 3";
	compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6";

	aliases {
		serial0 = &uart0;
		serial1 = &uart1;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	connector {
		compatible = "hdmi-connector";
		ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
		type = "a";

		port {
			hdmi_con_in: endpoint {
				remote-endpoint = <&hdmi_out_con>;
			};
		};
	};

	ext_osc32k: ext_osc32k_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
		clock-output-names = "ext_osc32k";
	};

	leds {
		compatible = "gpio-leds";

		led-0 {
			label = "orangepi:red:power";
			gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
			default-state = "on";
		};

		led-1 {
			label = "orangepi:green:status";
			gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
		};
	};

	reg_vcc5v: vcc5v {
		/* board wide 5V supply directly from the DC jack */
		compatible = "regulator-fixed";
		regulator-name = "vcc-5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	reg_vcc33_wifi: vcc33-wifi {
		/* Always on 3.3V regulator for WiFi and BT */
		compatible = "regulator-fixed";
		regulator-name = "vcc33-wifi";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		vin-supply = <&reg_vcc5v>;
	};

	reg_vcc_wifi_io: vcc-wifi-io {
		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
		compatible = "regulator-fixed";
		regulator-name = "vcc-wifi-io";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		vin-supply = <&reg_vcc33_wifi>;
	};

	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&rtc CLK_OSC32K_FANOUT>;
		clock-names = "ext_clock";
		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
		post-power-on-delay-ms = <200>;
	};
};

&cpu0 {
	cpu-supply = <&reg_dcdca>;
};

&de {
	status = "okay";
};

&dwc3 {
	status = "okay";
};

&ehci0 {
	status = "okay";
};

&ehci3 {
	status = "okay";
};

&gpu {
	mali-supply = <&reg_dcdcc>;
	status = "okay";
};

&hdmi {
	status = "okay";
};

&hdmi_out {
	hdmi_out_con: endpoint {
		remote-endpoint = <&hdmi_con_in>;
	};
};

&mmc0 {
	vmmc-supply = <&reg_cldo1>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
	bus-width = <4>;
	status = "okay";
};

&mmc1 {
	vmmc-supply = <&reg_vcc33_wifi>;
	vqmmc-supply = <&reg_vcc_wifi_io>;
	mmc-pwrseq = <&wifi_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";

	brcm: sdio-wifi@1 {
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
		interrupt-parent = <&r_pio>;
		interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
		interrupt-names = "host-wake";
	};
};

&mmc2 {
	vmmc-supply = <&reg_cldo1>;
	vqmmc-supply = <&reg_bldo2>;
	cap-mmc-hw-reset;
	non-removable;
	bus-width = <8>;
	status = "okay";
};

&ohci0 {
	status = "okay";
};

&ohci3 {
	status = "okay";
};

&pio {
	vcc-pc-supply = <&reg_bldo2>;
	vcc-pd-supply = <&reg_cldo1>;
	vcc-pg-supply = <&reg_vcc_wifi_io>;
};

&r_ir {
	status = "okay";
};

&r_rsb {
	status = "okay";

	axp805: pmic@745 {
		compatible = "x-powers,axp805", "x-powers,axp806";
		reg = <0x745>;
		interrupt-parent = <&r_intc>;
		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		x-powers,self-working-mode;
		vina-supply = <&reg_vcc5v>;
		vinb-supply = <&reg_vcc5v>;
		vinc-supply = <&reg_vcc5v>;
		vind-supply = <&reg_vcc5v>;
		vine-supply = <&reg_vcc5v>;
		aldoin-supply = <&reg_vcc5v>;
		bldoin-supply = <&reg_vcc5v>;
		cldoin-supply = <&reg_vcc5v>;

		regulators {
			reg_aldo1: aldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-pl-led-ir";
			};

			reg_aldo2: aldo2 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc33-audio-tv-ephy-mac";
			};

			/* ALDO3 is shorted to CLDO1 */
			reg_aldo3: aldo3 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
			};

			reg_bldo1: bldo1 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc18-dram-bias-pll";
			};

			reg_bldo2: bldo2 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-efuse-pcie-hdmi-pc";
			};

			bldo3 {
				/* unused */
			};

			bldo4 {
				/* unused */
			};

			reg_cldo1: cldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
			};

			cldo2 {
				/* unused */
			};

			cldo3 {
				/* unused */
			};

			reg_dcdca: dcdca {
				regulator-always-on;
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1160000>;
				regulator-ramp-delay = <2500>;
				regulator-name = "vdd-cpu";
			};

			reg_dcdcc: dcdcc {
				regulator-enable-ramp-delay = <32000>;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1080000>;
				regulator-ramp-delay = <2500>;
				regulator-name = "vdd-gpu";
			};

			reg_dcdcd: dcdcd {
				regulator-always-on;
				regulator-min-microvolt = <960000>;
				regulator-max-microvolt = <960000>;
				regulator-name = "vdd-sys";
			};

			reg_dcdce: dcdce {
				regulator-always-on;
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-name = "vcc-dram";
			};

			sw {
				/* unused */
			};
		};
	};
};

&rtc {
	clocks = <&ext_osc32k>;
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ph_pins>;
	status = "okay";
};

/* There's the BT part of the AP6256 connected to that UART */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
	uart-has-rtscts;
	status = "okay";

	bluetooth {
		compatible = "brcm,bcm4345c5";
		clocks = <&rtc CLK_OSC32K_FANOUT>;
		clock-names = "lpo";
		device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
		host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
		shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
		max-speed = <1500000>;
	};
};

&usb2otg {
	/*
	 * This board doesn't have a controllable VBUS even though it
	 * does have an ID pin. Using it as anything but a USB host is
	 * unsafe.
	 */
	dr_mode = "host";
	status = "okay";
};

&usb2phy {
	usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
	usb0_vbus-supply = <&reg_vcc5v>;
	usb3_vbus-supply = <&reg_vcc5v>;
	status = "okay";
};

&usb3phy {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Jagan Teki <jagan@openedev.com>

#include "sun50i-h6-orangepi.dtsi"

/ {
	model = "OrangePi Lite2";
	compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6";

	aliases {
		serial1 = &uart1; /* BT-UART */
	};

	wifi_pwrseq: wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&rtc CLK_OSC32K_FANOUT>;
		clock-names = "ext_clock";
		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
		post-power-on-delay-ms = <200>;
	};
};

&mmc1 {
	vmmc-supply = <&reg_cldo2>;
	vqmmc-supply = <&reg_bldo3>;
	mmc-pwrseq = <&wifi_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";

	brcm: sdio-wifi@1 {
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
		interrupt-parent = <&r_pio>;
		interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>;	/* PM0 */
		interrupt-names = "host-wake";
	};
};

&reg_cldo2 {
	/*
	 * This regulator is connected with CLDO3.
	 * Before the kernel can support synchronized
	 * enable of coupled regulators, keep them
	 * both always on as a ugly hack.
	 */
	regulator-always-on;
};

&reg_cldo3 {
	/*
	 * This regulator is connected with CLDO2.
	 * See the comments for CLDO2.
	 */
	regulator-always-on;
};

/* There's the BT part of the AP6255 connected to that UART */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
	uart-has-rtscts;
	status = "okay";

	bluetooth {
		compatible = "brcm,bcm4345c5";
		clocks = <&rtc CLK_OSC32K_FANOUT>;
		clock-names = "lpo";
		device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
		host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
		shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
		max-speed = <1500000>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Amarula Solutions
// Author: Jagan Teki <jagan@amarulasolutions.com>

#include "sun50i-h6-orangepi.dtsi"

/ {
	model = "OrangePi One Plus";
	compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";

	aliases {
		ethernet0 = &emac;
	};

	reg_gmac_3v3: gmac-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc-gmac-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <100000>;
		enable-active-high;
		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
		vin-supply = <&reg_aldo2>;
	};
};

&emac {
	pinctrl-names = "default";
	pinctrl-0 = <&ext_rgmii_pins>;
	phy-mode = "rgmii-id";
	phy-handle = <&ext_rgmii_phy>;
	phy-supply = <&reg_gmac_3v3>;
	allwinner,rx-delay-ps = <200>;
	allwinner,tx-delay-ps = <200>;
	status = "okay";
};

&mdio {
	ext_rgmii_phy: ethernet-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <1>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Amarula Solutions
// Author: Jagan Teki <jagan@amarulasolutions.com>

/dts-v1/;

#include "sun50i-h6.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "OrangePi One Plus";
	compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	connector {
		compatible = "hdmi-connector";
		type = "a";
		ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */

		port {
			hdmi_con_in: endpoint {
				remote-endpoint = <&hdmi_out_con>;
			};
		};
	};

	ext_osc32k: ext_osc32k_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
		clock-output-names = "ext_osc32k";
	};

	leds {
		compatible = "gpio-leds";

		led-0 {
			label = "orangepi:red:power";
			gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
			default-state = "on";
		};

		led-1 {
			label = "orangepi:green:status";
			gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
		};
	};

	reg_vcc5v: vcc5v {
		/* board wide 5V supply directly from the DC jack */
		compatible = "regulator-fixed";
		regulator-name = "vcc-5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};
};

&de {
	status = "okay";
};

&ehci0 {
	status = "okay";
};

&ehci3 {
	status = "okay";
};

&gpu {
	mali-supply = <&reg_dcdcc>;
	status = "okay";
};

&hdmi {
	status = "okay";
};

&hdmi_out {
	hdmi_out_con: endpoint {
		remote-endpoint = <&hdmi_con_in>;
	};
};

&mmc0 {
	vmmc-supply = <&reg_cldo1>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	status = "okay";
};

&ohci0 {
	status = "okay";
};

&ohci3 {
	status = "okay";
};

&pio {
	vcc-pc-supply = <&reg_bldo2>;
	vcc-pd-supply = <&reg_cldo1>;
	vcc-pg-supply = <&reg_aldo1>;
};

&r_ir {
	status = "okay";
};

&r_pio {
	vcc-pm-supply = <&reg_bldo3>;
};

&r_rsb {
	status = "okay";

	axp805: pmic@745 {
		compatible = "x-powers,axp805", "x-powers,axp806";
		reg = <0x745>;
		interrupt-parent = <&r_intc>;
		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		x-powers,self-working-mode;
		vina-supply = <&reg_vcc5v>;
		vinb-supply = <&reg_vcc5v>;
		vinc-supply = <&reg_vcc5v>;
		vind-supply = <&reg_vcc5v>;
		vine-supply = <&reg_vcc5v>;
		aldoin-supply = <&reg_vcc5v>;
		bldoin-supply = <&reg_vcc5v>;
		cldoin-supply = <&reg_vcc5v>;

		regulators {
			reg_aldo1: aldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-pl";
			};

			reg_aldo2: aldo2 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-ac200";
			};

			reg_aldo3: aldo3 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc25-dram";
			};

			reg_bldo1: bldo1 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-bias-pll";
			};

			reg_bldo2: bldo2 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-efuse-pcie-hdmi-io";
			};

			reg_bldo3: bldo3 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-dcxoio";
			};

			bldo4 {
				/* unused */
			};

			reg_cldo1: cldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-3v3";
			};

			reg_cldo2: cldo2 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-wifi-1";
			};

			reg_cldo3: cldo3 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-wifi-2";
			};

			reg_dcdca: dcdca {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1080000>;
				regulator-name = "vdd-cpu";
			};

			reg_dcdcc: dcdcc {
				regulator-enable-ramp-delay = <32000>;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1080000>;
				regulator-name = "vdd-gpu";
			};

			reg_dcdcd: dcdcd {
				regulator-always-on;
				regulator-min-microvolt = <960000>;
				regulator-max-microvolt = <960000>;
				regulator-name = "vdd-sys";
			};

			reg_dcdce: dcdce {
				regulator-always-on;
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-name = "vcc-dram";
			};

			sw {
				/* unused */
			};
		};
	};
};

&rtc {
	clocks = <&ext_osc32k>;
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ph_pins>;
	status = "okay";
};

&usb2otg {
	/*
	 * OrangePi Lite 2 and One Plus, where this DT is used, don't
	 * have a controllable VBUS even though they do have an ID pin.
	 * Using it as anything but a USB host is unsafe.
	 */
	dr_mode = "host";
	status = "okay";
};

&usb2phy {
	usb0_id_det-gpios = <&pio 2 6 GPIO_ACTIVE_HIGH>; /* PC6 */
	usb0_vbus-supply = <&reg_vcc5v>;
	usb3_vbus-supply = <&reg_vcc5v>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
/*
 * Copyright (C) 2019 Corentin LABBE <clabbe@baylibre.com>
 */

#include "sun50i-h6-pine-h64.dts"

/ {
	model = "Pine H64 model B";
	compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6";

	/delete-node/ reg_gmac_3v3;

	wifi_pwrseq: wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
		post-power-on-delay-ms = <200>;
	};
};

&hdmi_connector {
	/delete-property/ ddc-en-gpios;
};

&emac {
	phy-supply = <&reg_aldo2>;
};

&mmc1 {
	vmmc-supply = <&reg_cldo3>;
	vqmmc-supply = <&reg_aldo1>;
	mmc-pwrseq = <&wifi_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
	uart-has-rtscts;
	status = "okay";

	bluetooth {
		compatible = "realtek,rtl8723bs-bt";
		device-wake-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
		host-wake-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
		enable-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
		max-speed = <1500000>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.io>

/dts-v1/;

#include "sun50i-h6.dtsi"
#include "sun50i-h6-cpu-opp.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Pine H64 model A";
	compatible = "pine64,pine-h64", "allwinner,sun50i-h6";

	aliases {
		ethernet0 = &emac;
		serial0 = &uart0;
		spi0 = &spi0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	ext_osc32k: ext_osc32k_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
		clock-output-names = "ext_osc32k";
	};

	hdmi_connector: connector {
		compatible = "hdmi-connector";
		type = "a";
		ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */

		port {
			hdmi_con_in: endpoint {
				remote-endpoint = <&hdmi_out_con>;
			};
		};
	};

	leds {
		compatible = "gpio-leds";

		led-0 {
			label = "pine-h64:green:heartbeat";
			gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
		};

		led-1 {
			label = "pine-h64:white:link";
			gpios = <&r_pio 0 3 GPIO_ACTIVE_HIGH>; /* PL3 */
		};

		led-2 {
			label = "pine-h64:blue:status";
			gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
		};
	};

	reg_gmac_3v3: gmac-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc-gmac-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <100000>;
		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_vbus: vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		startup-delay-us = <100000>;
		gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&cpu0 {
	cpu-supply = <&reg_dcdca>;
};

&de {
	status = "okay";
};

&ehci0 {
	status = "okay";
};

&ehci3 {
	status = "okay";
};

&emac {
	pinctrl-names = "default";
	pinctrl-0 = <&ext_rgmii_pins>;
	phy-mode = "rgmii-id";
	phy-handle = <&ext_rgmii_phy>;
	phy-supply = <&reg_gmac_3v3>;
	allwinner,rx-delay-ps = <200>;
	allwinner,tx-delay-ps = <200>;
	status = "okay";
};

&gpu {
	mali-supply = <&reg_dcdcc>;
	status = "okay";
};

&hdmi {
	status = "okay";
};

&hdmi_out {
	hdmi_out_con: endpoint {
		remote-endpoint = <&hdmi_con_in>;
	};
};

&mdio {
	ext_rgmii_phy: ethernet-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <1>;
	};
};

&mmc0 {
	vmmc-supply = <&reg_cldo1>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	status = "okay";
};

&mmc2 {
	vmmc-supply = <&reg_cldo1>;
	vqmmc-supply = <&reg_bldo2>;
	non-removable;
	cap-mmc-hw-reset;
	mmc-hs200-1_8v;
	bus-width = <8>;
	status = "okay";
};

&ohci0 {
	status = "okay";
};

&ohci3 {
	status = "okay";
};

&pio {
	vcc-pc-supply = <&reg_bldo2>;
	vcc-pd-supply = <&reg_cldo1>;
	vcc-pg-supply = <&reg_aldo1>;
};

&r_i2c {
	status = "okay";

	axp805: pmic@36 {
		compatible = "x-powers,axp805", "x-powers,axp806";
		reg = <0x36>;
		interrupt-parent = <&r_intc>;
		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		x-powers,self-working-mode;

		regulators {
			reg_aldo1: aldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-pl";
			};

			reg_aldo2: aldo2 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-ac200";
				regulator-enable-ramp-delay = <100000>;
			};

			reg_aldo3: aldo3 {
				/* This regulator is connected with CLDO1 */
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-3v3-1";
			};

			reg_bldo1: bldo1 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-bias-pll";
			};

			reg_bldo2: bldo2 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-efuse-pcie-hdmi-io";
			};

			reg_bldo3: bldo3 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc-dcxoio";
			};

			bldo4 {
				/* unused */
			};

			reg_cldo1: cldo1 {
				/* This regulator is connected with ALDO3 */
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-3v3-2";
			};

			reg_cldo2: cldo2 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-wifi-1";
			};

			reg_cldo3: cldo3 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-wifi-2";
			};

			reg_dcdca: dcdca {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1160000>;
				regulator-ramp-delay = <2500>;
				regulator-name = "vdd-cpu";
			};

			reg_dcdcc: dcdcc {
				regulator-enable-ramp-delay = <32000>;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1080000>;
				regulator-ramp-delay = <2500>;
				regulator-name = "vdd-gpu";
			};

			reg_dcdcd: dcdcd {
				regulator-always-on;
				regulator-min-microvolt = <960000>;
				regulator-max-microvolt = <960000>;
				regulator-name = "vdd-sys";
			};

			reg_dcdce: dcdce {
				regulator-always-on;
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-name = "vcc-dram";
			};

			sw {
				/* unused */
			};
		};
	};

	pcf8563: rtc@51 {
		compatible = "nxp,pcf8563";
		reg = <0x51>;
		interrupt-parent = <&r_intc>;
		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
		#clock-cells = <0>;
	};
};

&r_ir {
	status = "okay";
};

&r_pio {
	vcc-pm-supply = <&reg_aldo1>;
};

&rtc {
	clocks = <&ext_osc32k>;
};

/*
 * The CS pin is shared with the MMC2 CMD pin, so we cannot have the SPI
 * flash and eMMC at the same time, as one of them would fail probing.
 * Disable SPI0 in here, to prefer the more useful eMMC. U-Boot can
 * fix this up in no eMMC is connected.
 */
&spi0 {
	pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>;
	pinctrl-names = "default";
	status = "disabled";

	flash@0 {
		compatible = "winbond,w25q128", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <4000000>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ph_pins>;
	status = "okay";
};

&usb2otg {
	dr_mode = "host";
	status = "okay";
};

&usb2phy {
	usb0_vbus-supply = <&reg_usb_vbus>;
	usb3_vbus-supply = <&reg_usb_vbus>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2021 Jernej Skrabec <jernej.skrabec@gmail.com>

/dts-v1/;

#include "sun50i-h6-tanix.dtsi"

/ {
	model = "Tanix TX6 mini";
	compatible = "oranth,tanix-tx6-mini", "allwinner,sun50i-h6";
};

&r_ir {
	linux,rc-map-name = "rc-tanix-tx3mini";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2019 Jernej Skrabec <jernej.skrabec@siol.net>

/dts-v1/;

#include "sun50i-h6-tanix.dtsi"

/ {
	model = "Tanix TX6";
	compatible = "oranth,tanix-tx6", "allwinner,sun50i-h6";
};

&r_ir {
	linux,rc-map-name = "rc-tanix-tx5max";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
	uart-has-rtscts;
	status = "okay";

	bluetooth {
		compatible = "realtek,rtl8822cs-bt";
		device-wake-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
		host-wake-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
		enable-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2019 Jernej Skrabec <jernej.skrabec@siol.net>

/dts-v1/;

#include "sun50i-h6.dtsi"
#include "sun50i-h6-cpu-opp.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	connector {
		compatible = "hdmi-connector";
		ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
		type = "a";

		port {
			hdmi_con_in: endpoint {
				remote-endpoint = <&hdmi_out_con>;
			};
		};
	};

	/* used for FD650 LED display driver */
	i2c {
		compatible = "i2c-gpio";
		sda-gpios = <&pio 7 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PH6 */
		scl-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PH5 */
		i2c-gpio,delay-us = <5>;
	};

	reg_vcc1v8: regulator-vcc1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vcc1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	reg_vcc3v3: regulator-vcc3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_vdd_cpu_gpu: regulator-vdd-cpu-gpu {
		compatible = "regulator-fixed";
		regulator-name = "vdd-cpu-gpu";
		regulator-min-microvolt = <1135000>;
		regulator-max-microvolt = <1135000>;
	};

	sound-spdif {
		compatible = "simple-audio-card";
		simple-audio-card,name = "sun50i-h6-spdif";

		simple-audio-card,cpu {
			sound-dai = <&spdif>;
		};

		simple-audio-card,codec {
			sound-dai = <&spdif_out>;
		};
	};

	spdif_out: spdif-out {
		#sound-dai-cells = <0>;
		compatible = "linux,spdif-dit";
	};

	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&rtc CLK_OSC32K_FANOUT>;
		clock-names = "ext_clock";
		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
	};
};

&cpu0 {
	cpu-supply = <&reg_vdd_cpu_gpu>;
};

&de {
	status = "okay";
};

&dwc3 {
	status = "okay";
};

&ehci0 {
	status = "okay";
};

&ehci3 {
	status = "okay";
};

&gpu {
	mali-supply = <&reg_vdd_cpu_gpu>;
	status = "okay";
};

&hdmi {
	status = "okay";
};

&hdmi_out {
	hdmi_out_con: endpoint {
		remote-endpoint = <&hdmi_con_in>;
	};
};

&mmc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	vmmc-supply = <&reg_vcc3v3>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	status = "okay";
};

&mmc1 {
	vmmc-supply = <&reg_vcc3v3>;
	vqmmc-supply = <&reg_vcc1v8>;
	mmc-pwrseq = <&wifi_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";
};

&mmc2 {
	vmmc-supply = <&reg_vcc3v3>;
	vqmmc-supply = <&reg_vcc1v8>;
	bus-width = <8>;
	non-removable;
	cap-mmc-hw-reset;
	mmc-hs200-1_8v;
	status = "okay";
};

&ohci0 {
	status = "okay";
};

&ohci3 {
	status = "okay";
};

&pio {
	vcc-pc-supply = <&reg_vcc1v8>;
	vcc-pd-supply = <&reg_vcc3v3>;
	vcc-pg-supply = <&reg_vcc1v8>;
};

&r_ir {
	status = "okay";
};

&spdif {
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ph_pins>;
	status = "okay";
};

&usb2otg {
	dr_mode = "host";
	status = "okay";
};

&usb2phy {
	status = "okay";
};

&usb3phy {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-tcon-top.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			clock-latency-ns = <244144>; /* 8 32k periods */
			#cooling-cells = <2>;
		};

		cpu1: cpu@1 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <1>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			clock-latency-ns = <244144>; /* 8 32k periods */
			#cooling-cells = <2>;
		};

		cpu2: cpu@2 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <2>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			clock-latency-ns = <244144>; /* 8 32k periods */
			#cooling-cells = <2>;
		};

		cpu3: cpu@3 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <3>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			clock-latency-ns = <244144>; /* 8 32k periods */
			#cooling-cells = <2>;
		};
	};

	de: display-engine {
		compatible = "allwinner,sun50i-h6-display-engine";
		allwinner,pipelines = <&mixer0>;
		status = "disabled";
	};

	osc24M: osc24M_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "osc24M";
	};

	pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	timer {
		compatible = "arm,armv8-timer";
		arm,no-tick-in-suspend;
		interrupts = <GIC_PPI 13
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 14
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 11
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 10
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		bus@1000000 {
			compatible = "allwinner,sun50i-h6-de3",
				     "allwinner,sun50i-a64-de2";
			reg = <0x1000000 0x400000>;
			allwinner,sram = <&de2_sram 1>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x1000000 0x400000>;

			display_clocks: clock@0 {
				compatible = "allwinner,sun50i-h6-de3-clk";
				reg = <0x0 0x10000>;
				clocks = <&ccu CLK_BUS_DE>,
					 <&ccu CLK_DE>;
				clock-names = "bus",
					      "mod";
				resets = <&ccu RST_BUS_DE>;
				#clock-cells = <1>;
				#reset-cells = <1>;
			};

			mixer0: mixer@100000 {
				compatible = "allwinner,sun50i-h6-de3-mixer-0";
				reg = <0x100000 0x100000>;
				clocks = <&display_clocks CLK_BUS_MIXER0>,
					 <&display_clocks CLK_MIXER0>;
				clock-names = "bus",
					      "mod";
				resets = <&display_clocks RST_MIXER0>;
				iommus = <&iommu 0>;

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					mixer0_out: port@1 {
						reg = <1>;

						mixer0_out_tcon_top_mixer0: endpoint {
							remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
						};
					};
				};
			};
		};

		video-codec-g2@1c00000 {
			compatible = "allwinner,sun50i-h6-vpu-g2";
			reg = <0x01c00000 0x1000>;
			interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>;
			clock-names = "bus", "mod";
			resets = <&ccu RST_BUS_VP9>;
			iommus = <&iommu 5>;
		};

		video-codec@1c0e000 {
			compatible = "allwinner,sun50i-h6-video-engine";
			reg = <0x01c0e000 0x2000>;
			clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
				 <&ccu CLK_MBUS_VE>;
			clock-names = "ahb", "mod", "ram";
			resets = <&ccu RST_BUS_VE>;
			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			allwinner,sram = <&ve_sram 1>;
			iommus = <&iommu 3>;
		};

		gpu: gpu@1800000 {
			compatible = "allwinner,sun50i-h6-mali",
				     "arm,mali-t720";
			reg = <0x01800000 0x4000>;
			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "job", "mmu", "gpu";
			clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
			clock-names = "core", "bus";
			resets = <&ccu RST_BUS_GPU>;
			#cooling-cells = <2>;
			status = "disabled";
		};

		crypto: crypto@1904000 {
			compatible = "allwinner,sun50i-h6-crypto";
			reg = <0x01904000 0x1000>;
			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_MBUS_CE>;
			clock-names = "bus", "mod", "ram";
			resets = <&ccu RST_BUS_CE>;
		};

		syscon: syscon@3000000 {
			compatible = "allwinner,sun50i-h6-system-control",
				     "allwinner,sun50i-a64-system-control";
			reg = <0x03000000 0x1000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			sram_c: sram@28000 {
				compatible = "mmio-sram";
				reg = <0x00028000 0x1e000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x00028000 0x1e000>;

				de2_sram: sram-section@0 {
					compatible = "allwinner,sun50i-h6-sram-c",
						     "allwinner,sun50i-a64-sram-c";
					reg = <0x0000 0x1e000>;
				};
			};

			sram_c1: sram@1a00000 {
				compatible = "mmio-sram";
				reg = <0x01a00000 0x200000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x01a00000 0x200000>;

				ve_sram: sram-section@0 {
					compatible = "allwinner,sun50i-h6-sram-c1",
						     "allwinner,sun4i-a10-sram-c1";
					reg = <0x000000 0x200000>;
				};
			};
		};

		ccu: clock@3001000 {
			compatible = "allwinner,sun50i-h6-ccu";
			reg = <0x03001000 0x1000>;
			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>;
			clock-names = "hosc", "losc", "iosc";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		dma: dma-controller@3002000 {
			compatible = "allwinner,sun50i-h6-dma";
			reg = <0x03002000 0x1000>;
			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>;
			clock-names = "bus", "mbus";
			dma-channels = <16>;
			dma-requests = <46>;
			resets = <&ccu RST_BUS_DMA>;
			#dma-cells = <1>;
		};

		msgbox: mailbox@3003000 {
			compatible = "allwinner,sun50i-h6-msgbox",
				     "allwinner,sun6i-a31-msgbox";
			reg = <0x03003000 0x1000>;
			clocks = <&ccu CLK_BUS_MSGBOX>;
			resets = <&ccu RST_BUS_MSGBOX>;
			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
			#mbox-cells = <1>;
		};

		sid: efuse@3006000 {
			compatible = "allwinner,sun50i-h6-sid";
			reg = <0x03006000 0x400>;
			#address-cells = <1>;
			#size-cells = <1>;

			ths_calibration: thermal-sensor-calibration@14 {
				reg = <0x14 0x8>;
			};

			cpu_speed_grade: cpu-speed-grade@1c {
				reg = <0x1c 0x4>;
			};
		};

		timer@3009000 {
			compatible = "allwinner,sun50i-h6-timer",
				     "allwinner,sun8i-a23-timer";
			reg = <0x03009000 0xa0>;
			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc24M>;
		};

		watchdog: watchdog@30090a0 {
			compatible = "allwinner,sun50i-h6-wdt",
				     "allwinner,sun6i-a31-wdt";
			reg = <0x030090a0 0x20>;
			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc24M>;
			/* Broken on some H6 boards */
			status = "disabled";
		};

		pwm: pwm@300a000 {
			compatible = "allwinner,sun50i-h6-pwm";
			reg = <0x0300a000 0x400>;
			clocks = <&osc24M>, <&ccu CLK_BUS_PWM>;
			clock-names = "mod", "bus";
			resets = <&ccu RST_BUS_PWM>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		pio: pinctrl@300b000 {
			compatible = "allwinner,sun50i-h6-pinctrl";
			reg = <0x0300b000 0x400>;
			interrupt-parent = <&r_intc>;
			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <3>;
			interrupt-controller;
			#interrupt-cells = <3>;

			ext_rgmii_pins: rgmii-pins {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4",
				       "PD5", "PD7", "PD8", "PD9", "PD10",
				       "PD11", "PD12", "PD13", "PD19", "PD20";
				function = "emac";
				drive-strength = <40>;
			};

			hdmi_pins: hdmi-pins {
				pins = "PH8", "PH9", "PH10";
				function = "hdmi";
			};

			i2c0_pins: i2c0-pins {
				pins = "PD25", "PD26";
				function = "i2c0";
			};

			i2c1_pins: i2c1-pins {
				pins = "PH5", "PH6";
				function = "i2c1";
			};

			i2c2_pins: i2c2-pins {
				pins = "PD23", "PD24";
				function = "i2c2";
			};

			mmc0_pins: mmc0-pins {
				pins = "PF0", "PF1", "PF2", "PF3",
				       "PF4", "PF5";
				function = "mmc0";
				drive-strength = <30>;
				bias-pull-up;
			};

			/omit-if-no-ref/
			mmc1_pins: mmc1-pins {
				pins = "PG0", "PG1", "PG2", "PG3",
				       "PG4", "PG5";
				function = "mmc1";
				drive-strength = <30>;
				bias-pull-up;
			};

			mmc2_pins: mmc2-pins {
				pins = "PC1", "PC4", "PC5", "PC6",
				       "PC7", "PC8", "PC9", "PC10",
				       "PC11", "PC12", "PC13", "PC14";
				function = "mmc2";
				drive-strength = <30>;
				bias-pull-up;
			};

			/omit-if-no-ref/
			spi0_pins: spi0-pins {
				pins = "PC0", "PC2", "PC3";
				function = "spi0";
			};

			/* pin shared with MMC2-CMD (eMMC) */
			/omit-if-no-ref/
			spi0_cs_pin: spi0-cs-pin {
				pins = "PC5";
				function = "spi0";
			};

			/omit-if-no-ref/
			spi1_pins: spi1-pins {
				pins = "PH4", "PH5", "PH6";
				function = "spi1";
			};

			/omit-if-no-ref/
			spi1_cs_pin: spi1-cs-pin {
				pins = "PH3";
				function = "spi1";
			};

			spdif_tx_pin: spdif-tx-pin {
				pins = "PH7";
				function = "spdif";
			};

			uart0_ph_pins: uart0-ph-pins {
				pins = "PH0", "PH1";
				function = "uart0";
			};

			uart1_pins: uart1-pins {
				pins = "PG6", "PG7";
				function = "uart1";
			};

			uart1_rts_cts_pins: uart1-rts-cts-pins {
				pins = "PG8", "PG9";
				function = "uart1";
			};
		};

		gic: interrupt-controller@3021000 {
			compatible = "arm,gic-400";
			reg = <0x03021000 0x1000>,
			      <0x03022000 0x2000>,
			      <0x03024000 0x2000>,
			      <0x03026000 0x2000>;
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
			interrupt-controller;
			#interrupt-cells = <3>;
		};

		iommu: iommu@30f0000 {
			compatible = "allwinner,sun50i-h6-iommu";
			reg = <0x030f0000 0x10000>;
			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_IOMMU>;
			resets = <&ccu RST_BUS_IOMMU>;
			#iommu-cells = <1>;
		};

		mmc0: mmc@4020000 {
			compatible = "allwinner,sun50i-h6-mmc",
				     "allwinner,sun50i-a64-mmc";
			reg = <0x04020000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
			clock-names = "ahb", "mmc";
			resets = <&ccu RST_BUS_MMC0>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&mmc0_pins>;
			max-frequency = <150000000>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		mmc1: mmc@4021000 {
			compatible = "allwinner,sun50i-h6-mmc",
				     "allwinner,sun50i-a64-mmc";
			reg = <0x04021000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
			clock-names = "ahb", "mmc";
			resets = <&ccu RST_BUS_MMC1>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&mmc1_pins>;
			max-frequency = <150000000>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		mmc2: mmc@4022000 {
			compatible = "allwinner,sun50i-h6-emmc",
				     "allwinner,sun50i-a64-emmc";
			reg = <0x04022000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
			clock-names = "ahb", "mmc";
			resets = <&ccu RST_BUS_MMC2>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&mmc2_pins>;
			max-frequency = <150000000>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		uart0: serial@5000000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05000000 0x400>;
			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART0>;
			resets = <&ccu RST_BUS_UART0>;
			status = "disabled";
		};

		uart1: serial@5000400 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05000400 0x400>;
			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART1>;
			resets = <&ccu RST_BUS_UART1>;
			status = "disabled";
		};

		uart2: serial@5000800 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05000800 0x400>;
			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART2>;
			resets = <&ccu RST_BUS_UART2>;
			status = "disabled";
		};

		uart3: serial@5000c00 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05000c00 0x400>;
			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART3>;
			resets = <&ccu RST_BUS_UART3>;
			status = "disabled";
		};

		i2c0: i2c@5002000 {
			compatible = "allwinner,sun50i-h6-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x05002000 0x400>;
			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C0>;
			resets = <&ccu RST_BUS_I2C0>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2c0_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c1: i2c@5002400 {
			compatible = "allwinner,sun50i-h6-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x05002400 0x400>;
			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C1>;
			resets = <&ccu RST_BUS_I2C1>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2c1_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c2: i2c@5002800 {
			compatible = "allwinner,sun50i-h6-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x05002800 0x400>;
			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C2>;
			resets = <&ccu RST_BUS_I2C2>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2c2_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi0: spi@5010000 {
			compatible = "allwinner,sun50i-h6-spi",
				     "allwinner,sun8i-h3-spi";
			reg = <0x05010000 0x1000>;
			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
			clock-names = "ahb", "mod";
			dmas = <&dma 22>, <&dma 22>;
			dma-names = "rx", "tx";
			resets = <&ccu RST_BUS_SPI0>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi1: spi@5011000 {
			compatible = "allwinner,sun50i-h6-spi",
				     "allwinner,sun8i-h3-spi";
			reg = <0x05011000 0x1000>;
			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
			clock-names = "ahb", "mod";
			dmas = <&dma 23>, <&dma 23>;
			dma-names = "rx", "tx";
			resets = <&ccu RST_BUS_SPI1>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		emac: ethernet@5020000 {
			compatible = "allwinner,sun50i-h6-emac",
				     "allwinner,sun50i-a64-emac";
			syscon = <&syscon>;
			reg = <0x05020000 0x10000>;
			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq";
			resets = <&ccu RST_BUS_EMAC>;
			reset-names = "stmmaceth";
			clocks = <&ccu CLK_BUS_EMAC>;
			clock-names = "stmmaceth";
			status = "disabled";

			mdio: mdio {
				compatible = "snps,dwmac-mdio";
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		i2s1: i2s@5091000 {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun50i-h6-i2s";
			reg = <0x05091000 0x1000>;
			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
			clock-names = "apb", "mod";
			dmas = <&dma 4>, <&dma 4>;
			resets = <&ccu RST_BUS_I2S1>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		spdif: spdif@5093000 {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun50i-h6-spdif";
			reg = <0x05093000 0x400>;
			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
			clock-names = "apb", "spdif";
			resets = <&ccu RST_BUS_SPDIF>;
			dmas = <&dma 2>;
			dma-names = "tx";
			pinctrl-names = "default";
			pinctrl-0 = <&spdif_tx_pin>;
			status = "disabled";
		};

		usb2otg: usb@5100000 {
			compatible = "allwinner,sun50i-h6-musb",
				     "allwinner,sun8i-a33-musb";
			reg = <0x05100000 0x0400>;
			clocks = <&ccu CLK_BUS_OTG>;
			resets = <&ccu RST_BUS_OTG>;
			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "mc";
			phys = <&usb2phy 0>;
			phy-names = "usb";
			extcon = <&usb2phy 0>;
			status = "disabled";
		};

		usb2phy: phy@5100400 {
			compatible = "allwinner,sun50i-h6-usb-phy";
			reg = <0x05100400 0x24>,
			      <0x05101800 0x4>,
			      <0x05311800 0x4>;
			reg-names = "phy_ctrl",
				    "pmu0",
				    "pmu3";
			clocks = <&ccu CLK_USB_PHY0>,
				 <&ccu CLK_USB_PHY3>;
			clock-names = "usb0_phy",
				      "usb3_phy";
			resets = <&ccu RST_USB_PHY0>,
				 <&ccu RST_USB_PHY3>;
			reset-names = "usb0_reset",
				      "usb3_reset";
			status = "disabled";
			#phy-cells = <1>;
		};

		ehci0: usb@5101000 {
			compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
			reg = <0x05101000 0x100>;
			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI0>,
				 <&ccu CLK_BUS_EHCI0>,
				 <&ccu CLK_USB_OHCI0>;
			resets = <&ccu RST_BUS_OHCI0>,
				 <&ccu RST_BUS_EHCI0>;
			phys = <&usb2phy 0>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci0: usb@5101400 {
			compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
			reg = <0x05101400 0x100>;
			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI0>,
				 <&ccu CLK_USB_OHCI0>;
			resets = <&ccu RST_BUS_OHCI0>;
			phys = <&usb2phy 0>;
			phy-names = "usb";
			status = "disabled";
		};

		dwc3: usb@5200000 {
			compatible = "snps,dwc3";
			reg = <0x05200000 0x10000>;
			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_XHCI>,
				 <&ccu CLK_BUS_XHCI>,
				 <&rtc CLK_OSC32K>;
			clock-names = "ref", "bus_early", "suspend";
			resets = <&ccu RST_BUS_XHCI>;
			/*
			 * The datasheet of the chip doesn't declare the
			 * peripheral function, and there's no boards known
			 * to have a USB Type-B port routed to the port.
			 * In addition, no one has tested the peripheral
			 * function yet.
			 * So set the dr_mode to "host" in the DTSI file.
			 */
			dr_mode = "host";
			phys = <&usb3phy>;
			phy-names = "usb3-phy";
			status = "disabled";
		};

		usb3phy: phy@5210000 {
			compatible = "allwinner,sun50i-h6-usb3-phy";
			reg = <0x5210000 0x10000>;
			clocks = <&ccu CLK_USB_PHY1>;
			resets = <&ccu RST_USB_PHY1>;
			#phy-cells = <0>;
			status = "disabled";
		};

		ehci3: usb@5311000 {
			compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
			reg = <0x05311000 0x100>;
			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI3>,
				 <&ccu CLK_BUS_EHCI3>,
				 <&ccu CLK_USB_OHCI3>;
			resets = <&ccu RST_BUS_OHCI3>,
				 <&ccu RST_BUS_EHCI3>;
			phys = <&usb2phy 3>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci3: usb@5311400 {
			compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
			reg = <0x05311400 0x100>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI3>,
				 <&ccu CLK_USB_OHCI3>;
			resets = <&ccu RST_BUS_OHCI3>;
			phys = <&usb2phy 3>;
			phy-names = "usb";
			status = "disabled";
		};

		hdmi: hdmi@6000000 {
			compatible = "allwinner,sun50i-h6-dw-hdmi";
			reg = <0x06000000 0x10000>;
			reg-io-width = <1>;
			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
				 <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
				 <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
			clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
				      "hdcp-bus";
			resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>;
			reset-names = "ctrl", "hdcp";
			phys = <&hdmi_phy>;
			phy-names = "phy";
			pinctrl-names = "default";
			pinctrl-0 = <&hdmi_pins>;
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				hdmi_in: port@0 {
					reg = <0>;

					hdmi_in_tcon_top: endpoint {
						remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
					};
				};

				hdmi_out: port@1 {
					reg = <1>;
				};
			};
		};

		hdmi_phy: hdmi-phy@6010000 {
			compatible = "allwinner,sun50i-h6-hdmi-phy";
			reg = <0x06010000 0x10000>;
			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
			clock-names = "bus", "mod";
			resets = <&ccu RST_BUS_HDMI>;
			reset-names = "phy";
			#phy-cells = <0>;
		};

		tcon_top: tcon-top@6510000 {
			compatible = "allwinner,sun50i-h6-tcon-top";
			reg = <0x06510000 0x1000>;
			clocks = <&ccu CLK_BUS_TCON_TOP>,
				 <&ccu CLK_TCON_TV0>;
			clock-names = "bus",
				      "tcon-tv0";
			clock-output-names = "tcon-top-tv0";
			resets = <&ccu RST_BUS_TCON_TOP>;
			#clock-cells = <1>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				tcon_top_mixer0_in: port@0 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					tcon_top_mixer0_in_mixer0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
					};
				};

				tcon_top_mixer0_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					tcon_top_mixer0_out_tcon_tv: endpoint@2 {
						reg = <2>;
						remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
					};
				};

				tcon_top_hdmi_in: port@4 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <4>;

					tcon_top_hdmi_in_tcon_tv: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&tcon_tv_out_tcon_top>;
					};
				};

				tcon_top_hdmi_out: port@5 {
					reg = <5>;

					tcon_top_hdmi_out_hdmi: endpoint {
						remote-endpoint = <&hdmi_in_tcon_top>;
					};
				};
			};
		};

		tcon_tv: lcd-controller@6515000 {
			compatible = "allwinner,sun50i-h6-tcon-tv",
				     "allwinner,sun8i-r40-tcon-tv";
			reg = <0x06515000 0x1000>;
			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_TCON_TV0>,
				 <&tcon_top CLK_TCON_TOP_TV0>;
			clock-names = "ahb",
				      "tcon-ch1";
			resets = <&ccu RST_BUS_TCON_TV0>;
			reset-names = "lcd";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				tcon_tv_in: port@0 {
					reg = <0>;

					tcon_tv_in_tcon_top_mixer0: endpoint {
						remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
					};
				};

				tcon_tv_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					tcon_tv_out_tcon_top: endpoint@1 {
						reg = <1>;
						remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
					};
				};
			};
		};

		rtc: rtc@7000000 {
			compatible = "allwinner,sun50i-h6-rtc";
			reg = <0x07000000 0x400>;
			interrupt-parent = <&r_intc>;
			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
			clock-output-names = "osc32k", "osc32k-out", "iosc";
			#clock-cells = <1>;
		};

		r_ccu: clock@7010000 {
			compatible = "allwinner,sun50i-h6-r-ccu";
			reg = <0x07010000 0x400>;
			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
				 <&ccu CLK_PLL_PERIPH0>;
			clock-names = "hosc", "losc", "iosc", "pll-periph";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		r_watchdog: watchdog@7020400 {
			compatible = "allwinner,sun50i-h6-wdt",
				     "allwinner,sun6i-a31-wdt";
			reg = <0x07020400 0x20>;
			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc24M>;
		};

		r_intc: interrupt-controller@7021000 {
			compatible = "allwinner,sun50i-h6-r-intc";
			interrupt-controller;
			#interrupt-cells = <3>;
			reg = <0x07021000 0x400>;
			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
		};

		r_pio: pinctrl@7022000 {
			compatible = "allwinner,sun50i-h6-r-pinctrl";
			reg = <0x07022000 0x400>;
			interrupt-parent = <&r_intc>;
			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
				 <&rtc CLK_OSC32K>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <3>;
			interrupt-controller;
			#interrupt-cells = <3>;

			r_i2c_pins: r-i2c-pins {
				pins = "PL0", "PL1";
				function = "s_i2c";
			};

			r_ir_rx_pin: r-ir-rx-pin {
				pins = "PL9";
				function = "s_cir_rx";
			};

			r_rsb_pins: r-rsb-pins {
				pins = "PL0", "PL1";
				function = "s_rsb";
			};
		};

		r_ir: ir@7040000 {
				compatible = "allwinner,sun50i-h6-ir",
					     "allwinner,sun6i-a31-ir";
				reg = <0x07040000 0x400>;
				interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&r_ccu CLK_R_APB1_IR>,
					 <&r_ccu CLK_IR>;
				clock-names = "apb", "ir";
				resets = <&r_ccu RST_R_APB1_IR>;
				pinctrl-names = "default";
				pinctrl-0 = <&r_ir_rx_pin>;
				status = "disabled";
		};

		r_i2c: i2c@7081400 {
			compatible = "allwinner,sun50i-h6-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x07081400 0x400>;
			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_R_APB2_I2C>;
			resets = <&r_ccu RST_R_APB2_I2C>;
			pinctrl-names = "default";
			pinctrl-0 = <&r_i2c_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		r_rsb: rsb@7083000 {
			compatible = "allwinner,sun8i-a23-rsb";
			reg = <0x07083000 0x400>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_R_APB2_RSB>;
			clock-frequency = <3000000>;
			resets = <&r_ccu RST_R_APB2_RSB>;
			pinctrl-names = "default";
			pinctrl-0 = <&r_rsb_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		ths: thermal-sensor@5070400 {
			compatible = "allwinner,sun50i-h6-ths";
			reg = <0x05070400 0x100>;
			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_THS>;
			clock-names = "bus";
			resets = <&ccu RST_BUS_THS>;
			nvmem-cells = <&ths_calibration>;
			nvmem-cell-names = "calibration";
			#thermal-sensor-cells = <1>;
		};
	};

	thermal-zones {
		cpu-thermal {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&ths 0>;

			trips {
				cpu_alert: cpu-alert {
					temperature = <85000>;
					hysteresis = <2000>;
					type = "passive";
				};

				cpu-crit {
					temperature = <100000>;
					hysteresis = <0>;
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu_alert>;
					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		gpu-thermal {
			polling-delay-passive = <1000>;
			polling-delay = <2000>;
			thermal-sensors = <&ths 1>;

			trips {
				gpu_alert0: gpu-alert-0 {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "passive";
				};

				gpu_alert1: gpu-alert-1 {
					temperature = <100000>;
					hysteresis = <2000>;
					type = "passive";
				};

				gpu_alert2: gpu-alert-2 {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "passive";
				};

				gpu-crit {
					temperature = <115000>;
					hysteresis = <0>;
					type = "critical";
				};
			};

			cooling-maps {
				// Forbid the GPU to go over 756MHz
				map0 {
					trip = <&gpu_alert0>;
					cooling-device = <&gpu 1 THERMAL_NO_LIMIT>;
				};

				// Forbid the GPU to go over 624MHz
				map1 {
					trip = <&gpu_alert1>;
					cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
				};

				// Forbid the GPU to go over 576MHz
				map2 {
					trip = <&gpu_alert2>;
					cooling-device = <&gpu 3 THERMAL_NO_LIMIT>;
				};
			};
		};
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
/*
 * Copyright (C) 2020 Arm Ltd.
 */

/dts-v1/;

#include "sun50i-h616.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/leds/common.h>

/ {
	model = "OrangePi Zero2";
	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";

	aliases {
		ethernet0 = &emac0;
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	leds {
		compatible = "gpio-leds";

		led-0 {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_RED>;
			gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
			default-state = "on";
		};

		led-1 {
			function = LED_FUNCTION_STATUS;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
		};
	};

	reg_vcc5v: vcc5v {
		/* board wide 5V supply directly from the USB-C socket */
		compatible = "regulator-fixed";
		regulator-name = "vcc-5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	reg_usb1_vbus: regulator-usb1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb1-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&reg_vcc5v>;
		enable-active-high;
		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
	};
};

&ehci1 {
	status = "okay";
};

/* USB 2 & 3 are on headers only. */

&emac0 {
	pinctrl-names = "default";
	pinctrl-0 = <&ext_rgmii_pins>;
	phy-mode = "rgmii";
	phy-handle = <&ext_rgmii_phy>;
	phy-supply = <&reg_dcdce>;
	allwinner,rx-delay-ps = <3100>;
	allwinner,tx-delay-ps = <700>;
	status = "okay";
};

&mdio0 {
	ext_rgmii_phy: ethernet-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <1>;
	};
};

&mmc0 {
	vmmc-supply = <&reg_dcdce>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
	bus-width = <4>;
	status = "okay";
};

&ohci1 {
	status = "okay";
};

&r_rsb {
	status = "okay";

	axp305: pmic@745 {
		compatible = "x-powers,axp305", "x-powers,axp805",
			     "x-powers,axp806";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x745>;

		x-powers,self-working-mode;
		vina-supply = <&reg_vcc5v>;
		vinb-supply = <&reg_vcc5v>;
		vinc-supply = <&reg_vcc5v>;
		vind-supply = <&reg_vcc5v>;
		vine-supply = <&reg_vcc5v>;
		aldoin-supply = <&reg_vcc5v>;
		bldoin-supply = <&reg_vcc5v>;
		cldoin-supply = <&reg_vcc5v>;

		regulators {
			reg_aldo1: aldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-sys";
			};

			reg_aldo2: aldo2 {	/* 3.3V on headers */
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc3v3-ext";
			};

			reg_aldo3: aldo3 {	/* 3.3V on headers */
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc3v3-ext2";
			};

			reg_bldo1: bldo1 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc1v8";
			};

			bldo2 {
				/* unused */
			};

			bldo3 {
				/* unused */
			};

			bldo4 {
				/* unused */
			};

			cldo1 {
				/* reserved */
			};

			cldo2 {
				/* unused */
			};

			cldo3 {
				/* unused */
			};

			reg_dcdca: dcdca {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-cpu";
			};

			reg_dcdcc: dcdcc {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <990000>;
				regulator-name = "vdd-gpu-sys";
			};

			reg_dcdcd: dcdcd {
				regulator-always-on;
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1500000>;
				regulator-name = "vdd-dram";
			};

			reg_dcdce: dcdce {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-eth-mmc";
			};

			sw {
				/* unused */
			};
		};
	};
};

&pio {
	vcc-pc-supply = <&reg_aldo1>;
	vcc-pf-supply = <&reg_aldo1>;
	vcc-pg-supply = <&reg_bldo1>;
	vcc-ph-supply = <&reg_aldo1>;
	vcc-pi-supply = <&reg_aldo1>;
};

&spi0  {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <40000000>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ph_pins>;
	status = "okay";
};

&usbotg {
	/*
	 * PHY0 pins are connected to a USB-C socket, but a role switch
	 * is not implemented: both CC pins are pulled to GND.
	 * The VBUS pins power the device, so a fixed peripheral mode
	 * is the best choice.
	 * The board can be powered via GPIOs, in this case port0 *can*
	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
	 * then provided by the GPIOs. Any user of this setup would
	 * need to adjust the DT accordingly: dr_mode set to "host",
	 * enabling OHCI0 and EHCI0.
	 */
	dr_mode = "peripheral";
	status = "okay";
};

&usbphy {
	usb1_vbus-supply = <&reg_usb1_vbus>;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
/*
 * Copyright (C) 2021 Arm Ltd.
 */

/dts-v1/;

#include "sun50i-h616.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	model = "X96 Mate";
	compatible = "hechuang,x96-mate", "allwinner,sun50i-h616";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	reg_vcc5v: vcc5v {
		/* board wide 5V supply directly from the DC input */
		compatible = "regulator-fixed";
		regulator-name = "vcc-5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};
};

&ehci0 {
	status = "okay";
};

&ehci2 {
	status = "okay";
};

&ir {
	status = "okay";
};

&mmc0 {
	vmmc-supply = <&reg_dcdce>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
	bus-width = <4>;
	status = "okay";
};

&mmc2 {
	vmmc-supply = <&reg_dcdce>;
	vqmmc-supply = <&reg_bldo1>;
	bus-width = <8>;
	non-removable;
	cap-mmc-hw-reset;
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	status = "okay";
};

&ohci0 {
	status = "okay";
};

&ohci2 {
	status = "okay";
};

&r_rsb {
	status = "okay";

	axp305: pmic@745 {
		compatible = "x-powers,axp305", "x-powers,axp805",
			     "x-powers,axp806";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x745>;

		x-powers,self-working-mode;
		vina-supply = <&reg_vcc5v>;
		vinb-supply = <&reg_vcc5v>;
		vinc-supply = <&reg_vcc5v>;
		vind-supply = <&reg_vcc5v>;
		vine-supply = <&reg_vcc5v>;
		aldoin-supply = <&reg_vcc5v>;
		bldoin-supply = <&reg_vcc5v>;
		cldoin-supply = <&reg_vcc5v>;

		regulators {
			reg_aldo1: aldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-sys";
			};

			/* Enabled by the Android BSP */
			reg_aldo2: aldo2 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc3v3-ext";
				status = "disabled";
			};

			/* Enabled by the Android BSP */
			reg_aldo3: aldo3 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc3v3-ext2";
				status = "disabled";
			};

			reg_bldo1: bldo1 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc1v8";
			};

			/* Enabled by the Android BSP */
			reg_bldo2: bldo2 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc1v8-2";
				status = "disabled";
			};

			bldo3 {
				/* unused */
			};

			bldo4 {
				/* unused */
			};

			cldo1 {
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
				regulator-name = "vcc2v5";
			};

			cldo2 {
				/* unused */
			};

			cldo3 {
				/* unused */
			};

			reg_dcdca: dcdca {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-cpu";
			};

			reg_dcdcc: dcdcc {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <990000>;
				regulator-name = "vdd-gpu-sys";
			};

			reg_dcdcd: dcdcd {
				regulator-always-on;
				regulator-min-microvolt = <1360000>;
				regulator-max-microvolt = <1360000>;
				regulator-name = "vdd-dram";
			};

			reg_dcdce: dcdce {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc-eth-mmc";
			};

			sw {
				/* unused */
			};
		};
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ph_pins>;
	status = "okay";
};

&usbotg {
	dr_mode = "host";	/* USB A type receptable */
	status = "okay";
};

&usbphy {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Arm Ltd.
// based on the H6 dtsi, which is:
//   Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-h616-ccu.h>
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/reset/sun50i-h616-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
		};

		cpu1: cpu@1 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <1>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
		};

		cpu2: cpu@2 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <2>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
		};

		cpu3: cpu@3 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <3>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
		};
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/*
		 * 256 KiB reserved for Trusted Firmware-A (BL31).
		 * This is added by BL31 itself, but some bootloaders fail
		 * to propagate this into the DTB handed to kernels.
		 */
		secmon@40000000 {
			reg = <0x0 0x40000000 0x0 0x40000>;
			no-map;
		};
	};

	osc24M: osc24M-clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "osc24M";
	};

	pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	timer {
		compatible = "arm,armv8-timer";
		arm,no-tick-in-suspend;
		interrupts = <GIC_PPI 13
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 14
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 11
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 10
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x0 0x40000000>;

		syscon: syscon@3000000 {
			compatible = "allwinner,sun50i-h616-system-control";
			reg = <0x03000000 0x1000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			sram_c: sram@28000 {
				compatible = "mmio-sram";
				reg = <0x00028000 0x30000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x00028000 0x30000>;
			};
		};

		ccu: clock@3001000 {
			compatible = "allwinner,sun50i-h616-ccu";
			reg = <0x03001000 0x1000>;
			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>;
			clock-names = "hosc", "losc", "iosc";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		watchdog: watchdog@30090a0 {
			compatible = "allwinner,sun50i-h616-wdt",
				     "allwinner,sun6i-a31-wdt";
			reg = <0x030090a0 0x20>;
			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc24M>;
		};

		pio: pinctrl@300b000 {
			compatible = "allwinner,sun50i-h616-pinctrl";
			reg = <0x0300b000 0x400>;
			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <3>;
			interrupt-controller;
			#interrupt-cells = <3>;

			ext_rgmii_pins: rgmii-pins {
				pins = "PI0", "PI1", "PI2", "PI3", "PI4",
				       "PI5", "PI7", "PI8", "PI9", "PI10",
				       "PI11", "PI12", "PI13", "PI14", "PI15",
				       "PI16";
				function = "emac0";
				drive-strength = <40>;
			};

			i2c0_pins: i2c0-pins {
				pins = "PI6", "PI7";
				function = "i2c0";
			};

			i2c3_ph_pins: i2c3-ph-pins {
				pins = "PH4", "PH5";
				function = "i2c3";
			};

			ir_rx_pin: ir-rx-pin {
				pins = "PH10";
				function = "ir_rx";
			};

			mmc0_pins: mmc0-pins {
				pins = "PF0", "PF1", "PF2", "PF3",
				       "PF4", "PF5";
				function = "mmc0";
				drive-strength = <30>;
				bias-pull-up;
			};

			/omit-if-no-ref/
			mmc1_pins: mmc1-pins {
				pins = "PG0", "PG1", "PG2", "PG3",
				       "PG4", "PG5";
				function = "mmc1";
				drive-strength = <30>;
				bias-pull-up;
			};

			mmc2_pins: mmc2-pins {
				pins = "PC0", "PC1", "PC5", "PC6",
				       "PC8", "PC9", "PC10", "PC11",
				       "PC13", "PC14", "PC15", "PC16";
				function = "mmc2";
				drive-strength = <30>;
				bias-pull-up;
			};

			/omit-if-no-ref/
			spi0_pins: spi0-pins {
				pins = "PC0", "PC2", "PC4";
				function = "spi0";
			};

			/omit-if-no-ref/
			spi0_cs0_pin: spi0-cs0-pin {
				pins = "PC3";
				function = "spi0";
			};

			/omit-if-no-ref/
			spi1_pins: spi1-pins {
				pins = "PH6", "PH7", "PH8";
				function = "spi1";
			};

			/omit-if-no-ref/
			spi1_cs0_pin: spi1-cs0-pin {
				pins = "PH5";
				function = "spi1";
			};

			uart0_ph_pins: uart0-ph-pins {
				pins = "PH0", "PH1";
				function = "uart0";
			};

			/omit-if-no-ref/
			uart1_pins: uart1-pins {
				pins = "PG6", "PG7";
				function = "uart1";
			};

			/omit-if-no-ref/
			uart1_rts_cts_pins: uart1-rts-cts-pins {
				pins = "PG8", "PG9";
				function = "uart1";
			};
		};

		gic: interrupt-controller@3021000 {
			compatible = "arm,gic-400";
			reg = <0x03021000 0x1000>,
			      <0x03022000 0x2000>,
			      <0x03024000 0x2000>,
			      <0x03026000 0x2000>;
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
			interrupt-controller;
			#interrupt-cells = <3>;
		};

		mmc0: mmc@4020000 {
			compatible = "allwinner,sun50i-h616-mmc",
				     "allwinner,sun50i-a100-mmc";
			reg = <0x04020000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
			clock-names = "ahb", "mmc";
			resets = <&ccu RST_BUS_MMC0>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&mmc0_pins>;
			status = "disabled";
			max-frequency = <150000000>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			mmc-ddr-3_3v;
			cap-sdio-irq;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		mmc1: mmc@4021000 {
			compatible = "allwinner,sun50i-h616-mmc",
				     "allwinner,sun50i-a100-mmc";
			reg = <0x04021000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
			clock-names = "ahb", "mmc";
			resets = <&ccu RST_BUS_MMC1>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&mmc1_pins>;
			status = "disabled";
			max-frequency = <150000000>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			mmc-ddr-3_3v;
			cap-sdio-irq;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		mmc2: mmc@4022000 {
			compatible = "allwinner,sun50i-h616-emmc",
				     "allwinner,sun50i-a100-emmc";
			reg = <0x04022000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
			clock-names = "ahb", "mmc";
			resets = <&ccu RST_BUS_MMC2>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&mmc2_pins>;
			status = "disabled";
			max-frequency = <150000000>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			mmc-ddr-3_3v;
			cap-sdio-irq;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		uart0: serial@5000000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05000000 0x400>;
			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART0>;
			resets = <&ccu RST_BUS_UART0>;
			status = "disabled";
		};

		uart1: serial@5000400 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05000400 0x400>;
			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART1>;
			resets = <&ccu RST_BUS_UART1>;
			status = "disabled";
		};

		uart2: serial@5000800 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05000800 0x400>;
			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART2>;
			resets = <&ccu RST_BUS_UART2>;
			status = "disabled";
		};

		uart3: serial@5000c00 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05000c00 0x400>;
			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART3>;
			resets = <&ccu RST_BUS_UART3>;
			status = "disabled";
		};

		uart4: serial@5001000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05001000 0x400>;
			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART4>;
			resets = <&ccu RST_BUS_UART4>;
			status = "disabled";
		};

		uart5: serial@5001400 {
			compatible = "snps,dw-apb-uart";
			reg = <0x05001400 0x400>;
			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART5>;
			resets = <&ccu RST_BUS_UART5>;
			status = "disabled";
		};

		i2c0: i2c@5002000 {
			compatible = "allwinner,sun50i-h616-i2c",
				     "allwinner,sun8i-v536-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x05002000 0x400>;
			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C0>;
			resets = <&ccu RST_BUS_I2C0>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2c0_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c1: i2c@5002400 {
			compatible = "allwinner,sun50i-h616-i2c",
				     "allwinner,sun8i-v536-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x05002400 0x400>;
			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C1>;
			resets = <&ccu RST_BUS_I2C1>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c2: i2c@5002800 {
			compatible = "allwinner,sun50i-h616-i2c",
				     "allwinner,sun8i-v536-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x05002800 0x400>;
			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C2>;
			resets = <&ccu RST_BUS_I2C2>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c3: i2c@5002c00 {
			compatible = "allwinner,sun50i-h616-i2c",
				     "allwinner,sun8i-v536-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x05002c00 0x400>;
			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C3>;
			resets = <&ccu RST_BUS_I2C3>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c4: i2c@5003000 {
			compatible = "allwinner,sun50i-h616-i2c",
				     "allwinner,sun8i-v536-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x05003000 0x400>;
			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C4>;
			resets = <&ccu RST_BUS_I2C4>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi0: spi@5010000 {
			compatible = "allwinner,sun50i-h616-spi",
				     "allwinner,sun8i-h3-spi";
			reg = <0x05010000 0x1000>;
			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
			clock-names = "ahb", "mod";
			resets = <&ccu RST_BUS_SPI0>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi1: spi@5011000 {
			compatible = "allwinner,sun50i-h616-spi",
				     "allwinner,sun8i-h3-spi";
			reg = <0x05011000 0x1000>;
			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
			clock-names = "ahb", "mod";
			resets = <&ccu RST_BUS_SPI1>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		emac0: ethernet@5020000 {
			compatible = "allwinner,sun50i-h616-emac0",
				     "allwinner,sun50i-a64-emac";
			reg = <0x05020000 0x10000>;
			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq";
			clocks = <&ccu CLK_BUS_EMAC0>;
			clock-names = "stmmaceth";
			resets = <&ccu RST_BUS_EMAC0>;
			reset-names = "stmmaceth";
			syscon = <&syscon>;
			status = "disabled";

			mdio0: mdio {
				compatible = "snps,dwmac-mdio";
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		usbotg: usb@5100000 {
			compatible = "allwinner,sun50i-h616-musb",
				     "allwinner,sun8i-h3-musb";
			reg = <0x05100000 0x0400>;
			clocks = <&ccu CLK_BUS_OTG>;
			resets = <&ccu RST_BUS_OTG>;
			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "mc";
			phys = <&usbphy 0>;
			phy-names = "usb";
			extcon = <&usbphy 0>;
			status = "disabled";
		};

		usbphy: phy@5100400 {
			compatible = "allwinner,sun50i-h616-usb-phy";
			reg = <0x05100400 0x24>,
			      <0x05101800 0x14>,
			      <0x05200800 0x14>,
			      <0x05310800 0x14>,
			      <0x05311800 0x14>;
			reg-names = "phy_ctrl",
				    "pmu0",
				    "pmu1",
				    "pmu2",
				    "pmu3";
			clocks = <&ccu CLK_USB_PHY0>,
				 <&ccu CLK_USB_PHY1>,
				 <&ccu CLK_USB_PHY2>,
				 <&ccu CLK_USB_PHY3>,
				 <&ccu CLK_BUS_EHCI2>;
			clock-names = "usb0_phy",
				      "usb1_phy",
				      "usb2_phy",
				      "usb3_phy",
				      "pmu2_clk";
			resets = <&ccu RST_USB_PHY0>,
				 <&ccu RST_USB_PHY1>,
				 <&ccu RST_USB_PHY2>,
				 <&ccu RST_USB_PHY3>;
			reset-names = "usb0_reset",
				      "usb1_reset",
				      "usb2_reset",
				      "usb3_reset";
			status = "disabled";
			#phy-cells = <1>;
		};

		ehci0: usb@5101000 {
			compatible = "allwinner,sun50i-h616-ehci",
				     "generic-ehci";
			reg = <0x05101000 0x100>;
			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI0>,
				 <&ccu CLK_BUS_EHCI0>,
				 <&ccu CLK_USB_OHCI0>;
			resets = <&ccu RST_BUS_OHCI0>,
				 <&ccu RST_BUS_EHCI0>;
			phys = <&usbphy 0>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci0: usb@5101400 {
			compatible = "allwinner,sun50i-h616-ohci",
				     "generic-ohci";
			reg = <0x05101400 0x100>;
			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI0>,
				 <&ccu CLK_USB_OHCI0>;
			resets = <&ccu RST_BUS_OHCI0>;
			phys = <&usbphy 0>;
			phy-names = "usb";
			status = "disabled";
		};

		ehci1: usb@5200000 {
			compatible = "allwinner,sun50i-h616-ehci",
				     "generic-ehci";
			reg = <0x05200000 0x100>;
			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI1>,
				 <&ccu CLK_BUS_EHCI1>,
				 <&ccu CLK_USB_OHCI1>;
			resets = <&ccu RST_BUS_OHCI1>,
				 <&ccu RST_BUS_EHCI1>;
			phys = <&usbphy 1>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci1: usb@5200400 {
			compatible = "allwinner,sun50i-h616-ohci",
				     "generic-ohci";
			reg = <0x05200400 0x100>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI1>,
				 <&ccu CLK_USB_OHCI1>;
			resets = <&ccu RST_BUS_OHCI1>;
			phys = <&usbphy 1>;
			phy-names = "usb";
			status = "disabled";
		};

		ehci2: usb@5310000 {
			compatible = "allwinner,sun50i-h616-ehci",
				     "generic-ehci";
			reg = <0x05310000 0x100>;
			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI2>,
				 <&ccu CLK_BUS_EHCI2>,
				 <&ccu CLK_USB_OHCI2>;
			resets = <&ccu RST_BUS_OHCI2>,
				 <&ccu RST_BUS_EHCI2>;
			phys = <&usbphy 2>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci2: usb@5310400 {
			compatible = "allwinner,sun50i-h616-ohci",
				     "generic-ohci";
			reg = <0x05310400 0x100>;
			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI2>,
				 <&ccu CLK_USB_OHCI2>;
			resets = <&ccu RST_BUS_OHCI2>;
			phys = <&usbphy 2>;
			phy-names = "usb";
			status = "disabled";
		};

		ehci3: usb@5311000 {
			compatible = "allwinner,sun50i-h616-ehci",
				     "generic-ehci";
			reg = <0x05311000 0x100>;
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI3>,
				 <&ccu CLK_BUS_EHCI3>,
				 <&ccu CLK_USB_OHCI3>;
			resets = <&ccu RST_BUS_OHCI3>,
				 <&ccu RST_BUS_EHCI3>;
			phys = <&usbphy 3>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci3: usb@5311400 {
			compatible = "allwinner,sun50i-h616-ohci",
				     "generic-ohci";
			reg = <0x05311400 0x100>;
			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI3>,
				 <&ccu CLK_USB_OHCI3>;
			resets = <&ccu RST_BUS_OHCI3>;
			phys = <&usbphy 3>;
			phy-names = "usb";
			status = "disabled";
		};

		rtc: rtc@7000000 {
			compatible = "allwinner,sun50i-h616-rtc";
			reg = <0x07000000 0x400>;
			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_R_APB1_RTC>, <&osc24M>,
				 <&ccu CLK_PLL_SYSTEM_32K>;
			clock-names = "bus", "hosc",
				      "pll-32k";
			#clock-cells = <1>;
		};

		r_ccu: clock@7010000 {
			compatible = "allwinner,sun50i-h616-r-ccu";
			reg = <0x07010000 0x210>;
			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
				 <&ccu CLK_PLL_PERIPH0>;
			clock-names = "hosc", "losc", "iosc", "pll-periph";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		r_pio: pinctrl@7022000 {
			compatible = "allwinner,sun50i-h616-r-pinctrl";
			reg = <0x07022000 0x400>;
			clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
				 <&rtc CLK_OSC32K>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <3>;

			/omit-if-no-ref/
			r_i2c_pins: r-i2c-pins {
				pins = "PL0", "PL1";
				function = "s_i2c";
			};

			r_rsb_pins: r-rsb-pins {
				pins = "PL0", "PL1";
				function = "s_rsb";
			};
		};

		ir: ir@7040000 {
			compatible = "allwinner,sun50i-h616-ir",
				     "allwinner,sun6i-a31-ir";
			reg = <0x07040000 0x400>;
			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_R_APB1_IR>,
				 <&r_ccu CLK_IR>;
			clock-names = "apb", "ir";
			resets = <&r_ccu RST_R_APB1_IR>;
			pinctrl-names = "default";
			pinctrl-0 = <&ir_rx_pin>;
			status = "disabled";
		};

		r_i2c: i2c@7081400 {
			compatible = "allwinner,sun50i-h616-i2c",
				     "allwinner,sun8i-v536-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x07081400 0x400>;
			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_R_APB2_I2C>;
			resets = <&r_ccu RST_R_APB2_I2C>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		r_rsb: rsb@7083000 {
			compatible = "allwinner,sun50i-h616-rsb",
				     "allwinner,sun8i-a23-rsb";
			reg = <0x07083000 0x400>;
			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_R_APB2_RSB>;
			clock-frequency = <3000000>;
			resets = <&r_ccu RST_R_APB2_RSB>;
			pinctrl-names = "default";
			pinctrl-0 = <&r_rsb_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};
};


code:
# SPDX-License-Identifier: GPL-2.0-only
dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_stratix10_socdk.dtb \
				socfpga_stratix10_socdk_nand.dtb \
				socfpga_stratix10_swvp.dtb