code:
// SPDX-License-Identifier: (GPL-2.0 or MIT)
//
// Copyright (C) 2018 emtrion GmbH
//

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/input.h>

/ {

	model = "emtrion SoM emCON-MX6";
	compatible = "emtrion,emcon-mx6";

	aliases {
		mmc0 = &usdhc3;
		mmc1 = &usdhc2;
		mmc2 = &usdhc1;
		rtc0 = &ds1307;
	};

	chosen {
		stdout-path = &uart1;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_emcon_wake>;

		wake {
			label = "Wake";
			linux,code = <KEY_WAKEUP>;
			gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
			wakeup-source;
		};
	};

	som_leds: leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_som_leds>;

		green {
			label = "som:green";
			gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "on";
		};

		red {
			label = "som:red";
			gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
			default-state = "keep";
		};

	};

	lvds_backlight: lvds-backlight {
		compatible = "pwm-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lvds_bl>;
		enable-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>;
		pwms = <&pwm1 0 50000>;
		brightness-levels = <
			0 4 8 16 32 64 80 96 112
			128 144 160 176 250
		>;
		default-brightness-level = <13>;
		status = "okay";
	};

	pwm_fan: pwm-fan {
		compatible = "pwm-fan";
		#cooling-cells = <2>;
		pwms = <&pwm4 0 50000>;
		cooling-levels = <0 64 127 191 255>;
		status = "disabled";
	};

	rgb_encoder: display {
		compatible = "fsl,imx-parallel-display";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rgb24_display>;
		status = "disabled";

		port@0 {
			reg = <0>;

			rgb_encoder_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			rgb_encoder_out: endpoint {
				remote-endpoint = <&rgb_panel_in>;
			};
		};
	};

	rgb_panel: lcd {
		backlight = <&rgb_backlight>;
		power-supply = <&reg_parallel_disp>;

		port {
			rgb_panel_in: endpoint {
				remote-endpoint = <&rgb_encoder_out>;
			};
		};
	};

	reg_parallel_disp: reg-parallel-display {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rgb_bl_en>;
		regulator-name = "LCD-Supply";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio7 9 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_lvds_disp: reg-lvds-display {
		compatible = "regulator-fixed";
		regulator-name = "LVDS-Supply";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	rgb_backlight: rgb-backlight {
		compatible = "pwm-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rgb_bl>;
		enable-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
		pwms = <&pwm3 0 5000000>;
		brightness-levels = <
			250 176 160 144 128 112
			96 80 64 48 32 16 8 1
		>;
		default-brightness-level = <13>;
		status = "okay";
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
};

&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>,
		<&gpio2 27 GPIO_ACTIVE_LOW>;
};

&ecspi4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_nor_flash>;
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
	phy-reset-duration = <50>;
	phy-supply = <&vdd_1V8_reg>;
	phy-handle = <&ksz9031>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ksz9031: phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
			interrupt-parent = <&gpio1>;
			interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
			rxdv-skew-ps = <480>;
			txen-skew-ps = <480>;
			rxd0-skew-ps = <480>;
			rxd1-skew-ps = <480>;
			rxd2-skew-ps = <480>;
			rxd3-skew-ps = <480>;
			txd0-skew-ps = <420>;
			txd1-skew-ps = <420>;
			txd2-skew-ps = <360>;
			txd3-skew-ps = <360>;
			txc-skew-ps = <1020>;
			rxc-skew-ps = <960>;
		};
	};
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	da9063: pmic@58 {
		compatible = "dlg,da9063";
		reg = <0x58>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pmic>;
		interrupt-parent = <&gpio2>;
		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;

		onkey {
			compatible = "dlg,da9063-onkey";
			wakeup-source;
		};

		watchdog {
			compatible = "dlg,da9063-watchdog";
			timeout-sec = <0>;
		};

		regulators {
			vddcore_reg: bcore1 {
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1450000>;
				regulator-ramp-delay = <2>;
				regulator-name = "DA9063_CORE";
				regulator-always-on;
			};

			vddsoc_reg: bcore2 {
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1450000>;
				regulator-ramp-delay = <2>;
				regulator-name = "DA9063_SOC";
				regulator-always-on;
			};

			vdd_ddr3_reg: bpro {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1500000>;
				regulator-ramp-delay = <2>;
				regulator-always-on;
			};

			vdd_3v3_reg: bperi {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-ramp-delay = <2>;
				regulator-always-on;
			};

			vdd_sata_reg: ldo3 {
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
				regulator-always-on;
			};
			vdd_mipi_reg: ldo4 {
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
				regulator-always-on;
			};

			vdd_mx6_snvs_reg: ldo5 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vdd_hdmi_reg: ldo6 {
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
				regulator-always-on;
				regulator-boot-on;
			};

			vdd_pcie_reg: ldo7 {
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
				regulator-always-on;
			};

			vdd_1V8_reg: ldo8 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			vdd_3V3_sdc_reg: ldo9 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vdd_1V2_reg: ldo10 {
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-always-on;
			};
		};
	};

	ds1307: rtc@68 {
		compatible = "dallas,ds1307";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
};

&iomuxc {

	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD			0x130b0
			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC			0x1b060
			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD			0x130B0
			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS			0x1b060
		>;
	};

	pinctrl_can1: can1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX		0x1b0b1
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX		0x1b0b1
		>;
	};

	pinctrl_can2: can2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX		0x1b0b1
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX		0x1b0b1
		>;
	};

	pinctrl_cpi1: csi0grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0xb0b1
			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC	0x1b0b1
			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC	0x1b0b1
			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b1
			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b1
			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b1
			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b1
			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b1
			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b1
			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b1
			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b1
		>;
	};

	/*camera2-pinctrl is in imx6q-emcon.dtsi or imx6dl-emcon.dtsi*/

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK			0x100b1
			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI			0x100b1
			MX6QDL_PAD_EIM_OE__ECSPI2_MISO			0x100b1
			MX6QDL_PAD_EIM_LBA__GPIO2_IO27			0x100b1
			MX6QDL_PAD_EIM_RW__GPIO2_IO26			0x100b1
		>;
	};

	pinctrl_emcon_gpio1: emcongpio1 {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D0__GPIO2_IO00			0x0b0b1
		>;
	};

	pinctrl_emcon_gpio2: emcongpio2 {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D1__GPIO2_IO01			0x0b0b1
		>;
	};

	pinctrl_emcon_gpio3: emcongpio3 {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D2__GPIO2_IO02			0x0b0b1
		>;
	};

	pinctrl_emcon_gpio4: emcongpio4 {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D3__GPIO2_IO03			0x0b0b1
		>;
	};

	pinctrl_emcon_gpio5: emcongpio5 {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D4__GPIO2_IO04			0x0b0b1
		>;
	};

	pinctrl_emcon_gpio6: emcongpio6 {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D5__GPIO2_IO05			0x0b0b1
		>;
	};

	pinctrl_emcon_gpio7: emcongpio7 {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D6__GPIO2_IO06			0x0b0b1
		>;
	};

	pinctrl_emcon_gpio8: emcongpio8 {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D7__GPIO2_IO07			0x0b0b1
		>;
	};

	pinctrl_emcon_irq_a: emconirqa {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07		0x0b0b1
		>;
	};

	pinctrl_emcon_irq_b: emconirqb {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15		0x0b0b1
		>;
	};

	pinctrl_emcon_irq_c: emconirqc {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16		0x0b0b1
		>;
	};

	pinctrl_emcon_irq_pwr: emconirqpwr {
		fsl,pins = <
			MX6QDL_PAD_EIM_D23__GPIO3_IO23			0x0b0b1
		>;
	};

	pinctrl_emcon_wake: emconwake {
		fsl,pins = <
			MX6QDL_PAD_EIM_DA2__GPIO3_IO02			0x1b0b1
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO			0x1b030
			MX6QDL_PAD_ENET_MDC__ENET_MDC			0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC			0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0			0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1			0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2			0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3			0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x4001a0b1
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC			0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0			0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1			0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2			0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3			0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20		0x1b058
			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30		0x1b0b0
		 >;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4000b070
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b870
		>;
	};

	pinctrl_irq_touch1: irqtouch1 {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__GPIO1_IO05			0x0b0b1
		>;
	};

	pinctrl_irq_touch2: irqtouch2 {
		fsl,pins = <
			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31			0x0b0b1
		>;
	};

	pinctrl_lvds_bl: lvdsbacklightgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__PWM1_OUT			0x0b0b1
			MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09		0x0b0b1
		>;
	};

	pinctrl_lvds_reg: lvdsreggrp {
		fsl,pins = <
			MX6QDL_PAD_SD4_CLK__GPIO7_IO10			0x0b0b1
		>;
	};

	pinctrl_nor_flash: norflashgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11		0x1b0b1
			MX6QDL_PAD_EIM_D21__ECSPI4_SCLK			0x100b1
			MX6QDL_PAD_EIM_D28__ECSPI4_MOSI			0x100b1
			MX6QDL_PAD_EIM_D22__ECSPI4_MISO			0x100b1
			MX6QDL_PAD_EIM_A25__GPIO5_IO02			0x100b1
		>;
	};

	pinctrl_pcie_ctrl: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A16__GPIO2_IO22			0x1b0b1
			MX6QDL_PAD_GPIO_17__GPIO7_IO12			0x1b0b1
		>;
	};

	pinctrl_pmic: pmicgrp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT0__GPIO2_IO08			0x0b0b1
		>;
	};

	pinctrl_pwm_fan: pwmfan {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT2__PWM4_OUT			0x0b0b1
		>;
	};

	pinctrl_rgb_bl: rgbbacklightgrp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT1__PWM3_OUT			0x0b0b1
			MX6QDL_PAD_NANDF_ALE__GPIO6_IO08		0x0b0b1
		>;
	};

	pinctrl_rgb_bl_en: rgbenable {
		fsl,pins = <
			MX6QDL_PAD_SD4_CMD__GPIO7_IO09			0x0b0b1
		>;
	};

	pinctrl_rgb24_display: rgbgrp {
		fsl,pins = <
			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
		>;
	};

	pinctrl_secure: securegrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_18__GPIO7_IO13			0x1b0b1
		>;
	};

	pinctrl_som_leds: somledgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_DA0__GPIO3_IO00			0x0b0b1
			MX6QDL_PAD_EIM_DA1__GPIO3_IO01			0x0b0b1
		>;
	};

	pinctrl_spdif_in: spdifin {
		fsl,pins = <
			MX6QDL_PAD_GPIO_16__SPDIF_IN			0x1b0b0
		>;
	};

	pinctrl_spdif_out: spdifout {
		fsl,pins = <
			MX6QDL_PAD_GPIO_19__SPDIF_OUT			0x13091
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT5__UART2_RTS_B		0x1b0b1
			MX6QDL_PAD_SD4_DAT6__UART2_CTS_B		0x1b0b1
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA		0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA		0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA		0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA		0x1b0b1
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA		0x1b0b1
			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA		0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA		0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA		0x1b0b1
		>;
	};

	pinctrl_usb_host1: usbhgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D31__USB_H1_PWR			0x1B058
			MX6QDL_PAD_EIM_D30__USB_H1_OC			0x1B058
		>;
	};

	pinctrl_usb_otg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID		0x17059
			MX6QDL_PAD_GPIO_7__GPIO1_IO07			0x17059
			MX6QDL_PAD_GPIO_8__GPIO1_IO08			0x17059
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD			0x17059
			MX6QDL_PAD_SD1_CLK__SD1_CLK			0x10059
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0			0x17059
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1			0x17059
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2			0x17059
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3			0x17059
			MX6QDL_PAD_GPIO_1__SD1_CD_B			0x1b0b1
			MX6QDL_PAD_DI0_PIN4__SD1_WP			0x1b0b1
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CMD__SD2_CMD			0x17059
			MX6QDL_PAD_SD2_CLK__SD2_CLK			0x10059
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0			0x17059
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1			0x17059
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2			0x17059
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3			0x17059
			MX6QDL_PAD_GPIO_4__SD2_CD_B			0x1b0b1
			MX6QDL_PAD_GPIO_2__SD2_WP			0x1b0b1
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD			0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK			0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x17059
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4			0x17059
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5			0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6			0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7			0x17059
			MX6QDL_PAD_SD3_RST__SD3_RESET			0x1b0b1
		>;
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&rgb_encoder_in>;
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie_ctrl>;
	reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
	disable-gpio = <&gpio2 22 GPIO_ACTIVE_LOW>;
};

&pwm1 {
	#pwm-cells = <2>;
	status = "okay";
};

&pwm3 {
	#pwm-cells = <2>;
	status = "okay";
};

&pwm4 {
	#pwm-cells = <2>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
};

&usbh1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usb_host1>;
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usb_otg>;
	vbus-supply = <&reg_usb_otg>;
	dr_mode = "peripheral";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	fsl,wp-controller;
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	fsl,wp-controller;
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	non-removable;
	bus-width = <8>;
	status = "okay";
};

/******device power Management*********/

&cpu0 {
	voltage-tolerance = <2>;
};

&reg_arm {
	vin-supply = <&vddcore_reg>;
};

&reg_soc {
	vin-supply = <&vddsoc_reg>;
};

&reg_pu {
	vin-supply = <&vddsoc_reg>;
};

/*******Disabled HW following***********/

&snvs_rtc {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Gateworks Corporation
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		led0 = &led0;
		led1 = &led1;
		nand = &gpmi;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	chosen {
		bootargs = "console=ttymxc1,115200";
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-pb {
			label = "user_pb";
			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};

		user-pb1x {
			label = "user_pb1x";
			linux,code = <BTN_1>;
			interrupt-parent = <&gsc>;
			interrupts = <0>;
		};

		key-erased {
			label = "key-erased";
			linux,code = <BTN_2>;
			interrupt-parent = <&gsc>;
			interrupts = <1>;
		};

		eeprom-wp {
			label = "eeprom_wp";
			linux,code = <BTN_3>;
			interrupt-parent = <&gsc>;
			interrupts = <2>;
		};

		tamper {
			label = "tamper";
			linux,code = <BTN_4>;
			interrupt-parent = <&gsc>;
			interrupts = <5>;
		};

		switch-hold {
			label = "switch_hold";
			linux,code = <BTN_5>;
			interrupt-parent = <&gsc>;
			interrupts = <7>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led1: user2 {
			label = "user2";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
			default-state = "off";
		};
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x20000000>;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_5p0v: regulator-5p0v {
		compatible = "regulator-fixed";
		regulator-name = "5P0V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c3>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	gsc: gsc@20 {
		compatible = "gw,gsc";
		reg = <0x20>;
		interrupt-parent = <&gpio1>;
		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		#size-cells = <0>;

		adc {
			compatible = "gw,gsc-adc";
			#address-cells = <1>;
			#size-cells = <0>;

			channel@0 {
				gw,mode = <0>;
				reg = <0x00>;
				label = "temp";
			};

			channel@2 {
				gw,mode = <1>;
				reg = <0x02>;
				label = "vdd_vin";
			};

			channel@5 {
				gw,mode = <1>;
				reg = <0x05>;
				label = "vdd_3p3";
			};

			channel@8 {
				gw,mode = <1>;
				reg = <0x08>;
				label = "vdd_bat";
			};

			channel@b {
				gw,mode = <1>;
				reg = <0x0b>;
				label = "vdd_5p0";
			};

			channel@e {
				gw,mode = <1>;
				reg = <0xe>;
				label = "vdd_arm";
			};

			channel@11 {
				gw,mode = <1>;
				reg = <0x11>;
				label = "vdd_soc";
			};

			channel@14 {
				gw,mode = <1>;
				reg = <0x14>;
				label = "vdd_3p0";
			};

			channel@17 {
				gw,mode = <1>;
				reg = <0x17>;
				label = "vdd_1p5";
			};

			channel@1d {
				gw,mode = <1>;
				reg = <0x1d>;
				label = "vdd_1p8";
			};

			channel@20 {
				gw,mode = <1>;
				reg = <0x20>;
				label = "vdd_an1";
			};

			channel@23 {
				gw,mode = <1>;
				reg = <0x23>;
				label = "vdd_2p5";
			};
		};
	};

	gsc_gpio: gpio@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gsc>;
		interrupts = <4>;
	};

	eeprom1: eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom2: eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom3: eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom4: eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	rtc: ds1672@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	ltc3676: pmic@3c {
		compatible = "lltc,ltc3676";
		reg = <0x3c>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pmic>;
		interrupt-parent = <&gpio1>;
		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;

		regulators {
			/* VDD_SOC (1+R1/R2 = 1.635) */
			reg_vdd_soc: sw1 {
				regulator-name = "vddsoc";
				regulator-min-microvolt = <674400>;
				regulator-max-microvolt = <1308000>;
				lltc,fb-voltage-divider = <127000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
			reg_1p8v: sw2 {
				regulator-name = "vdd1p8";
				regulator-min-microvolt = <1033310>;
				regulator-max-microvolt = <2004000>;
				lltc,fb-voltage-divider = <301000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_ARM (1+R1/R2 = 1.635) */
			reg_vdd_arm: sw3 {
				regulator-name = "vddarm";
				regulator-min-microvolt = <674400>;
				regulator-max-microvolt = <1308000>;
				lltc,fb-voltage-divider = <127000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_DDR (1+R1/R2 = 2.105) */
			reg_vdd_ddr: sw4 {
				regulator-name = "vddddr";
				regulator-min-microvolt = <868310>;
				regulator-max-microvolt = <1684000>;
				lltc,fb-voltage-divider = <221000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
			reg_2p5v: ldo2 {
				regulator-name = "vdd2p5";
				regulator-min-microvolt = <2490375>;
				regulator-max-microvolt = <2490375>;
				lltc,fb-voltage-divider = <487000 200000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_HIGH (1+R1/R2 = 4.17) */
			reg_3p0v: ldo4 {
				regulator-name = "vdd3p0";
				regulator-min-microvolt = <3023250>;
				regulator-max-microvolt = <3023250>;
				lltc,fb-voltage-divider = <634000 200000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	adv7180: camera@20 {
		compatible = "adi,adv7180";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_adv7180>;
		reg = <0x20>;
		powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
		interrupt-parent = <&gpio5>;
		interrupts = <23 IRQ_TYPE_LEVEL_LOW>;

		port {
			adv7180_to_ipu1_csi0_mux: endpoint {
				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
				bus-width = <8>;
			};
		};
	};
};

&ipu1_csi0_from_ipu1_csi0_mux {
	bus-width = <8>;
};

&ipu1_csi0_mux_from_parallel_sensor {
	remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
	bus-width = <8>;
};

&ipu1_csi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ipu1_csi0>;
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

&pwm4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
	status = "disabled";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	pinctrl_adv7180: adv7180grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23        0x0001b0b0
			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20     0x4001b0b0
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0 /* PHY Reset */
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x0001b0b0 /* GSC_IRQ# */
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_ipu1_csi0: ipu1csi0grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0
			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0
			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0
			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0
			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0
			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0
			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0
			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0
			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0
			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0
			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0
		>;
	};

	pinctrl_pmic: pmicgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0001b0b0 /* PMIC_IRQ# */
		>;
	};

	pinctrl_pps: ppsgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* OTG_PWR_EN */
			MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x17059
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
		>;
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Gateworks Corporation
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		led0 = &led0;
		led1 = &led1;
		led2 = &led2;
		nand = &gpmi;
		ssi0 = &ssi1;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	chosen {
		bootargs = "console=ttymxc1,115200";
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-pb {
			label = "user_pb";
			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};

		user-pb1x {
			label = "user_pb1x";
			linux,code = <BTN_1>;
			interrupt-parent = <&gsc>;
			interrupts = <0>;
		};

		key-erased {
			label = "key-erased";
			linux,code = <BTN_2>;
			interrupt-parent = <&gsc>;
			interrupts = <1>;
		};

		eeprom-wp {
			label = "eeprom_wp";
			linux,code = <BTN_3>;
			interrupt-parent = <&gsc>;
			interrupts = <2>;
		};

		tamper {
			label = "tamper";
			linux,code = <BTN_4>;
			interrupt-parent = <&gsc>;
			interrupts = <5>;
		};

		switch-hold {
			label = "switch_hold";
			linux,code = <BTN_5>;
			interrupt-parent = <&gsc>;
			interrupts = <7>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led1: user2 {
			label = "user2";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
			default-state = "off";
		};

		led2: user3 {
			label = "user3";
			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
			default-state = "off";
		};
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x20000000>;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	reg_1p0v: regulator-1p0v {
		compatible = "regulator-fixed";
		regulator-name = "1P0V";
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_5p0v: regulator-5p0v {
		compatible = "regulator-fixed";
		regulator-name = "5P0V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	reg_can1_stby: regulator-can1-stby {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_can1>;
		regulator-name = "can1_stby";
		gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	sound {
		compatible = "fsl,imx6q-ventana-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "sgtl5000-audio";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <4>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	xceiver-supply = <&reg_can1_stby>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi3 {
	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c3>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	gsc: gsc@20 {
		compatible = "gw,gsc";
		reg = <0x20>;
		interrupt-parent = <&gpio1>;
		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		#size-cells = <0>;

		adc {
			compatible = "gw,gsc-adc";
			#address-cells = <1>;
			#size-cells = <0>;

			channel@0 {
				gw,mode = <0>;
				reg = <0x00>;
				label = "temp";
			};

			channel@2 {
				gw,mode = <1>;
				reg = <0x02>;
				label = "vdd_vin";
			};

			channel@5 {
				gw,mode = <1>;
				reg = <0x05>;
				label = "vdd_3p3";
			};

			channel@8 {
				gw,mode = <1>;
				reg = <0x08>;
				label = "vdd_bat";
			};

			channel@b {
				gw,mode = <1>;
				reg = <0x0b>;
				label = "vdd_5p0";
			};

			channel@e {
				gw,mode = <1>;
				reg = <0xe>;
				label = "vdd_arm";
			};

			channel@11 {
				gw,mode = <1>;
				reg = <0x11>;
				label = "vdd_soc";
			};

			channel@14 {
				gw,mode = <1>;
				reg = <0x14>;
				label = "vdd_3p0";
			};

			channel@17 {
				gw,mode = <1>;
				reg = <0x17>;
				label = "vdd_1p5";
			};

			channel@1d {
				gw,mode = <1>;
				reg = <0x1d>;
				label = "vdd_1p8";
			};

			channel@20 {
				gw,mode = <1>;
				reg = <0x20>;
				label = "vdd_1p0";
			};

			channel@23 {
				gw,mode = <1>;
				reg = <0x23>;
				label = "vdd_2p5";
			};

			channel@29 {
				gw,mode = <1>;
				reg = <0x29>;
				label = "vdd_an1";
			};
		};
	};

	gsc_gpio: gpio@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gsc>;
		interrupts = <4>;
	};

	eeprom1: eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom2: eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom3: eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom4: eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	rtc: ds1672@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	ltc3676: pmic@3c {
		compatible = "lltc,ltc3676";
		reg = <0x3c>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pmic>;
		interrupt-parent = <&gpio1>;
		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;

		regulators {
			/* VDD_SOC (1+R1/R2 = 1.635) */
			reg_vdd_soc: sw1 {
				regulator-name = "vddsoc";
				regulator-min-microvolt = <674400>;
				regulator-max-microvolt = <1308000>;
				lltc,fb-voltage-divider = <127000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
			reg_1p8v: sw2 {
				regulator-name = "vdd1p8";
				regulator-min-microvolt = <1033310>;
				regulator-max-microvolt = <2004000>;
				lltc,fb-voltage-divider = <301000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_ARM (1+R1/R2 = 1.635) */
			reg_vdd_arm: sw3 {
				regulator-name = "vddarm";
				regulator-min-microvolt = <674400>;
				regulator-max-microvolt = <1308000>;
				lltc,fb-voltage-divider = <127000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_DDR (1+R1/R2 = 2.105) */
			reg_vdd_ddr: sw4 {
				regulator-name = "vddddr";
				regulator-min-microvolt = <868310>;
				regulator-max-microvolt = <1684000>;
				lltc,fb-voltage-divider = <221000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
			reg_2p5v: ldo2 {
				regulator-name = "vdd2p5";
				regulator-min-microvolt = <2490375>;
				regulator-max-microvolt = <2490375>;
				lltc,fb-voltage-divider = <487000 200000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_AUD_1P8: Audio codec */
			reg_aud_1p8v: ldo3 {
				regulator-name = "vdd1p8a";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
			};

			/* VDD_HIGH (1+R1/R2 = 4.17) */
			reg_3p0v: ldo4 {
				regulator-name = "vdd3p0";
				regulator-min-microvolt = <3023250>;
				regulator-max-microvolt = <3023250>;
				lltc,fb-voltage-divider = <634000 200000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_1p8v>;
		VDDIO-supply = <&reg_3p3v>;
	};

	touchscreen: egalax_ts@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio7>;
		interrupts = <12 2>;
		wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
	};

	accel@1e {
		compatible = "nxp,fxos8700";
		reg = <0x1e>;
	};
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		display-timings {
			native-mode = <&timing0>;
			timing0: hsd100pxn1 {
				clock-frequency = <65000000>;
				hactive = <1024>;
				vactive = <768>;
				hback-porch = <220>;
				hfront-porch = <40>;
				vback-porch = <21>;
				vfront-porch = <7>;
				hsync-len = <60>;
				vsync-len = <10>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

&pwm4 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	no-1-8-v; /* firmware will remove if board revision supports */
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
			MX6QDL_PAD_SD2_DAT3__AUD4_TXC		0x130b0
			MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0
			MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0
			MX6QDL_PAD_GPIO_0__CCM_CLKO1	0x130b0 /* AUD4_MCK */
		>;
	};

	pinctrl_ecspi3: escpi3grp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x100b1
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0 /* PHY Reset */
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x1b0b0
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x1b0b0
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15  0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x1b0b0 /* PCIE_RST# */
		>;
	};

	pinctrl_pmic: pmicgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0001b0b0 /* PMIC_IRQ# */
		>;
	};

	pinctrl_pps: ppsgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_reg_can1: regcan1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x4001b0b0 /* CAN_STBY */
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
			MX6QDL_PAD_EIM_D22__GPIO3_IO22	0x1b0b0 /* OTG_PWR_EN */
			MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x17059
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x17059 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x17059
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x170b9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170b9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170b9
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170f9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Gateworks Corporation
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		led0 = &led0;
		led1 = &led1;
		led2 = &led2;
		nand = &gpmi;
		ssi0 = &ssi1;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	chosen {
		bootargs = "console=ttymxc1,115200";
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-pb {
			label = "user_pb";
			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};

		user-pb1x {
			label = "user_pb1x";
			linux,code = <BTN_1>;
			interrupt-parent = <&gsc>;
			interrupts = <0>;
		};

		key-erased {
			label = "key-erased";
			linux,code = <BTN_2>;
			interrupt-parent = <&gsc>;
			interrupts = <1>;
		};

		eeprom-wp {
			label = "eeprom_wp";
			linux,code = <BTN_3>;
			interrupt-parent = <&gsc>;
			interrupts = <2>;
		};

		tamper {
			label = "tamper";
			linux,code = <BTN_4>;
			interrupt-parent = <&gsc>;
			interrupts = <5>;
		};

		switch-hold {
			label = "switch_hold";
			linux,code = <BTN_5>;
			interrupt-parent = <&gsc>;
			interrupts = <7>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led1: user2 {
			label = "user2";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
			default-state = "off";
		};

		led2: user3 {
			label = "user3";
			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
			default-state = "off";
		};
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	reg_1p0v: regulator-1p0v {
		compatible = "regulator-fixed";
		regulator-name = "1P0V";
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_can1_stby: regulator-can1-stby {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_can1>;
		regulator-name = "can1_stby";
		gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_usb_h1_vbus: regulator-usb-h1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	sound {
		compatible = "fsl,imx6q-ventana-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "sgtl5000-audio";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <4>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	xceiver-supply = <&reg_can1_stby>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c3>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	gsc: gsc@20 {
		compatible = "gw,gsc";
		reg = <0x20>;
		interrupt-parent = <&gpio1>;
		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		#size-cells = <0>;

		adc {
			compatible = "gw,gsc-adc";
			#address-cells = <1>;
			#size-cells = <0>;

			channel@0 {
				gw,mode = <0>;
				reg = <0x00>;
				label = "temp";
			};

			channel@2 {
				gw,mode = <1>;
				reg = <0x02>;
				label = "vdd_vin";
			};

			channel@5 {
				gw,mode = <1>;
				reg = <0x05>;
				label = "vdd_3p3";
			};

			channel@8 {
				gw,mode = <1>;
				reg = <0x08>;
				label = "vdd_bat";
			};

			channel@b {
				gw,mode = <1>;
				reg = <0x0b>;
				label = "vdd_5p0";
			};

			channel@e {
				gw,mode = <1>;
				reg = <0xe>;
				label = "vdd_arm";
			};

			channel@11 {
				gw,mode = <1>;
				reg = <0x11>;
				label = "vdd_soc";
			};

			channel@14 {
				gw,mode = <1>;
				reg = <0x14>;
				label = "vdd_3p0";
			};

			channel@17 {
				gw,mode = <1>;
				reg = <0x17>;
				label = "vdd_1p5";
			};

			channel@1d {
				gw,mode = <1>;
				reg = <0x1d>;
				label = "vdd_1p8";
			};

			channel@20 {
				gw,mode = <1>;
				reg = <0x20>;
				label = "vdd_1p0";
			};

			channel@23 {
				gw,mode = <1>;
				reg = <0x23>;
				label = "vdd_2p5";
			};

			channel@26 {
				gw,mode = <1>;
				reg = <0x26>;
				label = "vdd_gps";
			};

			channel@29 {
				gw,mode = <1>;
				reg = <0x29>;
				label = "vdd_an1";
			};
		};
	};

	gsc_gpio: gpio@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gsc>;
		interrupts = <4>;
	};

	eeprom1: eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom2: eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom3: eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom4: eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	rtc: ds1672@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	ltc3676: pmic@3c {
		compatible = "lltc,ltc3676";
		reg = <0x3c>;
		interrupt-parent = <&gpio1>;
		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;

		regulators {
			/* VDD_SOC (1+R1/R2 = 1.635) */
			reg_vdd_soc: sw1 {
				regulator-name = "vddsoc";
				regulator-min-microvolt = <674400>;
				regulator-max-microvolt = <1308000>;
				lltc,fb-voltage-divider = <127000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
			reg_1p8v: sw2 {
				regulator-name = "vdd1p8";
				regulator-min-microvolt = <1033310>;
				regulator-max-microvolt = <2004000>;
				lltc,fb-voltage-divider = <301000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_ARM (1+R1/R2 = 1.635) */
			reg_vdd_arm: sw3 {
				regulator-name = "vddarm";
				regulator-min-microvolt = <674400>;
				regulator-max-microvolt = <1308000>;
				lltc,fb-voltage-divider = <127000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_DDR (1+R1/R2 = 2.105) */
			reg_vdd_ddr: sw4 {
				regulator-name = "vddddr";
				regulator-min-microvolt = <868310>;
				regulator-max-microvolt = <1684000>;
				lltc,fb-voltage-divider = <221000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
			reg_2p5v: ldo2 {
				regulator-name = "vdd2p5";
				regulator-min-microvolt = <2490375>;
				regulator-max-microvolt = <2490375>;
				lltc,fb-voltage-divider = <487000 200000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_AUD_1P8: Audio codec */
			reg_aud_1p8v: ldo3 {
				regulator-name = "vdd1p8a";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
			};

			/* VDD_HIGH (1+R1/R2 = 4.17) */
			reg_3p0v: ldo4 {
				regulator-name = "vdd3p0";
				regulator-min-microvolt = <3023250>;
				regulator-max-microvolt = <3023250>;
				lltc,fb-voltage-divider = <634000 200000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_1p8v>;
		VDDIO-supply = <&reg_3p3v>;
	};

	touchscreen: egalax_ts@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio1>;
		interrupts = <11 2>;
		wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
	};

	accel@1e {
		compatible = "nxp,fxos8700";
		reg = <0x1e>;
	};
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		display-timings {
			native-mode = <&timing0>;
			timing0: hsd100pxn1 {
				clock-frequency = <65000000>;
				hactive = <1024>;
				vactive = <768>;
				hback-porch = <220>;
				hfront-porch = <40>;
				vback-porch = <21>;
				vfront-porch = <7>;
				hsync-len = <60>;
				vsync-len = <10>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

&pwm4 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	no-1-8-v; /* firmware will remove if board revision supports */
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
			MX6QDL_PAD_SD2_DAT3__AUD4_TXC		0x130b0
			MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0
			MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0
			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0 /* AUD4_MCK */
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x1b0b0
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x1b0b0
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x1b0b0 /* PCIE RST */
		>;
	};

	pinctrl_pmic: pmicgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0001b0b0 /* PMIC_IRQ# */
		>;
	};

	pinctrl_pps: ppsgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_reg_can1: regcan1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x4001b0b0 /* CAN_STBY */
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* PWR_EN */
			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0 /* OC */
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x17059 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x17059
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170b9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170b9
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170f9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Gateworks Corporation
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		led0 = &led0;
		led1 = &led1;
		led2 = &led2;
		nand = &gpmi;
		ssi0 = &ssi1;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	chosen {
		bootargs = "console=ttymxc1,115200";
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-pb {
			label = "user_pb";
			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};

		user-pb1x {
			label = "user_pb1x";
			linux,code = <BTN_1>;
			interrupt-parent = <&gsc>;
			interrupts = <0>;
		};

		key-erased {
			label = "key-erased";
			linux,code = <BTN_2>;
			interrupt-parent = <&gsc>;
			interrupts = <1>;
		};

		eeprom-wp {
			label = "eeprom_wp";
			linux,code = <BTN_3>;
			interrupt-parent = <&gsc>;
			interrupts = <2>;
		};

		tamper {
			label = "tamper";
			linux,code = <BTN_4>;
			interrupt-parent = <&gsc>;
			interrupts = <5>;
		};

		switch-hold {
			label = "switch_hold";
			linux,code = <BTN_5>;
			interrupt-parent = <&gsc>;
			interrupts = <7>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led1: user2 {
			label = "user2";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
			default-state = "off";
		};

		led2: user3 {
			label = "user3";
			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
			default-state = "off";
		};
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_1p0v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "1P0V";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-always-on;
		};

		reg_3p3v: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_can1_stby: regulator-can1-stby {
			compatible = "regulator-fixed";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_reg_can1>;
			regulator-name = "can1_stby";
			gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
		};

		reg_usb_h1_vbus: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		reg_usb_otg_vbus: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	sound-analog {
		compatible = "fsl,imx6q-ventana-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "sgtl5000-audio";
		ssi-controller = <&ssi1>;
		audio-codec = <&sgtl5000>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <4>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
	status = "okay";

	ssi2 {
		fsl,audmux-port = <1>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_TFSDIR |
			IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
			IMX_AUDMUX_V2_PTCR_TCLKDIR |
			IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
			IMX_AUDMUX_V2_PTCR_SYN)
			IMX_AUDMUX_V2_PDCR_RXDSEL(4)
		>;
	};

	aud5 {
		fsl,audmux-port = <4>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(1)>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	xceiver-supply = <&reg_can1_stby>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi2 {
	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c3>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	gsc: gsc@20 {
		compatible = "gw,gsc";
		reg = <0x20>;
		interrupt-parent = <&gpio1>;
		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		adc {
			compatible = "gw,gsc-adc";
			#address-cells = <1>;
			#size-cells = <0>;

			channel@0 {
				gw,mode = <0>;
				reg = <0x00>;
				label = "temp";
			};

			channel@2 {
				gw,mode = <1>;
				reg = <0x02>;
				label = "vdd_vin";
			};

			channel@5 {
				gw,mode = <1>;
				reg = <0x05>;
				label = "vdd_3p3";
			};

			channel@8 {
				gw,mode = <1>;
				reg = <0x08>;
				label = "vdd_bat";
			};

			channel@b {
				gw,mode = <1>;
				reg = <0x0b>;
				label = "vdd_5p0";
			};

			channel@e {
				gw,mode = <1>;
				reg = <0xe>;
				label = "vdd_arm";
			};

			channel@11 {
				gw,mode = <1>;
				reg = <0x11>;
				label = "vdd_soc";
			};

			channel@14 {
				gw,mode = <1>;
				reg = <0x14>;
				label = "vdd_3p0";
			};

			channel@17 {
				gw,mode = <1>;
				reg = <0x17>;
				label = "vdd_1p5";
			};

			channel@1d {
				gw,mode = <1>;
				reg = <0x1d>;
				label = "vdd_1p8";
			};

			channel@20 {
				gw,mode = <1>;
				reg = <0x20>;
				label = "vdd_1p0";
			};

			channel@23 {
				gw,mode = <1>;
				reg = <0x23>;
				label = "vdd_2p5";
			};

			channel@26 {
				gw,mode = <1>;
				reg = <0x26>;
				label = "vdd_gps";
			};
		};

		fan-controller@2c {
			compatible = "gw,gsc-fan";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2c>;
		};
	};

	gsc_gpio: gpio@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gsc>;
		interrupts = <4>;
	};

	eeprom1: eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom2: eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom3: eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom4: eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	rtc: ds1672@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic: pfuze100@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3950000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-boot-on;
				regulator-always-on;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	sgtl5000: audio-codec@a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&sw4_reg>;
		VDDIO-supply = <&reg_3p3v>;
	};

	touchscreen: egalax_ts@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio7>;
		interrupts = <12 2>;
		wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
	};

	accel@1e {
		compatible = "nxp,fxos8700";
		reg = <0x1e>;
	};
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		display-timings {
			native-mode = <&timing0>;
			timing0: hsd100pxn1 {
				clock-frequency = <65000000>;
				hactive = <1024>;
				vactive = <768>;
				hback-porch = <220>;
				hfront-porch = <40>;
				vback-porch = <21>;
				vfront-porch = <7>;
				hsync-len = <60>;
				vsync-len = <10>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
	status = "disabled";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

&pwm4 {
	#pwm-cells = <2>;
	pinctrl-names = "default", "state_dio";
	pinctrl-0 = <&pinctrl_pwm4_backlight>;
	pinctrl-1 = <&pinctrl_pwm4_dio>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&ssi2 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	no-1-8-v; /* firmware will remove if board revision supports */
	status = "okay";
};

&wdog1 {
	status = "disabled";
};

&wdog2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
			MX6QDL_PAD_SD2_DAT3__AUD4_TXC		0x130b0
			MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0
			MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0
			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0 /* AUD4_MCK */
			MX6QDL_PAD_EIM_D25__AUD5_RXC            0x130b0
			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD        0x130b0
			MX6QDL_PAD_EIM_D24__AUD5_RXFS           0x130b0
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
		>;
	};

	pinctrl_ecspi2: escpi2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK	0x100b1
			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI	0x100b1
			MX6QDL_PAD_EIM_OE__ECSPI2_MISO	0x100b1
			MX6QDL_PAD_EIM_RW__GPIO2_IO26	0x100b1
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0 /* PCIE IRQ */
			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x1b0b0 /* PCIE RST */
		>;
	};

	pinctrl_pps: ppsgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b1
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__PWM1_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4_backlight: pwm4grpbacklight {
		fsl,pins = <
			/* LVDS_PWM J6.5 */
			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4_dio: pwm4grpdio {
		fsl,pins = <
			/* DIO3 J16.4 */
			MX6QDL_PAD_SD4_DAT2__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_reg_can1: regcan1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x4001b0b0 /* CAN_STBY */
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* PWR_EN */
			MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x17059
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x17059 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x17059
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170b9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170b9
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170f9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT3__WDOG2_B		0x1b0b0
		>;
	};
};


code:
/*
 * Copyright 2014 Gateworks Corporation
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of
 *     the License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 *     You should have received a copy of the GNU General Public
 *     License along with this file; if not, write to the Free
 *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
 *     MA 02110-1301 USA
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/media/tda1997x.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		led0 = &led0;
		nand = &gpmi;
		ssi0 = &ssi1;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	chosen {
		bootargs = "console=ttymxc1,115200";
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-pb {
			label = "user_pb";
			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};

		user-pb1x {
			label = "user_pb1x";
			linux,code = <BTN_1>;
			interrupt-parent = <&gsc>;
			interrupts = <0>;
		};

		key-erased {
			label = "key-erased";
			linux,code = <BTN_2>;
			interrupt-parent = <&gsc>;
			interrupts = <1>;
		};

		eeprom-wp {
			label = "eeprom_wp";
			linux,code = <BTN_3>;
			interrupt-parent = <&gsc>;
			interrupts = <2>;
		};

		tamper {
			label = "tamper";
			linux,code = <BTN_4>;
			interrupt-parent = <&gsc>;
			interrupts = <5>;
		};

		switch-hold {
			label = "switch_hold";
			linux,code = <BTN_5>;
			interrupt-parent = <&gsc>;
			interrupts = <7>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x20000000>;
	};

	reg_5p0v: regulator-5p0v {
		compatible = "regulator-fixed";
		regulator-name = "5P0V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	reg_usb_h1_vbus: regulator-usb-h1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	sound-digital {
		compatible = "simple-audio-card";
		simple-audio-card,name = "tda1997x-audio";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_codec>;
		simple-audio-card,frame-master = <&sound_codec>;

		sound_cpu: simple-audio-card,cpu {
			sound-dai = <&ssi1>;
		};

		sound_codec: simple-audio-card,codec {
			sound-dai = <&hdmi_receiver>;
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */
	status = "okay";

	ssi1 {
		fsl,audmux-port = <0>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_TFSDIR |
			IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
			IMX_AUDMUX_V2_PTCR_TCLKDIR |
			IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
			IMX_AUDMUX_V2_PTCR_SYN)
			IMX_AUDMUX_V2_PDCR_RXDSEL(4)
		>;
	};

	aud5 {
		fsl,audmux-port = <4>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(0)>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c3>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	gsc: gsc@20 {
		compatible = "gw,gsc";
		reg = <0x20>;
		interrupt-parent = <&gpio1>;
		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <1>;
		#size-cells = <0>;

		adc {
			compatible = "gw,gsc-adc";
			#address-cells = <1>;
			#size-cells = <0>;

			channel@0 {
				gw,mode = <0>;
				reg = <0x00>;
				label = "temp";
			};

			channel@2 {
				gw,mode = <1>;
				reg = <0x02>;
				label = "vdd_vin";
			};

			channel@5 {
				gw,mode = <1>;
				reg = <0x05>;
				label = "vdd_3p3";
			};

			channel@8 {
				gw,mode = <1>;
				reg = <0x08>;
				label = "vdd_bat";
			};

			channel@b {
				gw,mode = <1>;
				reg = <0x0b>;
				label = "vdd_5p0";
			};

			channel@e {
				gw,mode = <1>;
				reg = <0xe>;
				label = "vdd_arm";
			};

			channel@11 {
				gw,mode = <1>;
				reg = <0x11>;
				label = "vdd_soc";
			};

			channel@14 {
				gw,mode = <1>;
				reg = <0x14>;
				label = "vdd_3p0";
			};

			channel@17 {
				gw,mode = <1>;
				reg = <0x17>;
				label = "vdd_1p5";
			};

			channel@1d {
				gw,mode = <1>;
				reg = <0x1d>;
				label = "vdd_1p8a";
			};

			channel@20 {
				gw,mode = <1>;
				reg = <0x20>;
				label = "vdd_1p0b";
			};
		};
	};

	gsc_gpio: gpio@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gsc>;
		interrupts = <4>;
	};

	eeprom1: eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom2: eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom3: eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom4: eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	rtc: ds1672@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	ltc3676: pmic@3c {
		compatible = "lltc,ltc3676";
		reg = <0x3c>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pmic>;
		interrupt-parent = <&gpio1>;
		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;

		regulators {
			/* VDD_SOC (1+R1/R2 = 1.635) */
			reg_vdd_soc: sw1 {
				regulator-name = "vddsoc";
				regulator-min-microvolt = <674400>;
				regulator-max-microvolt = <1308000>;
				lltc,fb-voltage-divider = <127000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_DDR (1+R1/R2 = 2.105) */
			reg_vdd_ddr: sw2 {
				regulator-name = "vddddr";
				regulator-min-microvolt = <868310>;
				regulator-max-microvolt = <1684000>;
				lltc,fb-voltage-divider = <221000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_ARM (1+R1/R2 = 1.635) */
			reg_vdd_arm: sw3 {
				regulator-name = "vddarm";
				regulator-min-microvolt = <674400>;
				regulator-max-microvolt = <1308000>;
				lltc,fb-voltage-divider = <127000 200000>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_3P3 (1+R1/R2 = 1.281) */
			reg_3p3: sw4 {
				regulator-name = "vdd3p3";
				regulator-min-microvolt = <1880000>;
				regulator-max-microvolt = <3647000>;
				lltc,fb-voltage-divider = <200000 56200>;
				regulator-ramp-delay = <7000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */
			reg_1p8a: ldo2 {
				regulator-name = "vdd1p8a";
				regulator-min-microvolt = <1816125>;
				regulator-max-microvolt = <1816125>;
				lltc,fb-voltage-divider = <301000 200000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* VDD_1P8b: HDMI In analog */
			reg_1p8b: ldo3 {
				regulator-name = "vdd1p8b";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
			};

			/* VDD_HIGH (1+R1/R2 = 4.17) */
			reg_3p0: ldo4 {
				regulator-name = "vdd3p0";
				regulator-min-microvolt = <3023250>;
				regulator-max-microvolt = <3023250>;
				lltc,fb-voltage-divider = <634000 200000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	gpio_exp: pca9555@24 {
		compatible = "nxp,pca9555";
		reg = <0x24>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	hdmi_receiver: hdmi-receiver@48 {
		compatible = "nxp,tda19971";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_tda1997x>;
		reg = <0x48>;
		interrupt-parent = <&gpio1>;
		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
		DOVDD-supply = <&reg_3p3>;
		AVDD-supply = <&reg_1p8b>;
		DVDD-supply = <&reg_1p8a>;
		#sound-dai-cells = <0>;
		nxp,audout-format = "i2s";
		nxp,audout-layout = <0>;
		nxp,audout-width = <16>;
		nxp,audout-mclk-fs = <128>;
		/*
		 * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
		 * and Y[11:4] across 16bits in the same cycle
		 * which we map to VP[15:08]<->CSI_DATA[19:12]
		 */
		nxp,vidout-portcfg =
			/*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
			< TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
			/*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
			< TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
			/*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
			< TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
			/*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
			< TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;

		port {
			tda1997x_to_ipu1_csi0_mux: endpoint {
				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
				bus-width = <16>;
				hsync-active = <1>;
				vsync-active = <1>;
				data-active = <1>;
			};
		};
	};
};

&ipu1_csi0_from_ipu1_csi0_mux {
	bus-width = <16>;
};

&ipu1_csi0_mux_from_parallel_sensor {
	remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
	bus-width = <16>;
};

&ipu1_csi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ipu1_csi0>;
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

&ssi1 {
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0
			MX6QDL_PAD_DISP0_DAT14__AUD5_RXC	0x130b0
			MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS	0x130b0
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
			MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x4001b0b0 /* CAN_STBY */
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_ipu1_csi0: ipu1_csi0grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04		0x1b0b0
			MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05		0x1b0b0
			MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06		0x1b0b0
			MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07		0x1b0b0
			MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08		0x1b0b0
			MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09		0x1b0b0
			MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10		0x1b0b0
			MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11		0x1b0b0
			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12		0x1b0b0
			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13		0x1b0b0
			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14		0x1b0b0
			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15		0x1b0b0
			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16		0x1b0b0
			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17		0x1b0b0
			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18		0x1b0b0
			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19		0x1b0b0
			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC		0x1b0b0
			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	0x1b0b0
			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC		0x1b0b0
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0 /* PCIE RST */
		>;
	};

	pinctrl_pmic: pmicgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0001b0b0 /* PMIC_IRQ# */
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_tda1997x: tda1997xgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x1b0b0
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
		>;
	};
};