code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 * Copyright 2014-2022 Toradex
 * Copyright 2012 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>

/ {
	model = "Toradex Colibri iMX6DL/S Module";
	compatible = "toradex,colibri_imx6dl", "fsl,imx6dl";

	backlight: backlight {
		compatible = "pwm-backlight";
		brightness-levels = <0 45 63 88 119 158 203 255>;
		default-brightness-level = <4>;
		enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_bl_on>;
		power-supply = <&reg_module_3v3>;
		pwms = <&pwm3 0 5000000 PWM_POLARITY_INVERTED>;
		status = "disabled";
	};

	extcon_usbc_det: usbc-det {
		compatible = "linux,extcon-usb-gpio";
		id-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbc_det>;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		wakeup {
			debounce-interval = <10>;
			gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */
			label = "Wake-Up";
			linux,code = <KEY_WAKEUP>;
			wakeup-source;
		};
	};

	lcd_display: disp0 {
		compatible = "fsl,imx-parallel-display";
		interface-pix-fmt = "bgr666";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ipu1_lcdif>;
		status = "disabled";

		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;

			lcd_display_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			lcd_display_out: endpoint {
				remote-endpoint = <&lcd_panel_in>;
			};
		};
	};

	/* Will be filled by the bootloader */
	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0>;
	};

	panel_dpi: panel-dpi {
		/*
		 * edt,et057090dhu: EDT 5.7" LCD TFT
		 * edt,et070080dh6: EDT 7.0" LCD TFT
		 */
		compatible = "edt,et057090dhu";
		backlight = <&backlight>;
		status = "disabled";

		port {
			lcd_panel_in: endpoint {
				remote-endpoint = <&lcd_display_out>;
			};
		};
	};

	reg_module_3v3: regulator-module-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "+V3.3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_module_3v3_audio: regulator-module-3v3-audio {
		compatible = "regulator-fixed";
		regulator-name = "+V3.3_AUDIO";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_usb_host_vbus: regulator-usb-host-vbus {
		compatible = "regulator-fixed";
		gpio = <&gpio3 31 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "usb_host_vbus";
		status = "disabled";
	};

	sound {
		compatible = "fsl,imx-audio-sgtl5000";
		audio-codec = <&codec>;
		audio-routing =
			"Headphone Jack", "HP_OUT",
			"LINE_IN", "Line In Jack",
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias";
		model = "imx6dl-colibri-sgtl5000";
		mux-int-port = <1>;
		mux-ext-port = <5>;
		ssi-controller = <&ssi1>;
	};

	/* Optional S/PDIF in on SODIMM 88 and out on SODIMM 90, 137 or 168 */
	sound_spdif: sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		spdif-controller = <&spdif>;
		spdif-in;
		spdif-out;
		model = "imx-spdif";
		status = "disabled";
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux &pinctrl_mic_gnd>;
	status = "okay";
};

/* Optional on SODIMM 55/63 */
&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "disabled";
};

/* Optional on SODIMM 178/188 */
&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	status = "disabled";
};

&clks {
	fsl,pmic-stby-poweroff;
};

/* Colibri SSP */
&ecspi4 {
	cs-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi4>;
	status = "disabled";
};

&fec {
	phy-mode = "rmii";
	phy-handle = <&ethphy>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy@0 {
			reg = <0>;
			micrel,led-mode = <0>;
		};
	};
};

&gpio1 {
	gpio-line-names = "",
			  "SODIMM_67",
			  "SODIMM_180",
			  "SODIMM_196",
			  "SODIMM_174",
			  "SODIMM_176",
			  "SODIMM_194",
			  "SODIMM_55",
			  "SODIMM_63",
			  "SODIMM_28",
			  "SODIMM_93",
			  "SODIMM_69",
			  "SODIMM_99",
			  "SODIMM_130",
			  "SODIMM_106",
			  "SODIMM_98",
			  "SODIMM_192",
			  "SODIMM_49",
			  "SODIMM_190",
			  "SODIMM_51",
			  "SODIMM_47",
			  "SODIMM_53",
			  "",
			  "SODIMM_22";
};

&gpio2 {
	gpio-line-names = "SODIMM_132",
			  "SODIMM_134",
			  "SODIMM_135",
			  "SODIMM_133",
			  "SODIMM_102",
			  "SODIMM_43",
			  "SODIMM_127",
			  "SODIMM_37",
			  "SODIMM_104",
			  "SODIMM_59",
			  "SODIMM_30",
			  "SODIMM_100",
			  "SODIMM_38",
			  "SODIMM_34",
			  "SODIMM_32",
			  "SODIMM_36",
			  "SODIMM_59",
			  "SODIMM_67",
			  "SODIMM_97",
			  "SODIMM_79",
			  "SODIMM_103",
			  "SODIMM_101",
			  "SODIMM_45",
			  "SODIMM_105",
			  "SODIMM_107",
			  "SODIMM_91",
			  "SODIMM_89",
			  "SODIMM_150",
			  "SODIMM_126",
			  "SODIMM_128",
			  "",
			  "SODIMM_94";
};

&gpio3 {
	gpio-line-names = "SODIMM_111",
			  "SODIMM_113",
			  "SODIMM_115",
			  "SODIMM_117",
			  "SODIMM_119",
			  "SODIMM_121",
			  "SODIMM_123",
			  "SODIMM_125",
			  "SODIMM_110",
			  "SODIMM_112",
			  "SODIMM_114",
			  "SODIMM_116",
			  "SODIMM_118",
			  "SODIMM_120",
			  "SODIMM_122",
			  "SODIMM_124",
			  "",
			  "SODIMM_96",
			  "SODIMM_77",
			  "SODIMM_25",
			  "SODIMM_27",
			  "SODIMM_88",
			  "SODIMM_90",
			  "SODIMM_31",
			  "SODIMM_23",
			  "SODIMM_29",
			  "SODIMM_71",
			  "SODIMM_73",
			  "SODIMM_92",
			  "SODIMM_81",
			  "SODIMM_131",
			  "SODIMM_129";
};

&gpio4 {
	gpio-line-names = "",
			  "",
			  "",
			  "",
			  "",
			  "SODIMM_168",
			  "",
			  "",
			  "",
			  "",
			  "SODIMM_184",
			  "SODIMM_186",
			  "HDMI_15",
			  "HDMI_16",
			  "SODIMM_178",
			  "SODIMM_188",
			  "SODIMM_56",
			  "SODIMM_44",
			  "SODIMM_68",
			  "SODIMM_82",
			  "SODIMM_24",
			  "SODIMM_76",
			  "SODIMM_70",
			  "SODIMM_60",
			  "SODIMM_58",
			  "SODIMM_78",
			  "SODIMM_72",
			  "SODIMM_80",
			  "SODIMM_46",
			  "SODIMM_62",
			  "SODIMM_48",
			  "SODIMM_74";
};

&gpio5 {
	gpio-line-names = "SODIMM_95",
			  "",
			  "SODIMM_86",
			  "",
			  "SODIMM_65",
			  "SODIMM_50",
			  "SODIMM_52",
			  "SODIMM_54",
			  "SODIMM_66",
			  "SODIMM_64",
			  "SODIMM_57",
			  "SODIMM_61",
			  "SODIMM_136",
			  "SODIMM_138",
			  "SODIMM_140",
			  "SODIMM_142",
			  "SODIMM_144",
			  "SODIMM_146",
			  "SODIMM_172",
			  "SODIMM_170",
			  "SODIMM_149",
			  "SODIMM_151",
			  "SODIMM_153",
			  "SODIMM_155",
			  "SODIMM_157",
			  "SODIMM_159",
			  "SODIMM_161",
			  "SODIMM_163",
			  "SODIMM_33",
			  "SODIMM_35",
			  "SODIMM_165",
			  "SODIMM_167";
};

&gpio6 {
	gpio-line-names = "SODIMM_169",
			  "SODIMM_171",
			  "SODIMM_173",
			  "SODIMM_175",
			  "SODIMM_177",
			  "SODIMM_179",
			  "SODIMM_85",
			  "SODIMM_166",
			  "SODIMM_160",
			  "SODIMM_162",
			  "SODIMM_158",
			  "SODIMM_164",
			  "",
			  "",
			  "SODIMM_156",
			  "SODIMM_75",
			  "SODIMM_154",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "SODIMM_152";
};

&gpio7 {
	gpio-line-names = "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "SODIMM_19",
			  "SODIMM_21",
			  "",
			  "SODIMM_137";
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hdmi_ddc>;
	status = "disabled";
};

/*
 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
 * touch screen controller
 */
&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c2>;
	pinctrl-1 = <&pinctrl_i2c2_gpio>;
	scl-gpios = <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	status = "okay";

	pmic: pmic@8 {
		compatible = "fsl,pfuze100";
		fsl,pmic-stby-poweroff;
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <1875000>;
				regulator-min-microvolt = <300000>;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <1875000>;
				regulator-min-microvolt = <300000>;
				regulator-ramp-delay = <6250>;
			};

			sw3a_reg: sw3a {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <1975000>;
				regulator-min-microvolt = <400000>;
			};

			swbst_reg: swbst {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <5150000>;
				regulator-min-microvolt = <5000000>;
			};

			snvs_reg: vsnvs {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <3000000>;
				regulator-min-microvolt = <1000000>;
			};

			vref_reg: vrefddr {
				regulator-always-on;
				regulator-boot-on;
			};

			/* vgen1: unused */

			vgen2_reg: vgen2 {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <1550000>;
				regulator-min-microvolt = <800000>;
			};

			/*
			 * +V3.3_1.8_SD1 coming off VGEN3 and supplying
			 * the i.MX 6 NVCC_SD1.
			 */
			vgen3_reg: vgen3 {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <3300000>;
				regulator-min-microvolt = <1800000>;
			};

			vgen4_reg: vgen4 {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <1800000>;
				regulator-min-microvolt = <1800000>;
			};

			vgen5_reg: vgen5 {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <3300000>;
				regulator-min-microvolt = <1800000>;
			};

			vgen6_reg: vgen6 {
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <3300000>;
				regulator-min-microvolt = <1800000>;
			};
		};
	};

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		clocks = <&clks IMX6QDL_CLK_CKO>;
		lrclk-strength = <3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sgtl5000>;
		reg = <0x0a>;
		#sound-dai-cells = <0>;
		VDDA-supply = <&reg_module_3v3_audio>;
		VDDIO-supply = <&reg_module_3v3>;
		VDDD-supply = <&vgen4_reg>;
	};

	/* STMPE811 touch screen controller */
	stmpe811@41 {
		compatible = "st,stmpe811";
		blocks = <0x5>;
		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio6>;
		interrupt-controller;
		id = <0>;
		irq-trigger = <0x1>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_touch_int>;
		reg = <0x41>;
		/* 3.25 MHz ADC clock speed */
		st,adc-freq = <1>;
		/* 12-bit ADC */
		st,mod-12b = <1>;
		/* internal ADC reference */
		st,ref-sel = <0>;
		/* ADC converstion time: 80 clocks */
		st,sample-time = <4>;

		stmpe_ts: stmpe_touchscreen {
			compatible = "st,stmpe-ts";
			/* 8 sample average control */
			st,ave-ctrl = <3>;
			/* 7 length fractional part in z */
			st,fraction-z = <7>;
			/*
			 * 50 mA typical 80 mA max touchscreen drivers
			 * current limit value
			 */
			st,i-drive = <1>;
			/* 1 ms panel driver settling time */
			st,settling = <3>;
			/* 5 ms touch detect interrupt delay */
			st,touch-det-delay = <5>;
			status = "disabled";
		};

		stmpe_adc: stmpe_adc {
			compatible = "st,stmpe-adc";
			/* forbid to use ADC channels 3-0 (touch) */
			st,norequest-mask = <0x0F>;
		};
	};
};

/*
 * I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
 */
&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c3>;
	pinctrl-1 = <&pinctrl_i2c3_gpio>;
	scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	status = "disabled";

	atmel_mxt_ts: touchscreen@4a {
		compatible = "atmel,maxtouch";
		interrupt-parent = <&gpio2>;
		interrupts = <24 IRQ_TYPE_EDGE_FALLING>;	/* SODIMM 107 */
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_atmel_conn>;
		reg = <0x4a>;
		reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;	/* SODIMM 106 */
		status = "disabled";
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&lcd_display_in>;
};

/* Colibri PWM<B> */
&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "disabled";
};

/* Colibri PWM<D> */
&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	status = "disabled";
};

/* Colibri PWM<A> */
&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "disabled";
};

/* Colibri PWM<C> */
&pwm4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "disabled";
};

/* Optional S/PDIF out on SODIMM 137 */
&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif>;
	status = "disabled";
};

&ssi1 {
	status = "okay";
};

/* Colibri UART_A */
&uart1 {
	fsl,dte-mode;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
	uart-has-rtscts;
	status = "disabled";
};

/* Colibri UART_B */
&uart2 {
	fsl,dte-mode;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2_dte>;
	uart-has-rtscts;
	status = "disabled";
};

/* Colibri UART_C */
&uart3 {
	fsl,dte-mode;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3_dte>;
	status = "disabled";
};

/* Colibri USBH */
&usbh1 {
	vbus-supply = <&reg_usb_host_vbus>;
};

/* Colibri USBC */
&usbotg {
	disable-over-current;
	dr_mode = "otg";
	extcon = <0>, <&extcon_usbc_det>;
	status = "disabled";
};

/* Colibri MMC */
&usdhc1 {
	cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
	bus-width = <4>;
	no-1-8-v;
	disable-wp;
	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
	pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
	pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_mmc_cd_sleep>;
	vmmc-supply = <&reg_module_3v3>;
	vqmmc-supply = <&vgen3_reg>;
	status = "disabled";
};

/* eMMC */
&usdhc3 {
	bus-width = <8>;
	no-1-8-v;
	non-removable;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	vqmmc-supply = <&reg_module_3v3>;
	status = "okay";
};

&weim {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_weim_sram  &pinctrl_weim_cs0
		     &pinctrl_weim_cs1   &pinctrl_weim_cs2
		     &pinctrl_weim_rdnwr &pinctrl_weim_npwe>;
	#address-cells = <2>;
	#size-cells = <1>;
	status = "disabled";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh_oc_1>;

	/* Atmel MXT touchsceen + Capacitive Touch Adapter */
	/* NOTE: This pin group conflicts with pin groups
	 * pinctrl_pwm1/pinctrl_pwm4. Don't use them simultaneously.
	 */
	pinctrl_atmel_adap: atmeladaptergrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__GPIO1_IO09   0xb0b1  /* SODIMM  28 */
			MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0xb0b1  /* SODIMM  30 */
		>;
	};

	/* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */
	/* NOTE: This pin group conflicts with pin groups pinctrl_weim_cs1 and
	 * pinctrl_weim_cs2. Don't use them simultaneously.
	 */
	pinctrl_atmel_conn: atmelconnectorgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_CS1__GPIO2_IO24  0xb0b1  /* SODIMM_107 */
			MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0xb0b1  /* SODIMM_106 */
		>;
	};

	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__AUD5_TXC	0x130b0
			MX6QDL_PAD_KEY_ROW0__AUD5_TXD	0x130b0
			MX6QDL_PAD_KEY_COL1__AUD5_TXFS	0x130b0
			MX6QDL_PAD_KEY_ROW1__AUD5_RXD	0x130b0
		>;
	};

	pinctrl_cam_mclk: cammclkgrp {
		fsl,pins = <
			/* Parallel Camera CAM sys_mclk */
			MX6QDL_PAD_NANDF_CS2__CCM_CLKO2	0x00b0
		>;
	};

	/* CSI pins used as GPIOs */
	pinctrl_csi_gpio_1: csigpio1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D18__GPIO3_IO18   0x1b0b0
			MX6QDL_PAD_EIM_A19__GPIO2_IO19   0x1b0b0
			MX6QDL_PAD_EIM_D29__GPIO3_IO29   0x130b0
			MX6QDL_PAD_EIM_A23__GPIO6_IO06   0x1b0b0
			MX6QDL_PAD_EIM_A20__GPIO2_IO18   0x1b0b0
			MX6QDL_PAD_EIM_A17__GPIO2_IO21   0x1b0b0
			MX6QDL_PAD_EIM_A18__GPIO2_IO20   0x1b0b0
			MX6QDL_PAD_EIM_EB3__GPIO2_IO31   0x1b0b0
			MX6QDL_PAD_EIM_D17__GPIO3_IO17   0x1b0b0
			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
			MX6QDL_PAD_SD2_CMD__GPIO1_IO11   0x1b0b0
			MX6QDL_PAD_SD2_DAT0__GPIO1_IO15  0x1b0b0
		>;
	};

	pinctrl_csi_gpio_2: csigpio2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A24__GPIO5_IO04   0x1b0b0
		>;
	};

	pinctrl_ecspi4: ecspi4grp {
		fsl,pins = <
			/* SPI CS */
			MX6QDL_PAD_EIM_A25__GPIO5_IO02	0x000b1
			MX6QDL_PAD_EIM_D22__ECSPI4_MISO	0x100b1
			MX6QDL_PAD_EIM_D28__ECSPI4_MOSI	0x100b1
			MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	((1<<30) | 0x1b0b0)
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0
			MX6QDL_PAD_GPIO_8__FLEXCAN1_RX		0x1b0b0
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x1b0b0
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x1b0b0
		>;
	};

	pinctrl_gpio_1: gpio1grp {
		fsl,pins = <
			MX6QDL_PAD_DI0_PIN4__GPIO4_IO20     0x1b0b0
			MX6QDL_PAD_EIM_D27__GPIO3_IO27      0x1b0b0
			MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0
			MX6QDL_PAD_NANDF_D3__GPIO2_IO03     0x1b0b0
			MX6QDL_PAD_NANDF_D4__GPIO2_IO04     0x1b0b0
			MX6QDL_PAD_NANDF_D6__GPIO2_IO06     0x1b0b0
			MX6QDL_PAD_SD4_DAT0__GPIO2_IO08     0x1b0b0
			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11     0x1b0b0
		>;
	};
	pinctrl_gpio_2: gpio2grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__GPIO1_IO07       0x1b0b0
			MX6QDL_PAD_GPIO_8__GPIO1_IO08       0x1b0b0
		>;
	};

	pinctrl_gpio_bl_on: gpioblongrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D26__GPIO3_IO26		0x1b0b0
		>;
	};

	pinctrl_gpio_keys: gpiokeysgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A16__GPIO2_IO22		0x130b0
		>;
	};

	pinctrl_hdmi_ddc: hdmiddcgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
			MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
		>;
	};

	pinctrl_i2c2_gpio: i2c2gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1
			MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
		>;
	};

	pinctrl_i2c3_gpio: i2c3gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
			MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
		>;
	};

	pinctrl_ipu1_csi0: ipu1csi0grp { /* Parallel Camera */
		fsl,pins = <
			MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12	0xb0b1
			MX6QDL_PAD_EIM_A18__IPU1_CSI1_DATA13	0xb0b1
			MX6QDL_PAD_EIM_A19__IPU1_CSI1_DATA14	0xb0b1
			MX6QDL_PAD_EIM_A20__IPU1_CSI1_DATA15	0xb0b1
			MX6QDL_PAD_EIM_A21__IPU1_CSI1_DATA16	0xb0b1
			MX6QDL_PAD_EIM_A22__IPU1_CSI1_DATA17	0xb0b1
			MX6QDL_PAD_EIM_A23__IPU1_CSI1_DATA18	0xb0b1
			MX6QDL_PAD_EIM_A24__IPU1_CSI1_DATA19	0xb0b1
			MX6QDL_PAD_EIM_D17__IPU1_CSI1_PIXCLK	0xb0b1
			MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC	0xb0b1
			MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC	0xb0b1
			/* Disable PWM pins on camera interface */
			MX6QDL_PAD_GPIO_1__GPIO1_IO01		0x40
			MX6QDL_PAD_SD4_DAT1__GPIO2_IO09		0x40
		>;
	};

	pinctrl_ipu1_lcdif: ipu1lcdifgrp {
		fsl,pins = <
			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0xa1
			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0xa1
			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0xa1
			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0xa1
			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0xa1
			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0xa1
			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0xa1
			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0xa1
			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0xa1
			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0xa1
			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0xa1
			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0xa1
			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0xa1
			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0xa1
			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0xa1
			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0xa1
			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0xa1
			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0xa1
			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0xa1
			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0xa1
			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0xa1
			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0xa1
		>;
	};

	pinctrl_lvds_transceiver: lvdstxgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x03030 /* SODIMM  95 */
			MX6QDL_PAD_GPIO_7__GPIO1_IO07   0x0b030 /* SODIMM  55 */
			MX6QDL_PAD_GPIO_8__GPIO1_IO08   0x03030 /* SODIMM  63 */
			MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x03030 /* SODIMM  99 */
		>;
	};

	pinctrl_mic_gnd: micgndgrp {
		fsl,pins = <
			/* Controls Mic GND, PU or '1' pull Mic GND to GND */
			MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x1b0b0
		>;
	};

	pinctrl_mmc_cd: mmccdgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D5__GPIO2_IO05	0x1b0b1
		>;
	};

	pinctrl_mmc_cd_sleep: mmccdslpgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D5__GPIO2_IO05	0x0
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__PWM1_OUT	0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A21__GPIO2_IO17	0x00040
			MX6QDL_PAD_GPIO_1__PWM2_OUT	0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A22__GPIO2_IO16	0x00040
			MX6QDL_PAD_SD4_DAT1__PWM3_OUT	0x1b0b1
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT2__PWM4_OUT	0x1b0b1
		>;
	};

	pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp {
		fsl,pins = <
			/* SODIMM 129 / USBH_PEN */
			MX6QDL_PAD_EIM_D31__GPIO3_IO31	0x0f058
		>;
	};

	pinctrl_sgtl5000: sgtl5000grp {
		fsl,pins = <
			/* SGTL5000 sys_mclk */
			MX6QDL_PAD_GPIO_0__CCM_CLKO1	0x000b0
		>;
	};

	pinctrl_spdif: spdifgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
		>;
	};

	pinctrl_touch_int: gpiotouchintgrp {
		fsl,pins = <
			/* STMPE811 interrupt */
			MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 0x1b0b0
		>;
	};

	pinctrl_uart1_dce: uart1dcegrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
		>;
	};

	/* DTE mode */
	pinctrl_uart1_dte: uart1dtegrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
			MX6QDL_PAD_EIM_D19__UART1_RTS_B	0x1b0b1
			MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
		>;
	};

	/* Additional DTR, DSR, DCD */
	pinctrl_uart1_ctrl: uart1ctrlgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
			MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
			MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
		>;
	};

	pinctrl_uart2_dte: uart2dtegrp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT5__UART2_CTS_B	0x1b0b1
			MX6QDL_PAD_SD4_DAT6__UART2_RTS_B	0x1b0b1
			MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart3_dte: uart3dtegrp {
		fsl,pins = <
			MX6QDL_PAD_SD4_CLK__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_CMD__UART3_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbc_det: usbcdetgrp {
		fsl,pins = <
			/* SODIMM 137 / USBC_DET */
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b0
			/* USBC_DET_OVERWRITE */
			MX6QDL_PAD_RGMII_RXC__GPIO6_IO30	0x0f058
			/* USBC_DET_EN */
			MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26	0x0f058
		>;
	};

	pinctrl_usbc_id_1: usbcid1grp {
		fsl,pins = <
			/* USBC_ID */
			MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0
		>;
	};

	pinctrl_usbh_oc_1: usbhoc1grp {
		fsl,pins = <
			/* USBH_OC */
			MX6QDL_PAD_EIM_D30__GPIO3_IO30		0x1b0b0
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD	0x17071
			MX6QDL_PAD_SD1_CLK__SD1_CLK	0x10071
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0	0x17071
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1	0x17071
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2	0x17071
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3	0x17071
		>;
	};

	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x170b1
			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x100b1
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1
		>;
	};

	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x170f1
			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x100f1
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1
		>;
	};

	/* avoid backfeeding with removed card power */
	pinctrl_usdhc1_sleep: usdhc1sleepgrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD	0x3000
			MX6QDL_PAD_SD1_CLK__SD1_CLK	0x3000
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0	0x3000
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1	0x3000
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2	0x3000
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3	0x3000
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059
			/* eMMC reset */
			MX6QDL_PAD_SD3_RST__SD3_RESET	0x17059
		>;
	};

	pinctrl_weim_cs0: weimcs0grp {
		fsl,pins = <
			/* nEXT_CS0 */
			MX6QDL_PAD_EIM_CS0__EIM_CS0_B	0xb0b1
		>;
	};

	pinctrl_weim_cs1: weimcs1grp {
		fsl,pins = <
			/* nEXT_CS1 */
			MX6QDL_PAD_EIM_CS1__EIM_CS1_B	0xb0b1
		>;
	};

	pinctrl_weim_cs2: weimcs2grp {
		fsl,pins = <
			/* nEXT_CS2 */
			MX6QDL_PAD_SD2_DAT1__EIM_CS2_B	0xb0b1
		>;
	};

	/* ADDRESS[16:18] [25] used as GPIO */
	pinctrl_weim_gpio_1: weimgpio1grp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x1b0b0
			MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16	0x1b0b0
			MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x1b0b0
			MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x1b0b0
			MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	0x1b0b0
			MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x1b0b0
			MX6QDL_PAD_KEY_COL2__GPIO4_IO10		0x1b0b0
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11		0x1b0b0
			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
		>;
	};

	/* ADDRESS[19:24] used as GPIO */
	pinctrl_weim_gpio_2: weimgpio2grp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x1b0b0
			MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	0x1b0b0
			MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x1b0b0
			MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x1b0b0
			MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16	0x1b0b0
			MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x1b0b0
			MX6QDL_PAD_KEY_COL2__GPIO4_IO10		0x1b0b0
			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11		0x1b0b0
			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
		>;
	};

	/* DATA[16:31] used as GPIO */
	pinctrl_weim_gpio_3: weimgpio3grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19	0x1b0b0
			MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18	0x1b0b0
			MX6QDL_PAD_EIM_LBA__GPIO2_IO27		0x1b0b0
			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0x1b0b0
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0
			MX6QDL_PAD_GPIO_5__GPIO1_IO05		0x1b0b0
			MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0
			MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x1b0b0
			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x1b0b0
			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x1b0b0
			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x1b0b0
			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x1b0b0
			MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	0x1b0b0
			MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	0x1b0b0
		>;
	};

	/* DQM[0:3] used as GPIO */
	pinctrl_weim_gpio_4: weimgpio4grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0x1b0b0
			MX6QDL_PAD_EIM_EB1__GPIO2_IO29		0x1b0b0
			MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0
			MX6QDL_PAD_SD2_DAT2__GPIO1_IO13		0x1b0b0
		>;
	};

	/* RDY used as GPIO */
	pinctrl_weim_gpio_5: weimgpio5grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_WAIT__GPIO5_IO00		0x1b0b0
		>;
	};

	/* ADDRESS[16] DATA[30] used as GPIO */
	pinctrl_weim_gpio_6: weimgpio6grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
		>;
	};

	pinctrl_weim_npwe: weimnpwegrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_TD2__GPIO6_IO22	0x130b0
			MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x0040
		>;
	};

	pinctrl_weim_sram: weimsramgrp {
		fsl,pins = <
			/* Data */
			MX6QDL_PAD_CSI0_DAT4__EIM_DATA02	0x1b0b0
			MX6QDL_PAD_CSI0_DAT5__EIM_DATA03	0x1b0b0
			MX6QDL_PAD_CSI0_DAT6__EIM_DATA04	0x1b0b0
			MX6QDL_PAD_CSI0_DAT7__EIM_DATA05	0x1b0b0
			MX6QDL_PAD_CSI0_DAT8__EIM_DATA06	0x1b0b0
			MX6QDL_PAD_CSI0_DAT9__EIM_DATA07	0x1b0b0
			MX6QDL_PAD_CSI0_DAT12__EIM_DATA08	0x1b0b0
			MX6QDL_PAD_CSI0_DAT13__EIM_DATA09	0x1b0b0
			MX6QDL_PAD_CSI0_DAT14__EIM_DATA10	0x1b0b0
			MX6QDL_PAD_CSI0_DAT15__EIM_DATA11	0x1b0b0
			MX6QDL_PAD_CSI0_DAT16__EIM_DATA12	0x1b0b0
			MX6QDL_PAD_CSI0_DAT17__EIM_DATA13	0x1b0b0
			MX6QDL_PAD_CSI0_DAT18__EIM_DATA14	0x1b0b0
			MX6QDL_PAD_CSI0_DAT19__EIM_DATA15	0x1b0b0
			MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00	0x1b0b0
			MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01	0x1b0b0
			/* Address */
			MX6QDL_PAD_EIM_DA0__EIM_AD00		0xb0b1
			MX6QDL_PAD_EIM_DA1__EIM_AD01		0xb0b1
			MX6QDL_PAD_EIM_DA2__EIM_AD02		0xb0b1
			MX6QDL_PAD_EIM_DA3__EIM_AD03		0xb0b1
			MX6QDL_PAD_EIM_DA4__EIM_AD04		0xb0b1
			MX6QDL_PAD_EIM_DA5__EIM_AD05		0xb0b1
			MX6QDL_PAD_EIM_DA6__EIM_AD06		0xb0b1
			MX6QDL_PAD_EIM_DA7__EIM_AD07		0xb0b1
			MX6QDL_PAD_EIM_DA8__EIM_AD08		0xb0b1
			MX6QDL_PAD_EIM_DA9__EIM_AD09		0xb0b1
			MX6QDL_PAD_EIM_DA10__EIM_AD10		0xb0b1
			MX6QDL_PAD_EIM_DA11__EIM_AD11		0xb0b1
			MX6QDL_PAD_EIM_DA12__EIM_AD12		0xb0b1
			MX6QDL_PAD_EIM_DA13__EIM_AD13		0xb0b1
			MX6QDL_PAD_EIM_DA14__EIM_AD14		0xb0b1
			MX6QDL_PAD_EIM_DA15__EIM_AD15		0xb0b1
			/* Ctrl */
			MX6QDL_PAD_EIM_OE__EIM_OE_B		0xb0b1
			MX6QDL_PAD_EIM_RW__EIM_RW		0xb0b1
		>;
	};

	pinctrl_weim_rdnwr: weimrdnwrgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_TD3__GPIO6_IO23	0x130b0
			MX6QDL_PAD_SD2_CLK__GPIO1_IO10		0x0040
		>;
	};
};


code:
/*
 * Copyright (C) 2014 Russell King
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	/* Will be filled by the bootloader */
	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0>;
	};

	ir_recv: ir-receiver {
		compatible = "gpio-ir-receiver";
		gpios = <&gpio3 9 1>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_cubox_i_ir>;
	};

	led-controller {
		compatible = "pwm-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_cubox_i_pwm1>;

		led-1 {
			active-low;
			label = "imx6:red:front";
			max-brightness = <248>;
			pwms = <&pwm1 0 50000>;
		};
	};

	v_5v0: regulator-v-5v0 {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_5v0";
	};

	v_usb2: regulator-v-usb2 {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_cubox_i_usbh1_vbus>;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_usb2";
		vin-supply = <&v_5v0>;
	};

	v_usb1: regulator-v-usb1 {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_cubox_i_usbotg_vbus>;
		regulator-max-microvolt = <5000000>;
		regulator-min-microvolt = <5000000>;
		regulator-name = "v_usb1";
		vin-supply = <&v_5v0>;
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "Integrated SPDIF";
		/* IMX6 doesn't implement this yet */
		spdif-controller = <&spdif>;
		spdif-out;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&pinctrl_gpio_key>;
		pinctrl-names = "default";

		button_0 {
			label = "Button 0";
			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};
	};
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cubox_i_hdmi>;
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cubox_i_i2c2>;
	status = "okay";
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cubox_i_i2c3>;

	status = "okay";

	rtc@68 {
		compatible = "nxp,pcf8523";
		reg = <0x68>;
	};
};

&iomuxc {
	cubox_i {
		pinctrl_cubox_i_hdmi: cubox-i-hdmi {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
			>;
		};

		pinctrl_cubox_i_i2c2: cubox-i-i2c2 {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
			>;
		};

		pinctrl_cubox_i_i2c3: cubox-i-i2c3 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
			>;
		};

		pinctrl_cubox_i_ir: cubox-i-ir {
			fsl,pins = <
				MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
			>;
		};

		pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {
			fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0>;
		};

		pinctrl_cubox_i_spdif: cubox-i-spdif {
			fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
		};

		pinctrl_cubox_i_usbh1: cubox-i-usbh1 {
			fsl,pins = <MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0>;
		};

		pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus {
			fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
		};

		pinctrl_cubox_i_usbotg: cubox-i-usbotg {
			/*
			 * The Cubox-i pulls ID low, but as it's pointless
			 * leaving it as a pull-up, even if it is just 10uA.
			 */
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
				MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
			>;
		};

		pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
			fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
		};

		pinctrl_cubox_i_usdhc2_aux: cubox-i-usdhc2-aux {
			fsl,pins = <
				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071
				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
			>;
		};

		pinctrl_cubox_i_usdhc2: cubox-i-usdhc2 {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
			>;
		};

		pinctrl_gpio_key: gpio-key {
			fsl,pins = <
				MX6QDL_PAD_EIM_DA8__GPIO3_IO08	0x17059
			>;
		};
	};
};

&pwm1 {
	#pwm-cells = <2>;
	status = "okay";
};

&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cubox_i_spdif>;
	status = "okay";
};

&usbh1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cubox_i_usbh1>;
	vbus-supply = <&v_usb2>;
	status = "okay";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cubox_i_usbotg>;
	vbus-supply = <&v_usb1>;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>;
	vmmc-supply = <&vcc_3v3>;
	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&vcc_3v3 {
	vin-supply = <&v_5v0>;
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/gpio/gpio.h>

/ {
	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		dummy_reg: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "dummy-supply";
		};

		reg_usb_otg_vbus: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 0>;
			enable-active-high;
		};
	};

	chosen {
		stdout-path = &uart1;
	};
};

&ecspi3 {
	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	status = "okay";

	flash: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "sst,sst25vf040b", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	status = "okay";
	phy-mode = "rgmii";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6qdl-dfi-fs700-m60 {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
				MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC irq */
				MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* MAX11801 irq */
				MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000030b0 /* Backlight enable */
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* card detect */
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
			>;
		};

		pinctrl_ecspi3: ecspi3grp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
				MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
				MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
				MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
			>;
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	dr_mode = "host";
	status = "okay";
};

&usdhc2 { /* module slot */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&usdhc3 { /* baseboard slot */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
};

&usdhc4 { /* eMMC */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <8>;
	non-removable;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2021 DH electronics GmbH
 */

/ {
	chosen {
		stdout-path = "serial0:115200n8";
	};
};

/*
 * Special SoM hardware required which uses the pins from micro SD card. The
 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
 * card must be disabled and the uart1 rts/cts must be output on other DHCOM
 * pins, see uart1 and usdhc3 node below.
 */
&can2 {
	status = "okay";
};

&gpio1 {
	/*
	 * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
	 * GPIO line, however the i.MX6 UART driver assumes RX happens
	 * during TX anyway and that it only controls drive enable DE
	 * line. Hence, the RX is always enabled here.
	 */
	rs485-rx-en-hog {
		gpio-hog;
		gpios = <18 0>; /* GPIO Q */
		line-name = "rs485-rx-en";
		output-low;
	};
};

&gpio3 {
	gpio-line-names =
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "",
		"", "", "", "DRC02-In1", "", "", "", "";
};

&gpio4 {
	gpio-line-names =
		"", "", "", "", "", "DHCOM-E", "DRC02-In2", "DHCOM-H",
		"DHCOM-I", "DRC02-HW0", "", "", "", "", "", "",
		"", "", "", "", "DRC02-Out1", "", "", "",
		"", "", "", "", "", "", "", "";
};

&gpio6 {
	gpio-line-names =
		"", "", "", "DRC02-Out2", "", "", "SOM-HW1", "",
		"", "", "", "", "", "", "DRC02-HW2", "DRC02-HW1",
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "";
};

&i2c1 {
	eeprom@50 {
		compatible = "atmel,24c04";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&uart1 {
	/*
	 * Due to the use of can2 the signals for can2 Tx and Rx are routed to
	 * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
	 * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts.
	 */
	/delete-property/ uart-has-rtscts;
	cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */
	pinctrl-0 = <&pinctrl_uart1 &pinctrl_dhcom_i &pinctrl_dhcom_m>;
	pinctrl-names = "default";
	rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
};

&uart5 {
	/*
	 * On DRC02 this UART is used as RS485 interface and RS485_TX_En is
	 * controlled by DHCOM GPIO P. So remove rts/cts pins and the property
	 * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via
	 * rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1
	 * node above.
	 */
	/delete-property/ uart-has-rtscts;
	linux,rs485-enabled-at-boot-time;
	pinctrl-0 = <&pinctrl_uart5_core &pinctrl_dhcom_p &pinctrl_dhcom_q>;
	pinctrl-names = "default";
	rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
};

&usbh1 {
	disable-over-current;
};

&usdhc2 { /* SD card */
	status = "okay";
};

&usdhc3 {
	/*
	 * Due to the use of can2 the micro SD card on module have to be
	 * disabled, because the pins SD3_DAT0 and SD3_DAT1 are muxed as
	 * can2 Tx and Rx.
	 */
	status = "disabled";
};

&iomuxc {
	pinctrl-0 = <
			/*
			 * The following DHCOM GPIOs are used on this board.
			 * Therefore, they have been removed from the list below.
			 * I: uart1 rts
			 * M: uart1 cts
			 * P: uart5 rs485-tx-en
			 * Q: uart5 rs485-rx-en
			 */
			&pinctrl_hog_base
			&pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
			&pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
			&pinctrl_dhcom_g &pinctrl_dhcom_h
			&pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
			&pinctrl_dhcom_n &pinctrl_dhcom_o
			&pinctrl_dhcom_r
			&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
			&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
		>;
	pinctrl-names = "default";

	pinctrl_uart5_core: uart5-core-grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA	0x1b0b1
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2015-2021 DH electronics GmbH
 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>

/ {
	chosen {
		stdout-path = "serial0:115200n8";
	};

	clk_ext_audio_codec: clock-codec {
		#clock-cells = <0>;
		clock-frequency = <24000000>;
		compatible = "fixed-clock";
	};

	display_bl: display-bl {
		brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
		compatible = "pwm-backlight";
		default-brightness-level = <8>;
		enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */
		pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
		status = "okay";
	};

	lcd_display: disp0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,imx-parallel-display";
		interface-pix-fmt = "rgb24";
		pinctrl-0 = <&pinctrl_ipu1_lcdif &pinctrl_dhcom_g>;
		pinctrl-names = "default";
		status = "okay";

		port@0 {
			reg = <0>;

			lcd_display_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			lcd_display_out: endpoint {
				remote-endpoint = <&lcd_panel_in>;
			};
		};
	};

	gpio-keys {
		#size-cells = <0>;
		compatible = "gpio-keys";

		button-0 {
			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */
			label = "TA1-GPIO-A";
			linux,code = <KEY_A>;
			pinctrl-0 = <&pinctrl_dhcom_a>;
			pinctrl-names = "default";
			wakeup-source;
		};

		button-1 {
			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */
			label = "TA2-GPIO-B";
			linux,code = <KEY_B>;
			pinctrl-0 = <&pinctrl_dhcom_b>;
			pinctrl-names = "default";
			wakeup-source;
		};

		button-2 {
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */
			label = "TA3-GPIO-C";
			linux,code = <KEY_C>;
			pinctrl-0 = <&pinctrl_dhcom_c>;
			pinctrl-names = "default";
			wakeup-source;
		};

		button-3 {
			gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */
			label = "TA4-GPIO-D";
			linux,code = <KEY_D>;
			pinctrl-0 = <&pinctrl_dhcom_d>;
			pinctrl-names = "default";
			wakeup-source;
		};
	};

	led {
		compatible = "gpio-leds";

		/*
		 * Disable led-5, because GPIO E is
		 * already used as touch interrupt.
		 */
		led-5 {
			color = <LED_COLOR_ID_GREEN>;
			default-state = "off";
			function = LED_FUNCTION_INDICATOR;
			gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */
			pinctrl-0 = <&pinctrl_dhcom_e>;
			pinctrl-names = "default";
			status = "disabled";
		};

		led-6 {
			color = <LED_COLOR_ID_GREEN>;
			default-state = "off";
			function = LED_FUNCTION_INDICATOR;
			gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; /* GPIO F */
			pinctrl-0 = <&pinctrl_dhcom_f>;
			pinctrl-names = "default";
		};

		led-7 {
			color = <LED_COLOR_ID_GREEN>;
			default-state = "off";
			function = LED_FUNCTION_INDICATOR;
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* GPIO H */
			pinctrl-0 = <&pinctrl_dhcom_h>;
			pinctrl-names = "default";
		};

		led-8 {
			color = <LED_COLOR_ID_GREEN>;
			default-state = "off";
			function = LED_FUNCTION_INDICATOR;
			gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
			pinctrl-0 = <&pinctrl_dhcom_i>;
			pinctrl-names = "default";
		};
	};

	panel {
		backlight = <&display_bl>;
		compatible = "edt,etm0700g0edh6";

		port {
			lcd_panel_in: endpoint {
				remote-endpoint = <&lcd_display_out>;
			};
		};
	};

	sound {
		audio-codec = <&sgtl5000>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"LINE_IN", "Line In Jack",
			"Headphone Jack", "HP_OUT";
		compatible = "fsl,imx-audio-sgtl5000";
		model = "imx-sgtl5000";
		mux-ext-port = <3>;
		mux-int-port = <1>;
		ssi-controller = <&ssi1>;
	};
};

&audmux {
	pinctrl-0 = <&pinctrl_audmux_ext>;
	pinctrl-names = "default";
	status = "okay";
};

&can1 {
	status = "okay";
};

&can2 {
	status = "disabled";
};

/* 1G ethernet */
/delete-node/ &ethphy0;
&fec {
	phy-mode = "rgmii";
	phy-handle = <&ethphy7>;
	pinctrl-0 = <&pinctrl_enet_1G>;
	pinctrl-names = "default";
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy7: ethernet-phy@7 { /* KSZ 9021 */
			compatible = "ethernet-phy-ieee802.3-c22";
			interrupt-parent = <&gpio1>;
			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
			pinctrl-0 = <&pinctrl_ethphy7>;
			pinctrl-names = "default";
			reg = <7>;
			reset-assert-us = <1000>;
			reset-deassert-us = <1000>;
			reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
			rxc-skew-ps = <3000>;
			rxd0-skew-ps = <0>;
			rxd1-skew-ps = <0>;
			rxd2-skew-ps = <0>;
			rxd3-skew-ps = <0>;
			rxdv-skew-ps = <0>;
			txc-skew-ps = <3000>;
			txd0-skew-ps = <0>;
			txd1-skew-ps = <0>;
			txd2-skew-ps = <0>;
			txd3-skew-ps = <0>;
			txen-skew-ps = <0>;
		};
	};
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c2 {
	sgtl5000: codec@a {
		#sound-dai-cells = <0>;
		clocks = <&clk_ext_audio_codec>;
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		VDDA-supply = <&reg_3p3v>;
		VDDIO-supply = <&sw2_reg>;
	};

	touchscreen@38 {
		compatible = "edt,edt-ft5406";
		interrupt-parent = <&gpio4>;
		interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
		pinctrl-0 = <&pinctrl_dhcom_e>;
		pinctrl-names = "default";
		reg = <0x38>;
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&lcd_display_in>;
};

&pcie {
	pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
	reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */
	status = "okay";
};

&pwm1 {
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&usbh1 {
	disable-over-current;
};

&usdhc2 { /* SD card */
	status = "okay";
};

&iomuxc {
	pinctrl-0 = <
			/*
			 * The following DHCOM GPIOs are used on this board.
			 * Therefore, they have been removed from the list below.
			 * A: key TA1
			 * B: key TA2
			 * C: key TA3
			 * D: key TA4
			 * E: touchscreen
			 * F: led6
			 * G: backlight enable
			 * H: led7
			 * I: led8
			 * J: PCIe reset
			 */
			&pinctrl_hog_base
			&pinctrl_dhcom_k &pinctrl_dhcom_l
			&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
			&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
			&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
			&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
		>;
	pinctrl-names = "default";

	pinctrl_audmux_ext: audmux-ext-grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
		>;
	};

	pinctrl_enet_1G: enet-1G-grp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x100b0
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x100b0
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x100b0
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x100b0
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x100b0
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x100b0
		>;
	};

	pinctrl_ethphy7: ethphy7-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D26__GPIO3_IO26		0xb1 /* WOL */
			MX6QDL_PAD_EIM_D29__GPIO3_IO29		0xb0 /* Reset */
			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0xb1 /* Int */
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2021 DH electronics GmbH
 */

#include <dt-bindings/leds/common.h>

/ {
	chosen {
		stdout-path = "serial0:115200n8";
	};

	led {
		compatible = "gpio-leds";

		led-0 {
			color = <LED_COLOR_ID_YELLOW>;
			default-state = "off";
			function = LED_FUNCTION_INDICATOR;
			gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
			pinctrl-0 = <&pinctrl_dhcom_i>;
			pinctrl-names = "default";
		};
	};
};

&gpio1 {
	gpio-line-names =
		"", "", "DHCOM-A", "", "DHCOM-B", "PicoITX-In2", "", "",
		"", "", "", "", "", "", "", "",
		"DHCOM-R", "DHCOM-S", "DHCOM-Q", "DHCOM-T", "DHCOM-U", "", "", "",
		"", "", "", "", "", "", "", "";
};

&gpio4 {
	gpio-line-names =
		"", "", "", "", "", "PicoITX-In1", "DHCOM-INT", "DHCOM-H",
		"DHCOM-I", "PicoITX-HW2", "", "", "", "", "", "",
		"", "", "", "", "PicoITX-Out1", "", "", "",
		"", "", "", "", "", "", "", "";
};

&gpio6 {
	gpio-line-names =
		"", "", "", "PicoITX-Out2", "", "", "SOM-HW1", "",
		"", "", "", "", "", "", "PicoITX-HW0", "PicoITX-HW1",
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "";
};

&iomuxc {
	pinctrl-0 = <
			/*
			 * The following DHCOM GPIOs are used on this board.
			 * Therefore, they have been removed from the list below.
			 * I: yellow led
			 */
			&pinctrl_hog_base
			&pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
			&pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
			&pinctrl_dhcom_g &pinctrl_dhcom_h
			&pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
			&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
			&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
			&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
			&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
		>;
	pinctrl-names = "default";
};


code:
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2015-2021 DH electronics GmbH
 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
 */

#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/input/input.h>

/ {
	aliases {
		i2c0 = &i2c2;
		i2c1 = &i2c1;
		i2c2 = &i2c3;
		mmc0 = &usdhc2;
		mmc1 = &usdhc3;
		mmc2 = &usdhc4;
		mmc3 = &usdhc1;
		rtc0 = &rtc_i2c;
		rtc1 = &snvs_rtc;
		serial0 = &uart1;
		serial1 = &uart5;
		serial2 = &uart4;
		serial3 = &uart2;
		serial4 = &uart3;
	};

	memory@10000000 { /* Appropriate memory size will be filled by U-Boot */
		device_type = "memory";
		reg = <0x10000000 0x20000000>;
	};

	reg_3p3v: regulator-3P3V {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-name = "3P3V";
	};

	reg_eth_vio: regulator-eth-vio {
		compatible = "regulator-fixed";
		gpio = <&gpio1 7 0>;
		pinctrl-0 = <&pinctrl_enet_vio>;
		pinctrl-names = "default";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-name = "eth_vio";
		vin-supply = <&sw2_reg>;
	};

	/* OE pin of the latch is low active */
	reg_latch_oe_on: regulator-latch-oe-on {
		compatible = "regulator-fixed";
		gpio = <&gpio3 22 0>;
		regulator-always-on;
		regulator-name = "latch_oe_on";
	};

	reg_usb_h1_vbus: regulator-usb-h1-vbus {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio3 31 0>;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-name = "usb_h1_vbus";
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-name = "usb_otg_vbus";
	};
};

&can1 {
	pinctrl-0 = <&pinctrl_flexcan1>;
	pinctrl-names = "default";
	status = "okay";
};

/*
 * Special SoM hardware required which uses the pins from micro SD card. The
 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. So to enable can2 on
 * the board device tree file, the micro SD card must be disabled and the uart1
 * rts/cts must be disabled or output on other DHCOM pins.
 */
&can2 {
	pinctrl-0 = <&pinctrl_flexcan2>;
	pinctrl-names = "default";
	status = "disabled";
};

&ecspi1 {
	cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio4 11 GPIO_ACTIVE_LOW>;
	pinctrl-0 = <&pinctrl_ecspi1>;
	pinctrl-names = "default";
	status = "okay";

	flash@0 { /* S25FL116K */
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		m25p,fast-read;
		reg = <0>;
		spi-max-frequency = <50000000>;
	};
};

&ecspi2 {
	cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
	pinctrl-0 = <&pinctrl_ecspi2>;
	pinctrl-names = "default";
	status = "disabled";
};

&fec {
	phy-mode = "rmii";
	phy-handle = <&ethphy0>;
	pinctrl-0 = <&pinctrl_enet_100M>;
	pinctrl-names = "default";
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */
			compatible = "ethernet-phy-id0007.c0f0",
				     "ethernet-phy-ieee802.3-c22";
			interrupt-parent = <&gpio4>;
			interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
			pinctrl-0 = <&pinctrl_ethphy0>;
			pinctrl-names = "default";
			reg = <0>;
			reset-assert-us = <500>;
			reset-deassert-us = <500>;
			reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
			smsc,disable-energy-detect; /* Make plugin detection reliable */
		};
	};
};

&gpio1 {
	gpio-line-names =
		"", "", "DHCOM-A", "", "DHCOM-B", "DHCOM-C", "", "",
		"", "", "", "", "", "", "", "",
		"DHCOM-R", "DHCOM-S", "DHCOM-Q", "DHCOM-T", "DHCOM-U", "", "", "",
		"", "", "", "", "", "", "", "";
};

&gpio2 {
	gpio-line-names =
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "",
		"SOM-HW2", "", "", "SOM-HW0", "", "SOM-MEM1", "SOM-MEM0", "",
		"", "", "", "", "", "", "", "";
};

&gpio3 {
	gpio-line-names =
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "",
		"", "", "", "DHCOM-G", "", "", "", "";
};

&gpio4 {
	gpio-line-names =
		"", "", "", "", "", "DHCOM-E", "DHCOM-INT", "DHCOM-H",
		"DHCOM-I", "DHCOM-L", "", "", "", "", "", "",
		"", "", "", "", "DHCOM-F", "", "", "",
		"", "", "", "", "", "", "", "";
};

&gpio5 {
	gpio-line-names =
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "",
		"", "", "DHCOM-V", "DHCOM-W", "", "DHCOM-O", "", "",
		"", "", "", "", "", "", "", "";
};

&gpio6 {
	gpio-line-names =
		"", "", "", "DHCOM-D", "", "", "SOM-HW1", "",
		"", "", "", "", "", "", "DHCOM-J", "DHCOM-K",
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "";
};

&gpio7 {
	gpio-line-names =
		"DHCOM-M", "DHCOM-N", "", "", "", "", "", "",
		"", "", "", "", "", "DHCOM-P", "", "",
		"", "", "", "", "", "", "", "",
		"", "", "", "", "", "", "", "";
};

&i2c1 {
	/*
	 * Info: According to erratum ERR007805 clock frequency limit is 375000.
	 * The erratum for i.MX6S/DL is here [1] and for i.MX6Q/D is here [2].
	 * [1] https://www.nxp.com/docs/en/errata/IMX6SDLCE.pdf
	 * [2] https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
	 */
	clock-frequency = <100000>;
	pinctrl-0 = <&pinctrl_i2c1>;
	pinctrl-1 = <&pinctrl_i2c1_gpio>;
	pinctrl-names = "default", "gpio";
	scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	status = "okay";
};

&i2c2 {
	/* Info: Clock frequency limit is 375000 (for details see i2c1) */
	clock-frequency = <100000>;
	pinctrl-0 = <&pinctrl_i2c2>;
	pinctrl-1 = <&pinctrl_i2c2_gpio>;
	pinctrl-names = "default", "gpio";
	scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	status = "okay";
};

&i2c3 {
	/* Info: Clock frequency limit is 375000 (for details see i2c1) */
	clock-frequency = <100000>;
	pinctrl-0 = <&pinctrl_i2c3>;
	pinctrl-1 = <&pinctrl_i2c3_gpio>;
	pinctrl-names = "default", "gpio";
	scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	status = "okay";

	ltc3676: pmic@3c {
		compatible = "lltc,ltc3676";
		interrupt-parent = <&gpio5>;
		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
		pinctrl-0 = <&pinctrl_pmic>;
		pinctrl-names = "default";
		reg = <0x3c>;

		regulators {
			sw1_reg: sw1 {
				lltc,fb-voltage-divider = <100000 110000>;
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <1527272>;
				regulator-min-microvolt = <787500>;
				regulator-ramp-delay = <7000>;
				regulator-suspend-mem-microvolt = <1040000>;
			};

			sw2_reg: sw2 {
				lltc,fb-voltage-divider = <100000 28000>;
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <3657142>;
				regulator-min-microvolt = <1885714>;
				regulator-ramp-delay = <7000>;
			};

			sw3_reg: sw3 {
				lltc,fb-voltage-divider = <100000 110000>;
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <1527272>;
				regulator-min-microvolt = <787500>;
				regulator-ramp-delay = <7000>;
				regulator-suspend-mem-microvolt = <980000>;
			};

			sw4_reg: sw4 {
				lltc,fb-voltage-divider = <100000 93100>;
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <1659291>;
				regulator-min-microvolt = <855571>;
				regulator-ramp-delay = <7000>;
			};

			ldo1_reg: ldo1 {
				lltc,fb-voltage-divider = <102000 29400>;
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <3240306>;
				regulator-min-microvolt = <3240306>;
			};

			ldo2_reg: ldo2 {
				lltc,fb-voltage-divider = <100000 41200>;
				regulator-always-on;
				regulator-boot-on;
				regulator-max-microvolt = <2484708>;
				regulator-min-microvolt = <2484708>;
			};
		};
	};

	touchscreen@49 { /* TSC2004 */
		compatible = "ti,tsc2004";
		interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
		pinctrl-0 = <&pinctrl_tsc2004>;
		pinctrl-names = "default";
		reg = <0x49>;
		vio-supply = <&reg_3p3v>;
		status = "disabled";
	};

	eeprom@50 {
		compatible = "atmel,24c02";
		pagesize = <16>;
		reg = <0x50>;
	};

	rtc_i2c: rtc@56 {
		compatible = "microcrystal,rv3029";
		interrupt-parent = <&gpio7>;
		interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
		pinctrl-0 = <&pinctrl_rtc>;
		pinctrl-names = "default";
		reg = <0x56>;
	};
};

&pcie {
	pinctrl-0 = <&pinctrl_pcie>;
	pinctrl-names = "default";
};

&pwm1 {
	pinctrl-0 = <&pinctrl_pwm1>;
	pinctrl-names = "default";
};

&reg_arm {
	vin-supply = <&sw3_reg>;
};

&reg_pu {
	vin-supply = <&sw1_reg>;
};

&reg_soc {
	vin-supply = <&sw1_reg>;
};

&reg_vdd1p1 {
	vin-supply = <&sw2_reg>;
};

&reg_vdd2p5 {
	vin-supply = <&sw2_reg>;
};

&uart1 { /* DHCOM UART1 */
	dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
	dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
	dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
	rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
	pinctrl-0 = <&pinctrl_uart1>;
	pinctrl-names = "default";
	uart-has-rtscts;
	status = "okay";
};

&uart4 { /* DHCOM UART3 */
	pinctrl-0 = <&pinctrl_uart4>;
	pinctrl-names = "default";
	status = "okay";
};

&uart5 { /* DHCOM UART2 */
	pinctrl-0 = <&pinctrl_uart5>;
	pinctrl-names = "default";
	uart-has-rtscts;
	status = "okay";
};

&usbh1 {
	dr_mode = "host";
	pinctrl-0 = <&pinctrl_usbh1>;
	pinctrl-names = "default";
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	disable-over-current;
	dr_mode = "otg";
	pinctrl-0 = <&pinctrl_usbotg>;
	pinctrl-names = "default";
	vbus-supply = <&reg_usb_otg_vbus>;
	status = "okay";
};

&usdhc2 { /* External SD card via DHCOM */
	cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
	keep-power-in-suspend;
	pinctrl-0 = <&pinctrl_usdhc2>;
	pinctrl-names = "default";
	status = "disabled";
};

&usdhc3 { /* Micro SD card on module */
	cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
	fsl,wp-controller;
	keep-power-in-suspend;
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-names = "default";
	status = "okay";
};

&usdhc4 { /* eMMC on module */
	bus-width = <8>;
	keep-power-in-suspend;
	no-1-8-v;
	non-removable;
	pinctrl-0 = <&pinctrl_usdhc4>;
	pinctrl-names = "default";
	status = "okay";
};

&weim {
	#address-cells = <2>;
	#size-cells = <1>;
	fsl,weim-cs-gpr = <&gpr>;
	pinctrl-0 = <&pinctrl_weim &pinctrl_weim_cs0 &pinctrl_weim_cs1>;
	pinctrl-names = "default";
	/* It is necessary to setup 2x 64MB otherwise setting gpr fails */
	ranges = <0 0 0x08000000 0x04000000>, /* CS0 */
		 <1 0 0x0c000000 0x04000000>; /* CS1 */
	status = "disabled";
};

&iomuxc {
	pinctrl-0 = <
			&pinctrl_hog_base
			&pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
			&pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
			&pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_i
			&pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
			&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
			&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
			&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
			&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
		>;
	pinctrl-names = "default";

	pinctrl_hog_base: hog-base-grp {
		fsl,pins = <
			/* GPIOs for memory coding */
			MX6QDL_PAD_EIM_A16__GPIO2_IO22		0x120b0
			MX6QDL_PAD_EIM_A17__GPIO2_IO21		0x120b0
			/* GPIOs for hardware coding */
			MX6QDL_PAD_EIM_A19__GPIO2_IO19		0x120b0
			MX6QDL_PAD_EIM_A22__GPIO2_IO16		0x120b0
			MX6QDL_PAD_EIM_A23__GPIO6_IO06		0x120b0
		>;
	};

	/* DHCOM GPIOs */
	pinctrl_dhcom_a: dhcom-a-grp {
		fsl,pins = <MX6QDL_PAD_GPIO_2__GPIO1_IO02	0x400120b0>;
	};

	pinctrl_dhcom_b: dhcom-b-grp {
		fsl,pins = <MX6QDL_PAD_GPIO_4__GPIO1_IO04	0x400120b0>;
	};

	pinctrl_dhcom_c: dhcom-c-grp {
		fsl,pins = <MX6QDL_PAD_GPIO_5__GPIO1_IO05	0x400120b0>;
	};

	pinctrl_dhcom_d: dhcom-d-grp {
		fsl,pins = <MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03	0x400120b0>;
	};

	pinctrl_dhcom_e: dhcom-e-grp {
		fsl,pins = <MX6QDL_PAD_GPIO_19__GPIO4_IO05	0x400120b0>;
	};

	pinctrl_dhcom_f: dhcom-f-grp {
		fsl,pins = <MX6QDL_PAD_DI0_PIN4__GPIO4_IO20	0x400120b0>;
	};

	pinctrl_dhcom_g: dhcom-g-grp {
		fsl,pins = <MX6QDL_PAD_EIM_D27__GPIO3_IO27	0x400120b0>;
	};

	pinctrl_dhcom_h: dhcom-h-grp {
		fsl,pins = <MX6QDL_PAD_KEY_ROW0__GPIO4_IO07	0x400120b0>;
	};

	pinctrl_dhcom_i: dhcom-i-grp {
		fsl,pins = <MX6QDL_PAD_KEY_COL1__GPIO4_IO08	0x400120b0>;
	};

	pinctrl_dhcom_j: dhcom-j-grp {
		fsl,pins = <MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x400120b0>;
	};

	pinctrl_dhcom_k: dhcom-k-grp {
		fsl,pins = <MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x400120b0>;
	};

	pinctrl_dhcom_l: dhcom-l-grp {
		fsl,pins = <MX6QDL_PAD_KEY_ROW1__GPIO4_IO09	0x400120b0>;
	};

	pinctrl_dhcom_m: dhcom-m-grp {
		fsl,pins = <MX6QDL_PAD_SD3_DAT5__GPIO7_IO00	0x400120b0>;
	};

	pinctrl_dhcom_n: dhcom-n-grp {
		fsl,pins = <MX6QDL_PAD_SD3_DAT4__GPIO7_IO01	0x400120b0>;
	};

	pinctrl_dhcom_o: dhcom-o-grp {
		fsl,pins = <MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x400120b0>;
	};

	pinctrl_dhcom_p: dhcom-p-grp {
		fsl,pins = <MX6QDL_PAD_GPIO_18__GPIO7_IO13	0x400120b0>;
	};

	pinctrl_dhcom_q: dhcom-q-grp {
		fsl,pins = <MX6QDL_PAD_SD1_CMD__GPIO1_IO18	0x400120b0>;
	};

	pinctrl_dhcom_r: dhcom-r-grp {
		fsl,pins = <MX6QDL_PAD_SD1_DAT0__GPIO1_IO16	0x400120b0>;
	};

	pinctrl_dhcom_s: dhcom-s-grp {
		fsl,pins = <MX6QDL_PAD_SD1_DAT1__GPIO1_IO17	0x400120b0>;
	};

	pinctrl_dhcom_t: dhcom-t-grp {
		fsl,pins = <MX6QDL_PAD_SD1_DAT2__GPIO1_IO19	0x400120b0>;
	};

	pinctrl_dhcom_u: dhcom-u-grp {
		fsl,pins = <MX6QDL_PAD_SD1_CLK__GPIO1_IO20	0x400120b0>;
	};

	pinctrl_dhcom_v: dhcom-v-grp {
		fsl,pins = <MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18	0x400120b0>;
	};

	pinctrl_dhcom_w: dhcom-w-grp {
		fsl,pins = <MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19	0x400120b0>;
	};

	pinctrl_dhcom_int: dhcom-int-grp {
		fsl,pins = <MX6QDL_PAD_KEY_COL0__GPIO4_IO06	0x400120b0>;
	};

	pinctrl_ecspi1: ecspi1-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
			MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0
			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11		0x1b0b0
		>;
	};

	pinctrl_ecspi2: ecspi2-grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK	0x100b1
			MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI	0x100b1
			MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO	0x100b1
			MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29	0x1b0b0
		>;
	};

	pinctrl_enet_100M: enet-100M-grp {
		fsl,pins = <
			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
		>;
	};

	pinctrl_enet_vio: enet-vio-grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x120b0
		>;
	};

	pinctrl_ethphy0: ethphy0-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_WAIT__GPIO5_IO00		0xb0 /* Reset */
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0xb1 /* Int */
		>;
	};

	pinctrl_flexcan1: flexcan1-grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_8__FLEXCAN1_RX		0x1b0b0
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0
		>;
	};

	pinctrl_flexcan2: flexcan2-grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX	0x1b0b0
			MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX	0x1b0b0
		>;
	};

	pinctrl_i2c1: i2c1-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c1_gpio: i2c1-gpio-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__GPIO3_IO21		0x4001b8b1
			MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2-grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c2_gpio: i2c2-gpio-grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3-grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3_gpio: i2c3-gpio-grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__GPIO1_IO03		0x4001b8b1
			MX6QDL_PAD_GPIO_6__GPIO1_IO06		0x4001b8b1
		>;
	};

	pinctrl_ipu1_lcdif: ipu1-lcdif-grp {
		fsl,pins = <
			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x38
			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x38
			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x38
			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x38
			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x38
			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x38
			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x38
			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x38
			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x38
			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x38
			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x38
			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x38
			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x38
			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x38
			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x38
			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x38
			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x38
			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x38
			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x38
			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x38
			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x38
			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x38
			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	0x38
			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	0x38
			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	0x38
			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	0x38
			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	0x38
			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	0x38
		>;
	};

	pinctrl_pcie: pcie-grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x1b0b1 /* Wake */
		>;
	};

	pinctrl_pmic: pmic-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0
		>;
	};

	pinctrl_pwm1: pwm1-grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1
		>;
	};

	pinctrl_rtc: rtc-grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x120b0
		>;
	};

	pinctrl_tsc2004: tsc2004-grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x120b0
		>;
	};

	pinctrl_uart1: uart1-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D19__UART1_CTS_B		0x4001b0b1
			MX6QDL_PAD_EIM_D20__UART1_RTS_B		0x1b0b1
			MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x4001b0b1
			MX6QDL_PAD_EIM_D24__GPIO3_IO24		0x4001b0b1
			MX6QDL_PAD_EIM_D25__GPIO3_IO25		0x4001b0b1
			MX6QDL_PAD_EIM_EB3__GPIO2_IO31		0x4001b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart4: uart4-grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5-grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B	0x1b0b1
			MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B	0x4001b0b1
		>;
	};

	pinctrl_usbh1: usbh1-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x120b0
			MX6QDL_PAD_EIM_D30__USB_H1_OC		0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotg-grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
		>;
	};

	pinctrl_usdhc2: usdhc2-grp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x120b0
			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
		>;
	};

	pinctrl_usdhc3: usdhc3-grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			MX6QDL_PAD_SD3_RST__GPIO7_IO08		0x120b0
		>;
	};

	pinctrl_usdhc4: usdhc4-grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
		>;
	};

	pinctrl_weim: weim-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_DA0__EIM_AD00		0xb0a6
			MX6QDL_PAD_EIM_DA1__EIM_AD01		0xb0a6
			MX6QDL_PAD_EIM_DA2__EIM_AD02		0xb0a6
			MX6QDL_PAD_EIM_DA3__EIM_AD03		0xb0a6
			MX6QDL_PAD_EIM_DA4__EIM_AD04		0xb0a6
			MX6QDL_PAD_EIM_DA5__EIM_AD05		0xb0a6
			MX6QDL_PAD_EIM_DA6__EIM_AD06		0xb0a6
			MX6QDL_PAD_EIM_DA7__EIM_AD07		0xb0a6
			MX6QDL_PAD_EIM_DA8__EIM_AD08		0xb0a6
			MX6QDL_PAD_EIM_DA9__EIM_AD09		0xb0a6
			MX6QDL_PAD_EIM_DA10__EIM_AD10		0xb0a6
			MX6QDL_PAD_EIM_DA11__EIM_AD11		0xb0a6
			MX6QDL_PAD_EIM_DA12__EIM_AD12		0xb0a6
			MX6QDL_PAD_EIM_DA13__EIM_AD13		0xb0a6
			MX6QDL_PAD_EIM_DA14__EIM_AD14		0xb0a6
			MX6QDL_PAD_EIM_DA15__EIM_AD15		0xb0a6
			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x130b0
			MX6QDL_PAD_EIM_LBA__EIM_LBA_B		0xb060 /* LE */
			MX6QDL_PAD_EIM_OE__EIM_OE_B		0xb0a6
			MX6QDL_PAD_EIM_RW__EIM_RW		0xb0a6 /* WE */
		>;
	};

	pinctrl_weim_cs0: weim-cs0-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_CS0__EIM_CS0_B		0xb0b1
		>;
	};

	pinctrl_weim_cs1: weim-cs1-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_CS1__EIM_CS1_B		0xb0b1
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2021 Dillon Min <dillon.minfei@gmail.com>
//
// Based on imx6qdl-sabresd.dtsi which is:
// Copyright 2012 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.

#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart4;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x80000000>;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	reg_usb_h1_vbus: regulator-usb-h1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led-0 {
			gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};
	};
};

&ipu1_csi0_from_ipu1_csi0_mux {
	bus-width = <8>;
	data-shift = <12>; /* Lines 19:12 used */
	hsync-active = <1>;
	vsync-active = <1>;
};

&ipu1_csi0_mux_from_parallel_sensor {
	remote-endpoint = <&ov2659_to_ipu1_csi0_mux>;
};

&ipu1_csi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ipu1_csi0>;
	status = "okay";
};

&ecspi1 {
	cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>, <&pinctrl_ecspi1_gpio>;
	status = "okay";

	m25p80: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p80", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-handle = <&phy>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		phy: ethernet-phy@1 {
			reg = <1>;
			qca,clk-out-frequency = <125000000>;
			reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
			reset-assert-us = <10000>;
		};
	};
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hdmi_cec>;
	ddc-i2c-bus = <&i2c3>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pfuze100: pmic@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	ov2659: camera@30 {
		compatible = "ovti,ov2659";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ov2659>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		clock-names = "xvclk";
		reg = <0x30>;
		powerdown-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
		status = "okay";

		port {
			ov2659_to_ipu1_csi0_mux: endpoint {
				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
				link-frequencies = /bits/ 64 <70000000>;
				bus-width = <8>;
				hsync-active = <1>;
				vsync-active = <1>;
			};
		};
	};
};

&iomuxc {
	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
		>;
	};

	pinctrl_ecspi1_gpio: ecspi1grpgpiogrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW1__GPIO4_IO09		0x1b0b0
			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x1b0b0
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_KEY_COL2__GPIO4_IO10         0x1b0b0
		>;
	};

	pinctrl_hdmi_cec: hdmicecgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	0x1f8b0
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_ipu1_csi0: ipu1csi0grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0
			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0
			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0
			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0
			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0
			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0
			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0
			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0
			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0
			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0
			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0
		>;
	};

	pinctrl_ov2659: ov2659grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_16__GPIO7_IO11		0x1b0b0
			MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x1b0b0
			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17059
			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x10059
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17059
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17059
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17059
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17059
		>;
	};

	pinctrl_usdhc1_gpio: usdhc1grpgpiogrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
		>;
	};

	pinctrl_usdhc2_gpio: usdhc2grpgpiogrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0
			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__WDOG2_B		0x1b0b0
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0
		>;
	};
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
	bus-width = <4>;
	cd-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	bus-width = <4>;
	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
	status = "disabled";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	non-removable;
	no-1-8-v;
	status = "okay";
};

&wdog1 {
	status = "disabled";
};

&wdog2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0 or MIT)
//
// Copyright (C) 2018 emtrion GmbH
//

/ {
	aliases {
		boardid = &boardid;
		mmc0 = &usdhc3;
		mmc1 = &usdhc2;
		mmc2 = &usdhc1;
		mmc3 = &usdhc4;
	};

	reg_wall_5p0: reg-wall5p0 {
		compatible = "regulator-fixed";
		regulator-name = "Main-Supply";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	reg_base3p3: reg-base3p3 {
		compatible = "regulator-fixed";
		vin-supply = <&reg_wall_5p0>;
		regulator-name = "3V3-avari";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
	};

	reg_base1p5: reg-base1p5 {
		compatible = "regulator-fixed";
		vin-supply = <&reg_base3p3>;
		regulator-name = "1V5-avari";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		regulator-always-on;
		regulator-boot-on;
	};

	reg_usb_otg: reg-otgvbus {
		compatible = "regulator-fixed";
		vin-supply = <&reg_wall_5p0>;
		regulator-name = "OTG_VBUS";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
		regulator-always-on;
	};

	clk_codec: clock-codec {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency  = <12000000>;
	};

	sound {
		compatible = "fsl,imx-audio-sgtl5000";
		model = "emCON-avari-sgtl5000";
		ssi-controller = <&ssi2>;
		audio-codec = <&sgtl5000>;
		audio-routing =
			"Headphone Jack", "HP_OUT";
		mux-int-port = <2>;
		mux-ext-port = <3>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&can1 {
	status = "okay";
};

&can2 {
	status = "okay";
};

&ecspi2 {
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c2 {
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	sgtl5000: audio-codec@a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		#sound-dai-cells = <0>;
		clocks = <&clk_codec>;
		VDDA-supply = <&reg_base3p3>;
		VDDIO-supply = <&reg_base3p3>;
	};

	captouch: touchscreen@38 {
		compatible = "edt,edt-ft5406";
		reg = <0x38>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_irq_touch2 &pinctrl_emcon_gpio4>;
		interrupt-parent = <&gpio6>;
		interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
		wake-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
		wakeup-source;
	};

	boardid: gpio@3a {
		compatible = "nxp,pca8574";
		reg = <0x3a>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&pcie {
	status = "okay";
};

&rgb_encoder {
	status = "okay";
};

&rgb_panel {
	compatible = "edt,etm0700g0bdh6";
	status = "okay";
};

&ssi2 {
	status = "okay";
};

&uart2 {
	status = "okay";
	uart-has-rtscts;
};

&uart3 {
	status = "okay";
};

&uart4 {
	status = "okay";
};

&uart5 {
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&usbotg {
	status = "okay";
};

&usdhc1 {
	status = "okay";
};