code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright 2017 (C) Priit Laes <plaes@plaes.org>
 * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de>
 * Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de>
 *
 * Based on initial work by Nikita Yushchenko <nyushchenko at dev.rtsoft.ru>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	reg_1p0v_s0: regulator-1p0v-s0 {
		compatible = "regulator-fixed";
		regulator-name = "V_1V0_S0";
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <&reg_smarc_suppy>;
	};

	reg_1p35v_vcoredig_s5: regulator-1p35v-vcoredig-s5 {
		compatible = "regulator-fixed";
		regulator-name = "V_1V35_VCOREDIG_S5";
		regulator-min-microvolt = <1350000>;
		regulator-max-microvolt = <1350000>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <&reg_3p3v_s5>;
	};

	reg_1p8v_s5: regulator-1p8v-s5 {
		compatible = "regulator-fixed";
		regulator-name = "V_1V8_S5";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <&reg_3p3v_s5>;
	};

	reg_3p3v_s0: regulator-3p3v-s0 {
		compatible = "regulator-fixed";
		regulator-name = "V_3V3_S0";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <&reg_3p3v_s5>;
	};

	reg_3p3v_s5: regulator-3p3v-s5 {
		compatible = "regulator-fixed";
		regulator-name = "V_3V3_S5";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <&reg_smarc_suppy>;
	};

	reg_smarc_lcdbklt: regulator-smarc-lcdbklt {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lcdbklt_en>;
		regulator-name = "LCD_BKLT_EN";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_smarc_lcdvdd: regulator-smarc-lcdvdd {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lcdvdd_en>;
		regulator-name = "LCD_VDD_EN";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_smarc_rtc: regulator-smarc-rtc {
		compatible = "regulator-fixed";
		regulator-name = "V_IN_RTC_BATT";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
	};

	/* Module supply range can be 3.00V ... 5.25V */
	reg_smarc_suppy: regulator-smarc-supply {
		compatible = "regulator-fixed";
		regulator-name = "V_IN_WIDE";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	lcd: lcd {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,imx-parallel-display";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lcd>;
		status = "disabled";

		port@0 {
			reg = <0>;

			lcd_in: endpoint {
			};
		};

		port@1 {
			reg = <1>;

			lcd_out: endpoint {
			};
		};
	};

	lcd_backlight: lcd-backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000 0>;
		pwm-names = "LCD_BKLT_PWM";

		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
		default-brightness-level = <4>;

		power-supply = <&reg_smarc_lcdbklt>;
		status = "disabled";
	};

	i2c_intern: i2c-gpio-intern {
		compatible = "i2c-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio_intern>;
		sda-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <2>; /* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
	};

	i2c_lcd: i2c-gpio-lcd {
		compatible = "i2c-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio_lcd>;
		sda-gpios = <&gpio1 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <2>; /* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c_cam: i2c-gpio-cam {
		compatible = "i2c-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio_cam>;
		sda-gpios = <&gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <2>; /* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};

/* I2S0, I2S1 */
&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;

	audmux_ssi1 {
		fsl,audmux-port = <MX51_AUDMUX_PORT1_SSI0>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_TFSEL(MX51_AUDMUX_PORT3) |
			 IMX_AUDMUX_V2_PTCR_TCSEL(MX51_AUDMUX_PORT3) |
			 IMX_AUDMUX_V2_PTCR_SYN    |
			 IMX_AUDMUX_V2_PTCR_TFSDIR |
			 IMX_AUDMUX_V2_PTCR_TCLKDIR)
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT3)
		>;
	};

	audmux_adu3 {
		fsl,audmux-port = <MX51_AUDMUX_PORT3>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT1_SSI0)
		>;
	};

	audmux_ssi2 {
		fsl,audmux-port = <MX51_AUDMUX_PORT2_SSI1>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_TFSEL(MX51_AUDMUX_PORT4) |
			 IMX_AUDMUX_V2_PTCR_TCSEL(MX51_AUDMUX_PORT4) |
			 IMX_AUDMUX_V2_PTCR_SYN    |
			 IMX_AUDMUX_V2_PTCR_TFSDIR |
			 IMX_AUDMUX_V2_PTCR_TCLKDIR)
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT4)
		>;
	};

	audmux_adu4 {
		fsl,audmux-port = <MX51_AUDMUX_PORT4>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT2_SSI1)
		>;
	};
};

/* CAN0 */
&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
};

/* CAN1 */
&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
};

/* SPI1 */
&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>,
		   <&gpio2 27 GPIO_ACTIVE_LOW>;
};

/* SPI0 */
&ecspi4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi4>;
	cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>,
		   <&gpio3 29 GPIO_ACTIVE_LOW>;
	status = "okay";

	/* default boot source: workaround #1 for errata ERR006282 */
	smarc_flash: flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <20000000>;
	};
};

/* GBE */
&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-handle = <&ethphy>;

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
			reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
			reset-assert-us = <1000>;
		};
	};
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
};

&i2c_intern {
	pmic@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			reg_v_core_s0: sw1ab {
				regulator-name = "V_CORE_S0";
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
			};

			reg_vddsoc_s0: sw1c {
				regulator-name = "V_VDDSOC_S0";
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
			};

			reg_3p15v_s0: sw2 {
				regulator-name = "V_3V15_S0";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* sw3a/b is used in dual mode, but driver does not
			 * support it. Although, there's no need to control
			 * DDR power - so just leaving dummy entries for sw3a
			 * and sw3b for now.
			 */
			sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			reg_1p8v_s0: sw4 {
				regulator-name = "V_1V8_S0";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* Regulator for USB */
			reg_5p0v_s0: swbst {
				regulator-name = "V_5V0_S0";
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-boot-on;
			};

			reg_vsnvs: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			reg_vrefddr: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			/*
			 * Per schematics, of all VGEN's, only VGEN5 has some
			 * usage ... but even that - over DNI resistor
			 */
			vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			reg_2p5v_s0: vgen5 {
				regulator-name = "V_2V5_S0";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};
		};
	};
};

/* I2C_GP */
&i2c1 {
	clock-frequency = <375000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
};

/* HDMI_CTRL */
&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
};

/* I2C_PM */
&i2c3 {
	clock-frequency = <375000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	smarc_eeprom: eeprom@50 {
		compatible = "atmel,24c32";
		reg = <0x50>;
		pagesize = <32>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_mgmt_gpios &pinctrl_gpio>;

	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x130b0
			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0

			MX6QDL_PAD_DISP0_DAT20__AUD4_TXC	0x130b0
			MX6QDL_PAD_DISP0_DAT21__AUD4_TXD	0x130b0
			MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS	0x130b0
			MX6QDL_PAD_DISP0_DAT23__AUD4_RXD	0x130b0

			/* AUDIO MCLK */
			MX6QDL_PAD_NANDF_CS2__CCM_CLKO2		0x000b0
		>;
	};

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
			MX6QDL_PAD_EIM_OE__ECSPI2_MISO  0x100b1

			MX6QDL_PAD_EIM_RW__GPIO2_IO26  0x1b0b0 /* CS0 */
			MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0 /* CS1 */
		>;
	};

	pinctrl_ecspi4: ecspi4grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
			MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
			MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1

			/* SPI_IMX_CS2# - connected to internal flash */
			MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
			/* SPI_IMX_CS0# - connected to SMARC SPI0_CS0# */
			MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
			MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
		>;
	};

	pinctrl_gpio: gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_DA0__GPIO3_IO00	0x1b0b0	/* GPIO0 / CAM0_PWR# */
			MX6QDL_PAD_EIM_DA1__GPIO3_IO01	0x1b0b0 /* GPIO1 / CAM1_PWR# */
			MX6QDL_PAD_EIM_DA2__GPIO3_IO02	0x1b0b0 /* GPIO2 / CAM0_RST# */
			MX6QDL_PAD_EIM_DA3__GPIO3_IO03	0x1b0b0 /* GPIO3 / CAM1_RST# */
			MX6QDL_PAD_EIM_DA4__GPIO3_IO04	0x1b0b0 /* GPIO4 / HDA_RST#  */
			MX6QDL_PAD_EIM_DA5__GPIO3_IO05	0x1b0b0 /* GPIO5 / PWM_OUT   */
			MX6QDL_PAD_EIM_DA6__GPIO3_IO06	0x1b0b0 /* GPIO6 / TACHIN    */
			MX6QDL_PAD_EIM_DA7__GPIO3_IO07	0x1b0b0 /* GPIO7 / PCAM_FLD  */
			MX6QDL_PAD_EIM_DA8__GPIO3_IO08	0x1b0b0 /* GPIO8 / CAN0_ERR# */
			MX6QDL_PAD_EIM_DA9__GPIO3_IO09	0x1b0b0 /* GPIO9 / CAN1_ERR# */
			MX6QDL_PAD_EIM_DA10__GPIO3_IO10	0x1b0b0 /* GPIO10            */
			MX6QDL_PAD_EIM_DA11__GPIO3_IO11	0x1b0b0 /* GPIO11            */
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0

			MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25    0x1b0b0 /* RST_GBE0_PHY# */
		>;
	};

	pinctrl_i2c_gpio_cam: i2c-gpiocamgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_6__GPIO1_IO06	0x1b0b0 /* SCL */
			MX6QDL_PAD_KEY_COL2__GPIO4_IO10	0x1b0b0 /* SDA */
		>;
	};

	pinctrl_i2c_gpio_intern: i2c-gpiointerngrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30  0x1b0b0 /* SCL */
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* SDA */
		>;
	};

	pinctrl_i2c_gpio_lcd: i2c-gpiolcdgrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0 /* SCL */
			MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x1b0b0 /* SDA */
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_lcd: lcdgrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00  0x100f1
			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01  0x100f1
			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02  0x100f1
			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03  0x100f1
			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04  0x100f1
			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05  0x100f1
			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06  0x100f1
			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07  0x100f1
			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08  0x100f1
			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09  0x100f1
			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100f1
			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100f1
			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100f1
			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100f1
			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100f1
			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100f1
			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100f1
			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100f1
			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x100f1
			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x100f1
			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x100f1
			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x100f1
			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x100f1
			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x100f1

			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100f1
			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x100f1 /* DE */
			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x100f1 /* HSYNC */
			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x100f1 /* VSYNC */
		>;
	};

	pinctrl_lcdbklt_en: lcdbkltengrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT0__GPIO1_IO16	0x1b0b1
		>;
	};

	pinctrl_lcdvdd_en: lcdvddengrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
		>;
	};

	pinctrl_mipi_csi: mipi-csigrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1	0x000b0	/* CSI0/1 MCLK */
		>;
	};

	pinctrl_mgmt_gpios: mgmt-gpiosgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_WAIT__GPIO5_IO00		0x1b0b0	/* LID#           */
			MX6QDL_PAD_SD3_DAT7__GPIO6_IO17		0x1b0b0	/* SLEEP#         */
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b0	/* CHARGING#      */
			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0	/* CHARGER_PRSNT# */
			MX6QDL_PAD_SD1_CLK__GPIO1_IO20		0x1b0b0	/* CARRIER_STBY#  */
			MX6QDL_PAD_DI0_PIN4__GPIO4_IO20		0x1b0b0	/* BATLOW#        */
			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x1b0b0	/* TEST#          */
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0	/* VDD_IO_SEL_D#  */
			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x1b0b0 /* POWER_BTN#     */
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D18__GPIO3_IO18	0x1b0b0 /* PCI_A_PRSNT# */
			MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0 /* RST_PCIE_A#  */
			MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0 /* PCIE_WAKE#   */
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
			MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
			MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
			MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
			MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1f8b0
			/* power, oc muxed but not used by the driver */
			MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18	0x1b0b0 /* USB power */
			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x1b0b0 /* USB OC */
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CLK__SD3_CLK 0x17059
			MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059

			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 /* CD */
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b0 /* WP */
			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PWR_EN */
		>;
	};

	pinctrl_usdhc4: usdhc4grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059
			MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
			MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
			MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
			MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
			MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
			MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
			MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
			MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
			MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
		>;
	};

	pinctrl_wdog1: wdog1rp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__WDOG1_B	0x1b0b0
		>;
	};
};

&mipi_csi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_mipi_csi>;
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>;
	reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
};

/* LCD_BKLT_PWM */
&pwm4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
};

&reg_arm {
	vin-supply = <&reg_v_core_s0>;
};

&reg_pu {
	vin-supply = <&reg_vddsoc_s0>;
};

&reg_soc {
	vin-supply = <&reg_vddsoc_s0>;
};

/* SER0 */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	uart-has-rtscts;
};

/* SER1 */
&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
};

/* SER2 */
&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	uart-has-rtscts;
};

/* SER3 */
&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
};

/* USB0 */
&usbotg {
	/*
	 * no 'imx6-usb-charger-detection'
	 * since USB_OTG_CHD_B pin is not wired
	 */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
};

/* USB1/2 via hub */
&usbh1 {
	vbus-supply = <&reg_5p0v_s0>;
};

/* SDIO */
&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
	no-1-8-v;
};

/* SDMMC */
&usdhc4 {
	/* Internal eMMC, optional on some boards */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <8>;
	no-sdio;
	no-sd;
	non-removable;
	vmmc-supply = <&reg_3p3v_s0>;
	vqmmc-supply = <&reg_1p8v_s0>;
};

&wdog1 {
	/* CPLD is feeded by watchdog (hardwired) */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog1>;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright 2013 Sascha Hauer, Pengutronix
 *
 * Copyright 2013-2021 TQ-Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 */

#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	aliases {
		mmc0 = &usdhc3;
		mmc1 = &usdhc2;
		/delete-property/ mmc2;
		/delete-property/ mmc3;
		rtc0 = &rtc0;
	};

	chosen {
		stdout-path = &uart2;
	};

	beeper: gpio-beeper {
		compatible = "gpio-beeper";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpiobeeper>;
		gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
	};

	gpio_buttons: gpio-buttons {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpiobuttons>;

		button1 {
			label = "s6";
			linux,code = <KEY_F6>;
			gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
			wakeup-source;
		};

		button2 {
			label = "s7";
			linux,code = <KEY_F7>;
			gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
			wakeup-source;
		};

		button3 {
			label = "s8";
			linux,code = <KEY_F8>;
			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
			wakeup-source;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpioled>;

		led1 {
			label = "led1";
			gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "default-on";
		};

		led2 {
			label = "led2";
			gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	reg_mba6_3p3v: regulator-mba6-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "supply-mba6-3p3v";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_pcie: regulator-pcie {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_regpcie>;
		regulator-name = "supply-pcie";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		/* PCIE.PWR_EN */
		gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
		vin-supply = <&reg_mba6_3p3v>;
	};

	reg_vcc3v3_audio: regulator-vcc3v3-audio {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3-audio";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&reg_mba6_3p3v>;
	};

	sound {
		compatible = "fsl,imx-audio-tlv320aic32x4";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_audmux>;
		model = "imx-audio-tlv320aic32x4";
		ssi-controller = <&ssi1>;
		audio-codec = <&tlv320aic32x4>;
		audio-asrc = <&asrc>;
		audio-routing =
			"IN3_L", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"IN1_L", "Line In Jack",
			"IN1_R", "Line In Jack",
			"Line Out Jack", "LOL",
			"Line Out Jack", "LOR";
		mux-int-port = <1>;
		mux-ext-port = <3>;
	};
};

&audmux {
	status = "okay";

	ssi0 {
		fsl,audmux-port = <MX31_AUDMUX_PORT1_SSI0>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_SYN |
				IMX_AUDMUX_V2_PTCR_TFSDIR |
				IMX_AUDMUX_V2_PTCR_TFSEL(MX31_AUDMUX_PORT3_SSI_PINS_3) |
				IMX_AUDMUX_V2_PTCR_TCLKDIR |
				IMX_AUDMUX_V2_PTCR_TCSEL(MX31_AUDMUX_PORT3_SSI_PINS_3))
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT3_SSI_PINS_3)
		>;
	};

	aud3 {
		fsl,audmux-port = <MX31_AUDMUX_PORT3_SSI_PINS_3>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT1_SSI0)
		>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	status = "okay";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
	status = "okay";
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>, <&pinctrl_ecspi1_mba6>;
	cs-gpios = <&gpio3 19 0>, <&gpio3 24 0>;
};

&fec {
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy>;
	mac-address = [00 00 00 00 00 00];
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy@3 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <3>;
			interrupt-parent = <&gpio1>;
			interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
			reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
			reset-assert-us = <1000>;
			reset-deassert-us = <100000>;
			micrel,force-master;
			max-speed = <1000>;
		};
	};
};

&i2c1 {
	tlv320aic32x4: audio-codec@18 {
		compatible = "ti,tlv320aic32x4";
		reg = <0x18>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		clock-names = "mclk";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_codec>;
		ldoin-supply = <&reg_vcc3v3_audio>;
		iov-supply = <&reg_mba6_3p3v>;
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio6 7 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&pwm4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&snvs_poweroff {
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	uart-has-rtscts;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	uart-has-rtscts;
	linux,rs485-enabled-at-boot-time;
	rs485-rts-active-low;
	rs485-rx-during-tx;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	uart-has-rtscts;
	status = "okay";
};

&usbh1 {
	disable-over-current;
	status = "okay";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	power-active-high;
	over-current-active-low;
	srp-disable;
	hnp-disable;
	adp-disable;
	dr_mode = "otg";
	status = "okay";
};

/* SD card slot */
&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	vmmc-supply = <&reg_mba6_3p3v>;
	bus-width = <4>;
	no-1-8-v;
	no-mmc;
	no-sdio;
	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog1>;
	/* does not work on unmodified starter kit */
	/* fsl,ext-reset-output; */
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0
			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0
			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0
			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
		>;
	};

	pinctrl_can1: can1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0xb099
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0xb099
		>;
	};

	pinctrl_can2: can2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0xb099
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0xb099
		>;
	};

	pinctrl_codec: codecgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0xb0 /* CLK */
		>;
	};

	pinctrl_ecspi1_mba6: ecspimba6grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__GPIO3_IO24 0xb099 /* eCSPI1 SS2 */
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			/* FEC phy IRQ */
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28     0x00011008
			/* FEC phy reset */
			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25   0x1b099
			/* DSE = 100, 100k up, SPEED = MED */
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0xb0a0
			MX6QDL_PAD_ENET_MDC__ENET_MDC         0xb0a0
			/* DSE = 111, pull 100k up */
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0xb038
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0xb038
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0xb038
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0xb038
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0xb038
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0xb038
			/* DSE = 111, pull external */
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x0038
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x0038
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x0038
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x0038
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x0038
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x0038
			/* HYS = 1, DSE = 111, 100k up, SPEED = HIGH */
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0f0
		>;
	};

	pinctrl_gpiobeeper: gpiobeepergrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0xb099
		>;
	};

	pinctrl_gpiobuttons: gpiobuttongrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x0001b099
			MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x0001b099
			MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b099
		>;
	};

	pinctrl_gpioled: gpioledgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0xb099 /* LED V15 */
			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb099 /* LED V16 */
		>;
	};

	pinctrl_hog: hoggrp {
		fsl,pins = <
			MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099

			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x0001b099
			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x0001b099
			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x0001b099

			MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x0001b099
			MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x0001b099
			MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x0001b099
			MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x0001b099
			MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x0001b099
			MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x0001b099
			MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x0001b099

			MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x0001b099
			MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x0001b099
			MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x0001b099
			MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0001b099
			MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0001b099

			MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x0001b099
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x0001b099
			MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x0001b099
			MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x0001b099

			MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x0001b099
			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x0001b099
			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x0001b099

			MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x0001b099
			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x0001b099
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			/* HYS = 1, DSE = 110, 100k up, SPEED = HIGH (11)*/
			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x001b0f0 /* #PCIE.WAKE */
			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x001b0f0 /* #PCIE.RST */
			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x001b0f0 /* #PCIE.DIS */
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			/* 100 k PD, DSE 120 OHM, SPPEED LO */
			MX6QDL_PAD_GPIO_9__PWM1_OUT 0x00003050
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			/* 100 k PD, DSE 120 OHM, SPPEED LO */
			MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x00003050
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			/* 100 k PD, DSE 120 OHM, SPPEED LO */
			MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x00003050
		>;
	};

	pinctrl_regpcie: regpciegrp {
		fsl,pins = <
			/* HYS = 1, DSE = 110, PUE+PKE, SPEED = HIGH (11)*/
			MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00130f0 /* PCIE.PWR_EN */
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b099
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b099
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_CLK__UART3_RX_DATA 0x1b0b1
			MX6QDL_PAD_SD4_CMD__UART3_TX_DATA 0x1b0b1
			MX6QDL_PAD_EIM_D30__UART3_CTS_B   0x1b0b1
			MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b1
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
			MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
			MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B 0x1b0b1
			MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x1b0b1
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			/* CLK: 47k Pup SPD_LOW DSE 40Ohm SRE_FAST HYS */
			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x00017071
			/* SD2: 47k Pup SPD_LOW DSE 80Ohm SRE_FAST HYS */
			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x00017059
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x00017059
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x00017059
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x00017059
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x00017059

			MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x0001b099 /* usdhc2 CD */
			MX6QDL_PAD_GPIO_2__GPIO1_IO02  0x0001b099 /* usdhc2 WP */
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__USB_OTG_OC  0x0001b0b0
			MX6QDL_PAD_GPIO_1__USB_OTG_ID   0x00017059
			MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x0001b099
		>;
	};

	pinctrl_wdog1: wdog1grp {
		fsl,pins = <
			 /* Watchdog out */
			MX6QDL_PAD_SD1_DAT2__WDOG1_B 0x0000b099
		>;
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright 2013 Sascha Hauer, Pengutronix
 *
 * Copyright 2013-2021 TQ-Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 */

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>, <&pinctrl_enet_fix>;
};

&i2c1 {
	lm75: temperature-sensor@49 {
		compatible = "national,lm75";
		reg = <0x49>;
	};

	m24c64_57: eeprom@57 {
		compatible = "atmel,24c64";
		reg = <0x57>;
		pagesize = <32>;
	};

	rtc0: rtc@68 {
		compatible = "dallas,ds1339";
		reg = <0x68>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright 2013 Sascha Hauer, Pengutronix
 *
 * Copyright 2013-2021 TQ-Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 */

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c1>;
	pinctrl-1 = <&pinctrl_i2c1_recovery>;
	scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	status = "okay";
};

&i2c3 {
	lm75: temperature-sensor@49 {
		compatible = "national,lm75";
		reg = <0x49>;
	};

	m24c64_57: eeprom@57 {
		compatible = "atmel,24c64";
		reg = <0x57>;
		pagesize = <32>;
	};

	rtc0: rtc@68 {
		compatible = "dallas,ds1339";
		reg = <0x68>;
	};
};

&iomuxc {
	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b899
			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b899
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright 2015 Boundary Devices, Inc.
 */
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart2;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x20000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_2p5v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "2P5V";
			regulator-min-microvolt = <2500000>;
			regulator-max-microvolt = <2500000>;
			regulator-always-on;
		};

		reg_3p3v: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_otg_vbus: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		reg_wlan_vmmc: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_wlan_vmmc>;
			regulator-name = "reg_wlan_vmmc";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>;
			startup-delay-us = <70000>;
			enable-active-high;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		home {
			label = "Home";
			gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>;
			linux,code = <102>;
		};

		back {
			label = "Back";
			gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
			linux,code = <158>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_leds>;

		j14-pin1 {
			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
			retain-state-suspended;
			default-state = "off";
		};

		j14-pin3 {
			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
			retain-state-suspended;
			default-state = "off";
		};

		j14-pins8-9 {
			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
			retain-state-suspended;
			default-state = "off";
		};

		j46-pin2 {
			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
			retain-state-suspended;
			default-state = "off";
		};

		j46-pin3 {
			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
			retain-state-suspended;
			default-state = "off";
		};
	};

	backlight-lcd {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	backlight_lvds0: backlight-lvds0 {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	panel-lvds0 {
		compatible = "hannstar,hsd100pxn1";
		backlight = <&backlight_lvds0>;

		port {
			panel_in_lvds0: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};

	sound {
		compatible = "fsl,imx6dl-nit6xlite-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx6dl-nit6xlite-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <3>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi1 {
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash: flash@0 {
		compatible = "microchip,sst25vf016b";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-handle = <&ethphy>;
	phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
	/delete-property/ interrupts;
	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
	fsl,err006687-workaround-present;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy {
			compatible = "ethernet-phy-ieee802.3-c22";
			txen-skew-ps = <0>;
			txc-skew-ps = <3000>;
			rxdv-skew-ps = <0>;
			rxc-skew-ps = <3000>;
			rxd0-skew-ps = <0>;
			rxd1-skew-ps = <0>;
			rxd2-skew-ps = <0>;
			rxd3-skew-ps = <0>;
			txd0-skew-ps = <0>;
			txd1-skew-ps = <0>;
			txd2-skew-ps = <0>;
			txd3-skew-ps = <0>;
		};
	};
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sgtl5000>;
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	touchscreen@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio1>;
		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
		wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
	};

	touchscreen@38 {
		compatible = "edt,edt-ft5x06";
		reg = <0x38>;
		interrupt-parent = <&gpio1>;
		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
		wakeup-source;
	};

	rtc@6f {
		compatible = "isil,isl1208";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rtc>;
		reg = <0x6f>;
		interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_j10>;
	pinctrl-1 = <&pinctrl_j28>;

	imx6dl-nit6xlite {
		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x100b0
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x100b0
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x100b0
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x100b0
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x100b0
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x100b0
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				/* Phy reset */
				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x0f0b0
				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
			>;
		};

		pinctrl_gpio_keys: gpio-keysgrp {
			fsl,pins = <
				/* Home Button: J14 pin 5 */
				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0
				/* Back Button: J14 pin 7 */
				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1
				MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1
				/* Touch IRQ: J7 pin 4 */
				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0
				/* tcs2004 IRQ */
				MX6QDL_PAD_EIM_LBA__GPIO2_IO27	0x1b0b0
				/* tsc2004 reset */
				MX6QDL_PAD_KEY_COL2__GPIO4_IO10	0x0b0b0
			>;
		};

		pinctrl_j10: j10grp {
			fsl,pins = <
				/* Broadcom WiFi module pins */
				MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0
				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0
				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	0x0b0b0
				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x1b0b0
				MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0
			>;
		};

		pinctrl_j28: j28grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0
			>;
		};

		pinctrl_leds: ledsgrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x0b0b0
				MX6QDL_PAD_GPIO_3__GPIO1_IO03		0x0b0b0
				MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x030b0
				MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x0b0b0
				MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0b0b0
			>;
		};

		pinctrl_pwm1: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1
			>;
		};

		pinctrl_pwm3: pwm3grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
			>;
		};

		pinctrl_pwm4: pwm4grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
			>;
		};

		pinctrl_wlan_vmmc: wlan-vmmcgrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x030b0
			>;
		};

		pinctrl_rtc: rtcgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x1b0b0
			>;
		};

		pinctrl_sgtl5000: sgtl5000grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0
				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
				MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
				MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0
				/* power enable, high active */
				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0
			>;
		};
	};
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		status = "okay";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in_lvds0>;
			};
		};
	};
};

&pcie {
	status = "okay";
};

&pwm1 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&pwm4 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	uart-has-rtscts;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	non-removable;
	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_wlan_vmmc>;
	cap-power-off-card;
	keep-power-in-suspend;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright 2015 Boundary Devices, Inc.
 */
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart2;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0xF0000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_1p8v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "1P8V";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-always-on;
		};

		reg_2p5v: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "2P5V";
			regulator-min-microvolt = <2500000>;
			regulator-max-microvolt = <2500000>;
			regulator-always-on;
		};

		reg_3p3v: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_otg_vbus: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		reg_usb_h1_vbus: regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usbh1>;
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		reg_wlan_vmmc: regulator@5 {
			compatible = "regulator-fixed";
			reg = <5>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_wlan_vmmc>;
			regulator-name = "reg_wlan_vmmc";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
			startup-delay-us = <70000>;
			enable-active-high;
		};

		reg_can_xcvr: regulator@6 {
			compatible = "regulator-fixed";
			reg = <6>;
			regulator-name = "CAN XCVR";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_can_xcvr>;
			gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		power {
			label = "Power Button";
			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			wakeup-source;
		};

		menu {
			label = "Menu";
			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_MENU>;
		};

		home {
			label = "Home";
			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_HOME>;
		};

		back {
			label = "Back";
			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_BACK>;
		};

		volume-up {
			label = "Volume Up";
			gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEUP>;
		};

		volume-down {
			label = "Volume Down";
			gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEDOWN>;
		};
	};

	i2c2mux {
		compatible = "i2c-mux-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c2mux>;
		#address-cells = <1>;
		#size-cells = <0>;
		mux-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH
			     &gpio4 15 GPIO_ACTIVE_HIGH>;
		i2c-parent = <&i2c2>;
		idle-state = <0>;

		i2c2mux@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c2mux@2 {
			reg = <2>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	i2c3mux {
		compatible = "i2c-mux-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c3mux>;
		#address-cells = <1>;
		#size-cells = <0>;
		mux-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
		i2c-parent = <&i2c3>;
		idle-state = <0>;

		i2c3mux@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	leds {
		compatible = "gpio-leds";

		speaker-enable {
			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
			retain-state-suspended;
			default-state = "off";
		};

		ttymxc4-rs232 {
			gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
			retain-state-suspended;
			default-state = "on";
		};
	};

	backlight_lcd: backlight-lcd {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	backlight_lvds0: backlight-lvds0 {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	backlight_lvds1: backlight-lvds1 {
		compatible = "pwm-backlight";
		pwms = <&pwm2 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	lcd_display: disp0 {
		compatible = "fsl,imx-parallel-display";
		#address-cells = <1>;
		#size-cells = <0>;
		interface-pix-fmt = "bgr666";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_j15>;
		status = "okay";

		port@0 {
			reg = <0>;

			lcd_display_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			lcd_display_out: endpoint {
				remote-endpoint = <&lcd_panel_in>;
			};
		};
	};

	panel-lcd {
		compatible = "okaya,rs800480t-7x0gp";
		backlight = <&backlight_lcd>;

		port {
			lcd_panel_in: endpoint {
				remote-endpoint = <&lcd_display_out>;
			};
		};
	};

	panel-lvds0 {
		compatible = "hannstar,hsd100pxn1";
		backlight = <&backlight_lvds0>;

		port {
			panel_in_lvds0: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};

	panel-lvds1 {
		compatible = "hannstar,hsd100pxn1";
		backlight = <&backlight_lvds1>;

		port {
			panel_in_lvds1: endpoint {
				remote-endpoint = <&lvds1_out>;
			};
		};
	};

	sound {
		compatible = "fsl,imx6q-nitrogen6_max-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx6q-nitrogen6_max-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <3>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	xceiver-supply = <&reg_can_xcvr>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi1 {
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash: flash@0 {
		compatible = "microchip,sst25vf016b";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-handle = <&ethphy>;
	phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
	/delete-property/ interrupts;
	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
	fsl,err006687-workaround-present;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy {
			compatible = "ethernet-phy-ieee802.3-c22";
			txen-skew-ps = <0>;
			txc-skew-ps = <3000>;
			rxdv-skew-ps = <0>;
			rxc-skew-ps = <3000>;
			rxd0-skew-ps = <0>;
			rxd1-skew-ps = <0>;
			rxd2-skew-ps = <0>;
			rxd3-skew-ps = <0>;
			txd0-skew-ps = <0>;
			txd1-skew-ps = <0>;
			txd2-skew-ps = <0>;
			txd3-skew-ps = <0>;
		};
	};
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sgtl5000>;
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};

	rtc: rtc@68 {
		compatible = "microcrystal,rv4162";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rv4162>;
		reg = <0x68>;
		interrupts-extended = <&gpio4 6 IRQ_TYPE_LEVEL_LOW>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	touchscreen@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio1>;
		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
		wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
	};

	touchscreen@38 {
		compatible = "edt,edt-ft5x06";
		reg = <0x38>;
		interrupt-parent = <&gpio1>;
		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
		wakeup-source;
	};
};

&iomuxc {
	imx6q-nitrogen6-max {
		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
			>;
		};

		pinctrl_can1: can1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0
				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
			>;
		};

		pinctrl_can_xcvr: can-xcvrgrp {
			fsl,pins = <
				/* Flexcan XCVR enable */
				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				/* Phy reset */
				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x0f0b0
				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
			>;
		};

		pinctrl_gpio_keys: gpio-keysgrp {
			fsl,pins = <
				/* Power Button */
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0
				/* Menu Button */
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
				/* Home Button */
				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0
				/* Back Button */
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0
				/* Volume Up Button */
				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0
				/* Volume Down Button */
				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x1b0b0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
			>;
		};

		pinctrl_i2c2mux: i2c2muxgrp {
			fsl,pins = <
				/* ov5642 camera i2c enable */
				MX6QDL_PAD_EIM_D20__GPIO3_IO20	0x000b0
				/* ov5640_mipi camera i2c enable */
				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15	0x000b0
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1
				MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1
				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0
			>;
		};

		pinctrl_i2c3mux: i2c3muxgrp {
			fsl,pins = <
				/* PCIe I2C enable */
				MX6QDL_PAD_EIM_OE__GPIO2_IO25	0x000b0
			>;
		};

		pinctrl_j15: j15grp {
			fsl,pins = <
				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
			>;
		};

		pinctrl_pcie: pciegrp {
			fsl,pins = <
				/* PCIe reset */
				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31	0x000b0
			>;
		};

		pinctrl_pwm1: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT3__PWM1_OUT	0x1b0b1
			>;
		};

		pinctrl_pwm2: pwm2grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT2__PWM2_OUT	0x1b0b1
			>;
		};

		pinctrl_pwm3: pwm3grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT1__PWM3_OUT	0x1b0b1
			>;
		};

		pinctrl_pwm4: pwm4grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__PWM4_OUT	0x1b0b1
			>;
		};

		pinctrl_rv4162: rv4162grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL0__GPIO4_IO06	0x1b0b0
			>;
		};

		pinctrl_sgtl5000: sgtl5000grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0
				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0
				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x1b0b0
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart5: uart5grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x130b1
				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x030b1
				/* RS485 RX Enable: pull up */
				MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	0x1b0b1
				/* RS485 DEN: pull down */
				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x030b1
				/* RS485/!RS232 Select: pull down (rs232) */
				MX6QDL_PAD_EIM_CS1__GPIO2_IO24		0x030b1
				/* ON: pull down */
				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x030b1
			>;
		};

		pinctrl_usbh1: usbh1grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x0b0b0
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
				MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0
				/* power enable, high active */
				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x100b0
				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
			>;
		};

		pinctrl_wlan_vmmc: wlan-vmmcgrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x100b0
				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x000b0
				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x000b0
				MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0
			>;
		};
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&lcd_display_in>;
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		status = "okay";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in_lvds0>;
			};
		};
	};

	lvds-channel@1 {
		status = "okay";

		port@4 {
			reg = <4>;

			lvds1_out: endpoint {
				remote-endpoint = <&panel_in_lvds1>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm1 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm2 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	status = "okay";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&pwm4 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	non-removable;
	vmmc-supply = <&reg_wlan_vmmc>;
	cap-power-off-card;
	keep-power-in-suspend;
	status = "okay";

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio6>;
		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
		ref-clock-frequency = <38400000>;
	};
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <8>;
	non-removable;
	vmmc-supply = <&reg_1p8v>;
	keep-power-in-suspend;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright 2016 Boundary Devices, Inc.
 */
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart2;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	backlight_lcd: backlight-lcd {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	backlight_lvds0: backlight-lvds0 {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	backlight_lvds1: backlight-lvds1 {
		compatible = "gpio-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_backlight_lvds1>;
		gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;
		default-on;
		status = "okay";
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		power {
			label = "Power Button";
			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			wakeup-source;
		};

		menu {
			label = "Menu";
			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_MENU>;
		};

		home {
			label = "Home";
			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_HOME>;
		};

		back {
			label = "Back";
			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_BACK>;
		};

		volume-up {
			label = "Volume Up";
			gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEUP>;
		};

		volume-down {
			label = "Volume Down";
			gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEDOWN>;
		};
	};

	lcd_display: disp0 {
		compatible = "fsl,imx-parallel-display";
		#address-cells = <1>;
		#size-cells = <0>;
		interface-pix-fmt = "bgr666";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_j15>;
		status = "okay";

		port@0 {
			reg = <0>;

			lcd_display_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			lcd_display_out: endpoint {
				remote-endpoint = <&lcd_panel_in>;
			};
		};
	};

	panel-lcd {
		compatible = "okaya,rs800480t-7x0gp";
		backlight = <&backlight_lcd>;

		port {
			lcd_panel_in: endpoint {
				remote-endpoint = <&lcd_display_out>;
			};
		};
	};

	panel-lvds0 {
		compatible = "hannstar,hsd100pxn1";
		backlight = <&backlight_lvds0>;

		port {
			panel_in_lvds0: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};

	panel-lvds1 {
		compatible = "hannstar,hsd100pxn1";
		backlight = <&backlight_lvds1>;

		port {
			panel_in_lvds1: endpoint {
				remote-endpoint = <&lvds1_out>;
			};
		};
	};

	reg_1p8v: regulator-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "1P8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
	};

	reg_2p5v: regulator-2v5 {
		compatible = "regulator-fixed";
		regulator-name = "2P5V";
		regulator-min-microvolt = <2500000>;
		regulator-max-microvolt = <2500000>;
		regulator-always-on;
	};

	reg_3p3v: regulator-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_can_xcvr: regulator-can-xcvr {
		compatible = "regulator-fixed";
		regulator-name = "CAN XCVR";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_can_xcvr>;
		gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
	};

	reg_usb_h1_vbus: regulator-usb-h1-vbus {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbh1>;
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_wlan_vmmc: regulator-wlan-vmmc {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wlan_vmmc>;
		regulator-name = "reg_wlan_vmmc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <70000>;
		enable-active-high;
	};

	sound {
		compatible = "fsl,imx6q-nitrogen6_som2-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx6q-nitrogen6_som2-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <3>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	xceiver-supply = <&reg_can_xcvr>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi1 {
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash: flash@0 {
		compatible = "microchip,sst25vf016b";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	/delete-property/ interrupts;
	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
	fsl,err006687-workaround-present;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sgtl5000>;
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};

	rtc@68 {
		compatible = "microcrystal,rv4162";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rv4162>;
		reg = <0x68>;
		interrupts-extended = <&gpio6 7 IRQ_TYPE_LEVEL_LOW>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	touchscreen@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio1>;
		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
		wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
	};

	touchscreen@38 {
		compatible = "edt,edt-ft5x06";
		reg = <0x38>;
		interrupt-parent = <&gpio1>;
		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
		wakeup-source;
	};
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
		>;
	};

	pinctrl_backlight_lvds1: backlight-lvds1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_EB3__GPIO2_IO31		0x0b0b0
		>;
	};

	pinctrl_can1: can1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
		>;
	};

	pinctrl_can_xcvr: can-xcvrgrp {
		fsl,pins = <
			/* Flexcan XCVR enable */
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x0b0b0
		>;
	};

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x100b0
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x100b0
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x100b0
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x100b0
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x100b0
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x100b0
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x130b0
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x130b0
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x130b0
			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x030b0
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
		>;
	};

	pinctrl_gpio_keys: gpio-keysgrp {
		fsl,pins = <
			/* Power Button */
			MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0
			/* Menu Button */
			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
			/* Home Button */
			MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0
			/* Back Button */
			MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0
			/* Volume Up Button */
			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0
			/* Volume Down Button */
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x1b0b0
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1
			MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1
			MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0
		>;
	};

	pinctrl_i2c3mux: i2c3muxgrp {
		fsl,pins = <
			/* PCIe I2C enable */
			MX6QDL_PAD_EIM_OE__GPIO2_IO25	0x000b0
		>;
	};

	pinctrl_j15: j15grp {
		fsl,pins = <
			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			/* PCIe reset */
			MX6QDL_PAD_EIM_DA0__GPIO3_IO00	0x030b0
			MX6QDL_PAD_EIM_DA4__GPIO3_IO04	0x030b0
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT3__PWM1_OUT	0x030b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT1__PWM3_OUT	0x030b1
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__PWM4_OUT	0x030b1
		>;
	};

	pinctrl_rv4162: rv4162grp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x1b0b0
		>;
	};

	pinctrl_sgtl5000: sgtl5000grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0
			MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x130b0
			MX6QDL_PAD_EIM_DA2__GPIO3_IO02		0x130b0
			MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x130b0
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
			MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1
		>;
	};

	pinctrl_usbh1: usbh1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x030b0
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
			MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0
			/* power enable, high active */
			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x030b0
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071
			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17071
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17071
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17071
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17071
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17071
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10071
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17071
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17071
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17071
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17071
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17071
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0
		>;
	};

	pinctrl_usdhc4: usdhc4grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
		>;
	};

	pinctrl_wlan_vmmc: wlan-vmmcgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x100b0
			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x030b0
			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x030b0
			MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0
		>;
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&lcd_display_in>;
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		status = "okay";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in_lvds0>;
			};
		};
	};

	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		port@4 {
			reg = <4>;

			lvds1_out: endpoint {
				remote-endpoint = <&panel_in_lvds1>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio3 0 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm1 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&pwm4 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	uart-has-rtscts;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	non-removable;
	vmmc-supply = <&reg_wlan_vmmc>;
	cap-power-off-card;
	keep-power-in-suspend;
	status = "okay";

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio6>;
		interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
		ref-clock-frequency = <38400000>;
	};
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <8>;
	non-removable;
	vmmc-supply = <&reg_1p8v>;
	keep-power-in-suspend;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright 2013 Boundary Devices, Inc.
 * Copyright 2011 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 */
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart2;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_2p5v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "2P5V";
			regulator-min-microvolt = <2500000>;
			regulator-max-microvolt = <2500000>;
			regulator-always-on;
		};

		reg_3p3v: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_otg_vbus: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 0>;
			enable-active-high;
		};

		reg_can_xcvr: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "CAN XCVR";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_can_xcvr>;
			gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
		};

		reg_wlan_vmmc: regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_wlan_vmmc>;
			regulator-name = "reg_wlan_vmmc";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
			startup-delay-us = <70000>;
			enable-active-high;
		};

		reg_usb_h1_vbus: regulator@5 {
			compatible = "regulator-fixed";
			reg = <5>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usbh1>;
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		power {
			label = "Power Button";
			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			wakeup-source;
		};

		menu {
			label = "Menu";
			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_MENU>;
		};

		home {
			label = "Home";
			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_HOME>;
		};

		back {
			label = "Back";
			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_BACK>;
		};

		volume-up {
			label = "Volume Up";
			gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEUP>;
		};

		volume-down {
			label = "Volume Down";
			gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEDOWN>;
		};
	};

	sound {
		compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx6q-nitrogen6x-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <3>;
	};

	backlight_lcd: backlight-lcd {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	backlight_lvds: backlight-lvds {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	lcd_display: disp0 {
		compatible = "fsl,imx-parallel-display";
		#address-cells = <1>;
		#size-cells = <0>;
		interface-pix-fmt = "bgr666";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_j15>;
		status = "okay";

		port@0 {
			reg = <0>;

			lcd_display_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			lcd_display_out: endpoint {
				remote-endpoint = <&lcd_panel_in>;
			};
		};
	};

	panel-lcd {
		compatible = "okaya,rs800480t-7x0gp";
		backlight = <&backlight_lcd>;

		port {
			lcd_panel_in: endpoint {
				remote-endpoint = <&lcd_display_out>;
			};
		};
	};

	panel-lvds0 {
		compatible = "hannstar,hsd100pxn1";
		backlight = <&backlight_lvds>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	xceiver-supply = <&reg_can_xcvr>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi1 {
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash: flash@0 {
		compatible = "sst,sst25vf016b", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "bootloader";
			reg = <0x0 0xc0000>;
		};

		partition@c0000 {
			label = "env";
			reg = <0xc0000 0x2000>;
		};

		partition@c2000 {
			label = "splash";
			reg = <0xc2000 0x13e000>;
		};
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-handle = <&ethphy>;
	phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
	/delete-property/ interrupts;
	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
	fsl,err006687-workaround-present;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy {
			compatible = "ethernet-phy-ieee802.3-c22";
			txen-skew-ps = <0>;
			txc-skew-ps = <3000>;
			rxdv-skew-ps = <0>;
			rxc-skew-ps = <3000>;
			rxd0-skew-ps = <0>;
			rxd1-skew-ps = <0>;
			rxd2-skew-ps = <0>;
			rxd3-skew-ps = <0>;
			txd0-skew-ps = <0>;
			txd1-skew-ps = <0>;
			txd2-skew-ps = <0>;
			txd3-skew-ps = <0>;
		};
	};
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};

	rtc: rtc@6f {
		compatible = "isil,isl1208";
		reg = <0x6f>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	touchscreen@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio1>;
		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
		wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
	};

	touchscreen@38 {
		compatible = "edt,edt-ft5x06";
		reg = <0x38>;
		interrupt-parent = <&gpio1>;
		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
		wakeup-source;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6q-nitrogen6x {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				/* SGTL5000 sys_mclk */
				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0
			>;
		};

		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
			>;
		};

		pinctrl_can1: can1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0
				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
			>;
		};

		pinctrl_can_xcvr: can-xcvrgrp {
			fsl,pins = <
				/* Flexcan XCVR enable */
				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
				MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1	/* CS */
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				/* Phy reset */
				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x000b0
				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
			>;
		};

		pinctrl_gpio_keys: gpio-keysgrp {
			fsl,pins = <
				/* Power Button */
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0
				/* Menu Button */
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
				/* Home Button */
				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0
				/* Back Button */
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0
				/* Volume Up Button */
				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0
				/* Volume Down Button */
				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_j15: j15grp {
			fsl,pins = <
				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
			>;
		};

		pinctrl_pwm1: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
			>;
		};

		pinctrl_pwm3: pwm3grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
			>;
		};

		pinctrl_pwm4: pwm4grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbh1: usbh1grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x030b0
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__USB_OTG_ID	0x17059
				MX6QDL_PAD_KEY_COL4__USB_OTG_OC	0x1b0b0
				/* power enable, high active */
				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17071
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17071
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17071
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17071
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17071
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0	/* CD */
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
				MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0	/* CD */
			>;
		};

		pinctrl_wlan_vmmc: wlan-vmmcgrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x100b0
				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x000b0
				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x000b0
				MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0
			>;
		};
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&lcd_display_in>;
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		status = "okay";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};
};

&pcie {
	status = "okay";
};

&pwm1 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&pwm4 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	non-removable;
	vmmc-supply = <&reg_wlan_vmmc>;
	cap-power-off-card;
	keep-power-in-suspend;
	status = "okay";

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio6>;
		interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
		ref-clock-frequency = <38400000>;
	};
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};