code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Device Tree Include file for TQ-Systems MBa7 carrier board.
 *
 * Copyright (C) 2016 TQ-Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
 *
 * Note: This file does not include nodes for all peripheral devices.
 * As device driver coverage increases additional nodes can be added.
 */

#include <dt-bindings/input/input.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	aliases {
		mmc0 = &usdhc3;
		mmc1 = &usdhc1;
		/delete-property/ mmc2;
	};

	beeper {
		compatible = "gpio-beeper";
		gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
	};

	chosen {
		stdout-path = &uart6;
	};

	gpio_buttons: gpio-keys {
		compatible = "gpio-keys";

		button-0 {
			/* #SWITCH_A */
			label = "S11";
			linux,code = <KEY_1>;
			gpios = <&pca9555 13 GPIO_ACTIVE_LOW>;
		};

		button-1 {
			/* #SWITCH_B */
			label = "S12";
			linux,code = <KEY_2>;
			gpios = <&pca9555 14 GPIO_ACTIVE_LOW>;
		};

		button-2 {
			/* #SWITCH_C */
			label = "S13";
			linux,code = <KEY_3>;
			gpios = <&pca9555 15 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		led1 {
			label = "led1";
			gpios = <&pca9555 8 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "default-on";
		};

		led2 {
			label = "led2";
			gpios = <&pca9555 9 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	reg_sd1_vmmc: regulator-sd1-vmmc {
		compatible = "regulator-fixed";
		regulator-name = "VCC3V3_SD1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_fec1_pwdn: regulator-fec1-pwdn {
		compatible = "regulator-fixed";
		regulator-name = "PWDN_FEC1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_fec2_pwdn: regulator-fec2-pwdn {
		compatible = "regulator-fixed";
		regulator-name = "PWDN_FEC2";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "VBUS_USBOTG1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
		compatible = "regulator-fixed";
		regulator-name = "VBUS_USBOTG2";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_mpcie_1v5: regulator-mpcie-1v5 {
		compatible = "regulator-fixed";
		regulator-name = "VCC1V5_MPCIE";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&pca9555 12 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	reg_mpcie_3v3: regulator-mpcie-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "VCC3V3_MPCIE";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&pca9555 10 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	reg_mba_12v0: regulator-mba-12v0 {
		compatible = "regulator-fixed";
		regulator-name = "VCC12V0_MBA7";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		gpio = <&pca9555 11 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_lvds_transmitter: regulator-lvds-transmitter {
		compatible = "regulator-fixed";
		regulator-name = "#SHTDN_LVDS";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&pca9555 1 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_vref_1v8: regulator-vref-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "VCC1V8_REF";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		vin-supply = <&sw2_reg>;
	};

	reg_audio_3v3: regulator-audio-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "VCC3V3_AUDIO";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	sound {
		compatible = "fsl,imx-audio-tlv320aic32x4";
		model = "imx-audio-tlv320aic32x4";
		ssi-controller = <&sai1>;
		audio-codec = <&tlv320aic32x4>;
		audio-routing =
			"IN3_L", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"IN1_L", "Line In Jack",
			"IN1_R", "Line In Jack",
			"Line Out Jack", "LOL",
			"Line Out Jack", "LOR";
	};
};

&adc1 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&adc2 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
		   <&gpio4 2 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	status = "okay";
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
	phy-reset-duration = <1>;
	phy-supply = <&reg_fec1_pwdn>;
	phy-handle = <&ethphy1_0>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy1_0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
		};
	};
};

&flash0 {
	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		uboot@0 {
			label = "U-Boot";
			reg = <0x0 0xd0000>;
		};

		env1@d0000 {
			label = "ENV1";
			reg = <0xd0000 0x10000>;
		};

		env2@e0000 {
			label = "ENV2";
			reg = <0xe0000 0x10000>;
		};

		dtb@f0000 {
			label = "DTB";
			reg = <0xf0000 0x10000>;
		};

		linux@100000 {
			label = "Linux";
			reg = <0x100000 0x700000>;
		};

		rootfs@800000 {
			label = "RootFS";
			reg = <0x800000 0x3800000>;
		};
	};
};

&flexcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&flexcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	status = "okay";
};

&i2c1 {
	lm75: temperature-sensor@49 {
		compatible = "national,lm75";
		reg = <0x49>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	tlv320aic32x4: audio-codec@18 {
		compatible = "ti,tlv320aic32x4";
		reg = <0x18>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		clock-names = "mclk";
		ldoin-supply = <&reg_audio_3v3>;
		iov-supply = <&reg_audio_3v3>;
	};

	pca9555: gpio-expander@20 {
		compatible = "nxp,pca9555";
		reg = <0x20>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pca9555>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gpio7>;
		interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_mba7_1>;

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO		0x7c
			MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI		0x74
			MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK		0x74
			MX7D_PAD_UART1_RX_DATA__GPIO4_IO0		0x74
			MX7D_PAD_UART1_TX_DATA__GPIO4_IO1		0x74
			MX7D_PAD_UART2_RX_DATA__GPIO4_IO2		0x74
		>;
	};

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO		0x7c
			MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI		0x74
			MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK		0x74
			MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0			0x74
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO10__ENET1_MDIO			0x02
			MX7D_PAD_GPIO1_IO11__ENET1_MDC			0x00
			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	0x71
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x71
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x71
			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	0x71
			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	0x71
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	0x71
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	0x79
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x79
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x79
			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	0x79
			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	0x79
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x79
			/* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */
			MX7D_PAD_ENET1_COL__GPIO7_IO15		0x40000070
			/* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */
			MX7D_PAD_GPIO1_IO09__GPIO1_IO9		0x40000078
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX	0x5a
			MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX	0x52
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	0x5a
			MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	0x52
		>;
	};

	pinctrl_hog_mba7_1: hogmba71grp {
		fsl,pins = <
			/* Limitation: WDOG2_B / WDOG2_RESET not usable */
			MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13	0x4000007c
			MX7D_PAD_ENET1_CRS__GPIO7_IO14		0x40000074
			/* #BOOT_EN */
			MX7D_PAD_UART2_TX_DATA__GPIO4_IO3	0x40000010
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SCL__I2C2_SCL		0x40000078
			MX7D_PAD_I2C2_SDA__I2C2_SDA		0x40000078
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX7D_PAD_I2C3_SCL__I2C3_SCL		0x40000078
			MX7D_PAD_I2C3_SDA__I2C3_SDA		0x40000078
		>;
	};

	pinctrl_pca9555: pca95550grp {
		fsl,pins = <
			MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12	0x78
		>;
	};

	pinctrl_sai1: sai1grp {
		fsl,pins = <
			MX7D_PAD_SAI1_MCLK__SAI1_MCLK		0x11
			MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK	0x1c
			MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0	0x1c
			MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC	0x1c

			MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK	0x1c
			MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0	0x14
			MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC	0x14
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX	0x7e
			MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX	0x76
			MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS	0x76
			MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS	0x7e
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX	0x7e
			MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX	0x76
			MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS	0x76
			MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS	0x7e
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX7D_PAD_I2C4_SCL__UART5_DCE_RX		0x7e
			MX7D_PAD_I2C4_SDA__UART5_DCE_TX		0x76
		>;
	};

	pinctrl_uart6: uart6grp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA08__UART6_DCE_RX	0x7d
			MX7D_PAD_EPDC_DATA09__UART6_DCE_TX	0x75
			MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS	0x75
			MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS	0x7d
		>;
	};

	pinctrl_uart7: uart7grp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA12__UART7_DCE_RX	0x7e
			MX7D_PAD_EPDC_DATA13__UART7_DCE_TX	0x76
			MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS	0x76
			/* Limitation: RTS is not connected */
			MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS	0x7e
		>;
	};

	pinctrl_usdhc1_gpio: usdhc1grp_gpio {
		fsl,pins = <
			/* WP */
			MX7D_PAD_SD1_WP__GPIO5_IO1		0x7c
			/* CD */
			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x7c
			/* VSELECT */
			MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x59
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x5e
			MX7D_PAD_SD1_CLK__SD1_CLK		0x57
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5e
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5e
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5e
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5e
		>;
	};

	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x5a
			MX7D_PAD_SD1_CLK__SD1_CLK		0x57
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5a
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5a
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5a
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5a
		>;
	};

	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x5b
			MX7D_PAD_SD1_CLK__SD1_CLK		0x57
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5b
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5b
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5b
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5b
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			/* LCD_CONTRAST */
			MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT	0x50
		>;
	};

	pinctrl_usbotg1: usbotg1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC	0x5c
			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x59
		>;
	};

	pinctrl_wdog1: wdog1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B	0x30
		>;
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&sai1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai1>;
	assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
			  <&clks IMX7D_SAI1_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <0>, <36864000>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart7 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart7>;
	assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	uart-has-rtscts;
	linux,rs485-enabled-at-boot-time;
	rs485-rts-active-low;
	rs485-rx-during-tx;
	status = "okay";
};

&usbh {
	status = "okay";
};

&usbotg1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg1>;
	vbus-supply = <&reg_usb_otg1_vbus>;
	srp-disable;
	hnp-disable;
	adp-disable;
	over-current-active-low;
	dr_mode = "otg";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&reg_sd1_vmmc>;
	bus-width = <4>;
	no-1-8-v;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog1>;
	fsl,ext-reset-output;
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Device Tree Include file for TQ-Systems TQMa7x boards with full mounted PCB.
 *
 * Copyright (C) 2016 TQ-Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
 */

/ {
	memory@80000000 {
		device_type = "memory";
		/* 512 MB - default configuration */
		reg = <0x80000000 0x20000000>;
	};
};

&cpu0 {
	cpu-supply = <&sw1a_reg>;
};

&gpio2 {
	/* Configured as pullup by QSPI pin group */
	qspi-reset-hog {
		gpio-hog;
		gpios = <4 GPIO_ACTIVE_LOW>;
		input;
		line-name = "qspi-reset";
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	clock-frequency = <100000>;
	status = "okay";

	pfuze3000: pmic@8 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pmic1>;
		compatible = "fsl,pfuze3000";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* use sw1c_reg to align with pfuze100/pfuze200 */
			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
				regulator-always-on;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};

	/* NXP SE97BTP with temperature sensor + eeprom */
	se97b: temperature-sensor-eeprom@1e {
		compatible = "nxp,se97b", "jedec,jc-42.4-temp";
		reg = <0x1e>;
		status = "okay";
	};

	/* ST M24C64 */
	m24c64: eeprom@50 {
		compatible = "atmel,24c64";
		reg = <0x50>;
		pagesize = <32>;
		status = "okay";
	};

	at24c02: eeprom@56 {
		compatible = "atmel,24c02";
		reg = <0x56>;
		pagesize = <16>;
		status = "okay";
	};

	ds1339: rtc@68 {
		compatible = "dallas,ds1339";
		reg = <0x68>;
	};
};

&iomuxc {
	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX7D_PAD_I2C1_SDA__I2C1_SDA	0x40000078
			MX7D_PAD_I2C1_SCL__I2C1_SCL	0x40000078
		>;
	};

	pinctrl_pmic1: pmic1grp {
		fsl,pins = <
			MX7D_PAD_SD2_RESET_B__GPIO5_IO11	0x4000005C
		>;
	};

	pinctrl_qspi: qspigrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0	0x5A
			MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1	0x5A
			MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2	0x5A
			MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3	0x5A
			MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK	0x11
			MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B	0x54
			MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B	0x54
		>;
	};

	pinctrl_qspi_reset: qspi_resetgrp {
		fsl,pins = <
			/* #QSPI_RESET */
			MX7D_PAD_EPDC_DATA04__GPIO2_IO4		0x52
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x56
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x19
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
			MX7D_PAD_SD3_CLK__SD3_CLK               0x51
			MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5a
			MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5a
			MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5a
			MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5a
			MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5a
			MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5a
			MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5a
			MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5a
			MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1a
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
			MX7D_PAD_SD3_CLK__SD3_CLK               0x51
			MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5b
			MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5b
			MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5b
			MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5b
			MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5b
			MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5b
			MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5b
			MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5b
			MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1b
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_wdog1: wdog1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B	0x30
		>;
	};
};

&qspi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_qspi &pinctrl_qspi_reset>;
	status = "okay";

	flash0: flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <29000000>;
		spi-rx-bus-width = <4>;
		spi-tx-bus-width = <4>;
	};
};

&sdma {
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
	assigned-clock-rates = <400000000>;
	bus-width = <8>;
	non-removable;
	vmmc-supply = <&vgen4_reg>;
	vqmmc-supply = <&sw2_reg>;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog1>;
	/*
	 * Errata e10574:
	 * WDOG reset needs to run with WDOG_RESET_B signal enabled.
	 * X1-51 (WDOG1#) signal needs carrier board handling to reset
	 * TQMa7 on X1-22 (RESET_IN#).
	 */
	fsl,ext-reset-output;
	status = "okay";
};

repo_name: angery/linux


code:
/*
 * Support for CompuLab CL-SOM-iMX7 System-on-Module
 *
 * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
 * Author: Ilya Ledvich <ilya@compulab.co.il>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 */

/dts-v1/;

#include "imx7d.dtsi"

/ {
	model = "CompuLab CL-SOM-iMX7";
	compatible = "compulab,cl-som-imx7", "fsl,imx7d";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB - minimal configuration */
	};

	reg_usb_otg1_vbus: regulator-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&cpu0 {
	cpu-supply = <&sw1a_reg>;
};

&cpu1 {
	cpu-supply = <&sw1a_reg>;
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
		};

		ethphy1: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
		};
	};
};

&fec2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet2>;
	assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET2_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy1>;
	fsl,magic-packet;
	status = "okay";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic: pmic@8 {
		compatible = "fsl,pfuze3000";
		reg = <0x8>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* use sw1c_reg to align with pfuze100/pfuze200 */
			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};

	pca9555: pca9555@20 {
		compatible = "nxp,pca9555";
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x20>;
	};

	eeprom@50 {
		compatible = "atmel,24c08";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	status = "okay";
};

&usbotg1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg1>;
	vbus-supply = <&reg_usb_otg1_vbus>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
	assigned-clock-rates = <400000000>;
	bus-width = <8>;
	fsl,tuning-step = <2>;
	non-removable;
	status = "okay";
};

&iomuxc {
	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_SD2_CD_B__ENET1_MDIO			0x30
			MX7D_PAD_SD2_WP__ENET1_MDC			0x30
			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	0x11
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x11
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x11
			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	0x11
			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	0x11
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	0x11
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	0x11
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x11
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x11
			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	0x11
			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	0x11
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x11
		>;
	};

	pinctrl_enet2: enet2grp {
		fsl,pins = <
			MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC		0x11
			MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0		0x11
			MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1		0x11
			MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2		0x11
			MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3		0x11
			MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL		0x11
			MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC		0x11
			MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0		0x11
			MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1		0x11
			MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2		0x11
			MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3		0x11
			MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL		0x11
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SDA__I2C2_SDA		0x4000007f
			MX7D_PAD_I2C2_SCL__I2C2_SCL		0x4000007f
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79
			MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x79
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x19
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_usbotg1: usbotg1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x14 /* OTG PWREN */
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2017-2022 Toradex
 */

/dts-v1/;
#include "imx7d-colibri.dtsi"
#include "imx7-colibri-aster.dtsi"

/ {
	model = "Toradex Colibri iMX7D on Aster Carrier Board";
	compatible = "toradex,colibri-imx7d-aster",
		     "toradex,colibri-imx7d",
		     "fsl,imx7d";
};

&ad7879_ts {
	status = "okay";
};

&atmel_mxt_ts {
	status = "okay";
};

&backlight {
	status = "okay";
};

&lcdif {
	status = "okay";
};

&panel_dpi {
	status = "okay";
};

/* Colibri USBH */
&usbotg2 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2017-2022 Toradex
 *
 */

/dts-v1/;
#include "imx7d-colibri-emmc.dtsi"
#include "imx7-colibri-aster.dtsi"

/ {
	model = "Toradex Colibri iMX7D 1GB (eMMC) on Aster Carrier Board";
	compatible = "toradex,colibri-imx7d-emmc-aster",
		     "toradex,colibri-imx7d-emmc",
		     "toradex,colibri-imx7d",
		     "fsl,imx7d";
};

/* Colibri USBH */
&usbotg2 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2017-2022 Toradex
 */

/dts-v1/;
#include "imx7d-colibri-emmc.dtsi"
#include "imx7-colibri-eval-v3.dtsi"

/ {
	model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board V3";
	compatible = "toradex,colibri-imx7d-emmc-eval-v3",
		     "toradex,colibri-imx7d-emmc",
		     "toradex,colibri-imx7d",
		     "fsl,imx7d";
};

/* Colibri USBH */
&usbotg2 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2022 Toradex
 */

/dts-v1/;
#include "imx7d-colibri-emmc.dtsi"
#include "imx7-colibri-iris-v2.dtsi"

/ {
	model = "Toradex Colibri iMX7D 1GB on Iris V2 Carrier Board";
	compatible = "toradex,colibri-imx7d-emmc-iris-v2",
		     "toradex,colibri-imx7d-emmc",
		     "toradex,colibri-imx7d",
		     "fsl,imx7d";
};

/* Colibri USBH */
&usbotg2 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2022 Toradex
 */

/dts-v1/;
#include "imx7d-colibri-emmc.dtsi"
#include "imx7-colibri-iris.dtsi"

/ {
	model = "Toradex Colibri iMX7D 1GB on Iris Carrier Board";
	compatible = "toradex,colibri-imx7d-emmc-iris",
		     "toradex,colibri-imx7d-emmc",
		     "toradex,colibri-imx7d",
		     "fsl,imx7d";
};

/* Colibri USBH */
&usbotg2 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2017-2022 Toradex
 */

#include "imx7d.dtsi"
#include "imx7-colibri.dtsi"

/ {
	aliases {
		/* Required to properly pass MAC addresses from bootloader. */
		ethernet0 = &fec1;
		ethernet1 = &fec2;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};
};

&cpu1 {
	cpu-supply = <&reg_DCDC2>;
};

&gpio6 {
	gpio-line-names = "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "SODIMM_169",
			  "SODIMM_157",
			  "",
			  "SODIMM_163",
			  "SODIMM_77",
			  "SODIMM_24",
			  "",
			  "SODIMM_25",
			  "SODIMM_27",
			  "SODIMM_32",
			  "SODIMM_34";
};

/* Colibri USBH */
&usbotg2 {
	dr_mode = "host";
	vbus-supply = <&reg_usbh_vbus>;
};

/* eMMC */
&usdhc3 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2016-2022 Toradex
 */

/dts-v1/;
#include "imx7d-colibri.dtsi"
#include "imx7-colibri-eval-v3.dtsi"

/ {
	model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3";
	compatible = "toradex,colibri-imx7d-eval-v3",
		     "toradex,colibri-imx7d",
		     "fsl,imx7d";
};

&ad7879_ts {
	status = "okay";
};

/*
 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
 */
&atmel_mxt_ts {
	status = "disabled";
};

&backlight {
	status = "okay";
};

&lcdif {
	status = "okay";
};

&panel_dpi {
	status = "okay";
};

/* Colibri PWM<B> */
&pwm2 {
	/* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
	status = "okay";
};

/* Colibri PWM<C> */
&pwm3 {
	/* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
	status = "okay";
};

/* Colibri USBH */
&usbotg2 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2022 Toradex
 */

/dts-v1/;
#include "imx7d-colibri.dtsi"
#include "imx7-colibri-iris-v2.dtsi"

/ {
	model = "Toradex Colibri iMX7D on Iris V2 Carrier Board";
	compatible = "toradex,colibri-imx7d-iris-v2",
		     "toradex,colibri-imx7d",
		     "fsl,imx7d";
};

&ad7879_ts {
	status = "okay";
};

&atmel_mxt_ts {
	status = "okay";
};

&backlight {
	status = "okay";
};

&gpio2 {
	/*
	 * This switches the LVDS transceiver to VESA color mapping mode.
	 */
	lvds-color-map-hog {
		gpio-hog;
		gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */
		line-name = "LVDS_COLOR_MAP";
		output-low;
	};
};

&gpio7 {
	/*
	 * This switches the LVDS transceiver to the 24-bit RGB mode.
	 */
	lvds-rgb-mode-hog {
		gpio-hog;
		gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */
		line-name = "LVDS_RGB_MODE";
		output-low;
	};

	/*
	 * This switches the LVDS transceiver to the single-channel
	 * output mode.
	 */
	lvds-ch-mode-hog {
		gpio-hog;
		gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */
		line-name = "LVDS_CH_MODE";
		output-high;
	};

	/* This turns the LVDS transceiver on */
	lvds-power-on-hog {
		gpio-hog;
		gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */
		line-name = "LVDS_POWER_ON";
		output-high;
	};
};

&lcdif {
	status = "okay";
};

&panel_dpi {
	status = "okay";
};

/* Colibri USBH */
&usbotg2 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2022 Toradex
 */

/dts-v1/;
#include "imx7d-colibri.dtsi"
#include "imx7-colibri-iris.dtsi"

/ {
	model = "Toradex Colibri iMX7D on Iris Carrier Board";
	compatible = "toradex,colibri-imx7d-iris",
		     "toradex,colibri-imx7d",
		     "fsl,imx7d";
};

&ad7879_ts {
	status = "okay";
};

/*
 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
 */
&atmel_mxt_ts {
	status = "disabled";
};

&backlight {
	status = "okay";
};

&lcdif {
	status = "okay";
};

&panel_dpi {
	status = "okay";
};

/* Colibri PWM<B> */
&pwm2 {
	/* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
	status = "okay";
};

/* Colibri PWM<C> */
&pwm3 {
	/* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
	status = "okay";
};

/* Colibri USBH */
&usbotg2 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2016-2022 Toradex
 */

#include "imx7d.dtsi"
#include "imx7-colibri.dtsi"

/ {
	aliases {
		/* Required to properly pass MAC addresses from bootloader. */
		ethernet0 = &fec1;
		ethernet1 = &fec2;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>;
	};
};

&cpu1 {
	cpu-supply = <&reg_DCDC2>;
};

/* NAND */
&gpmi {
	status = "okay";
};

/* Colibri USBH */
&usbotg2 {
	dr_mode = "host";
	vbus-supply = <&reg_usbh_vbus>;
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for Kamstrup OMNIA Flex Concentrator in
 * manufacturing/debugging mode.
 *
 * Copyright (C) 2020 Kamstrup A/S
 * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
 */

/dts-v1/;

#include "imx7d-flex-concentrator.dts"

/ {
	model = "Kamstrup OMNIA Flex Concentrator - Manufacturing";
	compatible = "kam,imx7d-flex-concentrator-mfg", "fsl,imx7d";

	chosen {
		stdout-path = &uart4;
	};
};

&uart4 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for Kamstrup OMNIA Flex Concentrator.
 *
 * Copyright (C) 2020 Kamstrup A/S
 * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
 */

/dts-v1/;

#include "imx7d-tqma7.dtsi"

/* One I2C device on TQMa7 SoM is not mounted */
/delete-node/ &ds1339;

/ {
	model = "Kamstrup OMNIA Flex Concentrator";
	compatible = "kam,imx7d-flex-concentrator", "fsl,imx7d";

	memory@80000000 {
		device_type = "memory";
		/* 1024 MB - TQMa7D board configuration */
		reg = <0x80000000 0x40000000>;
	};

	reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
		compatible = "regulator-fixed";
		regulator-name = "VBUS_USBOTG2";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_vref_1v8: regulator-vref-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "VCC1V8_REF";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		vin-supply = <&sw2_reg>;
	};

	/*
	 * Human Machine Interface consists of 4 dual red/green LEDs.
	 * hmi-a:green is controlled directly by the switch-mode power supply.
	 * hmi-a:red is not used.
	 */
	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_leds>;

		led-0 {
			label = "hmi-b:red:heartbeat-degraded";
			gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>;
		};

		led-1 {
			label = "hmi-b:green:heartbeat-running";
			gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};

		led-2 {
			label = "hmi-c:red:mesh-error";
			gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
		};

		led-3 {
			label = "hmi-c:green:mesh-activity";
			gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
		};

		led-4 {
			label = "hmi-d:red:omnia-error";
			gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;
		};

		led-5 {
			label = "hmi-d:green:omnia-activity";
			gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
		};
	};

	/*
	 * Errata e10574 board restart workaround.
	 */
	gpio-restart {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_restart>;
		compatible = "gpio-restart";
		gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
		priority = <200>;
	};
};

/*
 * Analog signals
 * ADC1_IN0: SMPS - 5V output monitor (voltage divider: 1/0.2806)
 */
&adc1 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	num-chipselects = <1>;
	cs-gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
	status = "okay";

	pcf2127: rtc@0 {
		compatible = "nxp,pcf2127";
		reg = <0>;
		spi-max-frequency = <2000000>;
		reset-source;
	};
};

&ecspi4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi4>;
	num-chipselects = <1>;
	cs-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
	status = "okay";

	/*
	 * ST chip maximum SPI clock frequency is 33 MHz.
	 *
	 * TCG specification - Section 6.4.1 Clocking:
	 * TPM shall support a SPI clock frequency range of 10-24 MHz.
	 */
	st33htph: tpm-tis@0 {
		compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
		reg = <0>;
		spi-max-frequency = <24000000>;
	};
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	phy-mode = "rmii";
	phy-handle = <&ethphy>;
	status = "okay";

	/*
	 * MDIO bus reset is used to generate PHY device reset before
	 * Ethernet PHY type ID auto-detection. Otherwise this communication
	 * fails as device does not answer when recommended reset circuit
	 * is used.
	 */
	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		reset-delay-us = <100000>;
		reset-post-delay-us = <500000>;
		reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;

		/* Microchip/Micrel KSZ8081RNB */
		ethphy: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			interrupt-parent = <&gpio1>;
			interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
			reg = <1>;
		};
	};
};

/*
 * Detection signals for internal USB modules.
 * Used for robust USB plug and play handling such as USB downstream port
 * power-cycle and USB hub reset in case of misbehaving or crashed modules.
 *
 * SMPS - AC input monitor based on zero crossing.
 * Used for last gasp notification.
 */
&gpio3 {
	gpio-line-names = "", "", "", "", "", "", "", "",
	"", "", "", "", "smps-ac-monitor", "", "usb-hub-reset", "",
	"", "", "", "", "", "", "", "",
	"", "module-b-detection", "", "module-a-detection", "", "", "", "";
};

/*
 * Tamper IRQ trigger timestamp reading.
 * Used for sealed cover opened/closed notification.
 */
&gpio5 {
	gpio-line-names = "", "", "", "", "", "", "", "",
	"", "", "", "", "rtc-tamper-irq", "", "", "",
	"", "", "", "", "", "", "", "",
	"", "", "", "", "", "", "", "";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_misc>;

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO		0x7c /* X2-15 */
			MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI		0x74 /* X2-18 */
			MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK		0x74 /* X2-13 */
			MX7D_PAD_ECSPI2_SS0__GPIO4_IO23			0x74 /* X2-20 */
			/* RTC - Tamper IRQ */
			MX7D_PAD_SD2_CLK__GPIO5_IO12			0x3c /* X1-92 */
		>;
	};

	pinctrl_ecspi4: ecspi4grp {
		fsl,pins = <
			MX7D_PAD_LCD_CLK__ECSPI4_MISO			0x7c /* X2-72 */
			MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI		0x74 /* X2-68 */
			MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK			0x74 /* X2-76 */
			MX7D_PAD_LCD_VSYNC__GPIO3_IO3			0x74 /* X2-78 */
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO10__ENET1_MDIO			0x03 /* X2-48 */
			MX7D_PAD_GPIO1_IO11__ENET1_MDC			0x03 /* X2-46 */
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x71 /* X2-53 */
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x71 /* X2-55 */
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	0x71 /* X2-61 */
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x79 /* X2-56 */
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x79 /* X2-58 */
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x79 /* X2-64 */
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER		0x73 /* X2-52 */
			/* PHY reset: SRE_FAST, DSE_X1 */
			MX7D_PAD_ENET1_COL__GPIO7_IO15			0x00 /* X1-96 */
			/* Clock from PHY to MAC: 100kPU */
			MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1		0x70 /* X3-4 */
			/* PHY interrupt: 100kPU, HYS */
			MX7D_PAD_GPIO1_IO09__GPIO1_IO9			0x78 /* X1-80 */
		>;
	};

	pinctrl_leds: ledsgrp {
		fsl,pins = <
			MX7D_PAD_LCD_DATA01__GPIO3_IO6			0x14 /* X2-82 */
			MX7D_PAD_EPDC_BDR0__GPIO2_IO28			0x14 /* X1-82 */
			MX7D_PAD_EPDC_BDR1__GPIO2_IO29			0x14 /* X1-84 */
			MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30		0x14 /* X1-86 */
			MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31		0x14 /* X1-88 */
			MX7D_PAD_UART2_TX_DATA__GPIO4_IO3		0x14 /* X1-90 */
		>;
	};

	pinctrl_misc: miscgrp {
		fsl,pins = <
			/* Module A detection (low = present) */
			MX7D_PAD_LCD_DATA22__GPIO3_IO27			0x7c /* X2-105 */
			/* Module B detection (low = present) */
			MX7D_PAD_LCD_DATA20__GPIO3_IO25			0x7c /* X2-103 */
			/* SMPS - AC input monitor (high = failure) */
			MX7D_PAD_LCD_DATA07__GPIO3_IO12			0x7c /* X2-88 */
			/* USB - Hub reset */
			MX7D_PAD_LCD_DATA09__GPIO3_IO14			0x74 /* X2-92 */
		>;
	};

	pinctrl_restart: restartgrp {
		fsl,pins = <
			MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12	0x74 /* X1-94 */
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX	0x7e /* X3-14 */
			MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX	0x76 /* X3-16 */
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_usbotg2: usbotg2grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO06__USB_OTG2_OC	0x5c /* X3-11 */
			MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7	0x59 /* X3-9 */
		>;
	};

};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
};

&usbotg2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg2>;
	vbus-supply = <&reg_usb_otg2_vbus>;
	srp-disable;
	hnp-disable;
	adp-disable;
	over-current-active-low;
	dr_mode = "host";
	status = "okay";
};

/*
 * External watchdog feature provided by pcf2127.
 */
&wdog1 {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Device Tree Source for TQ-Systems TQMa7D board on MBa7 carrier board.
 *
 * Copyright (C) 2016 TQ-Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
 */

/dts-v1/;

#include "imx7d-tqma7.dtsi"
#include "imx7-mba7.dtsi"

/ {
	model = "TQ-Systems TQMa7D board on MBa7 carrier board";
	compatible = "tq,imx7d-mba7", "tq,imx7d-tqma7", "fsl,imx7d";
};

&fec2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet2>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
	phy-reset-duration = <1>;
	phy-supply = <&reg_fec2_pwdn>;
	phy-handle = <&ethphy2_0>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy2_0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
		};
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_mba7_1>;

	pinctrl_enet2: enet2grp {
		fsl,pins = <
			MX7D_PAD_SD2_CD_B__ENET2_MDIO			0x02
			MX7D_PAD_SD2_WP__ENET2_MDC			0x00
			MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC		0x71
			MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0		0x71
			MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1		0x71
			MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2		0x71
			MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3		0x71
			MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL		0x71
			MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC		0x79
			MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0		0x79
			MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1		0x79
			MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2		0x79
			MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3		0x79
			MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL		0x79
			/* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */
			MX7D_PAD_EPDC_BDR0__GPIO2_IO28		0x40000070
			/* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */
			MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31	0x40000078
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			/* #pcie_wake */
			MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30		0x70
			/* #pcie_rst */
			MX7D_PAD_SD2_CLK__GPIO5_IO12			0x70
			/* #pcie_dis */
			MX7D_PAD_EPDC_BDR1__GPIO2_IO29			0x70
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_usbotg2: usbotg2grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO06__USB_OTG2_OC	0x5c
			MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7	0x59
		>;
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	/* 1.5V logically from 3.3V */
	/* probe deferral not supported */
	/* pcie-bus-supply = <&reg_mpcie_1v5>; */
	reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&usbotg2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg2>;
	vbus-supply = <&reg_usb_otg2_vbus>;
	srp-disable;
	hnp-disable;
	adp-disable;
	dr_mode = "host";
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 * Copyright (C) 2019 Linaro Ltd.
 */

/dts-v1/;

#include "imx7d.dtsi"

/ {
	model = "96Boards Meerkat96 Board";
	compatible = "novtech,imx7d-meerkat96", "fsl,imx7d";

	chosen {
		stdout-path = &uart6;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512MB */
	};

	reg_wlreg_on: regulator-wlreg-on {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wlreg_on>;
		regulator-name = "wlreg_on";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <100>;
		gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg2_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led1 {
			label = "green:user1";
			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led2 {
			label = "green:user2";
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led3 {
			label = "green:user3";
			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};

		led4 {
			label = "green:user4";
			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "none";
			default-state = "off";
			panic-indicator;
		};

		led5 {
			label = "yellow:wlan";
			gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "phy0tx";
			default-state = "off";
		};

		led6 {
			label = "blue:bt";
			gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "bluetooth-power";
			default-state = "off";
		};
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";
};

&lcdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lcdif>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	uart-has-rtscts;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	status = "okay";
};

&uart7 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart7 &pinctrl_bt_gpios>;
	assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	uart-has-rtscts;
	fsl,dte-mode;
	status = "okay";

	bluetooth {
		compatible = "brcm,bcm43438-bt";
		device-wakeup-gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
		host-wakeup-gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>;
	};
};

&usbotg1 {
	vbus-supply = <&reg_usb_otg1_vbus>;
	status = "okay";
};

&usbotg2 {
	vbus-supply = <&reg_usb_otg2_vbus>;
	dr_mode = "host";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	keep-power-in-suspend;
	fsl,tuning-step = <2>;
	vmmc-supply = <&reg_3p3v>;
	no-1-8-v;
	broken-cd;
	status = "okay";
};

&usdhc3 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <4>;
	no-1-8-v;
	no-mmc;
	non-removable;
	keep-power-in-suspend;
	wakeup-source;
	vmmc-supply = <&reg_wlreg_on>;
	vqmmc-supply =<&reg_3p3v>;
	status = "okay";

	brcmf: wifi@1 {
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wlan_irq>;
		interrupt-parent = <&gpio6>;
		interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "host-wake";
	};
};

&iomuxc {
	pinctrl_bt_gpios: btgpiosgrp {
		fsl,pins = <
			MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13	0x59
			MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17	0x1f
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0	0x59
			MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4	0x59
			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x59
			MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6	0x59
			MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7	0x59
			MX7D_PAD_SD1_RESET_B__GPIO5_IO2		0x59
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f
			MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SDA__I2C2_SDA		0x4000007f
			MX7D_PAD_I2C2_SCL__I2C2_SCL		0x4000007f
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA	0x4000007f
			MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL	0x4000007f
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA		0x4000007f
			MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL		0x4000007f
		>;
	};

	pinctrl_lcdif: lcdifgrp {
		fsl,pins = <
			MX7D_PAD_LCD_DATA00__LCD_DATA0		0x79
			MX7D_PAD_LCD_DATA01__LCD_DATA1		0x79
			MX7D_PAD_LCD_DATA02__LCD_DATA2		0x79
			MX7D_PAD_LCD_DATA03__LCD_DATA3		0x79
			MX7D_PAD_LCD_DATA04__LCD_DATA4		0x79
			MX7D_PAD_LCD_DATA05__LCD_DATA5		0x79
			MX7D_PAD_LCD_DATA06__LCD_DATA6		0x79
			MX7D_PAD_LCD_DATA07__LCD_DATA7		0x79
			MX7D_PAD_LCD_DATA08__LCD_DATA8		0x79
			MX7D_PAD_LCD_DATA09__LCD_DATA9		0x79
			MX7D_PAD_LCD_DATA10__LCD_DATA10		0x79
			MX7D_PAD_LCD_DATA11__LCD_DATA11		0x79
			MX7D_PAD_LCD_DATA12__LCD_DATA12		0x79
			MX7D_PAD_LCD_DATA13__LCD_DATA13		0x79
			MX7D_PAD_LCD_DATA14__LCD_DATA14		0x79
			MX7D_PAD_LCD_DATA15__LCD_DATA15		0x79
			MX7D_PAD_LCD_DATA16__LCD_DATA16		0x79
			MX7D_PAD_LCD_DATA17__LCD_DATA17		0x79
			MX7D_PAD_LCD_DATA18__LCD_DATA18		0x79
			MX7D_PAD_LCD_DATA19__LCD_DATA19		0x79
			MX7D_PAD_LCD_DATA20__LCD_DATA20		0x79
			MX7D_PAD_LCD_DATA21__LCD_DATA21		0x79
			MX7D_PAD_LCD_DATA22__LCD_DATA22		0x79
			MX7D_PAD_LCD_DATA23__LCD_DATA23		0x79
			MX7D_PAD_LCD_CLK__LCD_CLK		0x79
			MX7D_PAD_LCD_ENABLE__LCD_ENABLE		0x79
			MX7D_PAD_LCD_VSYNC__LCD_VSYNC		0x79
			MX7D_PAD_LCD_HSYNC__LCD_HSYNC		0x79
			MX7D_PAD_LCD_RESET__LCD_RESET		0x79
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79
			MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x79
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX7D_PAD_SD3_DATA4__UART3_DCE_RX	0x79
			MX7D_PAD_SD3_DATA5__UART3_DCE_TX	0x79
			MX7D_PAD_SD3_DATA6__UART3_DCE_RTS	0x79
			MX7D_PAD_SD3_DATA7__UART3_DCE_CTS	0x79
		>;
	};

	pinctrl_uart6: uart6grp {
		fsl,pins = <
			MX7D_PAD_SD1_CD_B__UART6_DCE_RX		0x79
			MX7D_PAD_SD1_WP__UART6_DCE_TX		0x79
		>;
	};

	pinctrl_uart7: uart7grp {
		fsl,pins = <
			MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX	0x79
			MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX	0x79
			MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS	0x79
			MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS	0x79
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x0D
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
		>;
	};

	pinctrl_wlan_irq: wlanirqgrp {
		fsl,pins = <
			MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14	0x19
		>;
	};

	pinctrl_wlreg_on: wlregongrp {
		fsl,pins = <
			MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15	0x19
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright 2016 Boundary Devices, Inc.
 */

/dts-v1/;

#include "imx7d.dtsi"

/ {
	model = "Boundary Devices i.MX7 Nitrogen7 Board";
	compatible = "boundary,imx7d-nitrogen7", "fsl,imx7d";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};

	backlight-j9 {
		compatible = "gpio-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_backlight_j9>;
		gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
		default-on;
	};

	backlight_lcd: backlight-j20 {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000 0>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
		status = "okay";
	};

	panel-lcd {
		compatible = "okaya,rs800480t-7x0gp";
		backlight = <&backlight_lcd>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&lcdif_out>;
			};
		};
	};

	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg2_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_can2_3v3: regulator-can2-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "can2-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio2 14 GPIO_ACTIVE_LOW>;
	};

	reg_vref_1v8: regulator-vref-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vref-1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	reg_vref_3v3: regulator-vref-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vref-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_wlan: regulator-wlan {
		compatible = "regulator-fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-name = "reg_wlan";
		startup-delay-us = <70000>;
		gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	usdhc2_pwrseq: usdhc2_pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
		clock-names = "ext_clock";
	};
};

&adc1 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&adc2 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
			  <&clks IMX7D_CLKO2_ROOT_DIV>;
	assigned-clock-parents = <&clks IMX7D_CKIL>;
	assigned-clock-rates = <0>, <32768>;
};

&cpu0 {
	cpu-supply = <&sw1a_reg>;
};

&cpu1 {
	cpu-supply = <&sw1a_reg>;
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@4 {
			reg = <4>;
		};
	};
};

&flexcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	xceiver-supply = <&reg_can2_3v3>;
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pmic: pfuze3000@8 {
		compatible = "fsl,pfuze3000";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* use sw1c_reg to align with pfuze100/pfuze200 */
			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
				regulator-always-on;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	rtc@68 {
		compatible = "microcrystal,rv4162";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c2_rv4162>;
		reg = <0x68>;
		interrupts-extended = <&gpio2 15 IRQ_TYPE_LEVEL_LOW>;
	};
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	touch@48 {
		compatible = "ti,tsc2004";
		reg = <0x48>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c3_tsc2004>;
		interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;
		wakeup-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
	};
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";

	codec: wm8960@1a {
		compatible = "wlf,wm8960";
		reg = <0x1a>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		clock-names = "mclk";
		wlf,shared-lrclk;
	};
};

&lcdif {
	status = "okay";

	port {
		lcdif_out: endpoint {
			remote-endpoint = <&panel_in>;
		};
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	uart-has-rtscts;
	status = "okay";
};

&usbotg1 {
	vbus-supply = <&reg_usb_otg1_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg1>;
	status = "okay";
};

&usbotg2 {
	vbus-supply = <&reg_usb_otg2_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg2>;
	dr_mode = "host";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&vgen3_reg>;
	bus-width = <4>;
	fsl,tuning-step = <2>;
	wakeup-source;
	keep-power-in-suspend;
	status = "okay";
};

&usdhc2 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	non-removable;
	vmmc-supply = <&reg_wlan>;
	mmc-pwrseq = <&usdhc2_pwrseq>;
	cap-power-off-card;
	keep-power-in-suspend;
	status = "okay";

	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio4>;
		interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
		ref-clock-frequency = <38400000>;
	};
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
	assigned-clock-rates = <400000000>;
	bus-width = <8>;
	fsl,tuning-step = <2>;
	non-removable;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog1>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_1 &pinctrl_j2>;

	pinctrl_hog_1: hoggrp-1 {
		fsl,pins = <
			MX7D_PAD_SD3_RESET_B__GPIO6_IO11	0x5d
			MX7D_PAD_GPIO1_IO13__GPIO1_IO13		0x7d
			MX7D_PAD_ECSPI2_MISO__GPIO4_IO22	0x7d
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO10__ENET1_MDIO			0x3
			MX7D_PAD_GPIO1_IO11__ENET1_MDC			0x3
			MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1		0x3
			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	0x71
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x71
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x71
			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	0x71
			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	0x71
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	0x71
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	0x71
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x11
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x11
			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	0x11
			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	0x71
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x11
			MX7D_PAD_SD3_STROBE__GPIO6_IO10			0x75
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	0x7d
			MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	0x7d
			MX7D_PAD_EPDC_DATA14__GPIO2_IO14	0x7d
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f
			MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SDA__I2C2_SDA		0x4000007f
			MX7D_PAD_I2C2_SCL__I2C2_SCL		0x4000007f
		>;
	};

	pinctrl_i2c2_rv4162: i2c2-rv4162grp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA15__GPIO2_IO15	0x7d
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX7D_PAD_I2C3_SDA__I2C3_SDA		0x4000007f
			MX7D_PAD_I2C3_SCL__I2C3_SCL		0x4000007f
		>;
	};

	pinctrl_i2c3_tsc2004: i2c3tsc2004grp {
		fsl,pins = <
			MX7D_PAD_LCD_RESET__GPIO3_IO4		0x79
			MX7D_PAD_SD2_WP__GPIO5_IO10		0x7d
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX7D_PAD_I2C4_SDA__I2C4_SDA		0x4000007f
			MX7D_PAD_I2C4_SCL__I2C4_SCL		0x4000007f
		>;
	};

	pinctrl_j2: j2grp {
		fsl,pins = <
			MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15	0x7d
			MX7D_PAD_EPDC_BDR0__GPIO2_IO28		0x7d
			MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12	0x7d
			MX7D_PAD_EPDC_BDR1__GPIO2_IO29		0x7d
			MX7D_PAD_SD1_WP__GPIO5_IO1		0x7d
			MX7D_PAD_EPDC_SDSHR__GPIO2_IO19		0x7d
			MX7D_PAD_SD1_RESET_B__GPIO5_IO2		0x7d
			MX7D_PAD_SD2_RESET_B__GPIO5_IO11	0x7d
			MX7D_PAD_EPDC_DATA07__GPIO2_IO7		0x7d
			MX7D_PAD_EPDC_DATA08__GPIO2_IO8		0x7d
			MX7D_PAD_EPDC_DATA09__GPIO2_IO9		0x7d
			MX7D_PAD_EPDC_DATA10__GPIO2_IO10	0x7d
			MX7D_PAD_EPDC_DATA11__GPIO2_IO11	0x7d
			MX7D_PAD_EPDC_DATA12__GPIO2_IO12	0x7d
			MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14	0x7d
			MX7D_PAD_EPDC_DATA13__GPIO2_IO13	0x7d
			MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13	0x7d
			MX7D_PAD_SD2_CD_B__GPIO5_IO9		0x7d
			MX7D_PAD_EPDC_GDCLK__GPIO2_IO24		0x7d
			MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21	0x7d
			MX7D_PAD_EPDC_GDOE__GPIO2_IO25		0x7d
			MX7D_PAD_EPDC_GDRL__GPIO2_IO26		0x7d
			MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22	0x7d
			MX7D_PAD_EPDC_SDCE0__GPIO2_IO20		0x7d
			MX7D_PAD_SAI2_TX_BCLK__GPIO6_IO20	0x7d
			MX7D_PAD_EPDC_SDCE1__GPIO2_IO21		0x7d
			MX7D_PAD_SAI2_TX_SYNC__GPIO6_IO19	0x7d
			MX7D_PAD_EPDC_SDCE2__GPIO2_IO22		0x7d
			MX7D_PAD_EPDC_SDCE3__GPIO2_IO23		0x7d
			MX7D_PAD_EPDC_GDSP__GPIO2_IO27		0x7d
			MX7D_PAD_EPDC_SDCLK__GPIO2_IO16		0x7d
			MX7D_PAD_EPDC_SDLE__GPIO2_IO17		0x7d
			MX7D_PAD_EPDC_SDOE__GPIO2_IO18		0x7d
			MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30	0x7d
			MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31	0x7d
		>;
	};

	pinctrl_lcdif_dat: lcdifdatgrp {
		fsl,pins = <
			MX7D_PAD_LCD_DATA00__LCD_DATA0		0x79
			MX7D_PAD_LCD_DATA01__LCD_DATA1		0x79
			MX7D_PAD_LCD_DATA02__LCD_DATA2		0x79
			MX7D_PAD_LCD_DATA03__LCD_DATA3		0x79
			MX7D_PAD_LCD_DATA04__LCD_DATA4		0x79
			MX7D_PAD_LCD_DATA05__LCD_DATA5		0x79
			MX7D_PAD_LCD_DATA06__LCD_DATA6		0x79
			MX7D_PAD_LCD_DATA07__LCD_DATA7		0x79
			MX7D_PAD_LCD_DATA08__LCD_DATA8		0x79
			MX7D_PAD_LCD_DATA09__LCD_DATA9		0x79
			MX7D_PAD_LCD_DATA10__LCD_DATA10		0x79
			MX7D_PAD_LCD_DATA11__LCD_DATA11		0x79
			MX7D_PAD_LCD_DATA12__LCD_DATA12		0x79
			MX7D_PAD_LCD_DATA13__LCD_DATA13		0x79
			MX7D_PAD_LCD_DATA14__LCD_DATA14		0x79
			MX7D_PAD_LCD_DATA15__LCD_DATA15		0x79
			MX7D_PAD_LCD_DATA16__LCD_DATA16		0x79
			MX7D_PAD_LCD_DATA17__LCD_DATA17		0x79
			MX7D_PAD_LCD_DATA18__LCD_DATA18		0x79
			MX7D_PAD_LCD_DATA19__LCD_DATA19		0x79
			MX7D_PAD_LCD_DATA20__LCD_DATA20		0x79
			MX7D_PAD_LCD_DATA21__LCD_DATA21		0x79
			MX7D_PAD_LCD_DATA22__LCD_DATA22		0x79
			MX7D_PAD_LCD_DATA23__LCD_DATA23		0x79
		>;
	};

	pinctrl_lcdif_ctrl: lcdifctrlgrp {
		fsl,pins = <
			MX7D_PAD_LCD_CLK__LCD_CLK		0x79
			MX7D_PAD_LCD_ENABLE__LCD_ENABLE		0x79
			MX7D_PAD_LCD_VSYNC__LCD_VSYNC		0x79
			MX7D_PAD_LCD_HSYNC__LCD_HSYNC		0x79
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO09__PWM2_OUT		0x7d
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79
			MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x79
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX	0x79
			MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX	0x79
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX	0x79
			MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX	0x79
			MX7D_PAD_EPDC_DATA04__GPIO2_IO4		0x7d
		>;
	};

	pinctrl_uart6: uart6grp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX	0x79
			MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX	0x79
			MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS	0x79
			MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS	0x79
		>;
	};

	pinctrl_usbotg2: usbotg2grp {
		fsl,pins = <
			MX7D_PAD_UART3_RTS_B__USB_OTG2_OC	0x7d
			MX7D_PAD_UART3_CTS_B__GPIO4_IO7		0x14
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
			MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x75
			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x75
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX7D_PAD_SD2_CMD__SD2_CMD		0x59
			MX7D_PAD_SD2_CLK__SD2_CLK		0x19
			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x59
			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x59
			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x59
			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x59
			MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20	0x59
			MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21	0x59
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
		>;
	};
};

&iomuxc_lpsr {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_2>;

	pinctrl_hog_2: hoggrp-2 {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2	0x7d
			MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2	0x7d
		>;
	};

	pinctrl_backlight_j9: backlightj9grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7	0x7d
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT	0x7d
		>;
	};

	pinctrl_usbotg1: usbotg1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC	0x7d
			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x14
		>;
	};

	pinctrl_wdog1: wdog1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B	0x75
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright 2015 Technexion Ltd.
//
// Author: Wig Cheng  <wig.cheng@technexion.com>
//	   Richard Hu <richard.hu@technexion.com>
//	   Tapani Utriainen <tapani@technexion.com>
/dts-v1/;

#include "imx7d-pico.dtsi"
/ {
	model = "TechNexion PICO-IMX7D and DWARF baseboard";
	compatible = "technexion,imx7d-pico-dwarf", "fsl,imx7d";

	sound {
		compatible = "fsl,imx-audio-sgtl5000";
		model = "imx7d-sgtl5000";
		audio-cpu = <&sai1>;
		audio-codec = <&sgtl5000>;
		audio-routing =
			"LINE_IN", "Line In Jack",
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
	};

	sys_mclk: clock-sys-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};
};

&i2c1 {
	clock_frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	sgtl5000: audio-codec@a {
		reg = <0x0a>;
		compatible = "fsl,sgtl5000";
		clocks = <&sys_mclk>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};

	pressure-sensor@60 {
		compatible = "fsl,mpl3115";
		reg = <0x60>;
	};
};

&i2c4 {
	clock_frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pca9554: io-expander@25 {
		compatible = "nxp,pca9554";
		gpio-controller;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
		reg = <0x25>;
	};

	touchscreen@38 {
		compatible = "edt,edt-ft5x06";
		reg = <0x38>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_touchscreen>;
		interrupt-parent = <&gpio2>;
		interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
		reset-gpios = <&pca9554 4 GPIO_ACTIVE_LOW>;
		touchscreen-size-x = <800>;
		touchscreen-size-y = <480>;
	};
};

&iomuxc {
	pinctrl_touchscreen: touchscreengrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA13__GPIO2_IO13	0x14
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
//
// Copyright 2017 NXP

#include "imx7d-pico.dtsi"

/ {
	model = "TechNexion PICO-IMX7D Board using Hobbit baseboard";
	compatible = "technexion,imx7d-pico-hobbit", "fsl,imx7d";

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led {
			label = "gpio-led";
			gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
		};
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "imx7-sgtl5000";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&dailink_master>;
		simple-audio-card,frame-master = <&dailink_master>;
		simple-audio-card,cpu {
			sound-dai = <&sai1>;
		};

		dailink_master: simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		};
	};
};

&i2c1 {
	sgtl5000: codec@a {
		#sound-dai-cells = <0>;
		reg = <0x0a>;
		compatible = "fsl,sgtl5000";
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_vref_1v8>;
	};
};

&i2c4 {
	status = "okay";

	adc081c: adc@50 {
		compatible = "ti,adc081c";
		reg = <0x50>;
		vref-supply = <&reg_3p3v>;
	};
};

&ecspi3 {
	ads7846@0 {
		reg = <0>;
		compatible = "ti,ads7846";
		interrupt-parent = <&gpio2>;
		interrupts = <7 0>;
		spi-max-frequency = <1000000>;
		pendown-gpio = <&gpio2 7 0>;
		vcc-supply = <&reg_3p3v>;
		ti,x-min = /bits/ 16 <0>;
		ti,x-max = /bits/ 16 <4095>;
		ti,y-min = /bits/ 16 <0>;
		ti,y-max = /bits/ 16 <4095>;
		ti,pressure-max = /bits/ 16 <1024>;
		ti,x-plate-ohms = /bits/ 16 <90>;
		ti,y-plate-ohms = /bits/ 16 <90>;
		ti,debounce-max = /bits/ 16 <70>;
		ti,debounce-tol = /bits/ 16 <3>;
		ti,debounce-rep = /bits/ 16 <2>;
		ti,settle-delay-usec = /bits/ 16 <150>;
		wakeup-source;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_hog: hoggrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA00__GPIO2_IO0		0x14
			MX7D_PAD_EPDC_DATA01__GPIO2_IO1		0x14
			MX7D_PAD_EPDC_DATA02__GPIO2_IO2		0x14
			MX7D_PAD_EPDC_DATA03__GPIO2_IO3		0x14
			MX7D_PAD_EPDC_DATA05__GPIO2_IO5		0x14
			MX7D_PAD_EPDC_DATA12__GPIO2_IO12	0x14
			MX7D_PAD_EPDC_DATA07__GPIO2_IO7		0x14
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA13__GPIO2_IO13	0x14
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright 2015 Technexion Ltd.
//
// Author: Wig Cheng  <wig.cheng@technexion.com>
//	   Richard Hu <richard.hu@technexion.com>
//	   Tapani Utriainen <tapani@technexion.com>
/dts-v1/;

#include "imx7d-pico.dtsi"
/ {
	model = "TechNexion PICO-IMX7 and NYMPH baseboard";
	compatible = "technexion,imx7d-pico-nymph", "fsl,imx7d";

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led {
			label = "gpio-led";
			gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
		};
	};

	sound {
		compatible = "fsl,imx-audio-sgtl5000";
		model = "imx7d-sgtl5000";
		audio-cpu = <&sai1>;
		audio-codec = <&sgtl5000>;
		audio-routing =
			"LINE_IN", "Line In Jack",
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
	};

	sys_mclk: clock-sys-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};
};

&i2c1 {
	clock_frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	sgtl5000: audio-codec@a {
		reg = <0x0a>;
		compatible = "fsl,sgtl5000";
		clocks = <&sys_mclk>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};

	adc@52 {
		compatible = "ti,adc081c";
		reg = <0x52>;
		vref-supply = <&reg_2p5v>;
	};
};

&i2c2 {
	clock_frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	rtc@68 {
		compatible = "dallas,ds1337";
		reg = <0x68>;
	};
};

&iomuxc {
	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA13__GPIO2_IO13	0x14
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
//
// Copyright 2017 NXP

#include "imx7d-pico.dtsi"

/ {
	model = "TechNexion PICO-IMX7D Board and PI baseboard";
	compatible = "technexion,imx7d-pico-pi", "fsl,imx7d";

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led {
			label = "gpio-led";
			gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
		};
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "imx7-sgtl5000";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&dailink_master>;
		simple-audio-card,frame-master = <&dailink_master>;
		simple-audio-card,cpu {
			sound-dai = <&sai1>;
		};

		dailink_master: simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		};
	};
};

&i2c1 {
	sgtl5000: codec@a {
		#sound-dai-cells = <0>;
		reg = <0x0a>;
		compatible = "fsl,sgtl5000";
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_vref_1v8>;
	};
};

&i2c4 {
	polytouch: touchscreen@38 {
		compatible = "edt,edt-ft5x06";
		reg = <0x38>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_touchscreen>;
		interrupt-parent = <&gpio2>;
		interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
		reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
		touchscreen-size-x = <800>;
		touchscreen-size-y = <480>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_hog: hoggrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA00__GPIO2_IO0		0x14
			MX7D_PAD_EPDC_DATA01__GPIO2_IO1		0x14
			MX7D_PAD_EPDC_DATA02__GPIO2_IO2		0x14
			MX7D_PAD_EPDC_DATA03__GPIO2_IO3		0x14
			MX7D_PAD_EPDC_DATA05__GPIO2_IO5		0x14
			MX7D_PAD_EPDC_DATA12__GPIO2_IO12	0x14
			MX7D_PAD_EPDC_DATA07__GPIO2_IO7		0x14
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA06__GPIO2_IO6		0x14
		>;
	};

	pinctrl_touchscreen: touchscreengrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA04__GPIO2_IO4		0x14
			MX7D_PAD_EPDC_DATA13__GPIO2_IO13	0x14
		>;
	};

};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
//
// Copyright 2017 NXP

/dts-v1/;

#include "imx7d.dtsi"

/ {
	backlight: backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 50000 0>;
		brightness-levels = <0 36 72 108 144 180 216 255>;
		default-brightness-level = <6>;
	};

	/* Will be filled by the bootloader */
	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0>;
	};

	panel {
		compatible = "vxt,vl050-8048nt-c01";
		backlight = <&backlight>;
		power-supply = <&reg_lcd_3v3>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&display_out>;
			};
		};
	};

	reg_lcd_3v3: regulator-lcd-3v3 {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_lcdreg_on>;
		regulator-name = "lcd-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_wlreg_on: regulator-wlreg_on {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_wlreg_on>;
		regulator-name = "wlreg_on";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_2p5v: regulator-2p5v {
		compatible = "regulator-fixed";
		regulator-name = "2P5V";
		regulator-min-microvolt = <2500000>;
		regulator-max-microvolt = <2500000>;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbotg1_pwr>;
		compatible = "regulator-fixed";
		regulator-name = "usb_otg1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
	};

	reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg2_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	reg_vref_1v8: regulator-vref-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vref-1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	usdhc2_pwrseq: usdhc2_pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
		clock-names = "ext_clock";
	};
};

&clks {
	assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
			  <&clks IMX7D_CLKO2_ROOT_DIV>;
	assigned-clock-parents = <&clks IMX7D_CKIL>;
	assigned-clock-rates = <0>, <32768>;
};

&ecspi3 {
	cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	status = "okay";
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
	phy-reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
			status = "okay";
		};
	};
};

&flexcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	status = "okay";
};

&flexcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";

	pmic: pfuze3000@8 {
		compatible = "fsl,pfuze3000";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};
			/* use sw1c_reg to align with pfuze100/pfuze200 */
			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&lcdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lcdif>;
	status = "okay";

	port {
		display_out: endpoint {
			remote-endpoint = <&panel_in>;
		};
	};
};

&sai1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai1>;
	assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
			  <&clks IMX7D_SAI1_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <0>, <24576000>;
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	status = "okay";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&pwm4 { /* Backlight */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	uart-has-rtscts;
	status = "okay";
};

&uart7 { /* Bluetooth */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart7>;
	assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	uart-has-rtscts;
	status = "okay";
};

&usbotg1 {
	vbus-supply = <&reg_usb_otg1_vbus>;
	status = "okay";
};

&usbotg2 {
	vbus-supply = <&reg_usb_otg2_vbus>;
	dr_mode = "host";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	fsl,tuning-step = <2>;
	vmmc-supply = <&reg_3p3v>;
	wakeup-source;
	no-1-8-v;
	keep-power-in-suspend;
	status = "okay";
};

&usdhc2 { /* Wifi SDIO */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_wifi_clk>;
	no-1-8-v;
	non-removable;
	keep-power-in-suspend;
	wakeup-source;
	vmmc-supply = <&reg_wlreg_on>;
	mmc-pwrseq = <&usdhc2_pwrseq>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
	assigned-clock-rates = <400000000>;
	bus-width = <8>;
	no-1-8-v;
	fsl,tuning-step = <2>;
	non-removable;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&iomuxc {
	pinctrl_ecspi3: ecspi3grp {
		fsl,pins = <
			MX7D_PAD_I2C1_SCL__ECSPI3_MISO		0x2
			MX7D_PAD_I2C1_SDA__ECSPI3_MOSI		0x2
			MX7D_PAD_I2C2_SCL__ECSPI3_SCLK		0x2
			MX7D_PAD_I2C2_SDA__GPIO4_IO11		0x14
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX7D_PAD_UART1_TX_DATA__I2C1_SDA	0x4000007f
			MX7D_PAD_UART1_RX_DATA__I2C1_SCL	0x4000007f
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_UART2_TX_DATA__I2C2_SDA	0x4000007f
			MX7D_PAD_UART2_RX_DATA__I2C2_SCL	0x4000007f
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_SD2_CD_B__ENET1_MDIO			0x3
			MX7D_PAD_SD2_WP__ENET1_MDC			0x3
			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	0x1
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x1
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x1
			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	0x1
			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	0x1
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	0x1
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	0x1
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x1
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x1
			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	0x1
			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	0x1
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x1
			MX7D_PAD_SD3_RESET_B__GPIO6_IO11		0x1  /* Ethernet reset */
		>;
	};

	pinctrl_can1: can1frp {
		fsl,pins = <
			MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX	0x59
			MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX	0x59
		>;
	};

	pinctrl_can2: can2frp {
		fsl,pins = <
			MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX	0x59
			MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX	0x59
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA		0x4000007f
			MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL		0x4000007f
		>;
	};

	pinctrl_lcdif: lcdifgrp {
		fsl,pins = <
			MX7D_PAD_LCD_DATA00__LCD_DATA0		0x79
			MX7D_PAD_LCD_DATA01__LCD_DATA1		0x79
			MX7D_PAD_LCD_DATA02__LCD_DATA2		0x79
			MX7D_PAD_LCD_DATA03__LCD_DATA3		0x79
			MX7D_PAD_LCD_DATA04__LCD_DATA4		0x79
			MX7D_PAD_LCD_DATA05__LCD_DATA5		0x79
			MX7D_PAD_LCD_DATA06__LCD_DATA6		0x79
			MX7D_PAD_LCD_DATA07__LCD_DATA7		0x79
			MX7D_PAD_LCD_DATA08__LCD_DATA8		0x79
			MX7D_PAD_LCD_DATA09__LCD_DATA9		0x79
			MX7D_PAD_LCD_DATA10__LCD_DATA10		0x79
			MX7D_PAD_LCD_DATA11__LCD_DATA11		0x79
			MX7D_PAD_LCD_DATA12__LCD_DATA12		0x79
			MX7D_PAD_LCD_DATA13__LCD_DATA13		0x79
			MX7D_PAD_LCD_DATA14__LCD_DATA14		0x79
			MX7D_PAD_LCD_DATA15__LCD_DATA15		0x79
			MX7D_PAD_LCD_DATA16__LCD_DATA16		0x79
			MX7D_PAD_LCD_DATA17__LCD_DATA17		0x79
			MX7D_PAD_LCD_DATA18__LCD_DATA18		0x79
			MX7D_PAD_LCD_DATA19__LCD_DATA19		0x79
			MX7D_PAD_LCD_DATA20__LCD_DATA20		0x79
			MX7D_PAD_LCD_DATA21__LCD_DATA21		0x79
			MX7D_PAD_LCD_DATA22__LCD_DATA22		0x79
			MX7D_PAD_LCD_DATA23__LCD_DATA23		0x79
			MX7D_PAD_LCD_CLK__LCD_CLK		0x79
			MX7D_PAD_LCD_ENABLE__LCD_ENABLE		0x78
			MX7D_PAD_LCD_VSYNC__LCD_VSYNC		0x78
			MX7D_PAD_LCD_HSYNC__LCD_HSYNC		0x78
			MX7D_PAD_LCD_RESET__GPIO3_IO4		0x14
		>;
	};

	pinctrl_pwm1: pwm1 {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO08__PWM1_OUT	0x7f
		>;
	};

	pinctrl_pwm2: pwm2 {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO09__PWM2_OUT	0x7f
		>;
	};

	pinctrl_pwm3: pwm3 {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO10__PWM3_OUT	0x7f
		>;
	};

	pinctrl_pwm4: pwm4grp{
		fsl,pins = <
			MX7D_PAD_GPIO1_IO11__PWM4_OUT	0x7f
		>;
	};

	pinctrl_reg_wlreg_on: regregongrp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16	0x59
		>;
	};

	pinctrl_sai1: sai1grp {
		fsl,pins = <
			MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK	0x1f
			MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC	0x1f
			MX7D_PAD_ENET1_COL__SAI1_TX_DATA0	0x30
			MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0	0x1f
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX7D_PAD_I2C4_SDA__UART5_DCE_TX		0x79
			MX7D_PAD_I2C4_SCL__UART5_DCE_RX		0x79
		>;
	};

	pinctrl_uart6: uart6grp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA08__UART6_DCE_RX	0x79
			MX7D_PAD_EPDC_DATA09__UART6_DCE_TX	0x79
			MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS	0x79
			MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS	0x79
		>;
	};

	pinctrl_uart7: uart7grp {
		fsl,pins = <
			MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX	0x79
			MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX	0x79
			MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS	0x79
			MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS	0x79
		>;
	};

	pinctrl_usbotg1_pwr: usbotg_pwr {
		fsl,pins = <
			MX7D_PAD_UART3_TX_DATA__GPIO4_IO5	0x14
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x15
		>;
	};

	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x5a
			MX7D_PAD_SD1_CLK__SD1_CLK		0x1a
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5a
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5a
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5a
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5a
			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x15
		>;
	};

	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x5b
			MX7D_PAD_SD1_CLK__SD1_CLK		0x1b
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5b
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5b
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5b
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5b
			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x15
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX7D_PAD_SD2_CMD__SD2_CMD		0x59
			MX7D_PAD_SD2_CLK__SD2_CLK		0x19
			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x59
			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x59
			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x59
			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x59
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x5a
			MX7D_PAD_SD3_CLK__SD3_CLK		0x1a
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5a
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5a
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5a
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5a
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5a
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5a
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5a
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5a
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x5b
			MX7D_PAD_SD3_CLK__SD3_CLK		0x1b
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5b
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5b
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5b
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5b
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5b
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5b
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5b
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5b
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_wifi_clk: wificlkgrp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2	0x7d
		>;
	};

	pinctrl_reg_lcdreg_on: reglcdongrp {
	fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6	0x59
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B	0x74
		>;
	};
};