code:
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include "orion5x-mv88f5182.dtsi"

/ {
	model = "Marvell Reference Design 88F5182 NAS";
	compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x4000000>; /* 64 MB */
	};

	chosen {
		bootargs = "console=ttyS0,115200n8 earlyprintk";
		stdout-path = &uart0;
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
		         <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
			 <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x80000>,
			 <MBUS_ID(0x01, 0x1d) 0 0xfc000000 0x1000000>;
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_debug_led>;
		pinctrl-names = "default";

		led@0 {
			label = "rd88f5182:cpu";
			linux,default-trigger = "heartbeat";
			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
		};
	};
};

&devbus_bootcs {
	status = "okay";

	/* Read parameters */
	devbus,bus-width    = <8>;
	devbus,turn-off-ps  = <90000>;
	devbus,badr-skew-ps = <0>;
	devbus,acc-first-ps = <186000>;
	devbus,acc-next-ps  = <186000>;

	/* Write parameters */
	devbus,wr-high-ps  = <90000>;
	devbus,wr-low-ps   = <90000>;
	devbus,ale-wr-ps   = <90000>;

	flash@0 {
		compatible = "cfi-flash";
		reg = <0 0x80000>;
		bank-width = <1>;
	};
};

&devbus_cs1 {
	status = "okay";

	/* Read parameters */
	devbus,bus-width    = <8>;
	devbus,turn-off-ps  = <90000>;
	devbus,badr-skew-ps = <0>;
	devbus,acc-first-ps = <186000>;
	devbus,acc-next-ps  = <186000>;

	/* Write parameters */
	devbus,wr-high-ps  = <90000>;
	devbus,wr-low-ps   = <90000>;
	devbus,ale-wr-ps   = <90000>;

	flash@0 {
		compatible = "cfi-flash";
		reg = <0 0x1000000>;
		bank-width = <1>;
	};
};

&ehci0 {
	status = "okay";
};

&ehci1 {
	status = "okay";
};

&eth {
	status = "okay";

	ethernet-port@0 {
		phy-handle = <&ethphy>;
	};
};

&i2c {
	status = "okay";
	clock-frequency = <100000>;
	#address-cells = <1>;

	rtc@68 {
		pinctrl-0 = <&pmx_rtc>;
		pinctrl-names = "default";
		compatible = "dallas,ds1338";
		reg = <0x68>;
	};
};

&mdio {
	status = "okay";

	ethphy: ethernet-phy {
		reg = <8>;
	};
};

&pinctrl {
	pinctrl-0 = <&pmx_reset_switch &pmx_misc_gpios
		&pmx_pci_gpios>;
	pinctrl-names = "default";

	/*
	 * MPP[20] PCI Clock to MV88F5182
	 * MPP[21] PCI Clock to mini PCI CON11
	 * MPP[22] USB 0 over current indication
	 * MPP[23] USB 1 over current indication
	 * MPP[24] USB 1 over current enable
	 * MPP[25] USB 0 over current enable
	 */

	pmx_debug_led: pmx-debug_led {
		marvell,pins = "mpp0";
		marvell,function = "gpio";
	};

	pmx_reset_switch: pmx-reset-switch {
		marvell,pins = "mpp1";
		marvell,function = "gpio";
	};

	pmx_rtc: pmx-rtc {
		marvell,pins = "mpp3";
		marvell,function = "gpio";
	};

	pmx_misc_gpios: pmx-misc-gpios {
		marvell,pins = "mpp4", "mpp5";
		marvell,function = "gpio";
	};

	pmx_pci_gpios: pmx-pci-gpios {
		marvell,pins = "mpp6", "mpp7";
		marvell,function = "gpio";
	};
};

&sata {
	pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
	pinctrl-names = "default";
	status = "okay";
	nr-ports = <2>;
};

&uart0 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "Marvell Orion5x SoC";
	compatible = "marvell,orion5x";
	interrupt-parent = <&intc>;

	aliases {
		gpio0 = &gpio0;
	};

	soc {
		#address-cells = <2>;
		#size-cells = <1>;
		controller = <&mbusc>;

		devbus_bootcs: devbus-bootcs {
			compatible = "marvell,orion-devbus";
			reg = <MBUS_ID(0xf0, 0x01) 0x1046C 0x4>;
			ranges = <0 MBUS_ID(0x01, 0x0f) 0 0xffffffff>;
			#address-cells = <1>;
			#size-cells = <1>;
			clocks = <&core_clk 0>;
			status = "disabled";
		};

		devbus_cs0: devbus-cs0 {
			compatible = "marvell,orion-devbus";
			reg = <MBUS_ID(0xf0, 0x01) 0x1045C 0x4>;
			ranges = <0 MBUS_ID(0x01, 0x1e) 0 0xffffffff>;
			#address-cells = <1>;
			#size-cells = <1>;
			clocks = <&core_clk 0>;
			status = "disabled";
		};

		devbus_cs1: devbus-cs1 {
			compatible = "marvell,orion-devbus";
			reg = <MBUS_ID(0xf0, 0x01) 0x10460 0x4>;
			ranges = <0 MBUS_ID(0x01, 0x1d) 0 0xffffffff>;
			#address-cells = <1>;
			#size-cells = <1>;
			clocks = <&core_clk 0>;
			status = "disabled";
		};

		devbus_cs2: devbus-cs2 {
			compatible = "marvell,orion-devbus";
			reg = <MBUS_ID(0xf0, 0x01) 0x10464 0x4>;
			ranges = <0 MBUS_ID(0x01, 0x1b) 0 0xffffffff>;
			#address-cells = <1>;
			#size-cells = <1>;
			clocks = <&core_clk 0>;
			status = "disabled";
		};

		internal-regs {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;

			gpio0: gpio@10100 {
				compatible = "marvell,orion-gpio";
				#gpio-cells = <2>;
				gpio-controller;
				reg = <0x10100 0x40>;
				ngpios = <32>;
				interrupt-controller;
				#interrupt-cells = <2>;
				interrupts = <6>, <7>, <8>, <9>;
			};

			spi: spi@10600 {
				compatible = "marvell,orion-spi";
				#address-cells = <1>;
				#size-cells = <0>;
				cell-index = <0>;
				reg = <0x10600 0x28>;
				status = "disabled";
			};

			i2c: i2c@11000 {
				compatible = "marvell,mv64xxx-i2c";
				reg = <0x11000 0x20>;
				#address-cells = <1>;
				#size-cells = <0>;
				interrupts = <5>;
				clocks = <&core_clk 0>;
				status = "disabled";
			};

			uart0: serial@12000 {
				compatible = "ns16550a";
				reg = <0x12000 0x100>;
				reg-shift = <2>;
				interrupts = <3>;
				clocks = <&core_clk 0>;
				status = "disabled";
			};

			uart1: serial@12100 {
				compatible = "ns16550a";
				reg = <0x12100 0x100>;
				reg-shift = <2>;
				interrupts = <4>;
				clocks = <&core_clk 0>;
				status = "disabled";
			};

			bridge_intc: bridge-interrupt-ctrl@20110 {
				compatible = "marvell,orion-bridge-intc";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x20110 0x8>;
				interrupts = <0>;
				marvell,#interrupts = <4>;
			};

			intc: interrupt-controller@20200 {
				compatible = "marvell,orion-intc";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x20200 0x08>;
			};

			timer: timer@20300 {
				compatible = "marvell,orion-timer";
				reg = <0x20300 0x20>;
				interrupt-parent = <&bridge_intc>;
				interrupts = <1>, <2>;
				clocks = <&core_clk 0>;
			};

			wdt: wdt@20300 {
				compatible = "marvell,orion-wdt";
				reg = <0x20300 0x28>, <0x20108 0x4>;
				interrupt-parent = <&bridge_intc>;
				interrupts = <3>;
				clocks = <&core_clk 0>;
				status = "okay";
			};

			ehci0: ehci@50000 {
				compatible = "marvell,orion-ehci";
				reg = <0x50000 0x1000>;
				interrupts = <17>;
				status = "disabled";
			};

			xor: dma-controller@60900 {
				compatible = "marvell,orion-xor";
				reg = <0x60900 0x100
				       0x60b00 0x100>;
				status = "okay";

				xor00 {
				      interrupts = <30>;
				      dmacap,memcpy;
				      dmacap,xor;
				};
				xor01 {
				      interrupts = <31>;
				      dmacap,memcpy;
				      dmacap,xor;
				      dmacap,memset;
				};
			};

			eth: ethernet-controller@72000 {
				compatible = "marvell,orion-eth";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x72000 0x4000>;
				marvell,tx-checksum-limit = <1600>;
				status = "disabled";

				ethport: ethernet-port@0 {
					compatible = "marvell,orion-eth-port";
					reg = <0>;
					interrupts = <21>;
					/* overwrite MAC address in bootloader */
					local-mac-address = [00 00 00 00 00 00];
					/* set phy-handle property in board file */
				};
			};

			mdio: mdio-bus@72004 {
				compatible = "marvell,orion-mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x72004 0x84>;
				interrupts = <22>;
				status = "disabled";

				/* add phy nodes in board file */
			};

			sata: sata@80000 {
				compatible = "marvell,orion-sata";
				reg = <0x80000 0x5000>;
				interrupts = <29>;
				status = "disabled";
			};

			cesa: crypto@90000 {
				compatible = "marvell,orion-crypto";
				reg = <0x90000 0x10000>;
				reg-names = "regs";
				interrupts = <28>;
				marvell,crypto-srams = <&crypto_sram>;
				marvell,crypto-sram-size = <0x800>;
				status = "okay";
			};

			ehci1: ehci@a0000 {
				compatible = "marvell,orion-ehci";
				reg = <0xa0000 0x1000>;
				interrupts = <12>;
				status = "disabled";
			};
		};

		crypto_sram: sa-sram {
			compatible = "mmio-sram";
			reg = <MBUS_ID(0x09, 0x00) 0x0 0x800>;
			#address-cells = <1>;
			#size-cells = <1>;
		};
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Cubietech CubieBoard6
 *
 * Copyright (c) 2017 Andreas Färber
 */

/dts-v1/;

#include "owl-s500.dtsi"

/ {
	compatible = "cubietech,cubieboard6", "actions,s500";
	model = "CubieBoard6";

	aliases {
		serial3 = &uart3;
	};

	chosen {
		stdout-path = "serial3:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x80000000>;
	};
};

&timer {
	clocks = <&hosc>;
};

&uart3 {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2016-2017 Andreas Färber
 */

/dts-v1/;

#include "owl-s500-guitar.dtsi"

/ {
	compatible = "lemaker,guitar-bb-rev-b", "lemaker,guitar", "actions,s500";
	model = "LeMaker Guitar Base Board rev. B";

	aliases {
		serial3 = &uart3;
	};

	chosen {
		stdout-path = "serial3:115200n8";
	};
};

&uart3 {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * LeMaker Guitar SoM
 *
 * Copyright (c) 2016-2017 Andreas Färber
 */

#include "owl-s500.dtsi"

/ {
	compatible = "lemaker,guitar", "actions,s500";

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x40000000>;
	};
};

&timer {
	clocks = <&hosc>;
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Caninos Labrador Base Board
 *
 * Copyright (c) 2019-2020 Matheus Castello
 */

/dts-v1/;

#include "owl-s500-labrador-v2.dtsi"

/ {
	model = "Caninos Labrador Core v2 on Labrador Base-M v1";
	compatible = "caninos,labrador-base-m",
		     "caninos,labrador-v2", "actions,s500";

	aliases {
		serial3 = &uart3;
	};

	chosen {
		stdout-path = "serial3:115200n8";
	};
};

&uart3 {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Caninos Labrador SoM V2
 *
 * Copyright (c) 2019-2020 Matheus Castello
 */

#include "owl-s500.dtsi"

/ {
	model = "Caninos Labrador Core V2.1";
	compatible = "caninos,labrador-v2", "actions,s500";

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x80000000>;
	};
};

&timer {
	clocks = <&hosc>;
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Roseapple Pi
 *
 * Copyright (C) 2020-2021 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
 */

/dts-v1/;

#include "owl-s500.dtsi"

/ {
	compatible = "roseapplepi,roseapplepi", "actions,s500";
	model = "Roseapple Pi";

	aliases {
		mmc0 = &mmc0;
		serial2 = &uart2;
	};

	chosen {
		stdout-path = "serial2:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x80000000>; /* 2GB */
	};

	syspwr: regulator-5v0 {
		compatible = "regulator-fixed";
		regulator-name = "SYSPWR";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};
};

&cpu0 {
	cpu0-supply = <&vdd_cpu>;
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	atc260x: pmic@65 {
		compatible = "actions,atc2603c";
		reg = <0x65>;
		interrupt-parent = <&sirq>;
		interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;

		reset-time-sec = <6>;

		regulators {
			compatible = "actions,atc2603c-regulator";

			dcdc1-supply = <&syspwr>;
			dcdc2-supply = <&syspwr>;
			dcdc3-supply = <&syspwr>;
			ldo1-supply = <&syspwr>;
			ldo2-supply = <&syspwr>;
			ldo3-supply = <&syspwr>;
			ldo5-supply = <&syspwr>;
			ldo6-supply = <&syspwr>;
			ldo7-supply = <&syspwr>;
			ldo8-supply = <&syspwr>;
			ldo11-supply = <&syspwr>;
			ldo12-supply = <&syspwr>;
			switchldo1-supply = <&vcc>;

			vdd_cpu: dcdc1 {
				regulator-name = "VDD_CPU";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1400000>;
				regulator-always-on;
			};

			vddq: dcdc2 {
				regulator-name = "VDDQ";
				regulator-min-microvolt = <1300000>;
				regulator-max-microvolt = <2150000>;
				regulator-always-on;
				regulator-boot-on;
			};

			vcc: dcdc3 {
				regulator-name = "VCC";
				regulator-min-microvolt = <2600000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vcc_3v3: ldo1 {
				regulator-name = "VCC_3V3";
				regulator-min-microvolt = <2600000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			avcc: ldo2 {
				regulator-name = "AVCC";
				regulator-min-microvolt = <2600000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vdd_1v8: ldo3 {
				regulator-name = "VDD_1V8";
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <2000000>;
				regulator-always-on;
			};

			vcc_3v1: ldo5 {
				regulator-name = "VCC_3V1";
				regulator-min-microvolt = <2600000>;
				regulator-max-microvolt = <3300000>;
			};

			avdd: ldo6 {
				regulator-name = "AVDD";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1400000>;
				regulator-always-on;
			};

			sens_1v8: ldo7 {
				regulator-name = "SENS_1V8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};

			ldo8: ldo8 {
				regulator-name = "LDO8";
				regulator-min-microvolt = <2300000>;
				regulator-max-microvolt = <3300000>;
			};

			svcc: ldo11 {
				regulator-name = "SVCC";
				regulator-min-microvolt = <2600000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			rtc_vdd: ldo12 {
				regulator-name = "RTC_VDD";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			sd_vcc: switchldo1 {
				regulator-name = "SD_VCC";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				regulator-boot-on;
			};
		};
	};
};

&i2c1 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
};

&i2c2 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
};

&pinctrl {
	i2c0_pins: i2c0-pins {
		pinmux {
			groups = "i2c0_mfp";
			function = "i2c0";
		};

		pinconf {
			pins = "i2c0_sclk", "i2c0_sdata";
			bias-pull-up;
		};
	};

	i2c1_pins: i2c1-pins {
		pinconf {
			pins = "i2c1_sclk", "i2c1_sdata";
			bias-pull-up;
		};
	};

	i2c2_pins: i2c2-pins {
		pinconf {
			pins = "i2c2_sclk", "i2c2_sdata";
			bias-pull-up;
		};
	};

	mmc0_pins: mmc0-pins {
		pinmux {
			groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
				 "sd0_cmd_mfp", "sd0_clk_mfp";
			function = "sd0";
		};

		drv-pinconf {
			groups = "sd0_d0_d3_drv", "sd0_cmd_drv", "sd0_clk_drv";
			drive-strength = <8>;
		};

		bias0-pinconf {
			pins = "sd0_d0", "sd0_d1", "sd0_d2",
			       "sd0_d3", "sd0_cmd";
			bias-pull-up;
		};

		bias1-pinconf {
			pins = "sd0_clk";
			bias-pull-down;
		};
	};

	ethernet_pins: ethernet-pins {
		eth_rmii-pinmux {
			groups = "rmii_txd0_mfp", "rmii_txd1_mfp",
				 "rmii_rxd0_mfp", "rmii_rxd1_mfp",
				 "rmii_txen_mfp", "rmii_rxen_mfp",
				 "rmii_crs_dv_mfp", "rmii_ref_clk_mfp";
			function = "eth_rmii";
		};

		phy_clk-pinmux {
			groups = "clko_25m_mfp";
			function = "clko_25m";
		};

		ref_clk-pinconf {
			groups = "rmii_ref_clk_drv";
			drive-strength = <2>;
		};

	};
};

/* uSD */
&mmc0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	no-sdio;
	no-mmc;
	no-1-8-v;
	cd-gpios = <&pinctrl 117 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	vmmc-supply = <&sd_vcc>;
	vqmmc-supply = <&sd_vcc>;
};

&ethernet {
	pinctrl-names = "default";
	pinctrl-0 = <&ethernet_pins>;
	phy-mode = "rmii";
	phy-handle = <&eth_phy>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
		reset-delay-us = <10000>;
		reset-post-delay-us = <150000>;

		eth_phy: ethernet-phy@3 {
			reg = <0x3>;
			max-speed = <100>;
			interrupt-parent = <&sirq>;
			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
		};
	};
};

&twd_timer {
	status = "okay";
};

&timer {
	clocks = <&hosc>;
};

&uart2 {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Allo.com Sparky
 *
 * Copyright (c) 2017 Andreas Färber
 */

/dts-v1/;

#include "owl-s500.dtsi"

/ {
	compatible = "allo,sparky", "actions,s500";
	model = "Allo.com Sparky";

	aliases {
		serial3 = &uart3;
	};

	chosen {
		stdout-path = "serial3:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x40000000>; /* 1 or 2 GiB */
	};
};

&timer {
	clocks = <&hosc>;
};

&uart3 {
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Actions Semi S500 SoC
 *
 * Copyright (c) 2016-2017 Andreas Färber
 */

#include <dt-bindings/clock/actions,s500-cmu.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/owl-s500-powergate.h>
#include <dt-bindings/reset/actions,s500-reset.h>

/ {
	compatible = "actions,s500";
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
	};

	chosen {
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0x0>;
			enable-method = "actions,s500-smp";
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0x1>;
			enable-method = "actions,s500-smp";
		};

		cpu2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0x2>;
			enable-method = "actions,s500-smp";
			power-domains = <&sps S500_PD_CPU2>;
		};

		cpu3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0x3>;
			enable-method = "actions,s500-smp";
			power-domains = <&sps S500_PD_CPU3>;
		};
	};

	arm-pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
		             <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
		             <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
		             <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
	};

	hosc: hosc {
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		#clock-cells = <0>;
	};

	losc: losc {
		compatible = "fixed-clock";
		clock-frequency = <32768>;
		#clock-cells = <0>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		scu: scu@b0020000 {
			compatible = "arm,cortex-a9-scu";
			reg = <0xb0020000 0x100>;
		};

		global_timer: timer@b0020200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0xb0020200 0x100>;
			interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
			status = "disabled";
		};

		twd_timer: timer@b0020600 {
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0xb0020600 0x20>;
			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
			status = "disabled";
		};

		twd_wdt: wdt@b0020620 {
			compatible = "arm,cortex-a9-twd-wdt";
			reg = <0xb0020620 0xe0>;
			interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
			status = "disabled";
		};

		gic: interrupt-controller@b0021000 {
			compatible = "arm,cortex-a9-gic";
			reg = <0xb0021000 0x1000>,
			      <0xb0020100 0x0100>;
			interrupt-controller;
			#interrupt-cells = <3>;
		};

		l2: cache-controller@b0022000 {
			compatible = "arm,pl310-cache";
			reg = <0xb0022000 0x1000>;
			cache-unified;
			cache-level = <2>;
			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
			arm,tag-latency = <3 3 2>;
			arm,data-latency = <5 3 3>;
		};

		uart0: serial@b0120000 {
			compatible = "actions,s500-uart", "actions,owl-uart";
			reg = <0xb0120000 0x2000>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_UART0>;
			status = "disabled";
		};

		uart1: serial@b0122000 {
			compatible = "actions,s500-uart", "actions,owl-uart";
			reg = <0xb0122000 0x2000>;
			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_UART1>;
			status = "disabled";
		};

		uart2: serial@b0124000 {
			compatible = "actions,s500-uart", "actions,owl-uart";
			reg = <0xb0124000 0x2000>;
			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_UART2>;
			status = "disabled";
		};

		uart3: serial@b0126000 {
			compatible = "actions,s500-uart", "actions,owl-uart";
			reg = <0xb0126000 0x2000>;
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_UART3>;
			status = "disabled";
		};

		uart4: serial@b0128000 {
			compatible = "actions,s500-uart", "actions,owl-uart";
			reg = <0xb0128000 0x2000>;
			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_UART4>;
			status = "disabled";
		};

		uart5: serial@b012a000 {
			compatible = "actions,s500-uart", "actions,owl-uart";
			reg = <0xb012a000 0x2000>;
			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_UART5>;
			status = "disabled";
		};

		uart6: serial@b012c000 {
			compatible = "actions,s500-uart", "actions,owl-uart";
			reg = <0xb012c000 0x2000>;
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_UART6>;
			status = "disabled";
		};

		cmu: clock-controller@b0160000 {
			compatible = "actions,s500-cmu";
			reg = <0xb0160000 0x8000>;
			clocks = <&hosc>, <&losc>;
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		i2c0: i2c@b0170000 {
			compatible = "actions,s500-i2c";
			reg = <0xb0170000 0x4000>;
			clocks = <&cmu CLK_I2C0>;
			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c1: i2c@b0174000 {
			compatible = "actions,s500-i2c";
			reg = <0xb0174000 0x4000>;
			clocks = <&cmu CLK_I2C1>;
			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c2: i2c@b0178000 {
			compatible = "actions,s500-i2c";
			reg = <0xb0178000 0x4000>;
			clocks = <&cmu CLK_I2C2>;
			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c3: i2c@b017c000 {
			compatible = "actions,s500-i2c";
			reg = <0xb017c000 0x4000>;
			clocks = <&cmu CLK_I2C3>;
			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		sirq: interrupt-controller@b01b0200 {
			compatible = "actions,s500-sirq";
			reg = <0xb01b0200 0x4>;
			interrupt-controller;
			#interrupt-cells = <2>;
			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ0 */
				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ1 */
				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; /* SIRQ2 */
		};

		timer: timer@b0168000 {
			compatible = "actions,s500-timer";
			reg = <0xb0168000 0x8000>;
			interrupts = <GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
			             <GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
			             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
			             <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "2hz0", "2hz1", "timer0", "timer1";
		};

		sps: power-controller@b01b0100 {
			compatible = "actions,s500-sps";
			reg = <0xb01b0100 0x100>;
			#power-domain-cells = <1>;
		};

		pinctrl: pinctrl@b01b0000 {
			compatible = "actions,s500-pinctrl";
			reg = <0xb01b0000 0x40>, /* GPIO */
			      <0xb01b0040 0x10>, /* Multiplexing Control */
			      <0xb01b0060 0x18>, /* PAD Control */
			      <0xb01b0080 0xc>;  /* PAD Drive Capacity */
			clocks = <&cmu CLK_GPIO>;
			gpio-controller;
			gpio-ranges = <&pinctrl 0 0 132>;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* GPIOA */
				     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* GPIOB */
				     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* GPIOC */
				     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, /* GPIOD */
				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; /* GPIOE */
		};

		dma: dma-controller@b0260000 {
			compatible = "actions,s500-dma";
			reg = <0xb0260000 0xd00>;
			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
			#dma-cells = <1>;
			dma-channels = <12>;
			dma-requests = <46>;
			clocks = <&cmu CLK_DMAC>;
			power-domains = <&sps S500_PD_DMA>;
		};

		mmc0: mmc@b0230000 {
			compatible = "actions,s500-mmc", "actions,owl-mmc";
			reg = <0xb0230000 0x38>;
			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_SD0>;
			resets = <&cmu RESET_SD0>;
			dmas = <&dma 2>;
			dma-names = "mmc";
			status = "disabled";
		};

		mmc1: mmc@b0234000 {
			compatible = "actions,s500-mmc", "actions,owl-mmc";
			reg = <0xb0234000 0x38>;
			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_SD1>;
			resets = <&cmu RESET_SD1>;
			dmas = <&dma 3>;
			dma-names = "mmc";
			status = "disabled";
		};

		mmc2: mmc@b0238000 {
			compatible = "actions,s500-mmc", "actions,owl-mmc";
			reg = <0xb0238000 0x38>;
			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_SD2>;
			resets = <&cmu RESET_SD2>;
			dmas = <&dma 4>;
			dma-names = "mmc";
			status = "disabled";
		};

		ethernet: ethernet@b0310000 {
			compatible = "actions,s500-emac", "actions,owl-emac";
			reg = <0xb0310000 0x10000>;
			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu CLK_ETHERNET>, <&cmu CLK_RMII_REF>;
			clock-names = "eth", "rmii";
			resets = <&cmu RESET_ETHERNET>;
			status = "disabled";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * wd-mbwe.dtsi - Device tree file for Western Digital My Book World Edition
 *
 * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
 */

/dts-v1/;
#include "ox810se.dtsi"

/ {
	model = "Western Digital My Book World Edition";

	compatible = "wd,mbwe", "oxsemi,ox810se";

	chosen {
		bootargs = "console=ttyS1,115200n8 earlyprintk=serial";
	};

	memory {
		/* 128Mbytes DDR */
		reg = <0x48000000 0x8000000>;
	};

	aliases {
		serial1 = &uart1;
		gpio0 = &gpio0;
		gpio1 = &gpio1;
	};

	gpio-keys-polled {
		compatible = "gpio-keys-polled";
		#address-cells = <1>;
		#size-cells = <0>;
		poll-interval = <100>;

		power {
			label = "power";
			gpios = <&gpio0 0 1>;
			linux,code = <0x198>;
		};

		recovery {
			label = "recovery";
			gpios = <&gpio0 4 1>;
			linux,code = <0xab>;
		};
	};

	leds {
		compatible = "gpio-leds";

		a0 {
			label = "activity0";
			gpios = <&gpio0 25 0>;
			default-state = "keep";
		};

		a1 {
			label = "activity1";
			gpios = <&gpio0 26 0>;
			default-state = "keep";
		};

		a2 {
			label = "activity2";
			gpios = <&gpio0 5 0>;
			default-state = "keep";
		};

		a3 {
			label = "activity3";
			gpios = <&gpio0 6 0>;
			default-state = "keep";
		};

		a4 {
			label = "activity4";
			gpios = <&gpio0 7 0>;
			default-state = "keep";
		};

		a5 {
			label = "activity5";
			gpios = <&gpio1 2 0>;
			default-state = "keep";
		};
	};

	i2c-gpio {
		compatible = "i2c-gpio";
		gpios = <&gpio0 3 0 /* sda */
			 &gpio0 2 0 /* scl */
			 >;
		i2c-gpio,delay-us = <2>;        /* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;

		rtc0: rtc@48 {
			compatible = "st,m41t00";
			reg = <0x68>;
		};
	};
};

&etha {
	status = "okay";
};

&uart1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * ox810se.dtsi - Device tree file for Oxford Semiconductor OX810SE SoC
 *
 * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
 */

#include <dt-bindings/clock/oxsemi,ox810se.h>
#include <dt-bindings/reset/oxsemi,ox810se.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "oxsemi,ox810se";

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			device_type = "cpu";
			compatible = "arm,arm926ej-s";
			clocks = <&armclk>;
		};
	};

	memory {
		device_type = "memory";
		/* Max 256MB @ 0x48000000 */
		reg = <0x48000000 0x10000000>;
	};

	clocks {
		osc: oscillator {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <25000000>;
		};

		gmacclk: gmacclk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <125000000>;
		};

		rpsclk: rpsclk {
			compatible = "fixed-factor-clock";
			#clock-cells = <0>;
			clock-div = <1>;
			clock-mult = <1>;
			clocks = <&osc>;
		};

		pll400: pll400 {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <733333333>;
		};

		sysclk: sysclk {
			compatible = "fixed-factor-clock";
			#clock-cells = <0>;
			clock-div = <4>;
			clock-mult = <1>;
			clocks = <&pll400>;
		};

		armclk: armclk {
			compatible = "fixed-factor-clock";
			#clock-cells = <0>;
			clock-div = <2>;
			clock-mult = <1>;
			clocks = <&pll400>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges;
		interrupt-parent = <&intc>;

		etha: ethernet@40400000 {
			compatible = "oxsemi,ox810se-dwmac", "snps,dwmac";
			reg = <0x40400000 0x2000>;
			interrupts = <8>;
			interrupt-names = "macirq";
			mac-address = [000000000000]; /* Filled in by U-Boot */
			phy-mode = "rgmii";

			clocks = <&stdclk 6>, <&gmacclk>;
			clock-names = "gmac", "stmmaceth";
			resets = <&reset 6>;

			/* Regmap for sys registers */
			oxsemi,sys-ctrl = <&sys>;

			status = "disabled";
		};

		apb-bridge@44000000 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			ranges = <0 0x44000000 0x1000000>;

			pinctrl: pinctrl {
				compatible = "oxsemi,ox810se-pinctrl";

				/* Regmap for sys registers */
				oxsemi,sys-ctrl = <&sys>;

				pinctrl_uart0: uart0 {
					uart0a {
						pins = "gpio31";
						function = "fct3";
					};
					uart0b {
						pins = "gpio32";
						function = "fct3";
					};
				};

				pinctrl_uart0_modem: uart0_modem {
					uart0c {
						pins = "gpio27";
						function = "fct3";
					};
					uart0d {
						pins = "gpio28";
						function = "fct3";
					};
					uart0e {
						pins = "gpio29";
						function = "fct3";
					};
					uart0f {
						pins = "gpio30";
						function = "fct3";
					};
					uart0g {
						pins = "gpio33";
						function = "fct3";
					};
					uart0h {
						pins = "gpio34";
						function = "fct3";
					};
				};

				pinctrl_uart1: uart1 {
					uart1a {
						pins = "gpio20";
						function = "fct3";
					};
					uart1b {
						pins = "gpio22";
						function = "fct3";
					};
				};

				pinctrl_uart1_modem: uart1_modem {
					uart1c {
						pins = "gpio8";
						function = "fct3";
					};
					uart1d {
						pins = "gpio9";
						function = "fct3";
					};
					uart1e {
						pins = "gpio23";
						function = "fct3";
					};
					uart1f {
						pins = "gpio24";
						function = "fct3";
					};
					uart1g {
						pins = "gpio25";
						function = "fct3";
					};
					uart1h {
						pins = "gpio26";
						function = "fct3";
					};
				};

				pinctrl_uart2: uart2 {
					uart2a {
						pins = "gpio6";
						function = "fct3";
					};
					uart2b {
						pins = "gpio7";
						function = "fct3";
					};
				};

				pinctrl_uart2_modem: uart2_modem {
					uart2c {
						pins = "gpio0";
						function = "fct3";
					};
					uart2d {
						pins = "gpio1";
						function = "fct3";
					};
					uart2e {
						pins = "gpio2";
						function = "fct3";
					};
					uart2f {
						pins = "gpio3";
						function = "fct3";
					};
					uart2g {
						pins = "gpio4";
						function = "fct3";
					};
					uart2h {
						pins = "gpio5";
						function = "fct3";
					};
				};
			};

			gpio0: gpio@0 {
				compatible = "oxsemi,ox810se-gpio";
				reg = <0x000000 0x100000>;
				interrupts = <21>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
				#interrupt-cells = <2>;
				ngpios = <32>;
				oxsemi,gpio-bank = <0>;
				gpio-ranges = <&pinctrl 0 0 32>;
			};

			gpio1: gpio@100000 {
				compatible = "oxsemi,ox810se-gpio";
				reg = <0x100000 0x100000>;
				interrupts = <22>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
				#interrupt-cells = <2>;
				ngpios = <3>;
				oxsemi,gpio-bank = <1>;
				gpio-ranges = <&pinctrl 0 32 3>;
			};

			uart0: serial@200000 {
			       compatible = "ns16550a";
			       reg = <0x200000 0x100000>;
			       clocks = <&sysclk>;
			       interrupts = <23>;
			       reg-shift = <0>;
			       fifo-size = <16>;
			       reg-io-width = <1>;
			       current-speed = <115200>;
			       no-loopback-test;
			       status = "disabled";
			       resets = <&reset RESET_UART1>;
			};

			uart1: serial@300000 {
			       compatible = "ns16550a";
			       reg = <0x300000 0x100000>;
			       clocks = <&sysclk>;
			       interrupts = <24>;
			       reg-shift = <0>;
			       fifo-size = <16>;
			       reg-io-width = <1>;
			       current-speed = <115200>;
			       no-loopback-test;
			       status = "disabled";
			       resets = <&reset RESET_UART2>;
			};

			uart2: serial@900000 {
			       compatible = "ns16550a";
			       reg = <0x900000 0x100000>;
			       clocks = <&sysclk>;
			       interrupts = <29>;
			       reg-shift = <0>;
			       fifo-size = <16>;
			       reg-io-width = <1>;
			       current-speed = <115200>;
			       no-loopback-test;
			       status = "disabled";
			       resets = <&reset RESET_UART3>;
			};

			uart3: serial@a00000 {
			       compatible = "ns16550a";
			       reg = <0xa00000 0x100000>;
			       clocks = <&sysclk>;
			       interrupts = <30>;
			       reg-shift = <0>;
			       fifo-size = <16>;
			       reg-io-width = <1>;
			       current-speed = <115200>;
			       no-loopback-test;
			       status = "disabled";
			       resets = <&reset RESET_UART4>;
			};
		};

		apb-bridge@45000000 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			ranges = <0 0x45000000 0x1000000>;

			sys: sys-ctrl@0 {
				compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd";
				reg = <0x000000 0x100000>;

				reset: reset-controller {
					compatible = "oxsemi,ox810se-reset";
					#reset-cells = <1>;
				};

				stdclk: stdclk {
					compatible = "oxsemi,ox810se-stdclk";
					#clock-cells = <1>;
				};
			};

			rps@300000 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "simple-bus";
				ranges = <0 0x300000 0x100000>;

				intc: interrupt-controller@0 {
					compatible = "oxsemi,ox810se-rps-irq";
					interrupt-controller;
					reg = <0 0x200>;
					#interrupt-cells = <1>;
					valid-mask = <0xffffffff>;
					clear-mask = <0xffffffff>;
				};

				timer0: timer@200 {
					compatible = "oxsemi,ox810se-rps-timer";
					reg = <0x200 0x40>;
					clocks = <&rpsclk>;
					interrupts = <4 5>;
				};
			};
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
 *
 * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
 */

/dts-v1/;
#include "ox820.dtsi"

/ {
	model = "Cloud Engines PogoPlug Series 3";

	compatible = "cloudengines,pogoplugv3", "oxsemi,ox820";

	chosen {
		bootargs = "earlyprintk";
		stdout-path = "serial0:115200n8";
	};

	memory {
		/* 128Mbytes DDR */
		reg = <0x60000000 0x8000000>;
	};

	aliases {
		serial0 = &uart0;
		gpio0 = &gpio0;
		gpio1 = &gpio1;
	};

	leds {
		compatible = "gpio-leds";

		blue {
			label = "pogoplug:blue";
			gpios = <&gpio0 2 0>;
			default-state = "keep";
		};

		orange {
			label = "pogoplug:orange";
			gpios = <&gpio1 16 1>;
			default-state = "keep";
		};

		green {
			label = "pogoplug:green";
			gpios = <&gpio1 17 1>;
			default-state = "keep";
		};
	};
};

&uart0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart0>;
};

&nandc {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_nand>;

	nand@0 {
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
		nand-ecc-mode = "soft";
		nand-ecc-algo = "hamming";

		partition@0 {
			label = "boot";
			reg = <0x00000000 0x00e00000>;
			read-only;
		};

		partition@e00000 {
			label = "ubi";
			reg = <0x00e00000 0x07200000>;
		};
	};
};

&etha {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_etha_mdio>;
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * ox820.dtsi - Device tree file for Oxford Semiconductor OX820 SoC
 *
 * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/oxsemi,ox820.h>
#include <dt-bindings/reset/oxsemi,ox820.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "oxsemi,ox820";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "oxsemi,ox820-smp";

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,arm11mpcore";
			clocks = <&armclk>;
			reg = <0>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,arm11mpcore";
			clocks = <&armclk>;
			reg = <1>;
		};
	};

	memory {
		device_type = "memory";
		/* Max 512MB @ 0x60000000 */
		reg = <0x60000000 0x20000000>;
	};

	clocks {
		osc: oscillator {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <25000000>;
		};

		gmacclk: gmacclk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <125000000>;
		};

		sysclk: sysclk {
			compatible = "fixed-factor-clock";
			#clock-cells = <0>;
			clock-div = <4>;
			clock-mult = <1>;
			clocks = <&osc>;
		};

		plla: plla {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <850000000>;
		};

		armclk: armclk {
			compatible = "fixed-factor-clock";
			#clock-cells = <0>;
			clock-div = <2>;
			clock-mult = <1>;
			clocks = <&plla>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges;
		interrupt-parent = <&gic>;

		nandc: nand-controller@41000000 {
			compatible = "oxsemi,ox820-nand";
			reg = <0x41000000 0x100000>;
			clocks = <&stdclk CLK_820_NAND>;
			resets = <&reset RESET_NAND>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		etha: ethernet@40400000 {
			compatible = "oxsemi,ox820-dwmac", "snps,dwmac";
			reg = <0x40400000 0x2000>;
			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq", "eth_wake_irq";
			mac-address = [000000000000]; /* Filled in by U-Boot */
			phy-mode = "rgmii";

			clocks = <&stdclk CLK_820_ETHA>, <&gmacclk>;
			clock-names = "gmac", "stmmaceth";
			resets = <&reset RESET_MAC>;

			/* Regmap for sys registers */
			oxsemi,sys-ctrl = <&sys>;

			status = "disabled";
		};

		apb-bridge@44000000 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			ranges = <0 0x44000000 0x1000000>;

			pinctrl: pinctrl {
				compatible = "oxsemi,ox820-pinctrl";

				/* Regmap for sys registers */
				oxsemi,sys-ctrl = <&sys>;

				pinctrl_uart0: uart0 {
					uart0 {
						pins = "gpio30", "gpio31";
						function = "fct5";
					};
				};

				pinctrl_uart0_modem: uart0_modem {
					uart0_modem_a {
						pins = "gpio24", "gpio24", "gpio26", "gpio27";
						function = "fct4";
					};
					uart0_modem_b {
						pins = "gpio28", "gpio29";
						function = "fct5";
					};
				};

				pinctrl_uart1: uart1 {
					uart1 {
						pins = "gpio7", "gpio8";
						function = "fct4";
					};
				};

				pinctrl_uart1_modem: uart1_modem {
					uart1_modem {
						pins = "gpio5", "gpio6", "gpio40", "gpio41", "gpio42", "gpio43";
						function = "fct4";
					};
				};

				pinctrl_etha_mdio: etha_mdio {
					etha_mdio {
						pins = "gpio3", "gpio4";
						function = "fct1";
					};
				};

				pinctrl_nand: nand {
					nand {
						pins = "gpio12", "gpio13", "gpio14", "gpio15",
						     "gpio16", "gpio17", "gpio18", "gpio19",
						     "gpio20", "gpio21", "gpio22", "gpio23",
						     "gpio24";
						function = "fct1";
					};
				};
			};

			gpio0: gpio@0 {
				compatible = "oxsemi,ox820-gpio";
				reg = <0x000000 0x100000>;
				interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
				#interrupt-cells = <2>;
				ngpios = <32>;
				oxsemi,gpio-bank = <0>;
				gpio-ranges = <&pinctrl 0 0 32>;
			};

			gpio1: gpio@100000 {
				compatible = "oxsemi,ox820-gpio";
				reg = <0x100000 0x100000>;
				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
				#interrupt-cells = <2>;
				ngpios = <18>;
				oxsemi,gpio-bank = <1>;
				gpio-ranges = <&pinctrl 0 32 18>;
			};

			uart0: serial@200000 {
			       compatible = "ns16550a";
			       reg = <0x200000 0x100000>;
			       interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
			       reg-shift = <0>;
			       fifo-size = <16>;
			       reg-io-width = <1>;
			       current-speed = <115200>;
			       no-loopback-test;
			       status = "disabled";
			       clocks = <&sysclk>;
			       resets = <&reset RESET_UART1>;
			};

			uart1: serial@300000 {
			       compatible = "ns16550a";
			       reg = <0x200000 0x100000>;
			       interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
			       reg-shift = <0>;
			       fifo-size = <16>;
			       reg-io-width = <1>;
			       current-speed = <115200>;
			       no-loopback-test;
			       status = "disabled";
			       clocks = <&sysclk>;
			       resets = <&reset RESET_UART2>;
			};

			rps@400000 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "simple-bus";
				ranges = <0 0x400000 0x100000>;

				intc: interrupt-controller@0 {
					compatible = "oxsemi,ox820-rps-irq", "oxsemi,ox810se-rps-irq";
					interrupt-controller;
					reg = <0 0x200>;
					interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
					#interrupt-cells = <1>;
					valid-mask = <0xffffffff>;
					clear-mask = <0xffffffff>;
				};

				timer0: timer@200 {
					compatible = "oxsemi,ox820-rps-timer";
					reg = <0x200 0x40>;
					clocks = <&sysclk>;
					interrupt-parent = <&intc>;
					interrupts = <4>;
				};
			};

			sys: sys-ctrl@e00000 {
				compatible = "oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd";
				reg = <0xe00000 0x200000>;

				reset: reset-controller {
					compatible = "oxsemi,ox820-reset", "oxsemi,ox810se-reset";
					#reset-cells = <1>;
				};

				stdclk: stdclk {
					compatible = "oxsemi,ox820-stdclk", "oxsemi,ox810se-stdclk";
					#clock-cells = <1>;
				};
			};
		};

		apb-bridge@47000000 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			ranges = <0 0x47000000 0x1000000>;

			scu: scu@0 {
				compatible = "arm,arm11mp-scu";
				reg = <0x0 0x100>;
			};

			local-timer@600 {
				compatible = "arm,arm11mp-twd-timer";
				reg = <0x600 0x20>;
				interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3)|IRQ_TYPE_LEVEL_HIGH)>;
				clocks = <&armclk>;
			};

			gic: interrupt-controller@1000 {
				compatible = "arm,arm11mp-gic";
				interrupt-controller;
				#interrupt-cells = <3>;
				reg = <0x1000 0x1000>,
				      <0x100 0x500>;
			};
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
 *
 *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 */
/dts-v1/;
#include "at91sam9g45.dtsi"

/ {
	model = "Ronetix pm9g45";
	compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	memory@70000000 {
		reg = <0x70000000 0x8000000>;
	};

	clocks {
		slow_xtal {
		      clock-frequency = <32768>;
		};

		main_xtal {
		      clock-frequency = <12000000>;
		};
	};

	ahb {
		apb {
			dbgu: serial@ffffee00 {
				status = "okay";
			};

			pinctrl@fffff200 {
				nand {
					pinctrl_nand_rb: nand-rb-0 {
						atmel,pins =
							<AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};
				};

				mmc {
					pinctrl_board_mmc: mmc0-board {
						atmel,pins =
							<AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PD6 gpio CD pin pull_up and deglitch */
					};
				};
			};

			tcb0: timer@fff7c000 {
				timer@0 {
					compatible = "atmel,tcb-timer";
					reg = <0>, <1>;
				};

				timer@2 {
					compatible = "atmel,tcb-timer";
					reg = <2>;
				};
			};

			mmc0: mmc@fff80000 {
				pinctrl-0 = <
					&pinctrl_board_mmc
					&pinctrl_mmc0_slot0_clk_cmd_dat0
					&pinctrl_mmc0_slot0_dat1_3>;
				pinctrl-names = "default";
				status = "okay";
				slot@0 {
					reg = <0>;
					bus-width = <4>;
					cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
				};
			};

			macb0: ethernet@fffbc000 {
				phy-mode = "rmii";
				status = "okay";
			};
		};

		ebi: ebi@10000000 {
			status = "okay";

			nand_controller: nand-controller {
				status = "okay";
				pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
				pinctrl-names = "default";

				nand@3 {
					reg = <0x3 0x0 0x800000>;
					rb-gpios = <&pioD 3 GPIO_ACTIVE_HIGH>;
					cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
					nand-bus-width = <8>;
					nand-ecc-mode = "soft";
					nand-on-flash-bbt;
					label = "atmel_nand";

					partitions {
						compatible = "fixed-partitions";
						#address-cells = <1>;
						#size-cells = <1>;

						at91bootstrap@0 {
							label = "at91bootstrap";
							reg = <0x0 0x20000>;
						};

						barebox@20000 {
							label = "barebox";
							reg = <0x20000 0x40000>;
						};

						bareboxenv@60000 {
							label = "bareboxenv";
							reg = <0x60000 0x1A0000>;
						};

						kernel@200000 {
							label = "bareboxenv2";
							reg = <0x200000 0x300000>;
						};

						kernel@500000 {
							label = "root";
							reg = <0x500000 0x400000>;
						};

						data@900000 {
							label = "data";
							reg = <0x900000 0x8340000>;
						};
					};
				};
			};
		};

		usb0: ohci@700000 {
			status = "okay";
			num-ports = <2>;
		};

		usb1: ehci@800000 {
			status = "okay";
		};
	};

	leds {
		compatible = "gpio-leds";

		led0 {
			label = "led0";
			gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "nand-disk";
		};

		led1 {
			label = "led1";
			gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;

		right {
			label = "SW4";
			gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
			linux,code = <106>;
		};

		up {
			label = "SW3";
			gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
			linux,code = <103>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 *  Copyright (C) 2012 Marvell Technology Group Ltd.
 *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
 */

/dts-v1/;
#include "pxa168.dtsi"

/ {
	model = "Marvell PXA168 Aspenite Development Board";
	compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";

	chosen {
		bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
	};

	memory {
		reg = <0x00000000 0x04000000>;
	};
};

&uart1 {
	status = "okay";
};

&twsi1 {
	status = "okay";
};

&rtc {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 *  Copyright (C) 2012 Marvell Technology Group Ltd.
 *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
 */

#include <dt-bindings/clock/marvell,pxa168.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		i2c0 = &twsi1;
		i2c1 = &twsi2;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&intc>;
		ranges;

		axi@d4200000 {	/* AXI */
			compatible = "mrvl,axi-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0xd4200000 0x00200000>;
			ranges;

			intc: interrupt-controller@d4282000 {
				compatible = "mrvl,mmp-intc";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0xd4282000 0x1000>;
				mrvl,intc-nr-irqs = <64>;
			};

		};

		apb@d4000000 {	/* APB */
			compatible = "mrvl,apb-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0xd4000000 0x00200000>;
			ranges;

			timer0: timer@d4014000 {
				compatible = "mrvl,mmp-timer";
				reg = <0xd4014000 0x100>;
				interrupts = <13>;
				clocks = <&soc_clocks PXA168_CLK_TIMER>;
				resets = <&soc_clocks PXA168_CLK_TIMER>;
			};

			uart1: serial@d4017000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4017000 0x1000>;
				reg-shift = <2>;
				interrupts = <27>;
				clocks = <&soc_clocks PXA168_CLK_UART0>;
				resets = <&soc_clocks PXA168_CLK_UART0>;
				status = "disabled";
			};

			uart2: serial@d4018000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4018000 0x1000>;
				reg-shift = <2>;
				interrupts = <28>;
				clocks = <&soc_clocks PXA168_CLK_UART1>;
				resets = <&soc_clocks PXA168_CLK_UART1>;
				status = "disabled";
			};

			uart3: serial@d4026000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4026000 0x1000>;
				reg-shift = <2>;
				interrupts = <29>;
				clocks = <&soc_clocks PXA168_CLK_UART2>;
				resets = <&soc_clocks PXA168_CLK_UART2>;
				status = "disabled";
			};

			gpio@d4019000 {
				compatible = "marvell,mmp-gpio";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0xd4019000 0x1000>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <49>;
				clocks = <&soc_clocks PXA168_CLK_GPIO>;
				resets = <&soc_clocks PXA168_CLK_GPIO>;
				interrupt-names = "gpio_mux";
				interrupt-controller;
				#interrupt-cells = <2>;
				ranges;

				gcb0: gpio@d4019000 {
					reg = <0xd4019000 0x4>;
				};

				gcb1: gpio@d4019004 {
					reg = <0xd4019004 0x4>;
				};

				gcb2: gpio@d4019008 {
					reg = <0xd4019008 0x4>;
				};

				gcb3: gpio@d4019100 {
					reg = <0xd4019100 0x4>;
				};
			};

			twsi1: i2c@d4011000 {
				compatible = "mrvl,mmp-twsi";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xd4011000 0x1000>;
				interrupts = <7>;
				clocks = <&soc_clocks PXA168_CLK_TWSI0>;
				resets = <&soc_clocks PXA168_CLK_TWSI0>;
				mrvl,i2c-fast-mode;
				status = "disabled";
			};

			twsi2: i2c@d4025000 {
				compatible = "mrvl,mmp-twsi";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xd4025000 0x1000>;
				interrupts = <58>;
				clocks = <&soc_clocks PXA168_CLK_TWSI1>;
				resets = <&soc_clocks PXA168_CLK_TWSI1>;
				status = "disabled";
			};

			rtc: rtc@d4010000 {
				compatible = "mrvl,mmp-rtc";
				reg = <0xd4010000 0x1000>;
				interrupts = <5>, <6>;
				interrupt-names = "rtc 1Hz", "rtc alarm";
				clocks = <&soc_clocks PXA168_CLK_RTC>;
				resets = <&soc_clocks PXA168_CLK_RTC>;
				status = "disabled";
			};
		};

		soc_clocks: clocks{
			compatible = "marvell,pxa168-clock";
			reg = <0xd4050000 0x1000>,
			      <0xd4282800 0x400>,
			      <0xd4015000 0x1000>;
			reg-names = "mpmu", "apmu", "apbc";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (C) 2016 Robert Jarzmik <robert.jarzmik@free.fr>
 */
#include "pxa2xx.dtsi"
#include "dt-bindings/clock/pxa-clock.h"

/ {
	model = "Marvell PXA25x family SoC";
	compatible = "marvell,pxa250";

	clocks {
	       /*
		* The muxing of external clocks/internal dividers for osc* clock
		* sources has been hidden under the carpet by now.
		*/
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		clks: pxa2xx_clks@41300004 {
			compatible = "marvell,pxa250-core-clocks";
			#clock-cells = <1>;
			status = "okay";
		};

		/* timer oscillator */
		clktimer: oscillator {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency  = <3686400>;
			clock-output-names = "ostimer";
		};
	};

	pxabus {
		pdma: dma-controller@40000000 {
			compatible = "marvell,pdma-1.0";
			reg = <0x40000000 0x10000>;
			interrupts = <25>;
			#dma-cells = <2>;
			/* For backwards compatibility: */
			#dma-channels = <16>;
			dma-channels = <16>;
			#dma-requests = <40>;
			dma-requests = <40>;
			status = "okay";
		};

		pxairq: interrupt-controller@40d00000 {
			marvell,intc-priority;
			marvell,intc-nr-irqs = <32>;
		};

		pinctrl: pinctrl@40e00000 {
			reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
			       0x40f00020 0x10>;
			compatible = "marvell,pxa25x-pinctrl";
		};

		gpio: gpio@40e00000 {
			compatible = "intel,pxa25x-gpio";
			gpio-ranges = <&pinctrl 0 0 84>;
			clocks = <&clks CLK_NONE>;
		};

		pwm0: pwm@40b00000 {
			compatible = "marvell,pxa250-pwm";
			reg = <0x40b00000 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM0>;
		};

		pwm1: pwm@40b00010 {
			compatible = "marvell,pxa250-pwm";
			reg = <0x40b00010 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM1>;
		};

		rtc@40900000 {
			clocks = <&clks CLK_OSC32k768>;
		};
	};

	timer@40a00000 {
		compatible = "marvell,pxa-timer";
		reg = <0x40a00000 0x20>;
		interrupts = <26>;
		clocks = <&clktimer>;
		status = "okay";
	};

	pxa250_opp_table: opp_table0 {
		compatible = "operating-points-v2";

		opp-99532800 {
			opp-hz = /bits/ 64 <99532800>;
			opp-microvolt = <1000000 950000 1650000>;
			clock-latency-ns = <20>;
		};
		opp-199065600 {
			opp-hz = /bits/ 64 <199065600>;
			opp-microvolt = <1000000 950000 1650000>;
			clock-latency-ns = <20>;
		};
		opp-298598400 {
			opp-hz = /bits/ 64 <298598400>;
			opp-microvolt = <1100000 1045000 1650000>;
			clock-latency-ns = <20>;
		};
		opp-398131200 {
			opp-hz = /bits/ 64 <398131200>;
			opp-microvolt = <1300000 1235000 1650000>;
			clock-latency-ns = <20>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/* The pxa3xx skeleton simply augments the 2xx version */
#include "pxa2xx.dtsi"
#include "dt-bindings/clock/pxa-clock.h"

/ {
	model = "Marvell PXA27x familiy SoC";
	compatible = "marvell,pxa27x";

	pxabus {
		pdma: dma-controller@40000000 {
			compatible = "marvell,pdma-1.0";
			reg = <0x40000000 0x10000>;
			interrupts = <25>;
			#dma-cells = <2>;
			/* For backwards compatibility: */
			#dma-channels = <32>;
			dma-channels = <32>;
			#dma-requests = <75>;
			dma-requests = <75>;
			status = "okay";
		};

		pxairq: interrupt-controller@40d00000 {
			marvell,intc-priority;
			marvell,intc-nr-irqs = <34>;
		};

		pinctrl: pinctrl@40e00000 {
			reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
			       0x40f00020 0x10>;
			compatible = "marvell,pxa27x-pinctrl";
		};

		gpio: gpio@40e00000 {
			compatible = "intel,pxa27x-gpio";
			gpio-ranges = <&pinctrl 0 0 128>;
			clocks = <&clks CLK_NONE>;
		};

		usb0: usb@4c000000 {
			compatible = "marvell,pxa-ohci";
			reg = <0x4c000000 0x10000>;
			interrupts = <3>;
			clocks = <&clks CLK_USBHOST>;
			status = "disabled";
		};

		pwm0: pwm@40b00000 {
			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
			reg = <0x40b00000 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM0>;
		};

		pwm1: pwm@40b00010 {
			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
			reg = <0x40b00010 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM1>;
		};

		pwm2: pwm@40c00000 {
			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
			reg = <0x40c00000 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM0>;
		};

		pwm3: pwm@40c00010 {
			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
			reg = <0x40c00010 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM1>;
		};

		pwri2c: i2c@40f00180 {
			compatible = "mrvl,pxa-i2c";
			reg = <0x40f00180 0x24>;
			interrupts = <6>;
			clocks = <&clks CLK_PWRI2C>;
			#address-cells = <0x1>;
			#size-cells = <0>;
			status = "disabled";
		};

		pxa27x_udc: udc@40600000 {
			compatible = "marvell,pxa270-udc";
			reg = <0x40600000 0x10000>;
			interrupts = <11>;
			clocks = <&clks CLK_USB>;
			status = "disabled";
		};

		keypad: keypad@41500000 {
			compatible = "marvell,pxa27x-keypad";
			reg = <0x41500000 0x4c>;
			interrupts = <4>;
			clocks = <&clks CLK_KEYPAD>;
			status = "disabled";
		};

		pxa_camera: imaging@50000000 {
			compatible = "marvell,pxa270-qci";
			reg = <0x50000000 0x1000>;
			interrupts = <33>;
			dmas = <&pdma 68 0	/* Y channel */
				&pdma 69 0	/* U channel */
				&pdma 70 0>;	/* V channel */
			dma-names = "CI_Y", "CI_U", "CI_V";

			clocks = <&clks CLK_CAMERA>;
			clock-names = "ciclk";
			clock-frequency = <5000000>;
			clock-output-names = "qci_mclk";

			status = "disabled";
		};

		rtc@40900000 {
			clocks = <&clks CLK_OSC32k768>;
		};
	};

	clocks {
	       /*
		* The muxing of external clocks/internal dividers for osc* clock
		* sources has been hidden under the carpet by now.
		*/
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		clks: pxa2xx_clks@41300004 {
			compatible = "marvell,pxa270-clocks";
			#clock-cells = <1>;
			status = "okay";
		};
	};

	timer@40a00000 {
		compatible = "marvell,pxa-timer";
		reg = <0x40a00000 0x20>;
		interrupts = <26>;
		clocks = <&clks CLK_OSTIMER>;
		status = "okay";
	};

	pxa270_opp_table: opp_table0 {
		compatible = "operating-points-v2";

		opp-104000000 {
			opp-hz = /bits/ 64 <104000000>;
			opp-microvolt = <900000 900000 1705000>;
			clock-latency-ns = <20>;
		};
		opp-156000000 {
			opp-hz = /bits/ 64 <156000000>;
			opp-microvolt = <1000000 1000000 1705000>;
			clock-latency-ns = <20>;
		};
		opp-208000000 {
			opp-hz = /bits/ 64 <208000000>;
			opp-microvolt = <1180000 1180000 1705000>;
			clock-latency-ns = <20>;
		};
		opp-312000000 {
			opp-hz = /bits/ 64 <312000000>;
			opp-microvolt = <1250000 1250000 1705000>;
			clock-latency-ns = <20>;
		};
		opp-416000000 {
			opp-hz = /bits/ 64 <416000000>;
			opp-microvolt = <1350000 1350000 1705000>;
			clock-latency-ns = <20>;
		};
		opp-520000000 {
			opp-hz = /bits/ 64 <520000000>;
			opp-microvolt = <1450000 1450000 1705000>;
			clock-latency-ns = <20>;
		};
		opp-624000000 {
			opp-hz = /bits/ 64 <624000000>;
			opp-microvolt = <1550000 1550000 1705000>;
			clock-latency-ns = <20>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
 *
 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
 */

#include "dt-bindings/clock/pxa-clock.h"

#define PMGROUP(pin) #pin
#define PMMUX(func, pin, af)			\
	mux- ## func {				\
		groups = PMGROUP(P ## pin);	\
		function = #af;			\
	}
#define PMMUX_LPM_LOW(func, pin, af)		\
	mux- ## func {				\
		groups = PMGROUP(P ## pin);	\
		function = #af;			\
		low-power-disable;		\
	}
#define PMMUX_LPM_HIGH(func, pin, af)		\
	mux- ## func {				\
		groups = PMGROUP(P ## pin);	\
		function = #af;			\
		low-power-enable;		\
	}

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "Marvell PXA2xx family SoC";
	compatible = "marvell,pxa2xx";
	interrupt-parent = <&pxairq>;

	aliases {
		serial0 = &ffuart;
		serial1 = &btuart;
		serial2 = &stuart;
		serial3 = &hwuart;
		i2c0 = &pwri2c;
		i2c1 = &pxai2c1;
	};

	cpus {
		cpu {
			compatible = "marvell,xscale";
			device_type = "cpu";
		};
	};

	pxabus {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		pxairq: interrupt-controller@40d00000 {
			#interrupt-cells = <1>;
			compatible = "marvell,pxa-intc";
			interrupt-controller;
			interrupt-parent;
			marvell,intc-nr-irqs = <32>;
			reg = <0x40d00000 0xd0>;
		};

		gpio: gpio@40e00000 {
			compatible = "mrvl,pxa-gpio";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0x40e00000 0x10000>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <8>, <9>, <10>;
			interrupt-names = "gpio0", "gpio1", "gpio_mux";
			interrupt-controller;
			#interrupt-cells = <0x2>;
			ranges;

			gcb0: gpio@40e00000 {
				reg = <0x40e00000 0x4>;
			};

			gcb1: gpio@40e00004 {
				reg = <0x40e00004 0x4>;
			};

			gcb2: gpio@40e00008 {
				reg = <0x40e00008 0x4>;
			};
			gcb3: gpio@40e0000c {
				reg = <0x40e0000c 0x4>;
			};
		};

		ffuart: serial@40100000 {
			compatible = "mrvl,pxa-uart";
			reg = <0x40100000 0x30>;
			interrupts = <22>;
			clocks = <&clks CLK_FFUART>;
			status = "disabled";
		};

		btuart: serial@40200000 {
			compatible = "mrvl,pxa-uart";
			reg = <0x40200000 0x30>;
			interrupts = <21>;
			clocks = <&clks CLK_BTUART>;
			status = "disabled";
		};

		stuart: serial@40700000 {
			compatible = "mrvl,pxa-uart";
			reg = <0x40700000 0x30>;
			interrupts = <20>;
			clocks = <&clks CLK_STUART>;
			status = "disabled";
		};

		hwuart: serial@41600000 {
			compatible = "mrvl,pxa-uart";
			reg = <0x41600000 0x30>;
			interrupts = <7>;
			status = "disabled";
		};

		pxai2c1: i2c@40301680 {
			compatible = "mrvl,pxa-i2c";
			reg = <0x40301680 0x30>;
			interrupts = <18>;
			clocks = <&clks CLK_I2C>;
			#address-cells = <0x1>;
			#size-cells = <0>;
			status = "disabled";
		};

		mmc0: mmc@41100000 {
			compatible = "marvell,pxa-mmc";
			reg = <0x41100000 0x1000>;
			interrupts = <23>;
			clocks = <&clks CLK_MMC>;
			dmas = <&pdma 21 3
				&pdma 22 3>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		rtc@40900000 {
			compatible = "marvell,pxa-rtc";
			reg = <0x40900000 0x3c>;
			interrupts = <30 31>;
		};

		lcdc: lcd-controller@40500000 {
			compatible = "marvell,pxa2xx-lcdc";
			reg = <0x44000000 0x10000>;
			interrupts = <17>;
			clocks = <&clks CLK_LCD>;
			status = "disabled";
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0

#include "pxa3xx.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	/* Will be overridden by bootloader */
	hw-revision = <0>;

	chosen {
		bootargs = "root=ubi0:RootFS rootfstype=ubifs rw ubi.mtd=3";
		stdout-path = &ffuart;
	};

	memory {
		device_type = "memory";
		reg = <0xa0000000 0x8000000>;	/* 128 MB */
	};

	reg_3v3: regulator-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "3v3-fixed-supply";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_1v8: regulator-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "1v8-fixed-supply";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
	};

	reg_va_5v0: regulator-va-5v0 {
		compatible = "regulator-fixed";
		regulator-name = "va-5v0-fixed-supply";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio 124 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	ssp_dai0: ssp-dai0 {
		compatible = "mrvl,pxa-ssp-dai";
		pinctrl-names = "default";
		pinctrl-0 = <&ssp0_dai_pins>;
		port = <&ssp1>;
		#sound-dai-cells = <0>;
		dmas = <&pdma 13 3
			&pdma 14 3>;
		dma-names = "rx", "tx";
		clock-names = "extclk";
	};

	ssp_dai1: ssp-dai1 {
		compatible = "mrvl,pxa-ssp-dai";
		pinctrl-names = "default";
		pinctrl-0 = <&ssp1_dai_pins>;
		port = <&ssp2>;
		#sound-dai-cells = <0>;
		dmas = <&pdma 15 3
			&pdma 16 3>;
		dma-names = "rx", "tx";
		clock-names = "extclk";
	};

	spi: spi {
		compatible = "spi-gpio";
		#address-cells = <0x1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&spi_pins>;
		gpio-sck = <&gpio 95 GPIO_ACTIVE_HIGH>;
		gpio-miso = <&gpio 98 GPIO_ACTIVE_HIGH>;
		gpio-mosi = <&gpio 97 GPIO_ACTIVE_HIGH>;
		cs-gpios = <
			&gpio 34 GPIO_ACTIVE_HIGH
			&gpio 125 GPIO_ACTIVE_HIGH
			&gpio 96 GPIO_ACTIVE_HIGH
		>;
		num-chipselects = <3>;

		dac: dac@2 {
			compatible = "ti,dac7512";
			reg = <2>;
			spi-max-frequency = <1000000>;
			vcc-supply = <&reg_3v3>;
		};
	};

	keys: gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&gpio_keys_pins>;

		on-off {
			label = "on_off button";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_F6>;
		};

		rescue-boot {
			label = "rescue boot button";
			gpios = <&gpio 115 GPIO_ACTIVE_HIGH>;
			linux,code = <KEY_F4>;
		};

		setup {
			label = "setup";
			gpios = <&gpio 119 GPIO_ACTIVE_HIGH>;
			linux,code = <KEY_F3>;
		};
	};

	rotary: rotary-encoder {
		compatible = "rotary-encoder";
		gpios = <
			&gpio 19 GPIO_ACTIVE_LOW
			&gpio 20 GPIO_ACTIVE_HIGH
		>;
		linux,axis = <REL_X>;
		rotary-encoder,relative-axis;
	};

	leds: leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&led_pins_a &led_pins_b>;

		left {
			label = "raumfeld:1";
			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
		};

		right {
			label = "raumfeld:2";
			gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
		};
	};

	poweroff {
		compatible = "gpio-poweroff";
		pinctrl-names = "default";
		pinctrl-0 = <&poweroff_pins>;
		gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
	};

	mmc0_pwrseq: mmc-pwrseq {
		compatible = "mmc-pwrseq-simple";
		pinctrl-names = "default";
		pinctrl-0 = <&mmc0_pwrseq_pins>;
		reset-gpios = <
			&gpio 113 GPIO_ACTIVE_LOW	/* W2W_RESET	*/
			&gpio 114 GPIO_ACTIVE_LOW	/* W2W_PDN	*/
		>;
	};

	ethernet: ethernet@10000000 {
		compatible = "smsc,lan9115";
		pinctrl-names = "default";
		pinctrl-0 = <&smsc_pins &smsc_bus_pins>;
		reg = <0x10000000 0x100000>;
		phy-mode = "mii";
		interrupt-parent = <&gpio>;
		interrupts = <40 IRQ_TYPE_EDGE_FALLING>;
		vdd33a-supply = <&reg_3v3>;
		vddvario-supply = <&reg_1v8>;
		reset-gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
		reg-io-width = <4>;
		smsc,save-mac-address;
		smsc,irq-push-pull;
	};
};

&ffuart {
	status = "okay";
};

&pwri2c {
	status = "okay";

	max8660: regulator@34 {
		compatible = "maxim,max8660";
		reg = <0x34>;

		regulators {
			regulator-v3 {
				regulator-compatible = "V3(DCDC)";
				regulator-min-microvolt = <725000>;
				regulator-max-microvolt = <1800000>;
			};

			regulator-v4 {
				regulator-compatible = "V4(DCDC)";
				regulator-min-microvolt = <725000>;
				regulator-max-microvolt = <1800000>;
			};

			regulator-v5 {
				regulator-compatible = "V5(LDO)";
				regulator-min-microvolt = <1700000>;
				regulator-max-microvolt = <2000000>;
			};

			reg_vcc_sdio: regulator-v6 {
				regulator-compatible = "V6(LDO)";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
			};

			regulator-v7 {
				regulator-compatible = "V7(LDO)";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};
		};
	};
};

&pxai2c1 {
	status = "okay";
	mrvl,i2c-fast-mode;
	pinctrl-names = "default";
	pinctrl-0 = <&pxai2c1_pins>;
};

&ssp1 {
	status = "okay";
};

&ssp2 {
	status = "okay";
};

&nand_controller {
	status = "okay";

	nand@0 {
		reg = <0>;
		nand-rb = <0>;
		nand-ecc-mode = "hw";
		marvell,nand-keep-config;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "Bootloader";
				reg = <0x0000000 0xa0000>;
				read-only;
			};

			partition@a0000 {
				label = "BootloaderEnvironment";
				reg = <0x0a0000 0x20000>;
			};

			partition@c0000 {
				label = "BootloaderSplashScreen";
				reg = <0x0c0000 0x60000>;
			};

			partition@120000 {
				label = "UBI";
				reg = <0x120000 0x7ee0000>;
			};
		};
	};
};

&usb0 {
	status = "okay";
	marvell,enable-port1;
	marvell,port-mode = <2>; /* PMM_GLOBAL_MODE */
	pinctrl-names = "default";
	pinctrl-0 = <&pxa3xx_ohci_pins>;
};

&mmc0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	pxa-mmc,detect-delay-ms = <200>;
	vmmc-supply = <&reg_vcc_sdio>;
	mmc-pwrseq = <&mmc0_pwrseq>;
	non-removable;
	bus-width = <4>;
};

&pinctrl {
	poweroff_pins: poweroff-pins {
		pinctrl-single,pins = <MFP_PIN_PXA300(16) MFP_AF0>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_FLOAT);
	};

	led_pins_a: led-pins-a {
		pinctrl-single,pins = <MFP_PIN_PXA300(35) MFP_AF0>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	led_pins_b: led-pins-b {
		pinctrl-single,pins = <MFP_PIN_PXA300(36) MFP_AF0>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_DRIVE_HIGH);
	};

	pxai2c1_pins: pxai2c1-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(21) MFP_AF1	/* I2C_SCL	*/
			MFP_PIN_PXA300(22) MFP_AF1	/* I2C_SDA	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_HIGH);
	};

	gpio_keys_pins: gpio-keys-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(14) MFP_AF0	/* on-off	*/
			MFP_PIN_PXA300(115) MFP_AF0	/* rescue boot	*/
			MFP_PIN_PXA300(119) MFP_AF0	/* setup	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_FLOAT);
	};

	spi_pins: spi-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(95) MFP_AF0	/* SCK		*/
			MFP_PIN_PXA300(97) MFP_AF0	/* MOSI		*/
			MFP_PIN_PXA300(98) MFP_AF0	/* MISO		*/
			MFP_PIN_PXA300(34) MFP_AF0	/* CS#0		*/
			MFP_PIN_PXA300(125) MFP_AF0	/* CS#1		*/
			MFP_PIN_PXA300(96) MFP_AF0	/* CS#2		*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	pxa3xx_ohci_pins: pxa3xx-ohci-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300_2(0) MFP_AF1	/* USBHPEN	*/
			MFP_PIN_PXA300_2(1) MFP_AF1	/* USBHPWR	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	smsc_pins: smsc-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(39) MFP_AF0	/* RESET	*/
			MFP_PIN_PXA300(40) MFP_AF0	/* IRQ		*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	smsc_bus_pins: smsc-bus-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(1) MFP_AF1	/* nCS2		*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_FLOAT);
	};

	mmc0_pins: mmc0-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(3) MFP_AF4	/* MMC1_DAT0	*/
			MFP_PIN_PXA300(4) MFP_AF4	/* MMC1_DAT1	*/
			MFP_PIN_PXA300(5) MFP_AF4	/* MMC1_DAT2	*/
			MFP_PIN_PXA300(6) MFP_AF4	/* MMC1_DAT3	*/
			MFP_PIN_PXA300(7) MFP_AF4	/* MMC1_CLK	*/
			MFP_PIN_PXA300(8) MFP_AF4	/* MMC1_CMD	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_DRIVE_HIGH);
	};

	mmc0_pwrseq_pins: mmc0-pwrseq-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(113) MFP_AF0	/* W2W_RESET	*/
			MFP_PIN_PXA300(114) MFP_AF0	/* W2W_PDN	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_FLOAT);
	};

	ssp0_dai_pins: ssp0-dai-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(85) MFP_AF1	/* SSP1_SCLK	*/
			MFP_PIN_PXA300(86) MFP_AF1	/* SSP1_FRM	*/
			MFP_PIN_PXA300(87) MFP_AF1	/* SSP1_TXD	*/
			MFP_PIN_PXA300(88) MFP_AF1	/* SSP1_RXD	*/
			MFP_PIN_PXA300(89) MFP_AF1	/* SSP1_EXTCLK	*/
			MFP_PIN_PXA300(90) MFP_AF1	/* SSP1_SYSCLK	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	ssp1_dai_pins: ssp1-dai-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(25) MFP_AF2	/* SSP2_SCLK	*/
			MFP_PIN_PXA300(26) MFP_AF2	/* SSP2_FRM	*/
			MFP_PIN_PXA300(27) MFP_AF2	/* SSP2_TXD	*/
			MFP_PIN_PXA300(29) MFP_AF2	/* SSP2_EXTCLK	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};
};


code:
// SPDX-License-Identifier: GPL-2.0

/dts-v1/;

#include "pxa300-raumfeld-common.dtsi"
#include "pxa300-raumfeld-tuneable-clock.dtsi"

/ {
	model = "Raumfeld Connector (PXA3xx)";
	compatible = "raumfeld,raumfeld-connector-pxa303", "marvell,pxa300";

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "Raumfeld Connector";
		#address-cells = <1>;
		#size-cells = <0>;

		simple-audio-card,dai-link@0 {
			reg = <0>;
			format = "i2s";
			bitclock-master = <&dailink_master_analog>;
			frame-master = <&dailink_master_analog>;
			mclk-fs = <256>;

			dailink_master_analog: cpu {
				sound-dai = <&ssp_dai0>;
			};

			codec {
				sound-dai = <&cs4270>;
			};
		};

		simple-audio-card,dai-link@1 {
			reg = <1>;
			format = "i2s";
			bitclock-master = <&dailink_master_digital>;
			frame-master = <&dailink_master_digital>;
			mclk-fs = <256>;

			dailink_master_digital: cpu {
				sound-dai = <&ssp_dai1>;
			};

			codec {
				sound-dai = <&ak4104>;
			};
		};
	};
};

&ssp1 {
	status = "okay";
};

&ssp2 {
	status = "okay";
};

&spi {
	ak4104: optical-transmitter@0 {
		compatible = "asahi-kasei,ak4104";
		reg = <0>;
		vdd-supply = <&reg_3v3>;
		spi-max-frequency = <5000000>;
		reset-gpios = <&gpio 38 GPIO_ACTIVE_HIGH>;
		#sound-dai-cells = <0>;
	};
};

&rotary {
	status = "disabled";
};


code:
// SPDX-License-Identifier: GPL-2.0

/dts-v1/;

#include "pxa300-raumfeld-common.dtsi"

/ {
	model = "Raumfeld Controller (PXA3xx)";
	compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300";

	reg_vbatt: regulator-vbatt {
		compatible = "regulator-fixed";
		regulator-name = "vbatt-fixed-supply";
		regulator-min-microvolt = <3700000>;
		regulator-max-microvolt = <3700000>;
		regulator-always-on;
	};

	lcd_supply: regulator-va-tft {
		compatible = "regulator-fixed";
		regulator-name = "va-tft-fixed-supply";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	onewire {
		compatible = "w1-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&w1_pins>;
		gpios = <
			&gpio 126 GPIO_OPEN_DRAIN	/* W1 I/O	*/
			&gpio 105 GPIO_ACTIVE_HIGH	/* pullup	*/
		>;

		w1_ds2760: slave-ds2760 {
			compatible = "maxim,ds2760";
			power-supplies = <&charger>;
		};
	};

	charger: charger {
		pinctrl-names = "default";
		pinctrl-0 = <&charger_pins>;
		compatible = "gpio-charger";
		charger-type = "mains";
		gpios = <&gpio 101 GPIO_ACTIVE_LOW>;
	};

	/*
	 * One of the following two will be set to "okay" by the bootloader,
	 * depending on the hardware revision.
	 */
	backlight-controller-pwm {
		compatible = "pwm-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pwm0_pins>;
		pwms = <&pwm0 10000>;
		power-supply = <&reg_vbatt>;
		status = "disabled";

		brightness-levels = <
			 0  1  2  3  4  5  6  7  8  9
			10 11 12 13 14 15 16 17 18 19
			20 21 22 23 24 25 26 27 28 29
			30 31 32 33 34 35 36 37 38 39
			40 41 42 43 44 45 46 47 48 49
			50 51 52 53 54 55 56 57 58 59
			60 61 62 63 64 65 66 67 68 69
			70 71 72 73 74 75 76 77 78 79
			80 81 82 83 84 85 86 87 88 89
			90 91 92 93 94 95 96 97 98 99
			100
		>;
		default-brightness-level = <100>;
	};

	backlight-controller {
		compatible = "lltc,lt3593";
		pinctrl-names = "default";
		pinctrl-0 = <&lt3593_pins>;
		lltc,ctrl-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
		status = "disabled";

		led {
			label = "backlight";
			default-state = "on";
		};
	};
};

&reg_va_5v0 {
	status = "disabled";
};

&ethernet {
	status = "disabled";
};

&leds {
	status = "disabled";
};

&dac {
	status = "disabled";
};

&pwm0 {
	status = "okay";
};

&keys {
	pinctrl-0 = <&gpio_keys_pins &dock_detect_pins>;
	dock-detect {
		label = "dock detect";
		gpios = <&gpio 116 GPIO_ACTIVE_LOW>;
		linux,code = <KEY_F5>;
	};
};

&spi {
	accelerometer@1 {
		compatible = "st,lis302dl-spi";
		pinctrl-names = "default";
		pinctrl-0 = <&lis302_pins>;
		reg = <1>;
		spi-max-frequency = <1000000>;
		interrupt-parent = <&gpio>;
		interrupts = <104 IRQ_TYPE_EDGE_FALLING>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <10>;
		st,click-thresh-y = <10>;
		st,click-thresh-z = <10>;
		st,irq1-click;
		st,irq2-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
	};
};

&lcdc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&lcdc_pins>;
	lcd-supply = <&lcd_supply>;

	port {
		lcdc_out: endpoint {
			remote-endpoint = <&panel_in>;
			bus-width = <16>;
		};
	};

	panel {
		compatible = "sharp,lq043t3dx0-panel";
		display-timings {
			native-mode = <&timing0>;
			timing0: timing {
				clock-frequency = <9009000>;
				pixelclk-active = <0>;	/* negative edge */
				hactive = <480>;
				vactive = <272>;
				hsync-len = <41>;
				hback-porch = <2>;
				hfront-porch = <1>;
				vsync-len = <10>;
				vback-porch = <3>;
				vfront-porch = <1>;
			};
		};

		port {
			panel_in: endpoint {
				remote-endpoint = <&lcdc_out>;
			};
		};
	};
};

&gcu {
	status = "okay";
};

&pxai2c1 {
	touchscreen@a {
		compatible = "eeti,exc3000-i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&eeti_ts_pins>;
		reg = <0xa>;
		interrupt-parent = <&gpio>;
		interrupts = <32 IRQ_TYPE_EDGE_RISING>;
		attn-gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
		touchscreen-inverted-y;
	};
};

&pinctrl {
	lis302_pins: lis302-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(104) MFP_AF0	/* IRQ	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	eeti_ts_pins: eeti-ts-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(32) MFP_AF0	/* IRQ */
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_FLOAT);
	};

	lt3593_pins: lt3593-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(17) MFP_AF0	/* Backlight	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	pwm0_pins: pwm0-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(17) MFP_AF1	/* PWM	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	w1_pins: w1-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(126) MFP_AF0	/* PWM	*/
			MFP_PIN_PXA300(105) MFP_AF0	/* PWM	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_FLOAT);
	};

	charger_pins: charger_pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(31) MFP_AF0	/* PEN2	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_HIGH);
		pinctrl-single,bias-pullup = MPF_PULL_UP;
	};

	dock_detect_pins: dock_detect_pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(116) MFP_AF0	/* DOCK_DETECT	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_HIGH);
		pinctrl-single,bias-pullup = MPF_PULL_UP;
	};

	lcdc_pins: lcdc-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(54) MFP_AF1	/* LDD_0	*/
			MFP_PIN_PXA300(55) MFP_AF1	/* LDD_1	*/
			MFP_PIN_PXA300(56) MFP_AF1	/* LDD_2	*/
			MFP_PIN_PXA300(57) MFP_AF1	/* LDD_3	*/
			MFP_PIN_PXA300(58) MFP_AF1	/* LDD_4	*/
			MFP_PIN_PXA300(59) MFP_AF1	/* LDD_5	*/
			MFP_PIN_PXA300(60) MFP_AF1	/* LDD_6	*/
			MFP_PIN_PXA300(61) MFP_AF1	/* LDD_7	*/
			MFP_PIN_PXA300(62) MFP_AF1	/* LDD_8	*/
			MFP_PIN_PXA300(63) MFP_AF1	/* LDD_9	*/
			MFP_PIN_PXA300(64) MFP_AF1	/* LDD_10	*/
			MFP_PIN_PXA300(65) MFP_AF1	/* LDD_11	*/
			MFP_PIN_PXA300(66) MFP_AF1	/* LDD_12	*/
			MFP_PIN_PXA300(67) MFP_AF1	/* LDD_13	*/
			MFP_PIN_PXA300(68) MFP_AF1	/* LDD_14	*/
			MFP_PIN_PXA300(69) MFP_AF1	/* LDD_15	*/
			MFP_PIN_PXA300(70) MFP_AF1	/* LDD_16	*/
			MFP_PIN_PXA300(71) MFP_AF1	/* LDD_17	*/
			MFP_PIN_PXA300(72) MFP_AF1	/* LCD_FCLK	*/
			MFP_PIN_PXA300(73) MFP_AF1	/* LCD_LCLK	*/
			MFP_PIN_PXA300(74) MFP_AF1	/* LCD_PCLK	*/
			MFP_PIN_PXA300(75) MFP_AF1	/* LCD_BIAS	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};
};


code:
// SPDX-License-Identifier: GPL-2.0

/dts-v1/;

#include "pxa300-raumfeld-common.dtsi"
#include "pxa300-raumfeld-tuneable-clock.dtsi"

/ {
	model = "Raumfeld Speaker L (PXA3xx)";
	compatible = "raumfeld,raumfeld-speaker-l-pxa303", "marvell,pxa300";
};


code:
// SPDX-License-Identifier: GPL-2.0

/dts-v1/;

#include "pxa300-raumfeld-common.dtsi"
#include "pxa300-raumfeld-tuneable-clock.dtsi"

/ {
	model = "Raumfeld Speaker M (PXA3xx)";
	compatible = "raumfeld,raumfeld-speaker-m-pxa303", "marvell,pxa300";
};


code:
// SPDX-License-Identifier: GPL-2.0

/dts-v1/;

#include "pxa300-raumfeld-common.dtsi"

/ {
	model = "Raumfeld Speaker One (PXA3xx)";
	compatible = "raumfeld,raumfeld-speaker-one-pxa303", "marvell,pxa300";

	wm8782: wm8782 {
		compatible = "wm8782";
		#sound-dai-cells = <0>;
		Vdd-supply = <&reg_3v3>;
		Vdda-supply = <&reg_va_5v0>;
	};

	xo_11mhz: oscillator-11mhz {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <11289600>;
		clock-accuracy = <100>;
	};

	xo_audio: clock-gate {
		compatible = "gpio-gate-clock";
		pinctrlnames = "default";
		pinctrl-0 = <&xo_audio_pins>;
		clocks = <&xo_11mhz>;
		#clock-cells = <0>;
		enable-gpios = <&gpio 111 GPIO_ACTIVE_HIGH>;
	};

	reg_va_30v0: regulator-va-30v0 {
		compatible = "regulator-fixed";
		regulator-name = "va-30v0-fixed-supply";
		regulator-min-microvolt = <30000000>;
		regulator-max-microvolt = <30000000>;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "Raumfeld Speaker";
		#address-cells = <1>;
		#size-cells = <0>;

		simple-audio-card,dai-link@0 {
			reg = <0>;
			format = "i2s";
			bitclock-master = <&dailink_master_analog_out>;
			frame-master = <&dailink_master_analog_out>;
			mclk-fs = <256>;

			dailink_master_analog_out: cpu {
				sound-dai = <&ssp_dai0>;
			};

			codec {
				sound-dai = <&sta320>;
			};
		};

		simple-audio-card,dai-link@1 {
			reg = <1>;
			format = "i2s";
			bitclock-master = <&dailink_master_analog_in>;
			frame-master = <&dailink_master_analog_in>;
			mclk-fs = <256>;

			dailink_master_analog_in: cpu {
				sound-dai = <&ssp_dai0>;
			};

			codec {
				sound-dai = <&wm8782>;
			};
		};
	};
};

&ssp_dai0 {
	clocks = <&xo_audio>;
};

&spi {
	dac@2 {
		compatible = "ti,dac7512";
		reg = <2>;
		spi-max-frequency = <1000000>;
		vcc-supply = <&reg_3v3>;
	};
};

&rotary {
	status = "okay";
};

&pxai2c1 {
	sta320: codec@1a {
		compatible = "st,sta32x";
		reg = <0x1a>;
		pinctrl-names = "default";
		pinctrl-0 = <&sta320_pins>;
		clocks = <&xo_audio>;
		clock-names = "xti";
		reset-gpios = <&gpio 120 GPIO_ACTIVE_HIGH>;
		Vdda-supply = <&reg_3v3>;
		Vdd3-supply = <&reg_3v3>;
		Vcc-supply = <&reg_va_30v0>;
		#sound-dai-cells = <0>;
		st,thermal-warning-adjustment;
		st,thermal-warning-recovery;
		st,fault-detect-recovery;
		st,drop-compensation-ns = <80>;
		st,max-power-use-mpcc;
		st,invalid-input-detect-mute;
		/* 2 (half-bridge) and 1 (full-bridge) on-board power */
		st,output-conf = /bits/ 8 <0x1>;
		st,ch1-output-mapping = /bits/ 8 <0>;
		st,ch2-output-mapping = /bits/ 8 <1>;
		st,ch3-output-mapping = /bits/ 8 <2>;
		st,needs_esd_watchdog;
	};
};

&pinctrl {
	xo_audio_pins: xo-audio-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(111) MFP_AF0	/* ENABLE */
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	sta320_pins: sta320-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(120) MFP_AF0	/* CODEC_RESET	*/
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_FLOAT);
	};
};


code:
// SPDX-License-Identifier: GPL-2.0

/dts-v1/;

#include "pxa300-raumfeld-common.dtsi"
#include "pxa300-raumfeld-tuneable-clock.dtsi"

/ {
	model = "Raumfeld Speaker S (PXA3xx)";
	compatible = "raumfeld,raumfeld-speaker-s-pxa303", "marvell,pxa300";
};


code:
// SPDX-License-Identifier: GPL-2.0

#include <dt-bindings/clock/maxim,max9485.h>

/ {
	xo_27mhz: oscillator-27mhz {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <27000000>;
		clock-accuracy = <100>;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "Raumfeld Speaker";
		#address-cells = <1>;
		#size-cells = <0>;

		simple-audio-card,dai-link@0 {
			reg = <0>;
			format = "i2s";
			bitclock-master = <&dailink_master_analog>;
			frame-master = <&dailink_master_analog>;
			mclk-fs = <256>;

			dailink_master_analog: cpu {
				sound-dai = <&ssp_dai0>;
			};

			codec {
				sound-dai = <&cs4270>;
			};
		};
	};
};

&ssp_dai0 {
	clocks = <&max9485 MAX9485_CLKOUT1>;
};

&ssp_dai1 {
	clocks = <&max9485 MAX9485_CLKOUT1>;
};

&pxai2c1 {
	cs4270: codec@48 {
		compatible = "cirrus,cs4270";
		pinctrl-names = "default";
		pinctrl-0 = <&cs4270_pins>;
		reg = <0x48>;
		va-supply = <&reg_va_5v0>;
		vd-supply = <&reg_3v3>;
		vlc-supply = <&reg_3v3>;
		reset-gpios = <&gpio 120 GPIO_ACTIVE_HIGH>;
		#sound-dai-cells = <0>;
	};

	max9485: clock-generator@63 {
		compatible = "maxim,max9485";
		pinctrl-names = "default";
		pinctrl-0 = <&max9485_pins>;
		reg = <0x63>;
		vdd-supply = <&reg_3v3>;
		clock-names = "xclk";
		clocks = <&xo_27mhz>;
		reset-gpios = <&gpio 111 GPIO_ACTIVE_HIGH>;
		#clock-cells = <1>;
	};
};

&pinctrl {
	cs4270_pins: cs4270-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(120) MFP_AF0	/* RESET */
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};

	max9485_pins: max9485-pins {
		pinctrl-single,pins = <
			MFP_PIN_PXA300(111) MFP_AF0	/* RESET */
		>;
		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 *  Copyright (C) 2012 Marvell Technology Group Ltd.
 *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
 */

/dts-v1/;
#include "pxa910.dtsi"

/ {
	model = "Marvell PXA910 DKB Development Board";
	compatible = "mrvl,pxa910-dkb", "mrvl,pxa910";

	chosen {
		bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
	};

	memory {
		reg = <0x00000000 0x10000000>;
	};
};

&uart1 {
	status = "okay";
};

&twsi1 {
	status = "okay";

	pmic: 88pm860x@34 {
		compatible = "marvell,88pm860x";
		reg = <0x34>;
		interrupts = <4>;
		interrupt-parent = <&intc>;
		interrupt-controller;
		#interrupt-cells = <1>;

		marvell,88pm860x-irq-read-clr;
		marvell,88pm860x-slave-addr = <0x11>;

		regulators {
			BUCK1 {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <1500000>;
				regulator-boot-on;
				regulator-always-on;
			};
			BUCK2 {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <1500000>;
				regulator-boot-on;
				regulator-always-on;
			};
			BUCK3 {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO1 {
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <2800000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO2 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			LDO5 {
				regulator-min-microvolt = <2900000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO7 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <2900000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO8 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <2900000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO9 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO10 {
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};
			LDO12 {
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			LDO13 {
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			LDO14 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
		rtc {
			marvell,88pm860x-vrtc = <1>;
		};
		touch {
			marvell,88pm860x-gpadc-prebias = <1>;
			marvell,88pm860x-gpadc-slot-cycle = <1>;
			marvell,88pm860x-tsi-prebias = <6>;
			marvell,88pm860x-pen-prebias = <16>;
			marvell,88pm860x-pen-prechg = <2>;
			marvell,88pm860x-resistor-X = <300>;
		};
		backlights {
			backlight-0 {
				marvell,88pm860x-iset = <4>;
				marvell,88pm860x-pwm = <3>;
			};
			backlight-2 {
			};
		};
		leds {
			led0-red {
				marvell,88pm860x-iset = <12>;
			};
			led0-green {
				marvell,88pm860x-iset = <12>;
			};
			led0-blue {
				marvell,88pm860x-iset = <12>;
			};
		};
	};
};

&rtc {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 *  Copyright (C) 2012 Marvell Technology Group Ltd.
 *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
 */

#include <dt-bindings/clock/marvell,pxa910.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		i2c0 = &twsi1;
		i2c1 = &twsi2;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&intc>;
		ranges;

		L2: l2-cache {
			compatible = "marvell,tauros2-cache";
			marvell,tauros2-cache-features = <0x3>;
		};

		axi@d4200000 {	/* AXI */
			compatible = "mrvl,axi-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0xd4200000 0x00200000>;
			ranges;

			intc: interrupt-controller@d4282000 {
				compatible = "mrvl,mmp-intc";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0xd4282000 0x1000>;
				mrvl,intc-nr-irqs = <64>;
			};

		};

		apb@d4000000 {	/* APB */
			compatible = "mrvl,apb-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0xd4000000 0x00200000>;
			ranges;

			timer0: timer@d4014000 {
				compatible = "mrvl,mmp-timer";
				reg = <0xd4014000 0x100>;
				interrupts = <13>;
			};

			timer1: timer@d4016000 {
				compatible = "mrvl,mmp-timer";
				reg = <0xd4016000 0x100>;
				interrupts = <29>;
				status = "disabled";
			};

			uart1: serial@d4017000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4017000 0x1000>;
				reg-shift = <2>;
				interrupts = <27>;
				clocks = <&soc_clocks PXA910_CLK_UART0>;
				resets = <&soc_clocks PXA910_CLK_UART0>;
				status = "disabled";
			};

			uart2: serial@d4018000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4018000 0x1000>;
				reg-shift = <2>;
				interrupts = <28>;
				clocks = <&soc_clocks PXA910_CLK_UART1>;
				resets = <&soc_clocks PXA910_CLK_UART1>;
				status = "disabled";
			};

			uart3: serial@d4036000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0xd4036000 0x1000>;
				reg-shift = <2>;
				interrupts = <59>;
				clocks = <&soc_clocks PXA910_CLK_UART2>;
				resets = <&soc_clocks PXA910_CLK_UART2>;
				status = "disabled";
			};

			gpio@d4019000 {
				compatible = "marvell,mmp-gpio";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0xd4019000 0x1000>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <49>;
				interrupt-names = "gpio_mux";
				clocks = <&soc_clocks PXA910_CLK_GPIO>;
				resets = <&soc_clocks PXA910_CLK_GPIO>;
				interrupt-controller;
				#interrupt-cells = <2>;
				ranges;

				gcb0: gpio@d4019000 {
					reg = <0xd4019000 0x4>;
				};

				gcb1: gpio@d4019004 {
					reg = <0xd4019004 0x4>;
				};

				gcb2: gpio@d4019008 {
					reg = <0xd4019008 0x4>;
				};

				gcb3: gpio@d4019100 {
					reg = <0xd4019100 0x4>;
				};
			};

			twsi1: i2c@d4011000 {
				compatible = "mrvl,mmp-twsi";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xd4011000 0x1000>;
				interrupts = <7>;
				clocks = <&soc_clocks PXA910_CLK_TWSI0>;
				resets = <&soc_clocks PXA910_CLK_TWSI0>;
				mrvl,i2c-fast-mode;
				status = "disabled";
			};

			twsi2: i2c@d4037000 {
				compatible = "mrvl,mmp-twsi";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xd4037000 0x1000>;
				interrupts = <54>;
				clocks = <&soc_clocks PXA910_CLK_TWSI1>;
				resets = <&soc_clocks PXA910_CLK_TWSI1>;
				status = "disabled";
			};

			rtc: rtc@d4010000 {
				compatible = "mrvl,mmp-rtc";
				reg = <0xd4010000 0x1000>;
				interrupts = <5>, <6>;
				interrupt-names = "rtc 1Hz", "rtc alarm";
				clocks = <&soc_clocks PXA910_CLK_RTC>;
				resets = <&soc_clocks PXA910_CLK_RTC>;
				status = "disabled";
			};
		};

		soc_clocks: clocks{
			compatible = "marvell,pxa910-clock";
			reg = <0xd4050000 0x1000>,
			      <0xd4282800 0x400>,
			      <0xd4015000 0x1000>,
			      <0xd403b000 0x1000>;
			reg-names = "mpmu", "apmu", "apbc", "apbcp";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
#include "arm64/qcom/apq8016-sbc.dts"


code:
// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2022, Luca Weiss <luca@z3ntu.xyz>
 */

/dts-v1/;

#include "qcom-msm8226.dtsi"
#include "qcom-pm8226.dtsi"

/delete-node/ &adsp_region;

/ {
	model = "ASUS ZenWatch 2";
	compatible = "asus,sparrow", "qcom,apq8026";
	chassis-type = "watch";
	qcom,msm-id = <199 0x20000>;
	qcom,board-id = <8 3005>;

	reserved-memory {
		sbl_region: sbl@2f00000 {
			reg = <0x02f00000 0x100000>;
			no-map;
		};
		external_image_region: external-image@3100000 {
			reg = <0x3100000 0x200000>;
			no-map;
		};
		peripheral_region: peripheral@3300000 {
			reg = <0x3300000 0x600000>;
			no-map;
		};
		adsp_region: adsp@3900000 {
			reg = <0x3900000 0x1400000>;
			no-map;
		};
		modem_region: modem@4d00000 {
			reg = <0x4d00000 0x1b00000>;
			no-map;
		};
		modem_efs_region: modem-efs@7f00000 {
			reg = <0x7f00000 0x100000>;
			no-map;
		};
	};

	vreg_wlan: wlan-regulator {
		compatible = "regulator-fixed";

		regulator-name = "wl-reg";
		regulator-min-microvolt = <2950000>;
		regulator-max-microvolt = <2950000>;

		gpio = <&tlmm 35 GPIO_ACTIVE_HIGH>;
		enable-active-high;

		pinctrl-names = "default";
		pinctrl-0 = <&wlan_regulator_default_state>;
	};
};

&adsp {
	status = "okay";
};

&blsp1_uart1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&blsp1_uart1_default_state>;

	bluetooth {
		compatible = "brcm,bcm43430a1-bt";
		max-speed = <3000000>;

		pinctrl-names = "default";
		pinctrl-0 = <&bluetooth_default_state>;

		host-wakeup-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
		device-wakeup-gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>;
		shutdown-gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
	};
};

&pm8226_vib {
	status = "okay";
};

&rpm_requests {
	regulators {
		compatible = "qcom,rpm-pm8226-regulators";

		pm8226_s3: s3 {
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1300000>;
		};
		pm8226_s4: s4 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <2200000>;
		};
		pm8226_s5: s5 {
			regulator-min-microvolt = <1150000>;
			regulator-max-microvolt = <1150000>;
		};

		pm8226_l1: l1 {
			regulator-min-microvolt = <1225000>;
			regulator-max-microvolt = <1225000>;
		};
		pm8226_l2: l2 {
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
		};
		pm8226_l3: l3 {
			regulator-min-microvolt = <750000>;
			regulator-max-microvolt = <1337500>;
		};
		pm8226_l4: l4 {
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
		};
		pm8226_l5: l5 {
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
		};
		pm8226_l6: l6 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};
		pm8226_l7: l7 {
			regulator-min-microvolt = <1900000>;
			regulator-max-microvolt = <1900000>;
		};
		pm8226_l8: l8 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};
		pm8226_l9: l9 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};
		pm8226_l10: l10 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};
		pm8226_l12: l12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};
		pm8226_l14: l14 {
			regulator-min-microvolt = <2750000>;
			regulator-max-microvolt = <2750000>;
		};
		pm8226_l15: l15 {
			regulator-min-microvolt = <3000000>;
			regulator-max-microvolt = <3000000>;
		};
		pm8226_l16: l16 {
			regulator-min-microvolt = <3000000>;
			regulator-max-microvolt = <3000000>;
		};
		pm8226_l17: l17 {
			regulator-min-microvolt = <2950000>;
			regulator-max-microvolt = <2950000>;
		};
		pm8226_l18: l18 {
			regulator-min-microvolt = <2950000>;
			regulator-max-microvolt = <2950000>;
		};
		pm8226_l19: l19 {
			regulator-min-microvolt = <2850000>;
			regulator-max-microvolt = <2850000>;
		};
		pm8226_l20: l20 {
			regulator-min-microvolt = <3075000>;
			regulator-max-microvolt = <3075000>;
		};
		pm8226_l21: l21 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <2950000>;
		};
		pm8226_l22: l22 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <2950000>;
		};
		pm8226_l23: l23 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};
		pm8226_l24: l24 {
			regulator-min-microvolt = <1300000>;
			regulator-max-microvolt = <1350000>;
		};
		pm8226_l25: l25 {
			regulator-min-microvolt = <1775000>;
			regulator-max-microvolt = <2125000>;
		};
		pm8226_l26: l26 {
			regulator-min-microvolt = <1225000>;
			regulator-max-microvolt = <1225000>;
		};
		pm8226_l27: l27 {
			regulator-min-microvolt = <2050000>;
			regulator-max-microvolt = <2050000>;
		};
		pm8226_l28: l28 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <2950000>;
		};

		pm8226_lvs1: lvs1 {};
	};
};

&sdhc_1 {
	status = "okay";

	vmmc-supply = <&pm8226_l17>;
	vqmmc-supply = <&pm8226_l6>;

	bus-width = <8>;
	non-removable;
};

&sdhc_3 {
	status = "okay";

	max-frequency = <100000000>;
	non-removable;

	vmmc-supply = <&vreg_wlan>;
	vqmmc-supply = <&pm8226_l6>;

	#address-cells = <1>;
	#size-cells = <0>;

	wifi@1 {
		compatible = "brcm,bcm43430a1-fmac", "brcm,bcm4329-fmac";
		reg = <1>;

		interrupts-extended = <&tlmm 46 IRQ_TYPE_EDGE_FALLING>;
		interrupt-names = "host-wake";

		pinctrl-names = "default";
		pinctrl-0 = <&wlan_hostwake_default_state>;
	};
};

&smbb {
	qcom,fast-charge-safe-current = <1500000>;
	qcom,fast-charge-current-limit = <350000>;
	qcom,fast-charge-safe-voltage = <4430000>;
	qcom,fast-charge-high-threshold-voltage = <4400000>;
	qcom,auto-recharge-threshold-voltage = <4300000>;
	qcom,minimum-input-voltage = <4400000>;
};

&tlmm {
	blsp1_uart1_default_state: blsp1-uart1-default-state {
		pins = "gpio0", "gpio1", "gpio2", "gpio3";
		function = "blsp_uart1";
		drive-strength = <8>;
		bias-disable;
	};

	bluetooth_default_state: bluetooth-default-state {
		pins = "gpio48", "gpio61";
		function = "gpio";
		drive-strength = <8>;
		bias-disable;
		input-enable;
	};

	wlan_hostwake_default_state: wlan-hostwake-default-state {
		pins = "gpio46";
		function = "gpio";
		drive-strength = <2>;
		bias-disable;
		input-enable;
	};

	wlan_regulator_default_state: wlan-regulator-default-state {
		pins = "gpio35";
		function = "gpio";
		drive-strength = <2>;
		bias-pull-up;
	};
};

&usb {
	status = "okay";
	extcon = <&smbb>;
	dr_mode = "peripheral";
};

&usb_hs_phy {
	extcon = <&smbb>;
	v1p8-supply = <&pm8226_l10>;
	v3p3-supply = <&pm8226_l20>;
};