code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/soc/renesas/renesas,rzg2l-sysc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Renesas RZ/{G2L,V2L} System Controller (SYSC)

maintainers:
  - Geert Uytterhoeven <geert+renesas@glider.be>

description:
  The RZ/{G2L,V2L}-alike System Controller (SYSC) performs system control of
  the LSI and supports following functions,
  - External terminal state capture function
  - 34-bit address space access function
  - Low power consumption control
  - WDT stop control

properties:
  compatible:
    enum:
      - renesas,r9a07g043-sysc # RZ/G2UL and RZ/Five
      - renesas,r9a07g044-sysc # RZ/G2{L,LC}
      - renesas,r9a07g054-sysc # RZ/V2L

  reg:
    maxItems: 1

  interrupts:
    items:
      - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
      - description: CA55 Software Standby Mode release request interrupt
      - description: CM33 Software Standby Mode release request interrupt
      - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt

  interrupt-names:
    items:
      - const: lpm_int
      - const: ca55stbydone_int
      - const: cm33stbyr_int
      - const: ca55_deny

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    sysc: system-controller@11020000 {
            compatible = "renesas,r9a07g044-sysc";
            reg = <0x11020000 0x10000>;
            interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
            interrupt-names = "lpm_int", "ca55stbydone_int", "cm33stbyr_int",
                              "ca55_deny";
    };


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/renesas/renesas.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas SH-Mobile, R-Mobile, and R-Car Platform

maintainers:
  - Geert Uytterhoeven <geert+renesas@glider.be>

properties:
  $nodename:
    const: '/'
  compatible:
    oneOf:
      - description: Emma Mobile EV2
        items:
          - enum:
              - renesas,kzm9d # Kyoto Microcomputer Co. KZM-A9-Dual
          - const: renesas,emev2

      - description: RZ/A1H (R7S72100)
        items:
          - enum:
              - renesas,genmai # Genmai (RTK772100BC00000BR)
              - renesas,gr-peach # GR-Peach (X28A-M01-E/F)
              - renesas,rskrza1 # RSKRZA1 (YR0K77210C000BE)
          - const: renesas,r7s72100

      - description: RZ/A2 (R7S9210)
        items:
          - enum:
              - renesas,rza2mevb # RZ/A2M Eval Board (RTK7921053S00000BE)
          - const: renesas,r7s9210

      - description: SH-Mobile AG5 (R8A73A00/SH73A0)
        items:
          - enum:
              - renesas,kzm9g # Kyoto Microcomputer Co. KZM-A9-GT
          - const: renesas,sh73a0

      - description: R-Mobile APE6 (R8A73A40)
        items:
          - enum:
              - renesas,ape6evm
          - const: renesas,r8a73a4

      - description: R-Mobile A1 (R8A77400)
        items:
          - enum:
              - renesas,armadillo800eva # Atmark Techno Armadillo-800 EVA
          - const: renesas,r8a7740

      - description: RZ/G1H (R8A77420)
        items:
          - enum:
              # iWave Systems RZ/G1H Qseven System On Module (iW-RainboW-G21M-Qseven)
              - iwave,g21m
          - const: renesas,r8a7742

      - items:
          - enum:
              # iWave Systems RZ/G1H Qseven Development Platform (iW-RainboW-G21D-Qseven)
              - iwave,g21d
          - const: iwave,g21m
          - const: renesas,r8a7742

      - description: RZ/G1M (R8A77430)
        items:
          - enum:
              # iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
              - iwave,g20d
          - const: iwave,g20m
          - const: renesas,r8a7743

      - items:
          - enum:
              # iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
              - iwave,g20m
              - renesas,sk-rzg1m # SK-RZG1M (YR8A77430S000BE)
          - const: renesas,r8a7743

      - description: RZ/G1N (R8A77440)
        items:
          - enum:
              # iWave Systems RZ/G1N Qseven Development Platform (iW-RainboW-G20D-Qseven)
              - iwave,g20d
          - const: iwave,g20m
          - const: renesas,r8a7744

      - items:
          - enum:
              # iWave Systems RZ/G1N Qseven System On Module (iW-RainboW-G20M-Qseven)
              - iwave,g20m
          - const: renesas,r8a7744

      - description: RZ/G1E (R8A77450)
        items:
          - enum:
              - iwave,g22m # iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM)
              - renesas,sk-rzg1e # SK-RZG1E (YR8A77450S000BE)
          - const: renesas,r8a7745

      - description: iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
        items:
          - const: iwave,g22d
          - const: iwave,g22m
          - const: renesas,r8a7745

      - description: RZ/G1C (R8A77470)
        items:
          - enum:
              - iwave,g23s #iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)
          - const: renesas,r8a77470

      - description: RZ/G2M (R8A774A1)
        items:
          - enum:
              - hoperun,hihope-rzg2m # HopeRun HiHope RZ/G2M platform
              - beacon,beacon-rzg2m # Beacon EmbeddedWorks RZ/G2M Kit
          - const: renesas,r8a774a1

      - items:
          - enum:
              - hoperun,hihope-rzg2-ex # HopeRun expansion board for HiHope RZ/G2 platforms
          - const: hoperun,hihope-rzg2m
          - const: renesas,r8a774a1

      - description: RZ/G2N (R8A774B1)
        items:
          - enum:
              - beacon,beacon-rzg2n # Beacon EmbeddedWorks RZ/G2N Kit
              - hoperun,hihope-rzg2n # HopeRun HiHope RZ/G2N platform
          - const: renesas,r8a774b1

      - items:
          - enum:
              - hoperun,hihope-rzg2-ex # HopeRun expansion board for HiHope RZ/G2 platforms
          - const: hoperun,hihope-rzg2n
          - const: renesas,r8a774b1

      - description: RZ/G2E (R8A774C0)
        items:
          - enum:
              - si-linux,cat874 # Silicon Linux RZ/G2E 96board platform (CAT874)
          - const: renesas,r8a774c0

      - items:
          - enum:
              - si-linux,cat875 # Silicon Linux sub board for CAT874 (CAT875)
          - const: si-linux,cat874
          - const: renesas,r8a774c0

      - description: RZ/G2H (R8A774E1)
        items:
          - enum:
              - beacon,beacon-rzg2h # Beacon EmbeddedWorks RZ/G2H Kit
              - hoperun,hihope-rzg2h # HopeRun HiHope RZ/G2H platform
          - const: renesas,r8a774e1

      - items:
          - enum:
              - hoperun,hihope-rzg2-ex # HopeRun expansion board for HiHope RZ/G2 platforms
          - const: hoperun,hihope-rzg2h
          - const: renesas,r8a774e1

      - description: R-Car M1A (R8A77781)
        items:
          - enum:
              - renesas,bockw
          - const: renesas,r8a7778

      - description: R-Car H1 (R8A77790)
        items:
          - enum:
              - renesas,marzen # Marzen (R0P7779A00010S)
          - const: renesas,r8a7779

      - description: R-Car H2 (R8A77900)
        items:
          - enum:
              - renesas,lager # Lager (RTP0RC7790SEB00010S)
              - renesas,stout # Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD)
          - const: renesas,r8a7790

      - description: R-Car M2-W (R8A77910)
        items:
          - enum:
              - renesas,henninger
              - renesas,koelsch # Koelsch (RTP0RC7791SEB00010S)
              - renesas,porter # Porter (M2-LCDP)
          - const: renesas,r8a7791

      - description: R-Car V2H (R8A77920)
        items:
          - enum:
              - renesas,blanche # Blanche (RTP0RC7792SEB00010S)
              - renesas,wheat # Wheat (RTP0RC7792ASKB0000JE)
          - const: renesas,r8a7792

      - description: R-Car M2-N (R8A77930)
        items:
          - enum:
              - renesas,gose # Gose (RTP0RC7793SEB00010S)
          - const: renesas,r8a7793

      - description: R-Car E2 (R8A77940)
        items:
          - enum:
              - renesas,alt # Alt (RTP0RC7794SEB00010S)
              - renesas,silk # SILK (RTP0RC7794LCB00011S)
          - const: renesas,r8a7794

      - description: R-Car H3 (R8A77950)
        items:
          - enum:
                # H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
                # H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
              - renesas,h3ulcb
              - renesas,salvator-x # Salvator-X (RTP0RC7795SIPB0010S)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
          - const: renesas,r8a7795

      - description: R-Car M3-W (R8A77960)
        items:
          - enum:
              - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
              - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S)
          - const: renesas,r8a7796

      - description: R-Car M3-W+ (R8A77961)
        items:
          - enum:
              - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro, RTP8J77961ASKB0SK0SA05A (M3 ES3.0))
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012SA5A)
          - const: renesas,r8a77961

      - description: Kingfisher (SBEV-RCAR-KF-M03)
        oneOf:
          - items:
              - const: shimafuji,kingfisher
              - enum:
                  - renesas,h3ulcb
                  - renesas,m3ulcb
                  - renesas,m3nulcb
              - enum:
                  - renesas,r8a7795
                  - renesas,r8a7796
                  - renesas,r8a77961
                  - renesas,r8a77965
          - items:
              - const: shimafuji,kingfisher
              - enum:
                  - renesas,h3ulcb
                  - renesas,m3ulcb
                  - renesas,m3nulcb
              - enum:
                  - renesas,r8a779m0
                  - renesas,r8a779m1
                  - renesas,r8a779m2
                  - renesas,r8a779m3
                  - renesas,r8a779m4
                  - renesas,r8a779m5
                  - renesas,r8a779m8
                  - renesas,r8a779mb
              - enum:
                  - renesas,r8a7795
                  - renesas,r8a77961
                  - renesas,r8a77965

      - description: R-Car M3-N (R8A77965)
        items:
          - enum:
              - renesas,m3nulcb # M3NULCB (R-Car Starter Kit Pro, RTP0RC77965SKBX010SA00 (M3-N ES1.1))
              - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S (M3-N))
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S)
          - const: renesas,r8a77965

      - description: R-Car V3M (R8A77970)
        items:
          - enum:
              - renesas,eagle # Eagle (RTP0RC77970SEB0010S)
              - renesas,v3msk # V3MSK (Y-ASK-RCAR-V3M-WS10)
          - const: renesas,r8a77970

      - description: R-Car V3H (R8A77980)
        items:
          - enum:
              - renesas,condor # Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01)
              - renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10)
          - const: renesas,r8a77980

      - description: R-Car V3H2 (R8A77980A)
        items:
          - enum:
              - renesas,condor-i # Condor-I (RTP0RC77980SEBS012SA01)
          - const: renesas,r8a77980a
          - const: renesas,r8a77980

      - description: R-Car E3 (R8A77990)
        items:
          - enum:
              - renesas,ebisu # Ebisu (RTP0RC77990SEB0010S)
          - const: renesas,r8a77990

      - description: R-Car D3 (R8A77995)
        items:
          - enum:
              - renesas,draak # Draak (RTP0RC77995SEB0010S)
          - const: renesas,r8a77995

      - description: R-Car V3U (R8A779A0)
        items:
          - enum:
              - renesas,falcon-cpu # Falcon CPU board (RTP0RC779A0CPB0010S)
          - const: renesas,r8a779a0

      - items:
          - enum:
              - renesas,falcon-breakout # Falcon BreakOut board (RTP0RC779A0BOB0010S)
          - const: renesas,falcon-cpu
          - const: renesas,r8a779a0

      - description: R-Car S4-8 (R8A779F0)
        items:
          - enum:
              - renesas,spider-cpu # Spider CPU board (RTP8A779F0ASKB0SC2S)
          - const: renesas,r8a779f0

      - items:
          - enum:
              - renesas,spider-breakout # Spider BreakOut board (RTP8A779F0ASKB0SB0S)
          - const: renesas,spider-cpu
          - const: renesas,r8a779f0

      - description: R-Car V4H (R8A779G0)
        items:
          - enum:
              - renesas,white-hawk-cpu # White Hawk CPU board (RTP8A779G0ASKB0FC0SA000)
          - const: renesas,r8a779g0

      - items:
          - enum:
              - renesas,white-hawk-breakout # White Hawk BreakOut board (RTP8A779G0ASKB0SB0SA000)
          - const: renesas,white-hawk-cpu
          - const: renesas,r8a779g0

      - description: R-Car H3e (R8A779M0)
        items:
          - enum:
              - renesas,h3ulcb      # H3ULCB (R-Car Starter Kit Premier)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)
          - const: renesas,r8a779m0
          - const: renesas,r8a7795

      - description: R-Car H3e-2G (R8A779M1)
        items:
          - enum:
              - renesas,h3ulcb      # H3ULCB (R-Car Starter Kit Premier)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)
          - const: renesas,r8a779m1
          - const: renesas,r8a7795

      - description: R-Car M3e (R8A779M2)
        items:
          - enum:
              - renesas,m3ulcb      # M3ULCB (R-Car Starter Kit Pro)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)
          - const: renesas,r8a779m2
          - const: renesas,r8a77961

      - description: R-Car M3e-2G (R8A779M3)
        items:
          - enum:
              - renesas,m3ulcb      # M3ULCB (R-Car Starter Kit Pro)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)
          - const: renesas,r8a779m3
          - const: renesas,r8a77961

      - description: R-Car M3Ne (R8A779M4)
        items:
          - enum:
              - renesas,m3nulcb     # M3NULCB (R-Car Starter Kit Pro)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)
          - const: renesas,r8a779m4
          - const: renesas,r8a77965

      - description: R-Car M3Ne-2G (R8A779M5)
        items:
          - enum:
              - renesas,m3nulcb     # M3NULCB (R-Car Starter Kit Pro)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)
          - const: renesas,r8a779m5
          - const: renesas,r8a77965

      - description: R-Car E3e (R8A779M6)
        items:
          - enum:
              - renesas,ebisu       # Ebisu
          - const: renesas,r8a779m6
          - const: renesas,r8a77990

      - description: R-Car D3e (R8A779M7)
        items:
          - enum:
              - renesas,draak       # Draak
          - const: renesas,r8a779m7
          - const: renesas,r8a77995

      - description: R-Car H3Ne (R8A779M8)
        items:
          - enum:
              - renesas,h3ulcb      # H3ULCB (R-Car Starter Kit Premier)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)
          - const: renesas,r8a779m8
          - const: renesas,r8a7795

      - description: R-Car H3Ne-1.7G (R8A779MB)
        items:
          - enum:
              - renesas,h3ulcb      # H3ULCB (R-Car Starter Kit Premier)
              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)
          - const: renesas,r8a779mb
          - const: renesas,r8a7795

      - description: RZ/N1D (R9A06G032)
        items:
          - enum:
              - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
          - const: renesas,r9a06g032

      - description: RZ/Five and RZ/G2UL (R9A07G043)
        items:
          - enum:
              - renesas,smarc-evk # SMARC EVK
          - enum:
              - renesas,r9a07g043f01 # RZ/Five
              - renesas,r9a07g043u11 # RZ/G2UL Type-1
              - renesas,r9a07g043u12 # RZ/G2UL Type-2
          - const: renesas,r9a07g043

      - description: RZ/G2{L,LC} (R9A07G044)
        items:
          - enum:
              - renesas,smarc-evk # SMARC EVK
          - enum:
              - renesas,r9a07g044c1 # Single Cortex-A55 RZ/G2LC
              - renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC
              - renesas,r9a07g044l1 # Single Cortex-A55 RZ/G2L
              - renesas,r9a07g044l2 # Dual Cortex-A55 RZ/G2L
          - const: renesas,r9a07g044

      - description: RZ/V2L (R9A07G054)
        items:
          - enum:
              - renesas,smarc-evk # SMARC EVK
          - enum:
              - renesas,r9a07g054l1 # Single Cortex-A55 RZ/V2L
              - renesas,r9a07g054l2 # Dual Cortex-A55 RZ/V2L
          - const: renesas,r9a07g054

      - description: RZ/V2M (R9A09G011)
        items:
          - enum:
              - renesas,rzv2mevk2   # RZ/V2M Eval Board v2.0
          - const: renesas,r9a09g011

additionalProperties: true

...

repo_name: angery/linux


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/rockchip/grf.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip General Register Files (GRF)

maintainers:
  - Heiko Stuebner <heiko@sntech.de>

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - rockchip,rk3288-sgrf
              - rockchip,rk3566-pipe-grf
              - rockchip,rk3568-pcie3-phy-grf
              - rockchip,rk3568-pipe-grf
              - rockchip,rk3568-pipe-phy-grf
              - rockchip,rk3568-usb2phy-grf
              - rockchip,rk3588-pcie3-phy-grf
              - rockchip,rk3588-pcie3-pipe-grf
              - rockchip,rv1108-usbgrf
          - const: syscon
      - items:
          - enum:
              - rockchip,px30-grf
              - rockchip,px30-pmugrf
              - rockchip,px30-usb2phy-grf
              - rockchip,rk3036-grf
              - rockchip,rk3066-grf
              - rockchip,rk3128-grf
              - rockchip,rk3188-grf
              - rockchip,rk3228-grf
              - rockchip,rk3288-grf
              - rockchip,rk3308-core-grf
              - rockchip,rk3308-detect-grf
              - rockchip,rk3308-grf
              - rockchip,rk3308-usb2phy-grf
              - rockchip,rk3328-grf
              - rockchip,rk3328-usb2phy-grf
              - rockchip,rk3368-grf
              - rockchip,rk3368-pmugrf
              - rockchip,rk3399-grf
              - rockchip,rk3399-pmugrf
              - rockchip,rk3568-grf
              - rockchip,rk3568-pmugrf
              - rockchip,rv1108-grf
              - rockchip,rv1108-pmugrf
              - rockchip,rv1126-grf
              - rockchip,rv1126-pmugrf
          - const: syscon
          - const: simple-mfd

  reg:
    maxItems: 1

  "#address-cells":
    const: 1

  "#size-cells":
    const: 1

required:
  - compatible
  - reg

additionalProperties:
  type: object

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: rockchip,px30-grf

    then:
      properties:
        lvds:
          description:
            Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt

  - if:
      properties:
        compatible:
          contains:
            const: rockchip,rk3288-grf

    then:
      properties:
        edp-phy:
          description:
            Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt

  - if:
      properties:
        compatible:
          contains:
            enum:
              - rockchip,rk3066-grf
              - rockchip,rk3188-grf
              - rockchip,rk3288-grf

    then:
      properties:
        usbphy:
          type: object

          $ref: "/schemas/phy/rockchip-usb-phy.yaml#"

          unevaluatedProperties: false

  - if:
      properties:
        compatible:
          contains:
            const: rockchip,rk3328-grf

    then:
      properties:
        gpio:
          type: object

          $ref: "/schemas/gpio/rockchip,rk3328-grf-gpio.yaml#"

          unevaluatedProperties: false

        power-controller:
          type: object

          $ref: "/schemas/power/rockchip,power-controller.yaml#"

          unevaluatedProperties: false

  - if:
      properties:
        compatible:
          contains:
            const: rockchip,rk3399-grf

    then:
      properties:
        mipi-dphy-rx0:
          type: object

          $ref: "/schemas/phy/rockchip-mipi-dphy-rx0.yaml#"

          unevaluatedProperties: false

        pcie-phy:
          description:
            Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt

      patternProperties:
        "phy@[0-9a-f]+$":
          description:
            Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt

  - if:
      properties:
        compatible:
          contains:
            enum:
              - rockchip,px30-pmugrf
              - rockchip,rk3036-grf
              - rockchip,rk3308-grf
              - rockchip,rk3368-pmugrf

    then:
      properties:
        reboot-mode:
          type: object

          $ref: "/schemas/power/reset/syscon-reboot-mode.yaml#"

          unevaluatedProperties: false

  - if:
      properties:
        compatible:
          contains:
            enum:
              - rockchip,px30-usb2phy-grf
              - rockchip,rk3128-grf
              - rockchip,rk3228-grf
              - rockchip,rk3308-usb2phy-grf
              - rockchip,rk3328-usb2phy-grf
              - rockchip,rk3399-grf
              - rockchip,rv1108-grf

    then:
      required:
        - "#address-cells"
        - "#size-cells"

      patternProperties:
        "usb2phy@[0-9a-f]+$":
          type: object

          $ref: "/schemas/phy/phy-rockchip-inno-usb2.yaml#"

          unevaluatedProperties: false

  - if:
      properties:
        compatible:
          contains:
            enum:
              - rockchip,px30-grf
              - rockchip,px30-pmugrf
              - rockchip,rk3188-grf
              - rockchip,rk3228-grf
              - rockchip,rk3288-grf
              - rockchip,rk3328-grf
              - rockchip,rk3368-grf
              - rockchip,rk3368-pmugrf
              - rockchip,rk3399-grf
              - rockchip,rk3399-pmugrf
              - rockchip,rk3568-pmugrf
              - rockchip,rv1108-grf
              - rockchip,rv1108-pmugrf

    then:
      properties:
        io-domains:
          type: object

          $ref: "/schemas/power/rockchip-io-domain.yaml#"

          unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3399-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/rk3399-power.h>
    grf: syscon@ff770000 {
      compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
      reg = <0xff770000 0x10000>;
      #address-cells = <1>;
      #size-cells = <1>;

      mipi_dphy_rx0: mipi-dphy-rx0 {
        compatible = "rockchip,rk3399-mipi-dphy-rx0";
        clocks = <&cru SCLK_MIPIDPHY_REF>,
                 <&cru SCLK_DPHY_RX0_CFG>,
                 <&cru PCLK_VIO_GRF>;
        clock-names = "dphy-ref", "dphy-cfg", "grf";
        power-domains = <&power RK3399_PD_VIO>;
        #phy-cells = <0>;
      };

      u2phy0: usb2phy@e450 {
        compatible = "rockchip,rk3399-usb2phy";
        reg = <0xe450 0x10>;
        clocks = <&cru SCLK_USB2PHY0_REF>;
        clock-names = "phyclk";
        #clock-cells = <0>;
        clock-output-names = "clk_usbphy0_480m";

        u2phy0_host: host-port {
          #phy-cells = <0>;
          interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
          interrupt-names = "linestate";
         };

        u2phy0_otg: otg-port {
          #phy-cells = <0>;
          interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
                       <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
                       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
          interrupt-names = "otg-bvalid", "otg-id",
                            "linestate";
        };
      };
    };


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos SoC series Power Management Unit (PMU)

maintainers:
  - Krzysztof Kozlowski <krzk@kernel.org>

# Custom select to avoid matching all nodes with 'syscon'
select:
  properties:
    compatible:
      contains:
        enum:
          - samsung,exynos3250-pmu
          - samsung,exynos4210-pmu
          - samsung,exynos4412-pmu
          - samsung,exynos5250-pmu
          - samsung,exynos5260-pmu
          - samsung,exynos5410-pmu
          - samsung,exynos5420-pmu
          - samsung,exynos5433-pmu
          - samsung,exynos7-pmu
          - samsung,exynos850-pmu
          - samsung-s5pv210-pmu
  required:
    - compatible

properties:
  compatible:
    items:
      - enum:
          - samsung,exynos3250-pmu
          - samsung,exynos4210-pmu
          - samsung,exynos4412-pmu
          - samsung,exynos5250-pmu
          - samsung,exynos5260-pmu
          - samsung,exynos5410-pmu
          - samsung,exynos5420-pmu
          - samsung,exynos5433-pmu
          - samsung,exynos7-pmu
          - samsung,exynos850-pmu
          - samsung-s5pv210-pmu
      - const: syscon

  reg:
    maxItems: 1

  '#clock-cells':
    const: 1

  clock-names:
    description:
      List of clock names for particular CLKOUT mux inputs
    minItems: 1
    maxItems: 32
    items:
      pattern: '^clkout([0-9]|[12][0-9]|3[0-1])$'

  clocks:
    minItems: 1
    maxItems: 32

  interrupt-controller:
    description:
      Some PMUs are capable of behaving as an interrupt controller (mostly
      to wake up a suspended PMU).

  '#interrupt-cells':
    description:
      Must be identical to the that of the parent interrupt controller.
    const: 3

  reboot-mode:
    $ref: /schemas/power/reset/syscon-reboot-mode.yaml
    type: object
    description:
      Reboot mode to alter bootloader behavior for the next boot

  syscon-poweroff:
    $ref: /schemas/power/reset/syscon-poweroff.yaml#
    type: object
    description:
      Node for power off method

  syscon-reboot:
    $ref: /schemas/power/reset/syscon-reboot.yaml#
    type: object
    description:
      Node for reboot method

required:
  - compatible
  - reg

additionalProperties: false

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - samsung,exynos3250-pmu
              - samsung,exynos4210-pmu
              - samsung,exynos4412-pmu
              - samsung,exynos5250-pmu
              - samsung,exynos5410-pmu
              - samsung,exynos5420-pmu
              - samsung,exynos5433-pmu
    then:
      required:
        - '#clock-cells'
        - clock-names
        - clocks

examples:
  - |
    #include <dt-bindings/clock/exynos5250.h>

    pmu_system_controller: system-controller@10040000 {
        compatible = "samsung,exynos5250-pmu", "syscon";
        reg = <0x10040000 0x5000>;
        interrupt-controller;
        #interrupt-cells = <3>;
        interrupt-parent = <&gic>;
        #clock-cells = <1>;
        clock-names = "clkout16";
        clocks = <&clock CLK_FIN_PLL>;
    };


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung's Exynos USI (Universal Serial Interface) binding

maintainers:
  - Sam Protsenko <semen.protsenko@linaro.org>
  - Krzysztof Kozlowski <krzk@kernel.org>

description: |
  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
  USI shares almost all internal circuits within each protocol, so only one
  protocol can be chosen at a time. USI is modeled as a node with zero or more
  child nodes, each representing a serial sub-node device. The mode setting
  selects which particular function will be used.

properties:
  $nodename:
    pattern: "^usi@[0-9a-f]+$"

  compatible:
    oneOf:
      - items:
          - const: samsung,exynosautov9-usi
          - const: samsung,exynos850-usi
      - enum:
          - samsung,exynos850-usi

  reg: true

  clocks: true

  clock-names: true

  ranges: true

  "#address-cells":
    const: 1

  "#size-cells":
    const: 1

  samsung,sysreg:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      - items:
          - description: phandle to System Register syscon node
          - description: offset of SW_CONF register for this USI controller
    description:
      Should be phandle/offset pair. The phandle to System Register syscon node
      (for the same domain where this USI controller resides) and the offset
      of SW_CONF register for this USI controller.

  samsung,mode:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Selects USI function (which serial protocol to use). Refer to
      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.

  samsung,clkreq-on:
    type: boolean
    description:
      Enable this property if underlying protocol requires the clock to be
      continuously provided without automatic gating. As suggested by SoC
      manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
      multi-master mode. Usually this property is needed if USI mode is set
      to "UART".

      This property is optional.

patternProperties:
  "^i2c@[0-9a-f]+$":
    $ref: /schemas/i2c/i2c-exynos5.yaml
    description: Child node describing underlying I2C

  "^serial@[0-9a-f]+$":
    $ref: /schemas/serial/samsung_uart.yaml
    description: Child node describing underlying UART/serial

  "^spi@[0-9a-f]+$":
    $ref: /schemas/spi/samsung,spi.yaml
    description: Child node describing underlying SPI

required:
  - compatible
  - ranges
  - "#address-cells"
  - "#size-cells"
  - samsung,sysreg
  - samsung,mode

if:
  properties:
    compatible:
      contains:
        enum:
          - samsung,exynos850-usi

then:
  properties:
    reg:
      maxItems: 1

    clocks:
      items:
        - description: Bus (APB) clock
        - description: Operating clock for UART/SPI/I2C protocol

    clock-names:
      items:
        - const: pclk
        - const: ipclk

  required:
    - reg
    - clocks
    - clock-names

else:
  properties:
    reg: false
    clocks: false
    clock-names: false
    samsung,clkreq-on: false

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/soc/samsung,exynos-usi.h>

    usi0: usi@138200c0 {
        compatible = "samsung,exynos850-usi";
        reg = <0x138200c0 0x20>;
        samsung,sysreg = <&sysreg_peri 0x1010>;
        samsung,mode = <USI_V2_UART>;
        samsung,clkreq-on; /* needed for UART mode */
        #address-cells = <1>;
        #size-cells = <1>;
        ranges;
        clocks = <&cmu_peri 32>, <&cmu_peri 31>;
        clock-names = "pclk", "ipclk";

        serial_0: serial@13820000 {
            compatible = "samsung,exynos850-uart";
            reg = <0x13820000 0xc0>;
            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
            clock-names = "uart", "clk_uart_baud0";
            status = "disabled";
        };

        hsi2c_0: i2c@13820000 {
            compatible = "samsung,exynosautov9-hsi2c";
            reg = <0x13820000 0xc0>;
            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
            #address-cells = <1>;
            #size-cells = <0>;
            clocks = <&cmu_peri 31>, <&cmu_peri 32>;
            clock-names = "hsi2c", "hsi2c_pclk";
            status = "disabled";
        };
    };


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
%YAML 1.2
---
$id: "http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Texas Instruments K3 NavigatorSS Ring Accelerator

maintainers:
  - Santosh Shilimkar <ssantosh@kernel.org>
  - Grygorii Strashko <grygorii.strashko@ti.com>

description: |
  The Ring Accelerator (RA) is a machine which converts read/write accesses
  from/to a constant address into corresponding read/write accesses from/to a
  circular data structure in memory. The RA eliminates the need for each DMA
  controller which needs to access ring elements from having to know the current
  state of the ring (base address, current offset). The DMA controller
  performs a read or write access to a specific address range (which maps to the
  source interface on the RA) and the RA replaces the address for the transaction
  with a new address which corresponds to the head or tail element of the ring
  (head for reads, tail for writes).

  The Ring Accelerator is a hardware module that is responsible for accelerating
  management of the packet queues. The K3 SoCs can have more than one RA instances

properties:
  compatible:
    items:
      - const: ti,am654-navss-ringacc

  reg:
    items:
      - description: real time registers regions
      - description: fifos registers regions
      - description: proxy gcfg registers regions
      - description: proxy target registers regions

  reg-names:
    items:
      - const: rt
      - const: fifos
      - const: proxy_gcfg
      - const: proxy_target

  msi-parent: true

  ti,num-rings:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: Number of rings supported by RA

  ti,sci-rm-range-gp-rings:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: TI-SCI RM subtype for GP ring range

  ti,sci:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    description: phandle on TI-SCI compatible System controller node

  ti,sci-dev-id:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: TI-SCI device id of the ring accelerator

required:
  - compatible
  - reg
  - reg-names
  - msi-parent
  - ti,num-rings
  - ti,sci-rm-range-gp-rings
  - ti,sci
  - ti,sci-dev-id

additionalProperties: false

examples:
  - |
    bus {
        #address-cells = <2>;
        #size-cells = <2>;

        ringacc: ringacc@3c000000 {
            compatible = "ti,am654-navss-ringacc";
            reg = <0x0 0x3c000000 0x0 0x400000>,
                  <0x0 0x38000000 0x0 0x400000>,
                  <0x0 0x31120000 0x0 0x100>,
                  <0x0 0x33000000 0x0 0x40000>;
            reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
            ti,num-rings = <818>;
            ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
            ti,sci = <&dmsc>;
            ti,sci-dev-id = <187>;
            msi-parent = <&inta_main_udmass>;
        };
    };


code:
Keystone Navigator DMA Controller

This document explains the device tree bindings for the packet dma
on keystone devices. The Keystone Navigator DMA driver sets up the dma
channels and flows for the QMSS(Queue Manager SubSystem) who triggers
the actual data movements across clients using destination queues. Every
client modules like  NETCP(Network Coprocessor), SRIO(Serial Rapid IO),
CRYPTO Engines etc has its own instance of dma hardware. QMSS has also
an internal packet DMA module which is used as an infrastructure DMA
with zero copy.

Navigator DMA cloud layout:
	------------------
	| Navigator DMAs |
	------------------
		|
		|-> DMA instance #0
		|
		|-> DMA instance #1
			.
			.
		|
		|-> DMA instance #n

Navigator DMA properties:
Required properties:
 - compatible: Should be "ti,keystone-navigator-dma"
 - clocks: phandle to dma instances clocks. The clock handles can be as
	many as the dma instances. The order should be maintained as per
	the dma instances.
 - ti,navigator-cloud-address: Should contain base address for the multi-core
	navigator cloud and number of addresses depends on SOC integration
	configuration.. Navigator cloud global address needs to be programmed
	into DMA and the DMA uses it as the physical addresses to reach queue
	managers. Note that these addresses though points to queue managers,
	they are relevant only from DMA perspective. The QMSS may not choose to
	use them since it has a different address space view to reach all
	its components.

DMA instance properties:
Required properties:
 - reg: Should contain register location and length of the following dma
	register regions. Register regions should be specified in the following
	order.
	- Global control register region (global).
	- Tx DMA channel configuration register region (txchan).
	- Rx DMA channel configuration register region (rxchan).
	- Tx DMA channel Scheduler configuration register region (txsched).
	- Rx DMA flow configuration register region (rxflow).

Optional properties:
 - reg-names: Names for the register regions.
 - ti,enable-all: Enable all DMA channels vs clients opening specific channels
	what they need. This property is useful for the userspace fast path
	case where the linux drivers enables the channels used by userland
	stack.
 - ti,loop-back: To loopback Tx streaming I/F to Rx streaming I/F. Used for
	      infrastructure transfers.
 - ti,rx-retry-timeout: Number of dma cycles to wait before retry on buffer
		     starvation.

Example:

	knav_dmas: knav_dmas@0 {
		compatible = "ti,keystone-navigator-dma";
		clocks = <&papllclk>, <&clkxge>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,navigator-cloud-address = <0x23a80000 0x23a90000
					   0x23aa0000 0x23ab0000>;

		dma_gbe: dma_gbe@0 {
			reg = <0x2004000 0x100>,
				  <0x2004400 0x120>,
				  <0x2004800 0x300>,
				  <0x2004c00 0x120>,
				  <0x2005000 0x400>;
			reg-names = "global", "txchan", "rxchan",
					"txsched", "rxflow";
		};

		dma_xgbe: dma_xgbe@0 {
			reg = <0x2fa1000 0x100>,
				<0x2fa1400 0x200>,
				<0x2fa1800 0x200>,
				<0x2fa1c00 0x200>,
				<0x2fa2000 0x400>;
			reg-names = "global", "txchan", "rxchan",
					"txsched", "rxflow";
		};
	};

Navigator DMA client:
Required properties:
 - ti,navigator-dmas: List of one or more DMA specifiers, each consisting of
			- A phandle pointing to DMA instance node
			- A DMA channel number as a phandle arg.
 - ti,navigator-dma-names: Contains dma channel name for each DMA specifier in
			the 'ti,navigator-dmas' property.

Example:

	netcp: netcp@2090000 {
		..
		ti,navigator-dmas = <&dma_gbe 22>,
				<&dma_gbe 23>,
				<&dma_gbe 8>;
		ti,navigator-dma-names = "netrx0", "netrx1", "nettx";
		..
	};


code:
* Texas Instruments Keystone Navigator Queue Management SubSystem driver

The QMSS (Queue Manager Sub System) found on Keystone SOCs is one of
the main hardware sub system which forms the backbone of the Keystone
multi-core Navigator. QMSS consist of queue managers, packed-data structure
processors(PDSP), linking RAM, descriptor pools and infrastructure
Packet DMA.
The Queue Manager is a hardware module that is responsible for accelerating
management of the packet queues. Packets are queued/de-queued by writing or
reading descriptor address to a particular memory mapped location. The PDSPs
perform QMSS related functions like accumulation, QoS, or event management.
Linking RAM registers are used to link the descriptors which are stored in
descriptor RAM. Descriptor RAM is configurable as internal or external memory.
The QMSS driver manages the PDSP setups, linking RAM regions,
queue pool management (allocation, push, pop and notify) and descriptor
pool management.

Required properties:
- compatible	: Must be "ti,keystone-navigator-qmss".
		: Must be "ti,66ak2g-navss-qm" for QMSS on K2G SoC.
- clocks	: phandle to the reference clock for this device.
- queue-range	: <start number> total range of queue numbers for the device.
- linkram0	: <address size> for internal link ram, where size is the total
		  link ram entries.
- linkram1	: <address size> for external link ram, where size is the total
		  external link ram entries. If the address is specified as "0"
		  driver will allocate memory.
- qmgrs         : child node describing the individual queue managers on the
		  SoC. On keystone 1 devices there should be only one node.
		  On keystone 2 devices there can be more than 1 node.
  -- managed-queues	: the actual queues managed by each queue manager
			  instance, specified as <"base queue #" "# of queues">.
  -- reg		: Address and size of the register set for the device.
			  Register regions should be specified in the following
			  order
			  - Queue Peek region.
			  - Queue status RAM.
			  - Queue configuration region.
			  - Descriptor memory setup region.
			  - Queue Management/Queue Proxy region for queue Push.
			  - Queue Management/Queue Proxy region for queue Pop.

For QMSS on K2G SoC, following QM reg indexes are used in that order
			  - Queue Peek region.
			  - Queue configuration region.
			  - Queue Management/Queue Proxy region for queue Push/Pop.

- queue-pools	: child node classifying the queue ranges into pools.
		  Queue ranges are grouped into 3 type of pools:
		  - qpend	    : pool of qpend(interruptible) queues
		  - general-purpose : pool of general queues, primarily used
				      as free descriptor queues or the
				      transmit DMA queues.
		  - accumulator	    : pool of queues on PDSP accumulator channel
		  Each range can have the following properties:
  -- qrange		: number of queues to use per queue range, specified as
			  <"base queue #" "# of queues">.
  -- interrupts		: Optional property to specify the interrupt mapping
			  for interruptible queues. The driver additionally sets
			  the interrupt affinity hint based on the cpu mask.
  -- qalloc-by-id	: Optional property to specify that the queues in this
			  range can only be allocated by queue id.
  -- accumulator	: Accumulator channel specification. Any of the PDSPs in
			  QMSS can be loaded with the accumulator firmware. The
			  accumulator firmware’s job is to poll a select number of
			  queues looking for descriptors that have been pushed
			  into them. Descriptors are popped from the queue and
			  placed in a buffer provided by the host. When the list
			  becomes full or a programmed time period expires, the
			  accumulator triggers an interrupt to the host to read
			  the buffer for descriptor information. This firmware
			  comes in 16, 32, and 48 channel builds. Each of these
			  channels can be configured to monitor 32 contiguous
			  queues.  Accumulator channel property is specified as:
			  <pdsp-id, channel, entries, pacing mode, latency>
			  pdsp-id     : QMSS PDSP running accumulator firmware
					on which the channel has to be
					configured
			  channel     : Accumulator channel number
			  entries     : Size of the accumulator descriptor list
			  pacing mode : Interrupt pacing mode
					0 : None, i.e interrupt on list full only
					1 : Time delay since last interrupt
					2 : Time delay since first new packet
					3 : Time delay since last new packet
			  latency     : time to delay the interrupt, specified
					in microseconds.
  -- multi-queue	: Optional property to specify that the channel has to
			  monitor up to 32 queues starting at the base queue #.
- descriptor-regions	: child node describing the memory regions for keystone
			  navigator packet DMA descriptors. The memory for
			  descriptors will be allocated by the driver.
  -- id				: region number in QMSS.
  -- region-spec		: specifies the number of descriptors in the
				  region, specified as
				  <"# of descriptors" "descriptor size">.
  -- link-index			: start index, i.e. index of the first
				  descriptor in the region.

Optional properties:
- dma-coherent	: Present if DMA operations are coherent.
- pdsps		: child node describing the PDSP configuration.
  -- firmware		: firmware to be loaded on the PDSP.
  -- id			: the qmss pdsp that will run the firmware.
  -- reg		: Address and size of the register set for the PDSP.
			  Register regions should be specified in the following
			  order
			  - PDSP internal RAM region.
			  - PDSP control/status region registers.
			  - QMSS interrupt distributor registers.
			  - PDSP command interface region.

Example:

qmss: qmss@2a40000 {
	compatible = "ti,keystone-qmss";
	dma-coherent;
	#address-cells = <1>;
	#size-cells = <1>;
	clocks = <&chipclk13>;
	ranges;
	queue-range	= <0 0x4000>;
	linkram0	= <0x100000 0x8000>;
	linkram1	= <0x0 0x10000>;

	qmgrs {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		qmgr0 {
			managed-queues = <0 0x2000>;
			reg = <0x2a40000 0x20000>,
			      <0x2a06000 0x400>,
			      <0x2a02000 0x1000>,
			      <0x2a03000 0x1000>,
			      <0x23a80000 0x20000>,
			      <0x2a80000 0x20000>;
		};

		qmgr1 {
			managed-queues = <0x2000 0x2000>;
			reg = <0x2a60000 0x20000>,
			      <0x2a06400 0x400>,
			      <0x2a04000 0x1000>,
			      <0x2a05000 0x1000>,
			      <0x23aa0000 0x20000>,
			      <0x2aa0000 0x20000>;
		};
	};
	queue-pools {
		qpend {
			qpend-0 {
				qrange = <658 8>;
				interrupts =<0 40 0xf04 0 41 0xf04 0 42 0xf04
					     0 43 0xf04 0 44 0xf04 0 45 0xf04
					     0 46 0xf04 0 47 0xf04>;
			};
			qpend-1 {
				qrange = <8704 16>;
				interrupts = <0 48 0xf04 0 49 0xf04 0 50 0xf04
					      0 51 0xf04 0 52 0xf04 0 53 0xf04
					      0 54 0xf04 0 55 0xf04 0 56 0xf04
					      0 57 0xf04 0 58 0xf04 0 59 0xf04
					      0 60 0xf04 0 61 0xf04 0 62 0xf04
					      0 63 0xf04>;
				qalloc-by-id;
			};
			qpend-2 {
				qrange = <8720 16>;
				interrupts = <0 64 0xf04 0 65 0xf04 0 66 0xf04
					      0 59 0xf04 0 68 0xf04 0 69 0xf04
					      0 70 0xf04 0 71 0xf04 0 72 0xf04
					      0 73 0xf04 0 74 0xf04 0 75 0xf04
					      0 76 0xf04 0 77 0xf04 0 78 0xf04
					      0 79 0xf04>;
			};
		};
		general-purpose {
			gp-0 {
				qrange = <4000 64>;
			};
			netcp-tx {
				qrange = <640 9>;
				qalloc-by-id;
			};
		};
		accumulator {
			acc-0 {
				qrange = <128 32>;
				accumulator = <0 36 16 2 50>;
				interrupts = <0 215 0xf01>;
				multi-queue;
				qalloc-by-id;
			};
			acc-1 {
				qrange = <160 32>;
				accumulator = <0 37 16 2 50>;
				interrupts = <0 216 0xf01>;
				multi-queue;
			};
			acc-2 {
				qrange = <192 32>;
				accumulator = <0 38 16 2 50>;
				interrupts = <0 217 0xf01>;
				multi-queue;
			};
			acc-3 {
				qrange = <224 32>;
				accumulator = <0 39 16 2 50>;
				interrupts = <0 218 0xf01>;
				multi-queue;
			};
		};
	};
	descriptor-regions {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		region-12 {
			id = <12>;
			region-spec = <8192 128>; /* num_desc desc_size */
			link-index = <0x4000>;
		};
	};
	pdsps {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		pdsp0@2a10000 {
			reg = <0x2a10000 0x1000>,
			      <0x2a0f000 0x100>,
			      <0x2a0c000 0x3c8>,
			      <0x2a20000 0x4000>;
			id = <0>;
		};
	};
}; /* qmss */


code:
# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TI-SCI generic power domain node bindings

maintainers:
  - Nishanth Menon <nm@ti.com>

allOf:
  - $ref: /schemas/power/power-domain.yaml#

description: |
  Some TI SoCs contain a system controller (like the Power Management Micro
  Controller (PMMC) on Keystone 66AK2G SoC) that are responsible for controlling
  the state of the various hardware modules present on the SoC. Communication
  between the host processor running an OS and the system controller happens
  through a protocol called TI System Control Interface (TI-SCI protocol).

  This PM domain node represents the global PM domain managed by the TI-SCI
  controller. Since this relies on the TI SCI protocol to communicate with
  the TI-SCI controller, it must be a child of the TI-SCI controller node.

properties:
  compatible:
    const: ti,sci-pm-domain

  "#power-domain-cells":
    enum: [1, 2]
    description:
      The two cells represent values that the TI-SCI controller defines.

      The first cell should contain the device ID.

      The second cell, if cell-value is 2, should be one of the following
      TI_SCI_PD_EXCLUSIVE - Allows the device to be exclusively controlled
      or
      TI_SCI_PD_SHARED - Allows the device to be shared by multiple hosts.
      Please refer to dt-bindings/soc/ti,sci_pm_domain.h for the definitions.

      Please see  http://processors.wiki.ti.com/index.php/TISCI for
      protocol documentation for the values to be used for different devices.

additionalProperties: false

examples:
  - |
    k2g_pds: power-controller {
        compatible = "ti,sci-pm-domain";
        #power-domain-cells = <1>;
    };

  - |
    k3_pds: power-controller {
        compatible = "ti,sci-pm-domain";
        #power-domain-cells = <2>;
    };


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/ti/ti,pruss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: |+
  TI Programmable Real-Time Unit and Industrial Communication Subsystem

maintainers:
  - Suman Anna <s-anna@ti.com>

description: |+

  The Programmable Real-Time Unit and Industrial Communication Subsystem
  (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
  Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
  cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
  instruction RAMs, some internal peripheral modules to facilitate industrial
  communication, and an interrupt controller.

  The programmable nature of the PRUs provide flexibility to implement custom
  peripheral interfaces, fast real-time responses, or specialized data handling.
  The common peripheral modules include the following,
    - an Ethernet MII_RT module with two MII ports
    - an MDIO port to control external Ethernet PHYs
    - an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial
      Ethernet functions
    - an Enhanced Capture Module (eCAP)
    - an Industrial Ethernet Timer with 7/9 capture and 16 compare events
    - a 16550-compatible UART to support PROFIBUS
    - Enhanced GPIO with async capture and serial support

  A PRU-ICSS subsystem can have up to three shared data memories. A PRU core
  acts on a primary Data RAM (there are usually 2 Data RAMs) at its address
  0x0, but also has access to a secondary Data RAM (primary to the other PRU
  core) at its address 0x2000. A shared Data RAM, if present, can be accessed
  by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are
  common to both the PRU cores. Each PRU core also has a private instruction
  RAM, and specific register spaces for Control and Debug functionalities.

  Various sub-modules within a PRU-ICSS subsystem are represented as individual
  nodes and are defined using a parent-child hierarchy depending on their
  integration within the IP and the SoC. These nodes are described in the
  following sections.

  PRU-ICSS Node
  ==============
  Each PRU-ICSS instance is represented as its own node with the individual PRU
  processor cores, the memories node, an INTC node and an MDIO node represented
  as child nodes within this PRUSS node. This node shall be a child of the
  corresponding interconnect bus nodes or target-module nodes.

  See ../../mfd/syscon.yaml for generic SysCon binding details.

properties:
  $nodename:
    pattern: "^(pruss|icssg)@[0-9a-f]+$"

  compatible:
    enum:
      - ti,am3356-pruss  # for AM335x SoC family
      - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0
      - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1
      - ti,am5728-pruss  # for AM57xx SoC family
      - ti,am625-pruss   # for K3 AM62x SoC family
      - ti,am642-icssg   # for K3 AM64x SoC family
      - ti,am654-icssg   # for K3 AM65x SoC family
      - ti,j721e-icssg   # for K3 J721E SoC family
      - ti,k2g-pruss     # for 66AK2G SoC family

  reg:
    maxItems: 1

  "#address-cells":
    const: 1

  "#size-cells":
    const: 1

  ranges:
    maxItems: 1

  dma-ranges:
    maxItems: 1

  dma-coherent: true

  power-domains:
    description: |
      This property is as per sci-pm-domain.txt.

patternProperties:

  memories@[a-f0-9]+$:
    description: |
      The various Data RAMs within a single PRU-ICSS unit are represented as a
      single node with the name 'memories'.

    type: object

    properties:
      reg:
        minItems: 2 # On AM437x one of two PRUSS units don't contain Shared RAM.
        items:
          - description: Address and size of the Data RAM0.
          - description: Address and size of the Data RAM1.
          - description: |
              Address and size of the Shared Data RAM. Note that on AM437x one
              of two PRUSS units don't contain Shared RAM, while the second one
              has it.

      reg-names:
        minItems: 2
        items:
          - const: dram0
          - const: dram1
          - const: shrdram2

    required:
      - reg
      - reg-names

    additionalProperties: false

  cfg@[a-f0-9]+$:
    description: |
      PRU-ICSS configuration space. CFG sub-module represented as a SysCon.

    type: object

    properties:
      compatible:
        items:
          - const: ti,pruss-cfg
          - const: syscon

      "#address-cells":
        const: 1

      "#size-cells":
        const: 1

      reg:
        maxItems: 1

      ranges:
        maxItems: 1

      clocks:
        type: object

        properties:
          "#address-cells":
            const: 1

          "#size-cells":
            const: 0

        patternProperties:
          coreclk-mux@[a-f0-9]+$:
            description: |
              This is applicable only for ICSSG (K3 SoCs). The ICSSG modules
              core clock can be set to one of the 2 sources: ICSSG_CORE_CLK or
              ICSSG_ICLK.  This node models this clock mux and should have the
              name "coreclk-mux".

            type: object

            properties:
              '#clock-cells':
                const: 0

              clocks:
                items:
                  - description: ICSSG_CORE Clock
                  - description: ICSSG_ICLK Clock

              assigned-clocks:
                maxItems: 1

              assigned-clock-parents:
                maxItems: 1
                description: |
                  Standard assigned-clocks-parents definition used for selecting
                  mux parent (one of the mux input).

              reg:
                maxItems: 1

            required:
              - clocks

            additionalProperties: false

          iepclk-mux@[a-f0-9]+$:
            description: |
              The IEP module can get its clock from 2 sources: ICSSG_IEP_CLK or
              CORE_CLK (OCP_CLK in older SoCs). This node models this clock
              mux and should have the name "iepclk-mux".

            type: object

            properties:
              '#clock-cells':
                const: 0

              clocks:
                items:
                  - description: ICSSG_IEP Clock
                  - description: Core Clock (OCP Clock in older SoCs)

              assigned-clocks:
                maxItems: 1

              assigned-clock-parents:
                maxItems: 1
                description: |
                  Standard assigned-clocks-parents definition used for selecting
                  mux parent (one of the mux input).

              reg:
                maxItems: 1

            required:
              - clocks

            additionalProperties: false

        additionalProperties: false

  iep@[a-f0-9]+$:
    description: |
      Industrial Ethernet Peripheral to manage/generate Industrial Ethernet
      functions such as time stamping. Each PRUSS has either 1 IEP (on AM335x,
      AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x, J721E & AM64x SoCs).
      IEP is used for creating PTP clocks and generating PPS signals.

    type: object

  mii-rt@[a-f0-9]+$:
    description: |
      Real-Time Ethernet to support multiple industrial communication protocols.
      MII-RT sub-module represented as a SysCon.

    type: object

    properties:
      compatible:
        items:
          - const: ti,pruss-mii
          - const: syscon

      reg:
        maxItems: 1

    additionalProperties: false

  mii-g-rt@[a-f0-9]+$:
    description: |
      The Real-time Media Independent Interface to support multiple industrial
      communication protocols (G stands for Gigabit). MII-G-RT sub-module
      represented as a SysCon.

    type: object

    properties:
      compatible:
        items:
          - const: ti,pruss-mii-g
          - const: syscon

      reg:
        maxItems: 1

    additionalProperties: false

  interrupt-controller@[a-f0-9]+$:
    description: |
      PRUSS INTC Node. Each PRUSS has a single interrupt controller instance
      that is common to all the PRU cores. This should be represented as an
      interrupt-controller node.
    $ref: /schemas/interrupt-controller/ti,pruss-intc.yaml#
    type: object

  mdio@[a-f0-9]+$:
    description: |
      MDIO Node. Each PRUSS has an MDIO module that can be used to control
      external PHYs. The MDIO module used within the PRU-ICSS is an instance of
      the MDIO Controller used in TI Davinci SoCs.
    $ref: /schemas/net/ti,davinci-mdio.yaml#
    type: object

  "^(pru|rtu|txpru)@[0-9a-f]+$":
    description: |
      PRU Node. Each PRUSS has dual PRU cores, each represented as a RemoteProc
      device through a PRU child node each. Each node can optionally be rendered
      inactive by using the standard DT string property, "status". The ICSSG IP
      present on K3 SoCs have additional auxiliary PRU cores with slightly
      different IP integration.
    $ref: /schemas/remoteproc/ti,pru-rproc.yaml#
    type: object

required:
  - compatible
  - reg
  - ranges

additionalProperties: false

# Due to inability of correctly verifying sub-nodes with an @address through
# the "required" list, the required sub-nodes below are commented out for now.

#required:
# - memories
# - interrupt-controller
# - pru

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - ti,k2g-pruss
              - ti,am654-icssg
              - ti,j721e-icssg
              - ti,am642-icssg
    then:
      required:
        - power-domains

  - if:
      properties:
        compatible:
          contains:
            enum:
              - ti,k2g-pruss
    then:
      required:
        - dma-coherent

examples:
  - |

    /* Example 1 AM33xx PRU-ICSS */
    pruss: pruss@0 {
        compatible = "ti,am3356-pruss";
        reg = <0x0 0x80000>;
        #address-cells = <1>;
        #size-cells = <1>;
        ranges;

        pruss_mem: memories@0 {
            reg = <0x0 0x2000>,
                  <0x2000 0x2000>,
                  <0x10000 0x3000>;
            reg-names = "dram0", "dram1", "shrdram2";
        };

        pruss_cfg: cfg@26000 {
            compatible = "ti,pruss-cfg", "syscon";
            #address-cells = <1>;
            #size-cells = <1>;
            reg = <0x26000 0x2000>;
            ranges = <0x00 0x26000 0x2000>;

            clocks {
                #address-cells = <1>;
                #size-cells = <0>;

                pruss_iepclk_mux: iepclk-mux@30 {
                    reg = <0x30>;
                    #clock-cells = <0>;
                    clocks = <&l3_gclk>,        /* icss_iep */
                             <&pruss_ocp_gclk>; /* icss_ocp */
                };
            };
        };

        pruss_mii_rt: mii-rt@32000 {
            compatible = "ti,pruss-mii", "syscon";
            reg = <0x32000 0x58>;
        };

        pruss_intc: interrupt-controller@20000 {
            compatible = "ti,pruss-intc";
            reg = <0x20000 0x2000>;
            interrupt-controller;
            #interrupt-cells = <3>;
            interrupts = <20 21 22 23 24 25 26 27>;
            interrupt-names = "host_intr0", "host_intr1",
                              "host_intr2", "host_intr3",
                              "host_intr4", "host_intr5",
                              "host_intr6", "host_intr7";
        };

        pru0: pru@34000 {
            compatible = "ti,am3356-pru";
            reg = <0x34000 0x2000>,
                  <0x22000 0x400>,
                  <0x22400 0x100>;
            reg-names = "iram", "control", "debug";
            firmware-name = "am335x-pru0-fw";
        };

        pru1: pru@38000 {
            compatible = "ti,am3356-pru";
            reg = <0x38000 0x2000>,
                  <0x24000 0x400>,
                  <0x24400 0x100>;
            reg-names = "iram", "control", "debug";
            firmware-name = "am335x-pru1-fw";
        };

        pruss_mdio: mdio@32400 {
            compatible = "ti,davinci_mdio";
            reg = <0x32400 0x90>;
            clocks = <&dpll_core_m4_ck>;
            clock-names = "fck";
            bus_freq = <1000000>;
            #address-cells = <1>;
            #size-cells = <0>;
        };
    };

  - |

    /* Example 2 AM43xx PRU-ICSS with PRUSS1 node */
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    pruss1: pruss@0 {
        compatible = "ti,am4376-pruss1";
        reg = <0x0 0x40000>;
        #address-cells = <1>;
        #size-cells = <1>;
        ranges;

        pruss1_mem: memories@0 {
            reg = <0x0 0x2000>,
                  <0x2000 0x2000>,
                  <0x10000 0x8000>;
            reg-names = "dram0", "dram1", "shrdram2";
        };

        pruss1_cfg: cfg@26000 {
            compatible = "ti,pruss-cfg", "syscon";
            #address-cells = <1>;
            #size-cells = <1>;
            reg = <0x26000 0x2000>;
            ranges = <0x00 0x26000 0x2000>;

            clocks {
                #address-cells = <1>;
                #size-cells = <0>;

                pruss1_iepclk_mux: iepclk-mux@30 {
                    reg = <0x30>;
                    #clock-cells = <0>;
                    clocks = <&sysclk_div>,     /* icss_iep */
                             <&pruss_ocp_gclk>; /* icss_ocp */
                };
            };
        };

        pruss1_mii_rt: mii-rt@32000 {
            compatible = "ti,pruss-mii", "syscon";
            reg = <0x32000 0x58>;
        };

        pruss1_intc: interrupt-controller@20000 {
            compatible = "ti,pruss-intc";
            reg = <0x20000 0x2000>;
            interrupt-controller;
            #interrupt-cells = <3>;
            interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
            interrupt-names = "host_intr0", "host_intr1",
                              "host_intr2", "host_intr3",
                              "host_intr4",
                              "host_intr6", "host_intr7";
            ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
        };

        pru1_0: pru@34000 {
            compatible = "ti,am4376-pru";
            reg = <0x34000 0x3000>,
                  <0x22000 0x400>,
                  <0x22400 0x100>;
            reg-names = "iram", "control", "debug";
            firmware-name = "am437x-pru1_0-fw";
        };

        pru1_1: pru@38000 {
            compatible = "ti,am4376-pru";
            reg = <0x38000 0x3000>,
                  <0x24000 0x400>,
                  <0x24400 0x100>;
            reg-names = "iram", "control", "debug";
            firmware-name = "am437x-pru1_1-fw";
        };

        pruss1_mdio: mdio@32400 {
            compatible = "ti,davinci_mdio";
            reg = <0x32400 0x90>;
            clocks = <&dpll_core_m4_ck>;
            clock-names = "fck";
            bus_freq = <1000000>;
            #address-cells = <1>;
            #size-cells = <0>;
        };
    };

...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Wakeup M3 IPC device

maintainers:
  - Dave Gerlach <d-gerlach@ti.com>
  - Drew Fustini <dfustini@baylibre.com>

description: |+
  The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
  (commonly referred to as Wakeup M3 or CM3) to help with various low power tasks
  that cannot be controlled from the MPU, like suspend/resume and certain deep
  C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver
  to boot the wkup_m3, it handles communication with the CM3 using IPC registers
  present in the SoC's control module and a mailbox. The wkup_m3_ipc exposes an
  API to allow the SoC PM code to execute specific PM tasks.

  Wkup M3 Device Node
  ====================
  A wkup_m3_ipc device node is used to represent the IPC registers within an
  SoC.

  Support for VTT Toggle with GPIO pin
  ====================================
  On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is
  connected to the enable pin on the DDR VTT regulator. This allows the
  regulator to be disabled upon suspend and enabled upon resume. Please note
  that the GPIO pin must be part of the GPIO0 module as only this GPIO module
  is in the wakeup power domain.

  Support for IO Isolation
  ========================
  On AM437x SoCs, certain pins can be forced into an alternate state when IO
  isolation is activated. Those pins have pad control registers prefixed by
  'CTRL_CONF_' that contain DS0 (e.g. deep sleep) configuration bits that can
  override the pin's existing bias (pull-up/pull-down) and value (high/low) when
  IO isolation is active.

  Support for I2C PMIC Voltage Scaling
  ====================================
  It is possible to pass the name of a binary file to load into the CM3 memory.
  The binary data is the I2C sequences for the CM3 to send out to the PMIC
  during low power mode entry.

properties:
  compatible:
    enum:
      - ti,am3352-wkup-m3-ipc # for AM33xx SoCs
      - ti,am4372-wkup-m3-ipc # for AM43xx SoCs

  reg:
    description:
      The IPC register address space to communicate with the Wakeup M3 processor
    maxItems: 1

  interrupts:
    description: wkup_m3 interrupt that signals the MPU
    maxItems: 1

  ti,rproc:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      phandle to the wkup_m3 rproc node so the IPC driver can boot it

  mboxes:
    description:
      phandles used by IPC framework to get correct mbox
      channel for communication. Must point to appropriate
      mbox_wkupm3 child node.
    maxItems: 1

  firmware-name:
    description:
      Name of binary file with I2C sequences for PMIC voltage scaling

  ti,vtt-gpio-pin:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: GPIO pin connected to enable pin on VTT regulator

  ti,set-io-isolation:
    type: boolean
    description:
      If this property is present, then the wkup_m3_ipc driver will instruct
      the CM3 firmware to activate IO isolation when suspending to deep sleep.
      This can be leveraged by a board design to put other devices on the board
      into a low power state.

allOf:
  - if:
      properties:
        compatible:
          not:
            contains:
              const: ti,am4372-wkup-m3-ipc
    then:
      properties:
        ti,set-io-isolation: false

required:
  - compatible
  - reg
  - interrupts
  - ti,rproc
  - mboxes

additionalProperties: false

examples:
  - |
    /* Example for AM335x SoC */
    soc {
        #address-cells = <1>;
        #size-cells = <1>;

        am335x_mailbox: mailbox {
            #mbox-cells = <1>;
        };

        wkup_m3_ipc@1324 {
           compatible = "ti,am3352-wkup-m3-ipc";
           reg = <0x1324 0x24>;
           interrupts = <78>;
           ti,rproc = <&wkup_m3>;
           mboxes = <&am335x_mailbox &mbox_wkupm3>;
           ti,vtt-gpio-pin = <7>;
           firmware-name = "am335x-evm-scale-data.bin";
        };
    };

  - |
    /*
     * Example for AM473x SoC:
     * On the AM437x-GP-EVM board, gpio5_7 is wired to enable pin of the DDR VTT
     * regulator. The 'ddr_vtt_toggle_default' pinmux node configures gpio5_7
     * for pull-up during normal system operation. However, the DS0 (deep sleep)
     * state of the pin is configured for pull-down and thus the VTT regulator
     * will be disabled to save power when IO isolation is active. Note that
     * this method is an alternative to using the 'ti,vtt-gpio-pin' property.
     */
    #include <dt-bindings/pinctrl/am43xx.h>
    soc {
        #address-cells = <1>;
        #size-cells = <1>;

        am437x_mailbox: mailbox {
            #mbox-cells = <1>;
        };

        am43xx_pinmux {
            pinctrl-names = "default";
            pinctrl-0 = <&ddr3_vtt_toggle_default>;

            ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
                 pinctrl-single,pins = <
                    0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7)
                 >;
            };
        };

        wkup_m3_ipc@1324 {
           compatible = "ti,am4372-wkup-m3-ipc";
           reg = <0x1324 0x24>;
           interrupts = <78>;
           ti,rproc = <&wkup_m3>;
           mboxes = <&am437x_mailbox &mbox_wkupm3>;
           ti,set-io-isolation;
           firmware-name = "am43x-evm-scale-data.bin";
        };
    };

...


code:
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/xilinx/xlnx,vcu-settings.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Xilinx VCU Settings

maintainers:
  - Michael Tretter <kernel@pengutronix.de>

description: |
  The Xilinx VCU Settings provides information about the configuration of the
  video codec unit.

properties:
  compatible:
    items:
      - const: xlnx,vcu-settings
      - const: syscon

  reg:
    maxItems: 1

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    fpga {
        #address-cells = <2>;
        #size-cells = <2>;

        xlnx_vcu: vcu@a0041000 {
            compatible = "xlnx,vcu-settings", "syscon";
            reg = <0x0 0xa0041000 0x0 0x1000>;
        };
    };

...


code:
LogicoreIP designed compatible with Xilinx ZYNQ family.
-------------------------------------------------------

General concept
---------------

LogicoreIP design to provide the isolation between processing system
and programmable logic. Also provides the list of register set to configure
the frequency.

Required properties:
- compatible: shall be one of:
	"xlnx,vcu"
	"xlnx,vcu-logicoreip-1.0"
- reg : The base offset and size of the VCU_PL_SLCR register space.
- clocks: phandle for aclk and pll_ref clocksource
- clock-names: The identification string, "aclk", is always required for
   the axi clock. "pll_ref" is required for pll.
Example:

	xlnx_vcu: vcu@a0040000 {
		compatible = "xlnx,vcu-logicoreip-1.0";
		reg = <0x0 0xa0040000 0x0 0x1000>;
		clocks = <&si570_1>, <&clkc 71>;
		clock-names = "pll_ref", "aclk";
	};


code:
Generic AC97 Device Properties

This documents describes the devicetree bindings for an ac97 controller child
node describing ac97 codecs.

Required properties:
-compatible : Must be "ac97,vendor_id1,vendor_id2
	      The ids shall be the 4 characters hexadecimal encoding, such as
	      given by "%04x" formatting of printf
-reg	    : Must be the ac97 codec number, between 0 and 3

Example:
ac97: sound@40500000 {
	compatible = "marvell,pxa270-ac97";
	reg = < 0x40500000 0x1000 >;
	interrupts = <14>;
	reset-gpios = <&gpio 95 GPIO_ACTIVE_HIGH>;
	#sound-dai-cells = <1>;
	pinctrl-names = "default";
	pinctrl-0 = < &pinctrl_ac97_default >;
	clocks = <&clks CLK_AC97>, <&clks CLK_AC97CONF>;
	clock-names = "AC97CLK", "AC97CONFCLK";

	#address-cells = <1>;
	#size-cells = <0>;
	audio-codec@0 {
		reg = <0>;
		compatible = "ac97,574d,4c13";
		clocks = <&fixed_wm9713_clock>;
		clock-names = "ac97_clk";
	}
};


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/adi,adau1372.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Analog Devices ADAU1372 CODEC

maintainers:
  - Alexandre Belloni <alexandre.belloni@bootlin.com>

description: |
  Analog Devices ADAU1372 four inputs and two outputs codec.
  https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1372.pdf

allOf:
  - $ref: dai-common.yaml#

properties:
  compatible:
    enum:
      - adi,adau1372

  reg:
    maxItems: 1

  "#sound-dai-cells":
    const: 0

  clocks:
    maxItems: 1

  clock-names:
    const: "mclk"

  powerdown-gpios:
    description: GPIO used for hardware power-down.
    maxItems: 1

required:
  - "#sound-dai-cells"
  - compatible
  - reg
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;
        audio-codec@3c {
                compatible = "adi,adau1372";
                reg = <0x3c>;
                #sound-dai-cells = <0>;
                clock-names = "mclk";
                clocks = <&adau1372z_xtal>;
        };
    };

    adau1372z_xtal: clock {
        compatible = "fixed-clock";
        #clock-cells = <0>;
        clock-frequency = <12288000>;
    };
...


code:
Analog Devices ADAU1701

Required properties:

 - compatible:		Should contain "adi,adau1701"
 - reg:			The i2c address. Value depends on the state of ADDR0
			and ADDR1, as wired in hardware.

Optional properties:

 - reset-gpio: 		A GPIO spec to define which pin is connected to the
			chip's !RESET pin. If specified, the driver will
			assert a hardware reset at probe time.
 - adi,pll-mode-gpios:	An array of two GPIO specs to describe the GPIOs
			the ADAU's PLL config pins are connected to.
			The state of the pins are set according to the
			configured clock divider on ASoC side before the
			firmware is loaded.
 - adi,pin-config:	An array of 12 numerical values selecting one of the
			pin configurations as described in the datasheet,
			table 53. Note that the value of this property has
			to be prefixed with '/bits/ 8'.
 - avdd-supply: 	Power supply for AVDD, providing 3.3V
 - dvdd-supply: 	Power supply for DVDD, providing 3.3V

Examples:

	i2c_bus {
		adau1701@34 {
			compatible = "adi,adau1701";
			reg = <0x34>;
			reset-gpio = <&gpio 23 0>;
			avdd-supply = <&vdd_3v3_reg>;
			dvdd-supply = <&vdd_3v3_reg>;
			adi,pll-mode-gpios = <&gpio 24 0 &gpio 25 0>;
			adi,pin-config = /bits/ 8 <0x4 0x7 0x5 0x5 0x4 0x4
                                                   0x4 0x4 0x4 0x4 0x4 0x4>;
		};
	};


code:
Analog Devices ADAU1361/ADAU1461/ADAU1761/ADAU1961/ADAU1381/ADAU1781

Required properties:

 - compatible:		Should contain one of the following:
			"adi,adau1361"
			"adi,adau1461"
			"adi,adau1761"
			"adi,adau1961"
			"adi,adau1381"
			"adi,adau1781"

 - reg:			The i2c address. Value depends on the state of ADDR0
			and ADDR1, as wired in hardware.

Optional properties:
 - clock-names:		If provided must be "mclk".
 - clocks:		phandle + clock-specifiers for the clock that provides
			the audio master clock for the device.

Examples:
#include <dt-bindings/sound/adau17x1.h>

	i2c_bus {
		adau1361@38 {
			compatible = "adi,adau1761";
			reg = <0x38>;

			clock-names = "mclk";
			clocks = <&audio_clock>;
		};
	};


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/adi,adau1977.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Analog Devices ADAU1977/ADAU1978/ADAU1979 Quad ADC with Diagnostics

maintainers:
  - Lars-Peter Clausen <lars@metafoo.de>
  - Bogdan Togorean <bogdan.togorean@analog.com>

description: |
  Analog Devices ADAU1977 and similar quad ADC with Diagnostics
  https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1977.pdf
  https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1978.pdf
  https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1979.pdf

properties:
  compatible:
    enum:
      - adi,adau1977
      - adi,adau1978
      - adi,adau1979

  reg:
    maxItems: 1

  "#sound-dai-cells":
    const: 0

  reset-gpios:
    maxItems: 1

  AVDD-supply:
    description: Analog power support for the device.

  DVDD-supply:
    description: Supply voltage for digital core.

  adi,micbias:
    description: |
      Configures the voltage setting for the MICBIAS pin.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [0, 1, 2, 3, 4, 5, 6, 7, 8]
    default: 7

required:
  - reg
  - compatible
  - AVDD-supply

allOf:
  - $ref: dai-common.yaml#
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    spi {
        #address-cells = <1>;
        #size-cells = <0>;
        adau1977_spi: adau1977@0 {
            compatible = "adi,adau1977";
            reg = <0>;
            spi-max-frequency = <600000>;

            AVDD-supply = <&regulator>;
            DVDD-supply = <&regulator_digital>;

            reset-gpios = <&gpio 10 GPIO_ACTIVE_LOW>;

            adi,micbias = <3>;
        };
    };
  - |
    #include <dt-bindings/gpio/gpio.h>

    i2c {
        #address-cells = <1>;
        #size-cells = <0>;
        adau1977_i2c: adau1977@11 {
            compatible = "adi,adau1977";
            reg = <0x11>;

            AVDD-supply = <&regulator>;
            DVDD-supply = <&regulator_digital>;

            reset-gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
        };
    };


code:
Analog Devices ADAU7002 Stereo PDM-to-I2S/TDM Converter

Required properties:

 - compatible: Must be "adi,adau7002"

Optional properties:

 - IOVDD-supply: Phandle and specifier for the power supply providing the IOVDD
	supply as covered in Documentation/devicetree/bindings/regulator/regulator.txt

	If this property is not present it is assumed that the supply pin is
	hardwired to always on.

Example:
	adau7002: pdm-to-i2s {
		compatible = "adi,adau7002";
		IOVDD-supply = <&supply>;
	};


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/adi,adau7118.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Analog Devices ADAU7118 8 Channel PDM to I2S/TDM Converter

maintainers:
  - Nuno Sá <nuno.sa@analog.com>

description: |
  Analog Devices ADAU7118 8 Channel PDM to I2S/TDM Converter over I2C or HW
  standalone mode.
  https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU7118.pdf

allOf:
  - $ref: dai-common.yaml#

properties:
  compatible:
    enum:
      - adi,adau7118

  reg:
    maxItems: 1

  "#sound-dai-cells":
    const: 0

  iovdd-supply:
    description: Digital Input/Output Power Supply.

  dvdd-supply:
    description: Internal Core Digital Power Supply.

  adi,decimation-ratio:
    description: |
      This property set's the decimation ratio of PDM to PCM audio data.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [64, 32, 16]
    default: 64

  adi,pdm-clk-map:
    description: |
      The ADAU7118 has two PDM clocks for the four Inputs. Each input must be
      assigned to one of these two clocks. This property set's the mapping
      between the clocks and the inputs.
    $ref: /schemas/types.yaml#/definitions/uint32-array
    minItems: 4
    maxItems: 4
    items:
      maximum: 1
    default: [0, 0, 1, 1]

required:
  - "#sound-dai-cells"
  - compatible
  - iovdd-supply
  - dvdd-supply

unevaluatedProperties: false

examples:
  - |
    i2c {
        /* example with i2c support */
        #address-cells = <1>;
        #size-cells = <0>;
        adau7118_codec: audio-codec@14 {
                compatible = "adi,adau7118";
                reg = <0x14>;
                #sound-dai-cells = <0>;
                iovdd-supply = <&supply>;
                dvdd-supply = <&supply>;
                adi,pdm-clk-map = <1 1 0 0>;
                adi,decimation-ratio = <16>;
        };
    };

    /* example with hw standalone mode */
    adau7118_codec_hw: adau7118-codec-hw {
            compatible = "adi,adau7118";
            #sound-dai-cells = <0>;
            iovdd-supply = <&supply>;
            dvdd-supply = <&supply>;
    };


code:
ADI AXI-I2S controller

The core can be generated with transmit (playback), only receive
(capture) or both directions enabled.

Required properties:
 - compatible : Must be "adi,axi-i2s-1.00.a"
 - reg : Must contain I2S core's registers location and length
 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
   The controller expects two clocks, the clock used for the AXI interface and
   the clock used as the sampling rate reference clock sample.
 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample
   rate reference clock.
 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
   the core. The core expects two dma channels if both transmit and receive are
   enabled, one channel otherwise.
 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.

For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
please check:
	* resource-names.txt
	* clock/clock-bindings.txt
	* dma/dma.txt

Example:

	i2s: i2s@77600000 {
		compatible = "adi,axi-i2s-1.00.a";
		reg = <0x77600000 0x1000>;
		clocks = <&clk 15>, <&audio_clock>;
		clock-names = "axi", "ref";
		dmas = <&ps7_dma 0>, <&ps7_dma 1>;
		dma-names = "tx", "rx";
	};


code:
ADI AXI-SPDIF controller

Required properties:
 - compatible : Must be "adi,axi-spdif-tx-1.00.a"
 - reg : Must contain SPDIF core's registers location and length
 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
   The controller expects two clocks, the clock used for the AXI interface and
   the clock used as the sampling rate reference clock sample.
 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
   rate reference clock.
 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
   the core. The core expects one dma channel for transmit.
 - dma-names : Must be "tx"

For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
please check:
	* resource-names.txt
	* clock/clock-bindings.txt
	* dma/dma.txt

Example:

	spdif: spdif@77400000 {
		compatible = "adi,axi-spdif-tx-1.00.a";
		reg = <0x77600000 0x1000>;
		clocks = <&clk 15>, <&audio_clock>;
		clock-names = "axi", "ref";
		dmas = <&ps7_dma 0>;
		dma-names = "tx";
	};


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/adi,max98396.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Analog Devices MAX98396 Speaker Amplifier

maintainers:
  - Ryan Lee <ryans.lee@analog.com>

description:
  The MAX98396 is a mono Class-DG speaker amplifier with I/V sense.
  The device provides a PCM interface for audio data and a standard
  I2C interface for control data communication.
  The MAX98397 is a variant of MAX98396 with wide input supply range.

properties:
  compatible:
    enum:
      - adi,max98396
      - adi,max98397
  reg:
    maxItems: 1
    description: I2C address of the device.

  avdd-supply:
    description: A 1.8V supply that powers up the AVDD pin.

  dvdd-supply:
    description: A 1.2V supply that powers up the DVDD pin.

  dvddio-supply:
    description: A 1.2V or 1.8V supply that powers up the VDDIO pin.

  pvdd-supply:
    description: A 3.0V to 20V supply that powers up the PVDD pin.

  vbat-supply:
    description: A 3.3V to 5.5V supply that powers up the VBAT pin.

  adi,vmon-slot-no:
    description: slot number of the voltage sense monitor
    $ref: "/schemas/types.yaml#/definitions/uint32"
    minimum: 0
    maximum: 15
    default: 0

  adi,imon-slot-no:
    description: slot number of the current sense monitor
    $ref: "/schemas/types.yaml#/definitions/uint32"
    minimum: 0
    maximum: 15
    default: 1

  adi,spkfb-slot-no:
    description: slot number of speaker DSP monitor
    $ref: "/schemas/types.yaml#/definitions/uint32"
    minimum: 0
    maximum: 15
    default: 2

  adi,bypass-slot-no:
    description:
      Selects the PCM data input channel that is routed to the speaker
      audio processing bypass path.
    $ref: "/schemas/types.yaml#/definitions/uint32"
    minimum: 0
    maximum: 15
    default: 0

  adi,interleave-mode:
    description:
      For cases where a single combined channel for the I/V sense data
      is not sufficient, the device can also be configured to share
      a single data output channel on alternating frames.
      In this configuration, the current and voltage data will be frame
      interleaved on a single output channel.
    type: boolean

  adi,dmon-stuck-enable:
    description:
      Enables the "data monitor stuck" feature. Once the data monitor is
      enabled, it actively monitors the selected input data (from DIN) to the
      speaker amplifier. Once a data error is detected, the data monitor
      automatically places the device into software shutdown.
    type: boolean

  adi,dmon-stuck-threshold-bits:
    description:
      Sets the threshold for the "data monitor stuck" feature, in bits.
    enum: [9, 11, 13, 15]
    default: 15

  adi,dmon-magnitude-enable:
    description:
      Enables the "data monitor magnitude" feature. Once the data monitor is
      enabled, it actively monitors the selected input data (from DIN) to the
      speaker amplifier. Once a data error is detected, the data monitor
      automatically places the device into software shutdown.
    type: boolean

  adi,dmon-magnitude-threshold-bits:
    description:
      Sets the threshold for the "data monitor magnitude" feature, in bits.
    enum: [2, 3, 4, 5]
    default: 5

  adi,dmon-duration-ms:
    description:
      Sets the duration for the "data monitor" feature, in milliseconds.
    enum: [64, 256, 1024, 4096]
    default: 64

  reset-gpios:
    maxItems: 1

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;
        max98396: amplifier@39 {
            compatible = "adi,max98396";
            reg = <0x39>;
            dvdd-supply = <&regulator_1v2>;
            dvddio-supply = <&regulator_1v8>;
            avdd-supply = <&regulator_1v8>;
            pvdd-supply = <&regulator_pvdd>;
            adi,vmon-slot-no = <0>;
            adi,imon-slot-no = <1>;
            reset-gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
        };
    };


code:
Analog Devices SSM2305 Speaker Amplifier
========================================

Required properties:
  - compatible : "adi,ssm2305"
  - shutdown-gpios : The gpio connected to the shutdown pin.
                     The gpio signal is ACTIVE_LOW.

Example:

ssm2305: analog-amplifier {
	compatible = "adi,ssm2305";
	shutdown-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
};


code:
Analog Devices SSM2602, SSM2603 and SSM2604 I2S audio CODEC devices

SSM2602 support both I2C and SPI as the configuration interface,
the selection is made by the MODE strap-in pin.
SSM2603 and SSM2604 only support I2C as the configuration interface.

Required properties:

  - compatible : One of "adi,ssm2602", "adi,ssm2603" or "adi,ssm2604"

  - reg : the I2C address of the device for I2C, the chip select
          number for SPI.

 Example:

	ssm2602: ssm2602@1a {
		compatible = "adi,ssm2602";
		reg = <0x1a>;
	};


code:
AK4104 S/PDIF transmitter

This device supports SPI mode only.

Required properties:

  - compatible : "asahi-kasei,ak4104"

  - reg : The chip select number on the SPI bus

  - vdd-supply : A regulator node, providing 2.7V - 3.6V

Optional properties:

  - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
		  deasserted before communication to the device starts.

Example:

spdif: ak4104@0 {
	compatible = "asahi-kasei,ak4104";
	reg = <0>;
	spi-max-frequency = <5000000>;
	vdd-supply = <&vdd_3v3_reg>;
};


code:
AK4118 S/PDIF transceiver

This device supports I2C mode.

Required properties:

- compatible : "asahi-kasei,ak4118"
- reg : The I2C address of the device for I2C
- reset-gpios: A GPIO specifier for the reset pin
- irq-gpios: A GPIO specifier for the IRQ pin

Example:

&i2c {
	ak4118: ak4118@13 {
		#sound-dai-cells = <0>;
		compatible = "asahi-kasei,ak4118";
		reg = <0x13>;
		reset-gpios = <&gpio 0 GPIO_ACTIVE_LOW>
		irq-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
	};
};


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/ak4375.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: AK4375 DAC and headphones amplifier

maintainers:
  - Vincent Knecht <vincent.knecht@mailoo.org>

allOf:
  - $ref: dai-common.yaml#

properties:
  compatible:
    const: asahi-kasei,ak4375

  reg:
    maxItems: 1

  '#sound-dai-cells':
    const: 0

  avdd-supply:
    description: regulator phandle for the AVDD power supply.

  tvdd-supply:
    description: regulator phandle for the TVDD power supply.

  pdn-gpios:
    description: optional GPIO to set the PDN pin.

required:
  - compatible
  - reg
  - '#sound-dai-cells'
  - avdd-supply
  - tvdd-supply

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    i2c {
      #address-cells = <1>;
      #size-cells = <0>;

      headphones: audio-codec@10 {
        compatible = "asahi-kasei,ak4375";
        reg = <0x10>;
        avdd-supply = <&reg_headphones_avdd>;
        tvdd-supply = <&pm8916_l6>;
        pdn-gpios = <&msmgpio 114 GPIO_ACTIVE_HIGH>;
        pinctrl-names = "default";
        pinctrl-0 = <&headphones_pdn_default>;
        #sound-dai-cells = <0>;
      };
    };


code:
AK4458 audio DAC

This device supports I2C mode.

Required properties:

- compatible : "asahi-kasei,ak4458" or "asahi-kasei,ak4497"
- reg : The I2C address of the device for I2C

Optional properties:
- reset-gpios: A GPIO specifier for the power down & reset pin
- mute-gpios: A GPIO specifier for the soft mute pin
- AVDD-supply: Analog power supply
- DVDD-supply: Digital power supply
- dsd-path: Select DSD input pins for ak4497
            0: select #16, #17, #19 pins
            1: select #3, #4, #5 pins

Example:

&i2c {
	ak4458: dac@10 {
		compatible = "asahi-kasei,ak4458";
		reg = <0x10>;
		reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>
		mute-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>
	};
};


code:
AK4554 ADC/DAC

Required properties:

  - compatible : "asahi-kasei,ak4554"

Example:

ak4554-adc-dac {
	compatible = "asahi-kasei,ak4554";
};


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/ak4613.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: AK4613 I2C transmitter

maintainers:
  - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

allOf:
  - $ref: dai-common.yaml#

properties:
  compatible:
    const: asahi-kasei,ak4613

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  "#sound-dai-cells":
    const: 0

patternProperties:
  "^asahi-kasei,in[1-2]-single-end$":
    description: Input Pin 1 - 2.
    $ref: /schemas/types.yaml#/definitions/flag

  "^asahi-kasei,out[1-6]-single-end$":
    description: Output Pin 1 - 6.
    $ref: /schemas/types.yaml#/definitions/flag

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;
        ak4613: codec@10 {
            compatible = "asahi-kasei,ak4613";
            reg = <0x10>;
        };
    };


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/ak4642.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: AK4642 I2C transmitter

maintainers:
  - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

allOf:
  - $ref: dai-common.yaml#

properties:
  compatible:
    enum:
      - asahi-kasei,ak4642
      - asahi-kasei,ak4643
      - asahi-kasei,ak4648

  reg:
    maxItems: 1

  "#clock-cells":
    const: 0
  "#sound-dai-cells":
    const: 0

  clocks:
    maxItems: 1

  clock-frequency:
    description: common clock binding; frequency of MCKO

  clock-output-names:
    description: common clock name

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;
        ak4643: codec@12 {
            compatible = "asahi-kasei,ak4643";
            #sound-dai-cells = <0>;
            reg = <0x12>;
            #clock-cells = <0>;
            clocks = <&audio_clock>;
            clock-frequency = <12288000>;
            clock-output-names = "ak4643_mcko";
        };
    };


code:
AK5386 Single-ended 24-Bit 192kHz delta-sigma ADC

This device has no control interface.

Required properties:

  - compatible : "asahi-kasei,ak5386"

Optional properties:

  - reset-gpio : a GPIO spec for the reset/power down pin.
		 If specified, it will be deasserted at probe time.
  - va-supply : a regulator spec, providing 5.0V
  - vd-supply : a regulator spec, providing 3.3V

Example:

spdif: ak5386@0 {
	compatible = "asahi-kasei,ak5386";
	reset-gpio = <&gpio0 23>;
	va-supply = <&vdd_5v0_reg>;
	vd-supply = <&vdd_3v3_reg>;
};


code:
AK5558 8 channel differential 32-bit delta-sigma ADC

This device supports I2C mode only.

Required properties:

- compatible : "asahi-kasei,ak5558" or "asahi-kasei,ak5552".
- reg : The I2C address of the device.

Optional properties:

- reset-gpios: A GPIO specifier for the power down & reset pin.
- AVDD-supply: Analog power supply
- DVDD-supply: Digital power supply

Example:

&i2c {
	ak5558: adc@10 {
		compatible = "asahi-kasei,ak5558";
		reg = <0x10>;
		reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
	};
};


code:
ALC5621/ALC5622/ALC5623 audio Codec

Required properties:

 - compatible:	"realtek,alc5623"
 - reg:		the I2C address of the device.

Optional properties:

 - add-ctrl:	  Default register value for Reg-40h, Additional Control
		  Register. If absent or has the value of 0, the
		  register is untouched.

 - jack-det-ctrl: Default register value for Reg-5Ah, Jack Detect
		  Control Register. If absent or has value 0, the
		  register is untouched.

Example:

	alc5621: alc5621@1a {
		compatible = "alc5621";
		reg = <0x1a>;
		add-ctrl = <0x3700>;
		jack-det-ctrl = <0x4810>;
	};


code:
ALC5632 audio CODEC

This device supports I2C only.

Required properties:

  - compatible : "realtek,alc5632"

  - reg : the I2C address of the device.

  - gpio-controller : Indicates this device is a GPIO controller.

  - #gpio-cells : Should be two. The first cell is the pin number and the
    second cell is used to specify optional parameters (currently unused).

Pins on the device (for linking into audio routes):

  * SPK_OUTP
  * SPK_OUTN
  * HP_OUT_L
  * HP_OUT_R
  * AUX_OUT_P
  * AUX_OUT_N
  * LINE_IN_L
  * LINE_IN_R
  * PHONE_P
  * PHONE_N
  * MIC1_P
  * MIC1_N
  * MIC2_P
  * MIC2_N
  * MICBIAS1
  * DMICDAT

Example:

alc5632: alc5632@1e {
	compatible = "realtek,alc5632";
	reg = <0x1a>;

	gpio-controller;
	#gpio-cells = <2>;
};