code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
 */
/dts-v1/;

#include "am33xx.dtsi"

/ {
	model = "Newflow AM335x NanoBone";
	compatible = "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&dcdc2_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	leds {
		compatible = "gpio-leds";

		led0 {
			label = "nanobone:green:usr1";
			gpios = <&gpio1 5 0>;
			default-state = "off";
		};
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&misc_pins>;

	misc_pins: misc_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE7)	/* spi0_cs0.gpio0_5 */
		>;
	};

	gpmc_pins: gpmc_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE0)

			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT, MUX_MODE0)

			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)

			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE1)		/* lcd_data1.gpmc_a1 */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE1)		/* lcd_data2.gpmc_a2 */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE1)		/* lcd_data3.gpmc_a3 */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE1)		/* lcd_data4.gpmc_a4 */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE1)		/* lcd_data5.gpmc_a5 */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE1)		/* lcd_data6.gpmc_a6 */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE1)		/* lcd_data7.gpmc_a7 */

			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE1)		/* lcd_vsync.gpmc_a8 */
			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE1)		/* lcd_hsync.gpmc_a9 */
			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE1)		/* lcd_pclk.gpmc_a10 */
		>;
	};

	i2c0_pins: i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	uart0_pins: uart0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT, MUX_MODE0)
		>;
	};

	uart1_pins: uart1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT, MUX_MODE0)
		>;
	};

	uart2_pins: uart2_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_INPUT_PULLUP, MUX_MODE7)	/* lcd_data8.gpio2[14] */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE7)		/* lcd_data9.gpio2[15] */
			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1)		/* spi0_sclk.uart2_rxd */
			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)		/* spi0_d0.uart2_txd */
		>;
	};

	uart3_pins: uart3_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_INPUT_PULLUP, MUX_MODE6)	/* lcd_data10.uart3_ctsn */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE6)		/* lcd_data11.uart3_rtsn */
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE1)		/* spi0_cs1.uart3_rxd */
			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT, MUX_MODE1)		/* ecap0_in_pwm0_out.uart3_txd */
		>;
	};

	uart4_pins: uart4_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT_PULLUP, MUX_MODE6)	/* lcd_data12.uart4_ctsn */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE6)		/* lcd_data13.uart4_rtsn */
			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE1)		/* uart0_ctsn.uart4_rxd */
			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE1)		/* uart0_rtsn.uart4_txd */
		>;
	};

	uart5_pins: uart5_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_INPUT, MUX_MODE4)		/* lcd_data14.uart5_rxd */
			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT, MUX_MODE3)		/* rmiii1_refclk.uart5_txd */
		>;
	};

	mmc1_pins: mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)	/* mmc0_clk.mmc0_clk */
			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLUP, MUX_MODE7)	/* emu1.gpio3[8] */
			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7)	/* mcasp0_aclkr.gpio3[18] */
		>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
	status = "okay";
	rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rx-during-tx;
	rs485-rts-delay = <1 1>;
	linux,rs485-enabled-at-boot-time;
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
	status = "okay";
	rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <1 1>;
	linux,rs485-enabled-at-boot-time;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart5_pins>;
	status = "okay";
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	gpio@20 {
		compatible = "microchip,mcp23017";
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x20>;
	};

	tps: tps@24 {
		reg = <0x24>;
	};

	eeprom@53 {
		compatible = "microchip,24c02", "atmel,24c02";
		reg = <0x53>;
		pagesize = <8>;
	};

	rtc@68 {
		compatible = "dallas,ds1307";
		reg = <0x68>;
	};
};

&elm {
	status = "okay";
};

&gpmc {
	compatible = "ti,am3352-gpmc";
	status = "okay";
	gpmc,num-waitpins = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&gpmc_pins>;

	#address-cells = <2>;
	#size-cells = <1>;
	ranges = <0 0 0x08000000 0x08000000>,	/* CS0: NOR 128M */
		 <1 0 0x1c000000 0x01000000>;	/* CS1: FRAM 16M */

	nor@0,0 {
		reg = <0 0x00000000 0x08000000>;
		compatible = "cfi-flash";
		linux,mtd-name = "spansion,s29gl010p11t";
		bank-width = <2>;

		gpmc,mux-add-data = <2>;

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <160>;
		gpmc,cs-wr-off-ns = <160>;
		gpmc,adv-on-ns = <10>;
		gpmc,adv-rd-off-ns = <30>;
		gpmc,adv-wr-off-ns = <30>;
		gpmc,oe-on-ns = <40>;
		gpmc,oe-off-ns = <160>;
		gpmc,we-on-ns = <40>;
		gpmc,we-off-ns = <160>;
		gpmc,rd-cycle-ns = <160>;
		gpmc,wr-cycle-ns = <160>;
		gpmc,access-ns = <150>;
		gpmc,page-burst-access-ns = <10>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-delay-ns = <20>;
		gpmc,wr-data-mux-bus-ns = <70>;
		gpmc,wr-access-ns = <80>;

		#address-cells = <1>;
		#size-cells = <1>;

		/*
		MTD partition table
		===================
		+------------+-->0x00000000-> U-Boot start
		|            |
		|            |-->0x000BFFFF-> U-Boot end
		|            |-->0x000C0000-> ENV1 start
		|            |
		|            |-->0x000DFFFF-> ENV1 end
		|            |-->0x000E0000-> ENV2 start
		|            |
		|            |-->0x000FFFFF-> ENV2 end
		|            |-->0x00100000-> Kernel start
		|            |
		|            |-->0x004FFFFF-> Kernel end
		|            |-->0x00500000-> File system start
		|            |
		|            |-->0x01FFFFFF-> File system end
		|            |-->0x02000000-> User data start
		|            |
		|            |-->0x03FFFFFF-> User data end
		|            |-->0x04000000-> Data storage start
		|            |
		+------------+-->0x08000000-> NOR end (Free end)
		*/
		partition@0 {
			label = "boot";
			reg = <0x00000000 0x000c0000>; /* 768KB */
		};

		partition@1 {
			label = "env1";
			reg = <0x000c0000 0x00020000>; /* 128KB */
		};

		partition@2 {
			label = "env2";
			reg = <0x000e0000 0x00020000>; /* 128KB */
		};

		partition@3 {
			label = "kernel";
			reg = <0x00100000 0x00400000>; /* 4MB */
		};

		partition@4 {
			label = "rootfs";
			reg = <0x00500000 0x01b00000>; /* 27MB */
		};

		partition@5 {
			label = "user";
			reg = <0x02000000 0x02000000>; /* 32MB */
		};

		partition@6 {
			label = "data";
			reg = <0x04000000 0x04000000>; /* 64MB */
		};
	};

	fram@1,0 {
		reg = <1 0x00000000 0x01000000>;
		bank-width = <2>;

		gpmc,mux-add-data = <2>;

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <160>;
		gpmc,cs-wr-off-ns = <160>;
		gpmc,adv-on-ns = <10>;
		gpmc,adv-rd-off-ns = <20>;
		gpmc,adv-wr-off-ns = <20>;
		gpmc,oe-on-ns = <30>;
		gpmc,oe-off-ns = <150>;
		gpmc,we-on-ns = <30>;
		gpmc,we-off-ns = <150>;
		gpmc,rd-cycle-ns = <160>;
		gpmc,wr-cycle-ns = <160>;
		gpmc,access-ns = <130>;
		gpmc,page-burst-access-ns = <10>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-diffcsen;
		gpmc,cycle2cycle-delay-ns = <10>;
		gpmc,wr-data-mux-bus-ns = <30>;
		gpmc,wr-access-ns = <0>;
	};
};

&mac_sw {
	status = "okay";
};

&davinci_mdio_sw {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};

	ethphy1: ethernet-phy@1 {
		reg = <1>;
	};
};

&cpsw_port1 {
	phy-handle = <&ethphy0>;
	phy-mode = "mii";
	ti,dual-emac-pvid = <1>;
};

&cpsw_port2 {
	phy-handle = <&ethphy1>;
	phy-mode = "mii";
	ti,dual-emac-pvid = <2>;
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&ldo4_reg>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	bus-width = <4>;
	cd-gpios = <&gpio3 8 0>;
	wp-gpios = <&gpio3 18 0>;
};

#include "tps65217.dtsi"

&tps {
	regulators {
		dcdc1_reg: regulator@0 {
			/* +1.5V voltage with ±4% tolerance */
			regulator-min-microvolt = <1450000>;
			regulator-max-microvolt = <1550000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc2_reg: regulator@1 {
			/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <915000>;
			regulator-max-microvolt = <1140000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3_reg: regulator@2 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <915000>;
			regulator-max-microvolt = <1140000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo1_reg: regulator@3 {
			/* +1.8V voltage with ±4% tolerance */
			regulator-min-microvolt = <1750000>;
			regulator-max-microvolt = <1870000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo2_reg: regulator@4 {
			/* +3.3V voltage with ±4% tolerance */
			regulator-min-microvolt = <3175000>;
			regulator-max-microvolt = <3430000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo3_reg: regulator@5 {
			/* +1.8V voltage with ±4% tolerance */
			regulator-min-microvolt = <1750000>;
			regulator-max-microvolt = <1870000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo4_reg: regulator@6 {
			/* +3.3V voltage with ±4% tolerance */
			regulator-min-microvolt = <3175000>;
			regulator-max-microvolt = <3430000>;
			regulator-boot-on;
			regulator-always-on;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 */

/*
 * VScom OnRISC
 * http://www.vscom.de
 */

/dts-v1/;

#include "am335x-baltos.dtsi"
#include "am335x-baltos-leds.dtsi"

/ {
	model = "NetCAN";

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&user_leds_s0>;

		compatible = "gpio-leds";

		led@1 {
			label = "can_data";
			linux,default-trigger = "netdev";
			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
		led@2 {
			label = "can_error";
			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};
};

&am33xx_pinmux {
	user_leds_s0: user_leds_s0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* CAN Data LED */
			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* CAN Error LED */
		>;
	};

	dcan1_pins: pinmux_dcan1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2)	/* CAN TX */
			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2)	/* CAN RX */
		>;
	};
};

&usb0_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
	dr_mode = "host";
};

&davinci_mdio_sw {
	phy0: ethernet-phy@0 {
		reg = <1>;
	};
};

&cpsw_port1 {
	phy-mode = "rmii";
	ti,dual-emac-pvid = <1>;
	phy-handle = <&phy0>;
};

&cpsw_port2 {
	phy-mode = "rgmii-id";
	ti,dual-emac-pvid = <2>;
	phy-handle = <&phy1>;
};

&dcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&dcan1_pins>;

	status = "okay";
};

&gpio0 {
	gpio-line-names =
		"MDIO",
		"MDC",
		"NC",
		"NC",
		"I2C1_SDA",
		"I2C1_SCL",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"can_data",
		"can_error",
		"onrisc:blue:wlan",
		"onrisc:green:app",
		"USB0_DRVVBUS",
		"ETH2_INT",
		"NC",
		"NC",
		"MMC1_DAT0",
		"MMC1_DAT1",
		"NC",
		"NC",
		"MMC1_DAT2",
		"MMC1_DAT3",
		"NC",
		"NC",
		"GPMC_WAIT0",
		"GPMC_WP_N";
};

&gpio1 {
	gpio-line-names =
		"GPMC_AD0",
		"GPMC_AD1",
		"GPMC_AD2",
		"GPMC_AD3",
		"GPMC_AD4",
		"GPMC_AD5",
		"GPMC_AD6",
		"GPMC_AD7",
		"DCAN1_TX",
		"DCAN1_RX",
		"CONSOLE_RX",
		"CONSOLE_TX",
		"NC",
		"NC",
		"NC",
		"NC",
		"RGMII2_TCTL",
		"RGMII2_RCTL",
		"RGMII2_TD3",
		"RGMII2_TD2",
		"RGMII2_TD1",
		"RGMII2_TD0",
		"RGMII2_TCLK",
		"RGMII2_RCLK",
		"RGMII2_RD3",
		"RGMII2_RD2",
		"RGMII2_RD1",
		"RGMII2_RD0",
		"PMIC_INT1",
		"GPMC_CSN0_Flash",
		"MMC1_CLK",
		"MMC1_CMD";
};

&gpio2 {
	gpio-line-names =
		"GPMC_CSN3_BUS",
		"GPMC_CLK",
		"GPMC_ADVN_ALE",
		"GPMC_OEN_RE_N",
		"GPMC_WE_N",
		"GPMC_BEN0_CLE",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"SW2_0",
		"SW2_1",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"MMC0_DAT3",
		"MMC0_DAT2",
		"MMC0_DAT1",
		"MMC0_DAT0",
		"MMC0_CLK",
		"MMC0_CMD";
};

&gpio3 {
	gpio-line-names =
		"onrisc:red:power",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"WLAN_IRQ",
		"WLAN_EN",
		"SW2_2",
		"SW2_3",
		"NC",
		"NC",
		"NC",
		"ModeA0",
		"ModeA1",
		"ModeA2",
		"ModeA3",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC";
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 */

/*
 * VScom OnRISC
 * http://www.vscom.de
 */

/dts-v1/;

#include "am335x-baltos.dtsi"
#include "am335x-baltos-leds.dtsi"

/ {
	model = "NetCom Plus";
};

&am33xx_pinmux {
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)			/* RX */
			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)			/* TX */
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)		/* CTS */
			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)		/* RTS */
			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7)		/* DTR */
			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)		/* DSR */
			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)		/* DCD */
			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* RI */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1)		/* RX */
			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)      		/* TX */
			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2)	/* CTS */
			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* RTS */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* DTR */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* DSR */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* DCD */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* RI */
		>;
	};
};

&usb0_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
	dr_mode = "host";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
	dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
	dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
	dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
	rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;

	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
	dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
	dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
	dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
	rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;

	status = "okay";
};

&davinci_mdio_sw {
	phy0: ethernet-phy@0 {
		reg = <1>;
	};
};

&cpsw_port1 {
	phy-mode = "rmii";
	ti,dual-emac-pvid = <1>;
	phy-handle = <&phy0>;
};

&cpsw_port2 {
	phy-mode = "rgmii-id";
	ti,dual-emac-pvid = <2>;
	phy-handle = <&phy1>;
};

&gpio0 {
	gpio-line-names =
		"MDIO",
		"MDC",
		"UART2_RX",
		"UART2_TX",
		"I2C1_SDA",
		"I2C1_SCL",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"UART1_CTSN",
		"UART1_RTSN",
		"UART1_RX",
		"UART1_TX",
		"onrisc:blue:wlan",
		"onrisc:green:app",
		"USB0_DRVVBUS",
		"ETH2_INT",
		"NC",
		"NC",
		"MMC1_DAT0",
		"MMC1_DAT1",
		"NC",
		"NC",
		"MMC1_DAT2",
		"MMC1_DAT3",
		"NC",
		"NC",
		"GPMC_WAIT0",
		"GPMC_WP_N";
};

&gpio1 {
	gpio-line-names =
		"GPMC_AD0",
		"GPMC_AD1",
		"GPMC_AD2",
		"GPMC_AD3",
		"GPMC_AD4",
		"GPMC_AD5",
		"GPMC_AD6",
		"GPMC_AD7",
		"NC",
		"NC",
		"CONSOLE_RX",
		"CONSOLE_TX",
		"UART2_DTR",
		"UART2_DSR",
		"UART2_DCD",
		"UART2_RI",
		"RGMII2_TCTL",
		"RGMII2_RCTL",
		"RGMII2_TD3",
		"RGMII2_TD2",
		"RGMII2_TD1",
		"RGMII2_TD0",
		"RGMII2_TCLK",
		"RGMII2_RCLK",
		"RGMII2_RD3",
		"RGMII2_RD2",
		"RGMII2_RD1",
		"RGMII2_RD0",
		"PMIC_INT1",
		"GPMC_CSN0_Flash",
		"MMC1_CLK",
		"MMC1_CMD";
};

&gpio2 {
	gpio-line-names =
		"GPMC_CSN3_BUS",
		"GPMC_CLK",
		"GPMC_ADVN_ALE",
		"GPMC_OEN_RE_N",
		"GPMC_WE_N",
		"GPMC_BEN0_CLE",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"SW2_0",
		"SW2_1",
		"NC",
		"NC",
		"UART1_DTR",
		"UART1_DSR",
		"UART1_DCD",
		"UART1_RI",
		"MMC0_DAT3",
		"MMC0_DAT2",
		"MMC0_DAT1",
		"MMC0_DAT0",
		"MMC0_CLK",
		"MMC0_CMD";
};

&gpio3 {
	gpio-line-names =
		"onrisc:red:power",
		"NC",
		"NC",
		"NC",
		"NC",
		"UART2_CTSN",
		"UART2_RTSN",
		"WLAN_IRQ",
		"WLAN_EN",
		"SW2_2",
		"SW2_3",
		"NC",
		"NC",
		"NC",
		"ModeA0",
		"ModeA1",
		"ModeA2",
		"ModeA3",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 */

/*
 * VScom OnRISC
 * http://www.vscom.de
 */

/dts-v1/;

#include "am335x-baltos.dtsi"

/ {
	model = "NetCom Plus";
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&dip_switches>;

	dip_switches: pinmux_dip_switches {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)
		>;
	};

	tca6416_pins: pinmux_tca6416_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
	};

	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
		>;
	};
};

&usb0_phy {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
	dr_mode = "host";
};

&usb1 {
	status = "okay";
	dr_mode = "host";
};

&i2c1 {
	tca6416a: gpio@20 {
		compatible = "ti,tca6416";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gpio0>;
		interrupts = <20 IRQ_TYPE_EDGE_RISING>;
		pinctrl-names = "default";
		pinctrl-0 = <&tca6416_pins>;
		gpio-line-names = "GP_IN0", "GP_IN1", "GP_IN2", "GP_IN3",
				  "GP_IN4", "GP_IN5", "GP_IN6", "GP_IN7",
				  "GP_OUT0", "GP_OUT1", "GP_OUT2", "GP_OUT3",
				  "GP_OUT4", "GP_OUT5", "GP_OUT6", "GP_OUT7";
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tca6416b: gpio@20 {
		compatible = "ti,tca6416";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names = "CH1_M0", "CH1_M1", "CH1_M2", "CH1_M3",
				  "CH2_M0", "CH2_M1", "CH2_M2", "CH2_M3",
				  "CH3_M0", "CH3_M1", "CH3_M2", "CH3_M3",
				  "CH4_M0", "CH4_M1", "CH4_M2", "CH4_M3";
	};

	tca6416c: gpio@21 {
		compatible = "ti,tca6416";
		reg = <0x21>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names = "CH5_M0", "CH5_M1", "CH5_M2", "CH5_M3",
				  "CH6_M0", "CH6_M1", "CH6_M2", "CH6_M3",
				  "CH7_M0", "CH7_M1", "CH7_M2", "CH7_M3",
				  "CH8_M0", "CH8_M1", "CH8_M2", "CH8_M3";
	};
};

&davinci_mdio_sw {
	phy0: ethernet-phy@0 {
		reg = <1>;
	};
};

&cpsw_port1 {
	phy-mode = "rmii";
	ti,dual-emac-pvid = <1>;
	phy-handle = <&phy0>;
};

&cpsw_port2 {
	phy-mode = "rgmii-id";
	ti,dual-emac-pvid = <2>;
	phy-handle = <&phy1>;
};

&gpio0 {
	gpio-line-names =
		"MDIO",
		"MDC",
		"NC",
		"NC",
		"I2C1_SDA",
		"I2C1_SCL",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"I2C2_SDA",
		"I2C2_SCL",
		"NC",
		"NC",
		"onrisc:blue:wlan",
		"onrisc:green:app",
		"USB0_DRVVBUS",
		"ETH2_INT",
		"NC",
		"NC",
		"MMC1_DAT0",
		"MMC1_DAT1",
		"NC",
		"NC",
		"MMC1_DAT2",
		"MMC1_DAT3",
		"NC",
		"NC",
		"GPMC_WAIT0",
		"GPMC_WP_N";
};

&gpio1 {
	gpio-line-names =
		"GPMC_AD0",
		"GPMC_AD1",
		"GPMC_AD2",
		"GPMC_AD3",
		"GPMC_AD4",
		"GPMC_AD5",
		"GPMC_AD6",
		"GPMC_AD7",
		"NC",
		"NC",
		"CONSOLE_RX",
		"CONSOLE_TX",
		"SW2_0_alt",
		"SW2_1_alt",
		"SW2_2_alt",
		"SW2_3_alt",
		"RGMII2_TCTL",
		"RGMII2_RCTL",
		"RGMII2_TD3",
		"RGMII2_TD2",
		"RGMII2_TD1",
		"RGMII2_TD0",
		"RGMII2_TCLK",
		"RGMII2_RCLK",
		"RGMII2_RD3",
		"RGMII2_RD2",
		"RGMII2_RD1",
		"RGMII2_RD0",
		"PMIC_INT1",
		"GPMC_CSN0_Flash",
		"MMC1_CLK",
		"MMC1_CMD";
};

&gpio2 {
	gpio-line-names =
		"GPMC_CSN3_BUS",
		"GPMC_CLK",
		"GPMC_ADVN_ALE",
		"GPMC_OEN_RE_N",
		"GPMC_WE_N",
		"GPMC_BEN0_CLE",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"SW2_0",
		"SW2_1",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"MMC0_DAT3",
		"MMC0_DAT2",
		"MMC0_DAT1",
		"MMC0_DAT0",
		"MMC0_CLK",
		"MMC0_CMD";
};

&gpio3 {
	gpio-line-names =
		"onrisc:red:power",
		"NC",
		"NC",
		"NC",
		"3G_PWR_EN",
		"NC",
		"NC",
		"WLAN_IRQ",
		"WLAN_EN",
		"SW2_2",
		"SW2_3",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC";
};


code:
//SPDX-License-Identifier: GPL-2.0
/* Copyright (C) 2018 Octavo Systems LLC - https://www.octavosystems.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/dts-v1/;

#include "am33xx.dtsi"
#include "am335x-osd335x-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/display/tda998x.h>

/ {
	model = "Octavo Systems OSD3358-SM-RED";
	compatible = "oct,osd3358-sm-refdesign", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
};

&ldo3_reg {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};

&mmc2 {
	vmmc-supply = <&vmmcsd_fixed>;
	pinctrl-names = "default";
	pinctrl-0 = <&emmc_pins>;
	bus-width = <8>;
	status = "okay";
};

&lcdc {
	status = "okay";

	/* If you want to get 24 bit RGB and 16 BGR mode instead of
	 * current 16 bit RGB and 24 BGR modes, set the propety
	 * below to "crossed" and uncomment the video-ports -property
	 * in tda19988 node.
	 * AM335x errata for wiring:
	 * https://www.ti.com/lit/er/sprz360i/sprz360i.pdf
	 */

	blue-and-red-wiring = "straight";

	port {
		lcdc_0: endpoint {
			remote-endpoint = <&hdmi_0>;
		};
	};
};

&i2c0 {
	tda19988: hdmi-encoder@70 {
		compatible = "nxp,tda998x";
		reg = <0x70>;

		pinctrl-names = "default", "off";
		pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
		pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;

		/* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
		/* video-ports = <0x234501>; */

		#sound-dai-cells = <0>;
		audio-ports = <	TDA998x_I2S	0x03>;

		port {
			hdmi_0: endpoint {
				remote-endpoint = <&lcdc_0>;
			};
		};
	};

	mpu9250: imu@68 {
		compatible = "invensense,mpu6050";
		reg = <0x68>;
		interrupt-parent = <&gpio3>;
		interrupts = <21 IRQ_TYPE_EDGE_RISING>;
		i2c-gate {
			#address-cells = <1>;
			#size-cells = <0>;
			ax8975@c {
				compatible = "asahi-kasei,ak8975";
				reg = <0x0c>;
			};
		};
		/*invensense,int_config = <0x10>;
		invensense,level_shifter = <0>;
		invensense,orientation = [01 00 00 00 01 00 00 00 01];
		invensense,sec_slave_type = <0>;
		invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/
	};

	bmp280: pressure@76 {
		compatible = "bosch,bmp280";
		reg = <0x76>;
	};
};

&mcasp0 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcasp0_pins>;
	status = "okay";
	op-mode = <0>;	/* MCASP_IIS_MODE */
	tdm-slots = <2>;
	serial-dir = <	/* 0: INACTIVE, 1: TX, 2: RX */
			0 0 1 0
		>;
	tx-num-evt = <32>;
	rx-num-evt = <32>;
};

/ {
	clk_mcasp0_fixed: clk-mcasp0-fixed {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <24576000>;
	};

	clk_mcasp0: clk-mcasp0 {
		#clock-cells = <0>;
		compatible = "gpio-gate-clock";
		clocks = <&clk_mcasp0_fixed>;
		enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "TI BeagleBone Black";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&dailink0_master>;
		simple-audio-card,frame-master = <&dailink0_master>;

		dailink0_master: simple-audio-card,cpu {
			sound-dai = <&mcasp0>;
			clocks = <&clk_mcasp0>;
		};

		simple-audio-card,codec {
			sound-dai = <&tda19988>;
		};
	};

	chosen {
		stdout-path = &uart0;
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&user_leds_s0>;

		compatible = "gpio-leds";

		led2 {
			label = "beaglebone:green:usr0";
			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led3 {
			label = "beaglebone:green:usr1";
			gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led4 {
			label = "beaglebone:green:usr2";
			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "cpu0";
			default-state = "off";
		};

		led5 {
			label = "beaglebone:green:usr3";
			gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};
	};

	vmmcsd_fixed: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&clkout2_pin>;

	nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
		>;
	};

	mcasp0_pins: mcasp0-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
			AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
		>;
	};

	flash_enable: flash-enable {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* rmii1_ref_clk.gpio0_29 */
		>;
	};

	imu_interrupt: imu-interrupt {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* mii1_rx_er.gpio3_2 */
		>;
	};

	ethernet_interrupt: ethernet-interrupt{
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* mii1_col.gpio3_0 */
		>;
	};

	user_leds_s0: user-leds-s0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* gpmc_a5.gpio1_21 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_a6.gpio1_22 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* gpmc_a7.gpio1_23 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_a8.gpio1_24 */
		>;
	};

	i2c2_pins: pinmux-i2c2-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* uart1_ctsn.i2c2_sda */
			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* uart1_rtsn.i2c2_scl */
		>;
	};

	uart0_pins: pinmux-uart0-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	clkout2_pin: pinmux-clkout2-pin {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3)	/* xdma_event_intr1.clkout2 */
		>;
	};

	cpsw_default: cpsw-default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)		/* mii1_rxdv.rgmii1_rctl */
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
		>;
	};

	cpsw_sleep: cpsw-sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci-mdio-default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
		>;
	};

	davinci_mdio_sleep: davinci-mdio-sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
		>;
	};

	mmc1_pins: pinmux-mmc1-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};

	emmc_pins: pinmux-emmc-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
		>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&usb0 {
	dr_mode = "peripheral";
	interrupts-extended = <&intc 18 &tps 0>;
	interrupt-names = "mc", "vbus";
};

&usb1 {
	dr_mode = "host";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
	status = "okay";
	clock-frequency = <100000>;
};

&cpsw_port1 {
	phy-handle = <&ethphy0>;
	phy-mode = "rgmii-txid";
	ti,dual-emac-pvid = <1>;
};

&cpsw_port2 {
	status = "disabled";
};

&mac_sw {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	status = "okay";
};

&davinci_mdio_sw {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;

	ethphy0: ethernet-phy@4 {
		reg = <4>;
	};
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <0x4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&rtc {
	system-power-controller;
	clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
	clock-names = "ext-clk", "int-clk";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 *
 * Author: Robert Nelson <robertcnelson@gmail.com>
 */

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&dcdc2_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};
};

&cpu0_opp_table {
	/*
	* Octavo Systems:
	* The EFUSE_SMA register is not programmed for any of the AM335x wafers
	* we get and we are not programming them during our production test.
	* Therefore, from a DEVICE_ID revision point of view, the silicon looks
	* like it is Revision 2.1.  However, from an EFUSE_SMA point of view for
	* the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
	* EFUSE_SMA register reads as all zeros).
	*/
	oppnitro-1000000000 {
		opp-supported-hw = <0x06 0x0100>;
	};
};

&am33xx_pinmux {
	i2c0_pins: pinmux-i2c0-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@24 {
		reg = <0x24>;
	};
};

/include/ "tps65217.dtsi"

&tps {
	interrupts = <7>; /* NMI */
	interrupt-parent = <&intc>;

	ti,pmic-shutdown-controller;

	pwrbutton {
		interrupts = <2>;
		status = "okay";
	};

	regulators {
		dcdc1_reg: regulator@0 {
			regulator-name = "vdds_dpr";
			regulator-always-on;
		};

		dcdc2_reg: regulator@1 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <925000>;
			regulator-max-microvolt = <1351500>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3_reg: regulator@2 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <925000>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo1_reg: regulator@3 {
			regulator-name = "vio,vrtc,vdds";
			regulator-always-on;
		};

		ldo2_reg: regulator@4 {
			regulator-name = "vdd_3v3aux";
			regulator-always-on;
		};

		ldo3_reg: regulator@5 {
			regulator-name = "vdd_1v8";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-always-on;
		};

		ldo4_reg: regulator@6 {
			regulator-name = "vdd_3v3a";
			regulator-always-on;
		};
	};
};

&aes {
	status = "okay";
};

&sham {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014-2017 Phytec Messtechnik GmbH
 * Author: Wadim Egorov <w.egorov@phytec.de>
 *	   Teresa Remmet <t.remmet@phytec.de>
 */

#include <dt-bindings/input/input.h>

/ {
	model = "Phytec AM335x PCM-953";
	compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx";

	/* Power */
	vcc3v3: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
	};

	vcc1v8: fixedregulator2 {
		compatible = "regulator-fixed";
		regulator-name = "vcc1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
	};

	/* User IO */
	user_leds: user_leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&user_leds_pins>;

		user-led0 {
			gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "gpio";
			default-state = "on";
		};

		user-led1 {
			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "gpio";
			default-state = "on";
		};
	};

	user_buttons: user_buttons {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&user_buttons_pins>;

		button-0 {
			label = "home";
			linux,code = <KEY_HOME>;
			gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
			wakeup-source;
		};

		button-1 {
			label = "menu";
			linux,code = <KEY_MENU>;
			gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
			wakeup-source;
		};

	};
};

&am33xx_pinmux {
	user_buttons_pins: pinmux_user_buttons {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* emu0.gpio3_7 */
			AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* emu1.gpio3_8 */
		>;
	};

	user_leds_pins: pinmux_user_leds {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* gpmc_csn1.gpio1_30 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* gpmc_csn2.gpio1_31 */
		>;
	};
};

/* CAN */
&am33xx_pinmux {
	dcan1_pins: pinmux_dcan1 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT_PULLUP, MUX_MODE2)	/* uart1_rxd.dcan1_tx_mux2 */
			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLUP, MUX_MODE2)	/* uart1_txd.dcan1_rx_mux2 */
		>;
	};
};

&dcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&dcan1_pins>;
	status = "okay";
};

/* Ethernet */
&am33xx_pinmux {
	ethernet1_pins: pinmux_ethernet1 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
		>;
	};
};

&cpsw_port2 {
	phy-handle = <&phy1>;
	phy-mode = "rgmii-id";
	ti,dual-emac-pvid = <2>;
	status = "okay";
};

&davinci_mdio_sw {
	phy1: ethernet-phy@2 {
		reg = <2>;
	};
};

&mac_sw {
	pinctrl-names = "default";
	pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
};

/* Misc */
&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&cb_gpio_pins>;

	cb_gpio_pins: pinmux_cb_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* uart0_ctsn.gpio1_8 */
			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* uart0_rtsn.gpio1_9 */
		>;
	};
};

/* MMC */
&am33xx_pinmux {
	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7)	/* spi0_cs1.mmc0_sdcd */
		>;
	};
};

&mmc1 {
	vmmc-supply = <&vcc3v3>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
	status = "okay";
};

/* UARTs */
&am33xx_pinmux {
	uart0_pins: pinmux_uart0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	uart1_pins: pinmux_uart1 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	uart2_pins: pinmux_uart2 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1)	/* mii1_tx_clk.uart2_rxd */
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* mii1_rx_clk.uart2_txd */
		>;
	};

	uart3_pins: pinmux_uart3 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1)	/* mii1_rxd3.uart3_rxd */
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* mii1_rxd2.uart3_txd */
		>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	status = "okay";
};

/* USB */
&usb1 {
	dr_mode = "host";
};


code:
/*
 * pdu001.dts
 *
 * EETS GmbH PDU001 board device tree file
 *
 * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
 *
 * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
 *
 * SPDX-License-Identifier:  GPL-2.0+
 */

/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/leds-pca9532.h>

/ {
	model = "EETS,PDU001";
	compatible = "ti,am33xx";

	chosen {
		stdout-path = &uart3;
	};

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	vbat: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <3600000>;
		regulator-max-microvolt = <3600000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator@1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};

	panel {
		compatible = "ti,tilcdc,panel";
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = <&lcd_pins_s0>;
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <16>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};

		display-timings {
			240x320p16 {
				clock-frequency = <6500000>;
				hactive = <240>;
				vactive = <320>;
				hfront-porch = <6>;
				hback-porch = <6>;
				hsync-len = <1>;
				vback-porch = <6>;
				vfront-porch = <6>;
				vsync-len = <1>;
				hsync-active = <0>;
				vsync-active = <0>;
				pixelclk-active = <1>;
				de-active = <0>;
			};
		};
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&clkout2_pin>;

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE2)	/* spi0_d1.i2c1_sda */
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE2)	/* spi0_cs0.i2c1_scl */
		>;
	};

	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE2)	/* spi0_clk.i2c2_sda */
			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE2)	/* spi0_d0.i2c2_scl */
		>;
	};

	spi1_pins: pinmux_spi1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT, MUX_MODE3)		/* mcasp0_aclkx.spi1_sclk */
			AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT, MUX_MODE3)		/* mcasp0_fsx.spi1_d0 */
			AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE3)	/* mcasp0_axr0.spi1_d1 */
			AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT, MUX_MODE3)		/* mcasp0_ahclkr.spi1_cs0 */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE1)	/* spi0_cs1.uart3_rxd */
			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* ecap0_in_pwm0_out.uart3_txd */
		>;
	};

	clkout2_pin: pinmux_clkout2_pin {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3)	/* xdma_event_intr1.clkout2 */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Port 1 (emac0) */
			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT, MUX_MODE0)

			/* Port 2 (emac1) */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE1)		/* mii2_txen.gpmc_a0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT, MUX_MODE1)		/* mii2_rxdv.gpmc_a1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE1)		/* mii2_txd3.gpmc_a2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE1)		/* mii2_txd2.gpmc_a3 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE1)		/* mii2_txd1.gpmc_a4 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE1)		/* mii2_txd0.gpmc_a5 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT, MUX_MODE1)		/* mii2_txclk.gpmc_a6 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT, MUX_MODE1)		/* mii2_rxclk.gpmc_a7 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT, MUX_MODE1)		/* mii2_rxd3.gpmc_a8 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE1)		/* mii2_rxd2.gpmc_a9 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE1)		/* mii2_rxd1.gpmc_a10 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT, MUX_MODE1)		/* mii2_rxd0.gpmc_a11 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT, MUX_MODE1)		/* mii2_crs.gpmc_wait0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT, MUX_MODE1)		/* mii2_rxer.gpmc_wpn */
			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT, MUX_MODE1)		/* mii2_col.gpmc_ben1 */
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		/* eMMC */
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		/* SD cardcage */
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad3.mmc1_dat3 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad2.mmc1_dat2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad1.mmc1_dat1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad0.mmc1_dat0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2)	/* gpmc_csn1.mmc1_clk */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)	/* gpmc_csn2.mmc1_cmd */
			/* card change signal for frontpanel SD cardcage */
			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_INPUT, MUX_MODE7)		/* gpmc_advn_ale.gpio2_2 */
		>;
	};

	lcd_pins_s0: lcd_pins_s0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
		>;
	};

	dcan0_pins: pinmux_dcan0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2)		/* uart1_ctsn.d_can0_tx */
			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE2)	/* uart1_rtsn.d_can0_rx */
		>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	rts-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <0 0>;
	linux,rs485-enabled-at-boot-time;

	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;

	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;

	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@2d {
		reg = <0x2d>;
	};

	m2_eeprom: m2_eeprom@50 {
		compatible = "atmel,24c256";
		reg = <0x50>;
		status = "okay";
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	status = "okay";
	clock-frequency = <100000>;

	board_24aa025e48: board_24aa025e48@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
	};

	backplane_24aa025e48: backplane_24aa025e48@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
	};

	pca9532: pca9532@60 {
		compatible = "nxp,pca9532";
		reg = <0x60>;
		psc0 = <0x97>;
		pwm0 = <0x80>;
		psc1 = <0x97>;
		pwm1 = <0x10>;

		run.red@0 {
			type = <PCA9532_TYPE_LED>;
		};
		run.green@1 {
			type = <PCA9532_TYPE_LED>;
			default-state = "on";
		};
		s2.red@2 {
			type = <PCA9532_TYPE_LED>;
		};
		s2.green@3 {
			type = <PCA9532_TYPE_LED>;
		};
		s1.yellow@4 {
			type = <PCA9532_TYPE_LED>;
		};
		s1.green@5 {
			type = <PCA9532_TYPE_LED>;
		};
	};

	pca9530: pca9530@61 {
		compatible = "nxp,pca9530";
		reg = <0x61>;

		tft-panel@0 {
			type = <PCA9532_TYPE_LED>;
			linux,default-trigger = "backlight";
			default-state = "on";
		};
	};

	mcp79400: rtc@6f {
		compatible = "microchip,mcp7940x";
		reg = <0x6f>;
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;

	status = "okay";
	clock-frequency = <100000>;
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	ti,pindir-d0-out-d1-in;
	status = "okay";

	display-controller@0 {
		compatible = "orisetech,otm3225a";
		reg = <0>;
		spi-max-frequency = <1000000>;
		// SPI mode 3
		spi-cpol;
		spi-cpha;
		status = "okay";
	};
};

/*
 * Disable soc's rtc as we have no VBAT for it. This makes the board
 * rtc (Microchip MCP79400) the default rtc device 'rtc0'.
 */
&rtc {
	status = "disabled";
};

&lcdc {
	status = "okay";
};

&elm {
	status = "okay";
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-name = "ldo_vrtc";
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-name = "buck_vdd_ddr";
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits */
			regulator-name = "buck_vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1312500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits */
			regulator-name = "buck_vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-name = "boost_res";
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-name = "ldo_vdig1";
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-name = "ldo_vdig2";
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-name = "ldo_vpll";
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-name = "ldo_vdac";
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-name = "ldo_vaux1";
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-name = "ldo_vaux2";
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-name = "ldo_vaux33";
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-name = "ldo_vmmc";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		vbb_reg: regulator@13 {
			regulator-name = "bat_vbb";
		};
	};
};

&mac_sw {
	pinctrl-names = "default";
	pinctrl-0 = <&cpsw_default>;
	status = "okay";
};

&davinci_mdio_sw {
	pinctrl-names = "default";
	pinctrl-0 = <&davinci_mdio_default>;

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};

	ethphy1: ethernet-phy@1 {
		reg = <1>;
	};
};

&cpsw_port1 {
	phy-handle = <&ethphy0>;
	phy-mode = "mii";
	ti,dual-emac-pvid = <1>;
};

&cpsw_port2 {
	phy-handle = <&ethphy1>;
	phy-mode = "mii";
	ti,dual-emac-pvid = <2>;
};

&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <200>;
		ti,coordinate-readouts = <5>;
		ti,wire-config = <0x01 0x10 0x22 0x33>;
		ti,charge-delay = <0x400>;
	};

	adc {
		ti,adc-channels = <4 5 6 7>;
	};
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	non-removable;
};

&mmc2 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&dcan0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&dcan0_pins>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 Gumstix, Inc. - https://www.gumstix.com/
 */
/dts-v1/;

#include <dt-bindings/input/input.h>
#include "am33xx.dtsi"

/ {
	model = "Gumstix Pepper";
	compatible = "gumstix,am335x-pepper", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&dcdc3_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	buttons: user_buttons {
		compatible = "gpio-keys";
	};

	leds: user_leds {
		compatible = "gpio-leds";
	};

	panel: lcd_panel {
		compatible = "ti,tilcdc,panel";
	};

	sound: sound_iface {
		compatible = "ti,da830-evm-audio";
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
	};

	v3v3c_reg: fixedregulator1 {
		compatible = "regulator-fixed";
	};

	vdd5_reg: fixedregulator2 {
		compatible = "regulator-fixed";
	};
};

/* I2C Busses */
&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	clock-frequency = <400000>;

	tps: tps@24 {
		reg = <0x24>;
	};

	eeprom: eeprom@50 {
		compatible = "atmel,24c256";
		reg = <0x50>;
	};

	audio_codec: tlv320aic3106@1b {
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		ai3x-micbias-vg = <0x2>;
	};

	accel: lis331dlh@1d {
		compatible = "st,lis3lv02d";
		reg = <0x1d>;
	};
};

&i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <400000>;
};

&am33xx_pinmux {
	i2c0_pins: pinmux_i2c0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};
	i2c1_pins: pinmux_i2c1 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLUP, MUX_MODE3)	/* mii1_crs,i2c1_sda */
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE3)	/* mii1_rxerr,i2c1_scl */
		>;
	};
};

/* Accelerometer */
&accel {
	pinctrl-names = "default";
	pinctrl-0 = <&accel_pins>;

	Vdd-supply = <&ldo3_reg>;
	Vdd_IO-supply = <&ldo3_reg>;
	st,irq1-click;
	st,wakeup-x-lo;
	st,wakeup-x-hi;
	st,wakeup-y-lo;
	st,wakeup-y-hi;
	st,wakeup-z-lo;
	st,wakeup-z-hi;
	st,min-limit-x = <92>;
	st,max-limit-x = <14>;
	st,min-limit-y = <14>;
	st,max-limit-y = <92>;
	st,min-limit-z = <92>;
	st,max-limit-z = <14>;
};

&am33xx_pinmux {
	accel_pins: pinmux_accel {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_INPUT, MUX_MODE7)   /* gpmc_wen.gpio2_4 */
		>;
	};
};

/* Audio */
&audio_codec {
	status = "okay";

	reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
	AVDD-supply = <&ldo3_reg>;
	IOVDD-supply = <&ldo3_reg>;
	DRVDD-supply = <&ldo3_reg>;
	DVDD-supply = <&dcdc1_reg>;
};

&sound {
	ti,model = "AM335x-EVM";
	ti,audio-codec = <&audio_codec>;
	ti,mcasp-controller = <&mcasp0>;
	ti,codec-clock-rate = <12000000>;
	ti,audio-routing =
		"Headphone Jack",	"HPLOUT",
		"Headphone Jack",	"HPROUT",
		"MIC3L",		"Mic3L Switch";
};

&mcasp0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&audio_pins>;

	op-mode = <0>;	/* MCASP_ISS_MODE */
	tdm-slots = <2>;
	serial-dir = <
		1 2 0 0
		0 0 0 0
		0 0 0 0
		0 0 0 0
	>;
	tx-num-evt = <1>;
	rx-num-evt = <1>;
};

&am33xx_pinmux {
	audio_pins: pinmux_audio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7)	/* gpmc_a0.gpio1_16 */
		>;
	};
};

/* Display: 24-bit LCD Screen */
&panel {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&lcd_pins>;
	panel-info {
		ac-bias = <255>;
		ac-bias-intrpt = <0>;
		dma-burst-sz = <16>;
		bpp = <32>;
		fdd = <0x80>;
		sync-edge = <0>;
		sync-ctrl = <1>;
		raster-order = <0>;
		fifo-th = <0>;
	};
	display-timings {
		native-mode = <&timing0>;
		timing0: 480x272 {
			clock-frequency = <18400000>;
			hactive = <480>;
			vactive = <272>;
			hfront-porch = <8>;
			hback-porch = <4>;
			hsync-len = <41>;
			vfront-porch = <4>;
			vback-porch = <2>;
			vsync-len = <10>;
			hsync-active = <1>;
			vsync-active = <1>;
		};
	};
};

&lcdc {
	status = "okay";
};

&am33xx_pinmux {
	lcd_pins: pinmux_lcd {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad8.lcd_data16 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad9.lcd_data17 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad10.lcd_data18 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad11.lcd_data19 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad12.lcd_data20 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad13.lcd_data21 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad14.lcd_data22 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad15.lcd_data23 */
			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
			/* Display Enable */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_a11.gpio1_27 */
		>;
	};
};

/* Ethernet */
&cpsw_port1 {
	phy-handle = <&ethphy0>;
	phy-mode = "rgmii";
	ti,dual-emac-pvid = <1>;
};

&cpsw_port2 {
	phy-handle = <&ethphy1>;
	phy-mode = "rgmii";
	ti,dual-emac-pvid = <2>;
};

&davinci_mdio_sw {
	pinctrl-names = "default";
	pinctrl-0 = <&mdio_pins>;

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};

	ethphy1: ethernet-phy@1 {
		reg = <1>;
	};
};

&mac_sw {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ethernet_pins>;
};

&am33xx_pinmux {
	ethernet_pins: pinmux_ethernet {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE2)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE2)
			/* ethernet interrupt */
			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLUP, MUX_MODE7)	/* rmii2_refclk.gpio0_29 */
			/* ethernet PHY nReset */
			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* mii1_col.gpio3_0 */
		>;
	};

	mdio_pins: pinmux_mdio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
		>;
	};
};

/* MMC */
&mmc1 {
	/* Bootable SD card slot */
	status = "okay";
	vmmc-supply = <&ldo3_reg>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&sd_pins>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&mmc2 {
	/* eMMC (not populated) on MMC #2 */
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&emmc_pins>;
	vmmc-supply = <&ldo3_reg>;
	bus-width = <8>;
	non-removable;
};

&mmc3 {
	/* Wifi & Bluetooth on MMC #3 */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&wireless_pins>;
	vmmmc-supply = <&v3v3c_reg>;
	bus-width = <4>;
	non-removable;
	dmas = <&edma_xbar 12 0 1
		&edma_xbar 13 0 2>;
	dma-names = "tx", "rx";
};

&am33xx_pinmux {
	sd_pins: pinmux_sd_card {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)		/* spi0_cs1.gpio0_6 */
		>;
	};
	emmc_pins: pinmux_emmc {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2)	/* gpmc_csn1.mmc1_clk */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)	/* gpmc_csn2.mmc1_cmd */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad0.mmc1_dat0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad1.mmc1_dat1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad2.mmc1_dat2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad3.mmc1_dat3 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad4.mmc1_dat4 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad5.mmc1_dat5 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad6.mmc1_dat6 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad7.mmc1_dat7 */
			/* EMMC nReset */
			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_wpn.gpio0_31 */
		>;
	};
	wireless_pins: pinmux_wireless {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_a1.mmc2_dat0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_a2.mmc2_dat1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_a3.mmc2_dat2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ben1.mmc2_dat3 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_csn3.mmc2_cmd */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_clk.mmc1_clk */
			/* WLAN nReset */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_a8.gpio1_24 */
			/* WLAN nPower down */
			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_wait0.gpio0_30 */
			/* 32kHz Clock */
			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3)	/* xdma_event_intr1.clkout2 */
		>;
	};
};

/* Power */
&vbat {
	regulator-name = "vbat";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
};

&v3v3c_reg {
	regulator-name = "v3v3c_reg";
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	vin-supply = <&vbat>;
};

&vdd5_reg {
	regulator-name = "vdd5_reg";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	vin-supply = <&vbat>;
};

/include/ "tps65217.dtsi"

&tps {
	backlight {
		isel = <1>; /* ISET1 */
		fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
		default-brightness = <80>;
	};

	regulators {
		dcdc1_reg: regulator@0 {
			/* VDD_1V8 system supply */
			regulator-always-on;
		};

		dcdc2_reg: regulator@1 {
			/* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <925000>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <925000>;
			regulator-max-microvolt = <1325000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo1_reg: regulator@3 {
			/* VRTC 1.8V always-on supply */
			regulator-name = "vrtc,vdds";
			regulator-always-on;
		};

		ldo2_reg: regulator@4 {
			/* 3.3V rail */
			regulator-name = "vdd_3v3aux";
			regulator-always-on;
		};

		ldo3_reg: regulator@5 {
			/* VDD_3V3A 3.3V rail */
			regulator-name = "vdd_3v3a";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
		};

		ldo4_reg: regulator@6 {
			/* VDD_3V3B 3.3V rail */
			regulator-name = "vdd_3v3b";
			regulator-always-on;
		};
	};
};

/* SPI Busses */
&spi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;
};

&am33xx_pinmux {
	spi0_pins: pinmux_spi0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};
};

/* Touch Screen */
&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <200>;
		ti,coordinate-readouts = <5>;
		ti,wire-config = <0x00 0x11 0x22 0x33>;
	};

	adc {
		ti,adc-channels = <4 5 6 7>;
	};
};

/* UARTs */
&uart0 {
	/* Serial Console */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
};

&uart1 {
	/* Broken out to J6 header */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
};

&am33xx_pinmux {
	uart0_pins: pinmux_uart0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};
	uart1_pins: pinmux_uart1 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};
};

/* USB */
&usb {
	pinctrl-names = "default";
	pinctrl-0 = <&usb_pins>;
};

&usb0 {
	dr_mode = "host";
};

&usb1 {
	dr_mode = "host";
};

&am33xx_pinmux {
	usb_pins: pinmux_usb {
		pinctrl-single,pins = <
			/* USB0 Over-Current (active low) */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7)	/* gpmc_a9.gpio1_25 */
			/* USB1 Over-Current (active low) */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7)	/* gpmc_a10.gpio1_26 */
		>;
	};
};

/* User IO */
&leds {
	pinctrl-names = "default";
	pinctrl-0 = <&user_leds_pins>;

	led0 {
		label = "pepper:user0:blue";
		gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
		linux,default-trigger = "none";
		default-state = "off";
	};

	led1 {
		label = "pepper:user1:red";
		gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
		linux,default-trigger = "none";
		default-state = "off";
	};
};

&buttons {
	pinctrl-names = "default";
	pinctrl-0 = <&user_buttons_pins>;

	button-0 {
		label = "home";
		linux,code = <KEY_HOME>;
		gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
		wakeup-source;
	};

	button-1 {
		label = "menu";
		linux,code = <KEY_MENU>;
		gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
		wakeup-source;
	};

	button-2 {
		label = "power";
		linux,code = <KEY_POWER>;
		gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
		wakeup-source;
	};
};

&am33xx_pinmux {
	user_leds_pins: pinmux_user_leds {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE7)	/* gpmc_a4.gpio1_20 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7)	/* gpmc_a5.gpio1_21 */
		>;
	};

	user_buttons_pins: pinmux_user_buttons {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLUP, MUX_MODE7)	/* gpmc_a6.gpio1_22 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLUP, MUX_MODE7)	/* gpmc_a7.gpio1_21 */
			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE7)	/* gpmc_a8.gpio0_7 */
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 PHYTEC Messtechnik GmbH
 * Author: Wadim Egorov <w.egorov@phytec.de>
 */

/dts-v1/;

#include "am335x-phycore-som.dtsi"
#include "am335x-pcm-953.dtsi"

/* SoM */
&gpmc {
	status = "okay";
};

&i2c_eeprom {
	status = "okay";
};

&i2c_rtc {
	status = "okay";
};

&serial_flash {
	status = "okay";

};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015 Phytec Messtechnik GmbH
 * Author: Teresa Remmet <t.remmet@phytec.de>
 */

#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "Phytec AM335x phyCORE";
	compatible = "phytec,am335x-phycore-som", "ti,am33xx";

	aliases {
		rtc0 = &i2c_rtc;
		rtc1 = &rtc;
	};

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	vcc5v: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vcc5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};
};

/* Crypto Module */
&aes {
	status = "okay";
};

&sham {
	status = "okay";
};

/* EMMC */
&am33xx_pinmux {
	emmc_pins: pinmux_emmc_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2)	/* gpmc_csn1.mmc1_clk */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)	/* gpmc_csn2.mmc1_cmd */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad0.mmc1_dat0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad1.mmc1_dat1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad2.mmc1_dat2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad3.mmc1_dat3 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad4.mmc1_dat4 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad5.mmc1_dat5 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad6.mmc1_dat6 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad7.mmc1_dat7 */
		>;
	};
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&emmc_pins>;
	vmmc-supply = <&vmmc_reg>;
	bus-width = <8>;
	non-removable;
	status = "disabled";
};

/* Ethernet */
&am33xx_pinmux {
	ethernet0_pins: pinmux_ethernet0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	mdio_pins: pinmux_mdio {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
		>;
	};
};

&cpsw_port1 {
	phy-handle = <&phy0>;
	phy-mode = "rmii";
	ti,dual-emac-pvid = <1>;
};

&cpsw_port2 {
	status = "disabled";
};

&davinci_mdio_sw {
	pinctrl-names = "default";
	pinctrl-0 = <&mdio_pins>;

	phy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&mac_sw {
	pinctrl-names = "default";
	pinctrl-0 = <&ethernet0_pins>;
	status = "okay";
};

/* I2C Busses */
&am33xx_pinmux {
	i2c0_pins: pinmux_i2c0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE0)
		>;
	};
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <400000>;
	status = "okay";

	tps: pmic@2d {
		reg = <0x2d>;
	};

	i2c_tmp102: temp@4b {
		compatible = "ti,tmp102";
		reg = <0x4b>;
		status = "disabled";
	};

	i2c_eeprom: eeprom@52 {
		compatible = "atmel,24c32";
		pagesize = <32>;
		reg = <0x52>;
		status = "disabled";
	};

	i2c_rtc: rtc@68 {
		compatible = "microcrystal,rv4162";
		reg = <0x68>;
		status = "disabled";
	};
};

/* NAND memory */
&am33xx_pinmux {
		nandflash_pins: pinmux_nandflash {
			pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
		>;
	};
};

&elm {
	status = "okay";
};

&gpmc {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&nandflash_pins>;
	ranges = <0 0 0x08000000 0x1000000>;   /* CS0: NAND */
	nandflash: nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		nand-bus-width = <8>;
		ti,nand-ecc-opt = "bch8";
		gpmc,device-nand = "true";
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <30>;
		gpmc,cs-wr-off-ns = <30>;
		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <30>;
		gpmc,adv-wr-off-ns = <30>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <20>;
		gpmc,oe-on-ns = <10>;
		gpmc,oe-off-ns = <30>;
		gpmc,access-ns = <30>;
		gpmc,rd-cycle-ns = <30>;
		gpmc,wr-cycle-ns = <30>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <50>;
		gpmc,cycle2cycle-diffcsen;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-access-ns = <30>;
		gpmc,wr-data-mux-bus-ns = <0>;

		ti,elm-id = <&elm>;

		#address-cells = <1>;
		#size-cells = <1>;
	};
};

/* Power */
#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vcc5v>;
	vcc2-supply = <&vcc5v>;
	vcc3-supply = <&vcc5v>;
	vcc4-supply = <&vcc5v>;
	vcc5-supply = <&vcc5v>;
	vcc6-supply = <&vcc5v>;
	vcc7-supply = <&vcc5v>;
	vccio-supply = <&vcc5v>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-name = "vdig1_1p8v";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

/* SPI Busses */
&am33xx_pinmux {
	spi0_pins: pinmux_spi0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;
	status = "okay";

	serial_flash: flash@0 {
		compatible = "jedec,spi-nor";
		spi-max-frequency = <48000000>;
		reg = <0x0>;
		m25p,fast-read;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <1>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 *
 * Author: Robert Nelson <robertcnelson@gmail.com>
 */
/dts-v1/;

#include "am33xx.dtsi"
#include "am335x-osd335x-common.dtsi"

/ {
	model = "TI AM335x PocketBeagle";
	compatible = "ti,am335x-pocketbeagle", "ti,am335x-bone", "ti,am33xx";

	chosen {
		stdout-path = &uart0;
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&usr_leds_pins>;

		compatible = "gpio-leds";

		led-usr0 {
			label = "beaglebone:green:usr0";
			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led-usr1 {
			label = "beaglebone:green:usr1";
			gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led-usr2 {
			label = "beaglebone:green:usr2";
			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "cpu0";
			default-state = "off";
		};

		led-usr3 {
			label = "beaglebone:green:usr3";
			gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};

	vmmcsd_fixed: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&gpio0 {
	gpio-line-names =
		"NC",
		"NC",
		"P1.08 [SPI0_CLK]",
		"P1.10 [SPI0_MISO]",
		"P1.12 [SPI0_MOSI]",
		"P1.06 [SPI0_CS]",
		"[MMC0_CD]",
		"P2.29 [SPI1_CLK]",
		"[SYSBOOT 12]",
		"[SYSBOOT 13]",
		"[SYSBOOT 14]",
		"[SYSBOOT 15]",
		"P1.26 [I2C2_SDA]",
		"P1.28 [I2C2_SCL]",
		"P2.11 [I2C1_SDA]",
		"P2.09 [I2C1_SCL]",
		"NC",
		"NC",
		"NC",
		"P2.31 [SPI1_CS]",
		"P1.20 [PRU0.16]",
		"NC",
		"NC",
		"P2.03",
		"NC",
		"NC",
		"P1.34",
		"P2.19",
		"NC",
		"NC",
		"P2.05 [UART4_RX]",
		"P2.07 [UART4_TX]";
};

&gpio1 {
	gpio-line-names =
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"P2.25 [SPI1_MOSI]",
		"P1.32 [UART0_RX]",
		"P1.30 [UART0_TX]",
		"P2.24",
		"P2.33",
		"P2.22",
		"P2.18",
		"NC",
		"NC",
		"P2.01 [PWM1A]",
		"NC",
		"P2.10",
		"[USR LED 0]",
		"[USR LED 1]",
		"[USR LED 2]",
		"[USR LED 3]",
		"P2.06",
		"P2.04",
		"P2.02",
		"P2.08",
		"NC",
		"NC",
		"NC";
};

&gpio2 {
	gpio-line-names =
		"P2.20",
		"P2.17",
		"NC",
		"NC",
		"NC",
		"[EEPROM_WP]",
		"[SYSBOOT 0]",
		"[SYSBOOT 1]",
		"[SYSBOOT 2]",
		"[SYSBOOT 3]",
		"[SYSBOOT 4]",
		"[SYSBOOT 5]",
		"[SYSBOOT 6]",
		"[SYSBOOT 7]",
		"[SYSBOOT 8]",
		"[SYSBOOT 9]",
		"[SYSBOOT 10]",
		"[SYSBOOT 11]",
		"NC",
		"NC",
		"NC",
		"NC",
		"P2.35 [AIN5]",
		"P1.02 [AIN6]",
		"P1.35 [PRU1.10]",
		"P1.04 [PRU1.11]",
		"[MMC0_DAT3]",
		"[MMC0_DAT2]",
		"[MMC0_DAT1]",
		"[MMC0_DAT0]",
		"[MMC0_CLK]",
		"[MMC0_CMD]";
};

&gpio3 {
	gpio-line-names =
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"[I2C0_SDA]",
		"[I2C0_SCL]",
		"[JTAG EMU0]",
		"[JTAG EMU1]",
		"NC",
		"NC",
		"NC",
		"NC",
		"P1.03 [USB1]",
		"P1.36 [PWM0A]",
		"P1.33 [PRU0.1]",
		"P2.32 [PRU0.2]",
		"P2.30 [PRU0.3]",
		"P1.31 [PRU0.4]",
		"P2.34 [PRU0.5]",
		"P2.28 [PRU0.6]",
		"P1.29 [PRU0.7]",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC",
		"NC";
};

&am33xx_pinmux {

	compatible = "pinconf-single";
	pinctrl-names = "default";

	pinctrl-0 =   < &P2_03_gpio &P1_34_gpio &P2_19_gpio &P2_24_gpio
			&P2_33_gpio &P2_22_gpio &P2_18_gpio &P2_10_gpio
			&P2_06_gpio &P2_04_gpio &P2_02_gpio &P2_08_gpio
			&P2_17_gpio >;

	/* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */
	P2_03_gpio: pinmux_P2_03_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */
	P1_34_gpio: pinmux_P1_34_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */
	P2_19_gpio: pinmux_P2_19_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_24 (ZCZ ball T12) gpio1_12 0x830 PIN 12 */
	P2_24_gpio: pinmux_P2_24_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_33 (ZCZ ball R12) gpio1_13 0x834 PIN 13 */
	P2_33_gpio: pinmux_P2_33_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_22 (ZCZ ball V13) gpio1_14 0x838 PIN 14 */
	P2_22_gpio: pinmux_P2_22_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_18 (ZCZ ball U13) gpio1_15 0x83c PIN 15 */
	P2_18_gpio: pinmux_P2_18_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_10 (ZCZ ball R14) gpio1_20 0x850 PIN 20 */
	P2_10_gpio: pinmux_P2_10_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_06 (ZCZ ball U16) gpio1_25 0x864 PIN 25 */
	P2_06_gpio: pinmux_P2_06_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_04 (ZCZ ball T16) gpio1_26 0x868 PIN 26 */
	P2_04_gpio: pinmux_P2_04_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_02 (ZCZ ball V17) gpio1_27 0x86c PIN 27 */
	P2_02_gpio: pinmux_P2_02_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	/* P2_08 (ZCZ ball U18) gpio1_28 0x878 PIN 30 */
	P2_08_gpio: pinmux_P2_08_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x00  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x00  0x00  0x10  0x18>;
	};

	/* P2_17 (ZCZ ball V12) gpio2_1 0x88c PIN 35 */
	P2_17_gpio: pinmux_P2_17_gpio {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE7)
		>;
		pinctrl-single,bias-pullup   =   < 0x10  0x10  0x00  0x18>;
		pinctrl-single,bias-pulldown   = < 0x10  0x00  0x10  0x18>;
	};

	i2c2_pins: pinmux-i2c2-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* (D17) uart1_rtsn.I2C2_SCL */
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* (D18) uart1_ctsn.I2C2_SDA */
		>;
	};

	ehrpwm0_pins: pinmux-ehrpwm0-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* (A13) mcasp0_aclkx.ehrpwm0A */
		>;
	};

	ehrpwm1_pins: pinmux-ehrpwm1-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6)	/* (U14) gpmc_a2.ehrpwm1A */
		>;
	};

	mmc0_pins: pinmux-mmc0-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)		/* (C15) spi0_cs1.gpio0[6] */
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};

	spi0_pins: pinmux-spi0-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};

	spi1_pins: pinmux-spi1-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE4)	/* (C18) eCAP0_in_PWM0_out.spi1_sclk */
			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE4)	/* (E18) uart0_ctsn.spi1_d0 */
			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE4)	/* (E17) uart0_rtsn.spi1_d1 */
			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE4)	/* (A15) xdma_event_intr0.spi1_cs1 */
		>;
	};

	usr_leds_pins: pinmux-usr-leds-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7)		/* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7)		/* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7)		/* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7)		/* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
		>;
	};

	uart0_pins: pinmux-uart0-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	uart4_pins: pinmux-uart4-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6)	/* (T17) gpmc_wait0.uart4_rxd */
			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6)	/* (U17) gpmc_wpn.uart4_txd */
		>;
	};
};

&epwmss0 {
	status = "okay";
};

&ehrpwm0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ehrpwm0_pins>;
};

&epwmss1 {
	status = "okay";
};

&ehrpwm1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ehrpwm1_pins>;
};

&i2c0 {
	eeprom: eeprom@50 {
		compatible = "atmel,24c256";
		reg = <0x50>;
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;

	status = "okay";
	clock-frequency = <400000>;
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&rtc {
	system-power-controller;
};

&tscadc {
	status = "okay";
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
		ti,chan-step-avg = <16 16 16 16 16 16 16 16>;
		ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>;
		ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins>;

	status = "okay";
};

&usb0 {
	dr_mode = "otg";
};

&usb1 {
	dr_mode = "host";
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2019 Phytec Messtechnik GmbH
 * Author: Teresa Remmet <t.remmet@phytec.de>
 *
 */

/dts-v1/;

#include "am335x-phycore-som.dtsi"
#include "am335x-regor.dtsi"

/* SoM */
&gpmc {
	status = "okay";
};

&i2c_eeprom {
	status = "okay";
};

&serial_flash {
	status = "okay";
};