code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2015 Freescale Semiconductor, Inc.
 * Copyright (C) 2019 reMarkable AS - http://www.remarkable.com/
 *
 */

/dts-v1/;

#include "imx7d.dtsi"

/ {
	model = "reMarkable 2.0";
	compatible = "remarkable,imx7d-remarkable2", "fsl,imx7d";

	chosen {
		stdout-path = &uart6;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};

	thermal-zones {
		epd-thermal {
			thermal-sensors = <&sy7636a>;
			polling-delay-passive = <30000>;
			polling-delay = <30000>;

			trips {
				trip0 {
					temperature = <49000>;
					hysteresis = <2000>;
					type = "passive";
				};

				trip1 {
					temperature = <50000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};
		};
	};

	reg_brcm: regulator-brcm {
		compatible = "regulator-fixed";
		regulator-name = "brcm_reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_brcm_reg>;
		gpio = <&gpio6 13 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		startup-delay-us = <150>;
	};

	reg_digitizer: regulator-digitizer {
		compatible = "regulator-fixed";
		regulator-name = "VDD_3V3_DIGITIZER";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&pinctrl_digitizer_reg>;
		pinctrl-1 = <&pinctrl_digitizer_reg>;
		gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		startup-delay-us = <100000>; /* 100 ms */
	};

	wifi_pwrseq: wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wifi>;
		reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
		clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
		clock-names = "ext_clock";
	};
};

&clks {
	assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
			  <&clks IMX7D_CLKO2_ROOT_DIV>;
	assigned-clock-parents = <&clks IMX7D_CKIL>;
	assigned-clock-rates = <0>, <32768>;
};

&i2c1 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	wacom_digitizer: digitizer@9 {
		compatible = "hid-over-i2c";
		reg = <0x09>;
		hid-descr-addr = <0x01>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wacom>;
		interrupt-parent = <&gpio1>;
		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
		touchscreen-inverted-x;
		touchscreen-inverted-y;
		vdd-supply = <&reg_digitizer>;
	};
};

&i2c4 {
	clock-frequency = <100000>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&pinctrl_i2c4>;
	pinctrl-1 = <&pinctrl_i2c4>;
	status = "okay";

	sy7636a: pmic@62 {
		compatible = "silergy,sy7636a";
		reg = <0x62>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_epdpmic>;
		#address-cells = <1>;
		#size-cells = <0>;
		#thermal-sensor-cells = <0>;
		epd-pwr-good-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;

		regulators {
			reg_epdpmic: vcom {
				regulator-name = "vcom";
				regulator-boot-on;
			};
		};
	};
};

&snvs_pwrkey {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&usbotg2 {
	srp-disable;
	hnp-disable;
	status = "okay";
};

&usdhc2 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
	pinctrl-0 = <&pinctrl_usdhc2>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
	mmc-pwrseq = <&wifi_pwrseq>;
	vmmc-supply = <&reg_brcm>;
	bus-width = <4>;
	non-removable;
	keep-power-in-suspend;
	cap-power-off-card;
	status = "okay";

	brcmf: bcrmf@1 {
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
	};
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	pinctrl-3 = <&pinctrl_usdhc3>;
	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
	assigned-clock-rates = <400000000>;
	bus-width = <8>;
	non-removable;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc_lpsr {
	pinctrl_digitizer_reg: digitizerreggrp {
		fsl,pins = <
			/* DIGITIZER_PWR_EN */
			MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6	0x14
		>;
	};

	pinctrl_wacom: wacomgrp {
		fsl,pins = <
			/*MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x00000014 FWE */
			MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4	0x00000074 /* PDCTB */
			MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1	0x00000034 /* WACOM INT */
			/*MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6	0x00000014 WACOM PWR ENABLE */
			/*MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0	0x00000074 WACOM RESET */
		>;
	};
};

&iomuxc {
	pinctrl_brcm_reg: brcmreggrp {
		fsl,pins = <
			/* WIFI_PWR_EN */
			MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13	0x14
		>;
	};

	pinctrl_epdpmic: epdpmicgrp {
		fsl,pins = <
			MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21	0x00000074
			MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11	0x00000014
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f
			MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX7D_PAD_I2C4_SDA__I2C4_SDA		0x4000007f
			MX7D_PAD_I2C4_SCL__I2C4_SCL		0x4000007f
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79
			MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x79
		>;
	};

	pinctrl_uart6: uart6grp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA09__UART6_DCE_TX		0x79
			MX7D_PAD_EPDC_DATA08__UART6_DCE_RX		0x79
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX7D_PAD_SD2_CMD__SD2_CMD		0x59
			MX7D_PAD_SD2_CLK__SD2_CLK		0x19
			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x59
			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x59
			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x59
			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x59
		>;
	};

	pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
		fsl,pins = <
			MX7D_PAD_SD2_CMD__SD2_CMD		0x5a
			MX7D_PAD_SD2_CLK__SD2_CLK		0x1a
			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5a
			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5a
			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5a
			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5a
		>;
	};

	pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
		fsl,pins = <
			MX7D_PAD_SD2_CMD__SD2_CMD		0x5b
			MX7D_PAD_SD2_CLK__SD2_CLK		0x1b
			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5b
			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5b
			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5b
			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5b
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x19
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x5a
			MX7D_PAD_SD3_CLK__SD3_CLK		0x1a
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5a
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5a
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5a
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5a
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5a
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5a
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5a
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5a
			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1a
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x5b
			MX7D_PAD_SD3_CLK__SD3_CLK		0x1b
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5b
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5b
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5b
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5b
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5b
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5b
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5b
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5b
			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1b
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY	0x74
		>;
	};

	pinctrl_wifi: wifigrp {
		fsl,pins = <
			/* WiFi Reg On */
			MX7D_PAD_SD2_CD_B__GPIO5_IO9		0x00000014
			/* WiFi Sleep 32k */
			MX7D_PAD_SD1_WP__CCM_CLKO2		0x00000014
		>;
	};
};

repo_name: angery/linux


code:
/*
 * Support for CompuLab SBC-iMX7 Single Board Computer
 *
 * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
 * Author: Ilya Ledvich <ilya@compulab.co.il>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 */

#include "imx7d-cl-som-imx7.dts"

/ {
	model = "CompuLab SBC-iMX7";
	compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
	wakeup-source;
	status = "okay";
};

&iomuxc {
	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59 /* CD */
			MX7D_PAD_SD1_WP__GPIO5_IO1		0x59 /* WP */
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright (C) 2015 Freescale Semiconductor, Inc.

/dts-v1/;

#include "imx7d-sdb.dts"

/ {
	model = "Freescale i.MX7 SabreSD RevA Board";
	compatible = "fsl,imx7d-sdb-reva", "fsl,imx7d";

	reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
		pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg_reva>;
		gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
	};
};

&fec2 {
	/delete-property/phy-supply;
};

&iomuxc {
	imx7d-sdb {
		pinctrl_tsc2046_pendown: tsc2046_pendown {
			fsl,pins = <
				MX7D_PAD_EPDC_DATA13__GPIO2_IO13	0x59
			>;
		};

		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX7D_PAD_ECSPI2_SS0__GPIO4_IO23		0x34  /* bt reg on */
			>;
		};

		pinctrl_usb_otg2_vbus_reg_reva: usbotg2vbusregrevagrp {
			fsl,pins = <
				MX7D_PAD_UART3_CTS_B__GPIO4_IO7		0x14
			>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright (C) 2015 Freescale Semiconductor, Inc.

#include "imx7d-sdb.dts"

/ {
	sensor {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sensor>;
		compatible = "sensirion,sht15";
		clk-gpios = <&gpio4 12 0>;
		data-gpios = <&gpio4 13 0>;
		vcc-supply = <&reg_sht15>;
	};

	reg_sht15: regulator-sht15 {
		compatible = "regulator-fixed";
		regulator-name = "reg_sht15";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&i2c3 {
	status = "disabled";
};

&iomuxc {
	pinctrl_sensor: sensorgrp {
		fsl,pins = <
			MX7D_PAD_I2C3_SDA__GPIO4_IO13	0x4000007f
			MX7D_PAD_I2C3_SCL__GPIO4_IO12	0x4000007f
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright (C) 2015 Freescale Semiconductor, Inc.

/dts-v1/;

#include "imx7d.dtsi"

/ {
	model = "Freescale i.MX7 SabreSD Board";
	compatible = "fsl,imx7d-sdb", "fsl,imx7d";

	chosen {
		stdout-path = &uart1;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x80000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		key-volume-up {
			label = "Volume Up";
			gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEUP>;
			wakeup-source;
		};

		key-volume-down {
			label = "Volume Down";
			gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEDOWN>;
			wakeup-source;
		};
	};

	spi-4 {
		compatible = "spi-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi4>;
		gpio-sck = <&gpio1 13 GPIO_ACTIVE_HIGH>;
		gpio-mosi = <&gpio1 9 GPIO_ACTIVE_HIGH>;
		cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
		num-chipselects = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		extended_io: gpio-expander@0 {
			compatible = "fairchild,74hc595";
			gpio-controller;
			#gpio-cells = <2>;
			reg = <0>;
			registers-number = <1>;
			spi-max-frequency = <100000>;
		};
	};

	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg2_vbus";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg>;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_vref_1v8: regulator-vref-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vref-1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	reg_brcm: regulator-brcm {
		compatible = "regulator-fixed";
		gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-name = "brcm_reg";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_brcm_reg>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <200000>;
	};

	reg_lcd_3v3: regulator-lcd-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "lcd-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&extended_io 7 GPIO_ACTIVE_LOW>;
	};

	reg_can2_3v3: regulator-can2-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "can2-3v3";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_flexcan2_reg>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio2 14 GPIO_ACTIVE_LOW>;
	};

	reg_fec2_3v3: regulator-fec2-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "fec2-3v3";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_enet2_reg>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
	};

	backlight: backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000 0>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
		status = "okay";
	};

	panel {
		compatible = "innolux,at043tn24";
		backlight = <&backlight>;
		power-supply = <&reg_lcd_3v3>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&display_out>;
			};
		};
	};

	sound {
		compatible = "fsl,imx7d-evk-wm8960",
			     "fsl,imx-audio-wm8960";
		model = "wm8960-audio";
		audio-cpu = <&sai1>;
		audio-codec = <&codec>;
		hp-det-gpio = <&gpio2 28 GPIO_ACTIVE_HIGH>;
		audio-routing =
			"Headphone Jack", "HP_L",
			"Headphone Jack", "HP_R",
			"Ext Spk", "SPK_LP",
			"Ext Spk", "SPK_LN",
			"Ext Spk", "SPK_RP",
			"Ext Spk", "SPK_RN",
			"LINPUT1", "AMIC",
			"AMIC", "MICB";
	};

	sound-hdmi {
		compatible = "fsl,imx-audio-sii902x";
		model = "sii902x-audio";
		audio-cpu = <&sai3>;
		hdmi-out;
	};
};

&adc1 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&adc2 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&cpu0 {
	cpu-supply = <&sw1a_reg>;
};

&cpu1 {
	cpu-supply = <&sw1a_reg>;
};

&ecspi3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
	status = "okay";

	tsc2046@0 {
		compatible = "ti,tsc2046";
		reg = <0>;
		spi-max-frequency = <1000000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_tsc2046_pendown>;
		interrupt-parent = <&gpio2>;
		interrupts = <29 0>;
		pendown-gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
		touchscreen-max-pressure = <255>;
		wakeup-source;
	};
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
	phy-reset-gpios = <&extended_io 5 GPIO_ACTIVE_LOW>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@0 {
			reg = <0>;
		};

		ethphy1: ethernet-phy@1 {
			reg = <1>;
		};
	};
};

&fec2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet2>;
	assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET2_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii";
	phy-handle = <&ethphy1>;
	phy-supply = <&reg_fec2_3v3>;
	fsl,magic-packet;
	status = "okay";
};

&flexcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	xceiver-supply = <&reg_can2_3v3>;
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pmic: pfuze3000@8 {
		compatible = "fsl,pfuze3000";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* use sw1c_reg to align with pfuze100/pfuze200 */
			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <2800000>;
				regulator-max-microvolt = <2800000>;
				regulator-always-on;
			};
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	mpl3115@60 {
		compatible = "fsl,mpl3115";
		reg = <0x60>;
	};
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";

	codec: wm8960@1a {
		compatible = "wlf,wm8960";
		reg = <0x1a>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		clock-names = "mclk";
		wlf,shared-lrclk;
		wlf,hp-cfg = <2 2 3>;
		wlf,gpio-cfg = <1 3>;
		assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>,
				  <&clks IMX7D_PLL_AUDIO_POST_DIV>,
				  <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
		assigned-clock-rates = <0>, <884736000>, <12288000>;
	};
};

&lcdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lcdif>;
	status = "okay";

	port {
		display_out: endpoint {
			remote-endpoint = <&panel_in>;
		};
	};
};

&pcie {
	reset-gpio = <&extended_io 1 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&reg_1p0d {
	vin-supply = <&sw2_reg>;
};

&reg_1p2 {
	vin-supply = <&sw2_reg>;
};

&sai1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai1>;
	assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
			  <&clks IMX7D_PLL_AUDIO_POST_DIV>,
			  <&clks IMX7D_SAI1_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <0>, <884736000>, <36864000>;
	status = "okay";
};

&sai3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai3 &pinctrl_sai3_mclk>;
	assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>,
			  <&clks IMX7D_PLL_AUDIO_POST_DIV>,
			  <&clks IMX7D_SAI3_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <0>, <884736000>, <36864000>;
	status = "okay";
};

&snvs_pwrkey {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	uart-has-rtscts;
	status = "okay";
};

&usbotg1 {
	vbus-supply = <&reg_usb_otg1_vbus>;
	status = "okay";
};

&usbotg2 {
	vbus-supply = <&reg_usb_otg2_vbus>;
	dr_mode = "host";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
	wakeup-source;
	keep-power-in-suspend;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc2>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
	wakeup-source;
	keep-power-in-suspend;
	non-removable;
	vmmc-supply = <&reg_brcm>;
	fsl,tuning-step = <2>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
	assigned-clock-rates = <400000000>;
	bus-width = <8>;
	fsl,tuning-step = <2>;
	non-removable;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx7d-sdb {
		pinctrl_brcm_reg: brcmreggrp {
			fsl,pins = <
				MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21	0x14
			>;
		};

		pinctrl_ecspi3: ecspi3grp {
			fsl,pins = <
				MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO	0x2
				MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI	0x2
				MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK	0x2
				MX7D_PAD_SD2_CD_B__GPIO5_IO9		0x59
			>;
		};

		pinctrl_enet1: enet1grp {
			fsl,pins = <
				MX7D_PAD_GPIO1_IO10__ENET1_MDIO			0x3
				MX7D_PAD_GPIO1_IO11__ENET1_MDC			0x3
				MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	0x1
				MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x1
				MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x1
				MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	0x1
				MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	0x1
				MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	0x1
				MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	0x1
				MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x1
				MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x1
				MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	0x1
				MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	0x1
				MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x1
			>;
		};

		pinctrl_enet2: enet2grp {
			fsl,pins = <
				MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC		0x1
				MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0		0x1
				MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1		0x1
				MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2		0x1
				MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3		0x1
				MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL		0x1
				MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC		0x1
				MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0		0x1
				MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1		0x1
				MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2		0x1
				MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3		0x1
				MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL		0x1
			>;
		};

		pinctrl_enet2_reg: enet2reggrp {
			fsl,pins = <
				MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4	0x14
			>;
		};

		pinctrl_flexcan2: flexcan2grp {
			fsl,pins = <
				MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	0x59
				MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	0x59
			>;
		};

		pinctrl_flexcan2_reg: flexcan2reggrp {
			fsl,pins = <
				MX7D_PAD_EPDC_DATA14__GPIO2_IO14	0x59	/* CAN_STBY */
			>;
		};

		pinctrl_gpio_keys: gpio_keysgrp {
			fsl,pins = <
				MX7D_PAD_SD2_RESET_B__GPIO5_IO11	0x59
				MX7D_PAD_SD2_WP__GPIO5_IO10		0x59
			>;
		};

		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX7D_PAD_ECSPI2_SS0__GPIO4_IO23		0x34  /* bt reg on */
				MX7D_PAD_EPDC_BDR0__GPIO2_IO28		0x59  /* headphone detect */
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f
				MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX7D_PAD_I2C2_SDA__I2C2_SDA		0x4000007f
				MX7D_PAD_I2C2_SCL__I2C2_SCL		0x4000007f
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX7D_PAD_I2C3_SDA__I2C3_SDA		0x4000007f
				MX7D_PAD_I2C3_SCL__I2C3_SCL		0x4000007f
			>;
		};

		pinctrl_i2c4: i2c4grp {
			fsl,pins = <
				MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA		0x4000007f
				MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL		0x4000007f
			>;
		};

		pinctrl_lcdif: lcdifgrp {
			fsl,pins = <
				MX7D_PAD_LCD_DATA00__LCD_DATA0		0x79
				MX7D_PAD_LCD_DATA01__LCD_DATA1		0x79
				MX7D_PAD_LCD_DATA02__LCD_DATA2		0x79
				MX7D_PAD_LCD_DATA03__LCD_DATA3		0x79
				MX7D_PAD_LCD_DATA04__LCD_DATA4		0x79
				MX7D_PAD_LCD_DATA05__LCD_DATA5		0x79
				MX7D_PAD_LCD_DATA06__LCD_DATA6		0x79
				MX7D_PAD_LCD_DATA07__LCD_DATA7		0x79
				MX7D_PAD_LCD_DATA08__LCD_DATA8		0x79
				MX7D_PAD_LCD_DATA09__LCD_DATA9		0x79
				MX7D_PAD_LCD_DATA10__LCD_DATA10		0x79
				MX7D_PAD_LCD_DATA11__LCD_DATA11		0x79
				MX7D_PAD_LCD_DATA12__LCD_DATA12		0x79
				MX7D_PAD_LCD_DATA13__LCD_DATA13		0x79
				MX7D_PAD_LCD_DATA14__LCD_DATA14		0x79
				MX7D_PAD_LCD_DATA15__LCD_DATA15		0x79
				MX7D_PAD_LCD_DATA16__LCD_DATA16		0x79
				MX7D_PAD_LCD_DATA17__LCD_DATA17		0x79
				MX7D_PAD_LCD_DATA18__LCD_DATA18		0x79
				MX7D_PAD_LCD_DATA19__LCD_DATA19		0x79
				MX7D_PAD_LCD_DATA20__LCD_DATA20		0x79
				MX7D_PAD_LCD_DATA21__LCD_DATA21		0x79
				MX7D_PAD_LCD_DATA22__LCD_DATA22		0x79
				MX7D_PAD_LCD_DATA23__LCD_DATA23		0x79
				MX7D_PAD_LCD_CLK__LCD_CLK		0x79
				MX7D_PAD_LCD_ENABLE__LCD_ENABLE		0x79
				MX7D_PAD_LCD_VSYNC__LCD_VSYNC		0x79
				MX7D_PAD_LCD_HSYNC__LCD_HSYNC		0x79
				MX7D_PAD_LCD_RESET__LCD_RESET		0x79
			>;
		};

		pinctrl_sai1: sai1grp {
			fsl,pins = <
				MX7D_PAD_SAI1_MCLK__SAI1_MCLK           0x1f
				MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK     0x1f
				MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC	0x1f
				MX7D_PAD_ENET1_COL__SAI1_TX_DATA0	0x30
				MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0	0x1f
			>;
		};

		pinctrl_sai2: sai2grp {
			fsl,pins = <
				MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK     0x1f
				MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC     0x1f
				MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0    0x30
				MX7D_PAD_SAI2_RX_DATA__SAI2_RX_DATA0    0x1f
			>;
		};

		pinctrl_sai3: sai3grp {
			fsl,pins = <
				MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK   0x1f
				MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC     0x1f
				MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0    0x30
			>;
		};

		pinctrl_spi4: spi4grp {
			fsl,pins = <
				MX7D_PAD_GPIO1_IO09__GPIO1_IO9	0x59
				MX7D_PAD_GPIO1_IO12__GPIO1_IO12	0x59
				MX7D_PAD_GPIO1_IO13__GPIO1_IO13	0x59
			>;
		};

		pinctrl_tsc2046_pendown: tsc2046_pendown {
			fsl,pins = <
				MX7D_PAD_EPDC_BDR1__GPIO2_IO29		0x59
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79
				MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x79
			>;
		};

		pinctrl_uart5: uart5grp {
			fsl,pins = <
				MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX	0x79
				MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX	0x79
				MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS	0x79
				MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS	0x79
			>;
		};

		pinctrl_uart6: uart6grp {
			fsl,pins = <
				MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX	0x79
				MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX	0x79
				MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS	0x79
				MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS	0x79
			>;
		};

		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				MX7D_PAD_SD1_CMD__SD1_CMD		0x59
				MX7D_PAD_SD1_CLK__SD1_CLK		0x19
				MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
				MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
				MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
				MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
				MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59 /* CD */
				MX7D_PAD_SD1_WP__GPIO5_IO1		0x59 /* WP */
				MX7D_PAD_SD1_RESET_B__GPIO5_IO2		0x59 /* vmmc */
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX7D_PAD_SD2_CMD__SD2_CMD		0x59
				MX7D_PAD_SD2_CLK__SD2_CLK		0x19
				MX7D_PAD_SD2_DATA0__SD2_DATA0		0x59
				MX7D_PAD_SD2_DATA1__SD2_DATA1		0x59
				MX7D_PAD_SD2_DATA2__SD2_DATA2		0x59
				MX7D_PAD_SD2_DATA3__SD2_DATA3		0x59
			>;
		};

		pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
			fsl,pins = <
				MX7D_PAD_SD2_CMD__SD2_CMD		0x5a
				MX7D_PAD_SD2_CLK__SD2_CLK		0x1a
				MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5a
				MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5a
				MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5a
				MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5a
			>;
		};

		pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
			fsl,pins = <
				MX7D_PAD_SD2_CMD__SD2_CMD		0x5b
				MX7D_PAD_SD2_CLK__SD2_CLK		0x1b
				MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5b
				MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5b
				MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5b
				MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5b
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX7D_PAD_SD3_CMD__SD3_CMD		0x59
				MX7D_PAD_SD3_CLK__SD3_CLK		0x19
				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
				MX7D_PAD_SD3_STROBE__SD3_STROBE		0x19
			>;
		};

		pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
			fsl,pins = <
				MX7D_PAD_SD3_CMD__SD3_CMD		0x5a
				MX7D_PAD_SD3_CLK__SD3_CLK		0x1a
				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5a
				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5a
				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5a
				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5a
				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5a
				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5a
				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5a
				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5a
				MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1a
			>;
		};

		pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
			fsl,pins = <
				MX7D_PAD_SD3_CMD__SD3_CMD		0x5b
				MX7D_PAD_SD3_CLK__SD3_CLK		0x1b
				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5b
				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5b
				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5b
				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5b
				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5b
				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5b
				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5b
				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5b
				MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1b
			>;
		};
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&iomuxc_lpsr {
	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B		0x74
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT		0x30
		>;
	};

	pinctrl_usb_otg2_vbus_reg: usbotg2vbusreggrp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7	  0x14
		>;
	};

	pinctrl_sai3_mclk: sai3grp_mclk {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO03__SAI3_MCLK	0x1f
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
//
// Copyright (C) 2020 PHYTEC Messtechnik GmbH
// Author: Jens Lang  <J.Lang@phytec.de>
// Copyright (C) 2021 Fabio Estevam <festevam@denx.de>

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx7d.dtsi"

/ {
	model = "Storopack SMEGW01 board";
	compatible = "storopack,imx7d-smegw01", "fsl,imx7d";

	aliases {
		mmc0 = &usdhc1;
		mmc1 = &usdhc3;
		mmc2 = &usdhc2;
		rtc0 = &i2c_rtc;
		rtc1 = &snvs_rtc;
	};

	chosen {
		stdout-path = &uart1;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>;
	};

	reg_lte_on: regulator-lte-on {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lte_on>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-name = "lte_on";
		gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	reg_lte_nreset: regulator-lte-nreset {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lte_nreset>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-name = "LTE_nReset";
		gpio = <&gpio6 21 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	reg_wifi: regulator-wifi {
		compatible = "regulator-fixed";
		gpio = <&gpio2 30 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wifi>;
		regulator-name = "wifi_reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_wlan_rfkill: regulator-wlan-rfkill {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-2 = <&pinctrl_rfkill>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-name = "wlan_rfkill";
		gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	reg_usbotg_vbus: regulator-usbotg-vbus {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbotg1_pwr_gpio>;
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 05 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
	status = "okay";

	sram@0 {
		compatible = "microchip,48l640";
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <16000000>;
	};
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
	status = "okay";

	mdio: mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@1 {
			compatible = "ethernet-phy-id0022.1622",
				     "ethernet-phy-ieee802.3-c22";
			reg = <1>;
			reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
		};

		ethphy1: ethernet-phy@2 {
			compatible = "ethernet-phy-id0022.1622",
				     "ethernet-phy-ieee802.3-c22";
			reg = <2>;
		};
	};
};

&fec2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet2>;
	assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET2_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy1>;
	fsl,magic-packet;
	status = "okay";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 =<&pinctrl_i2c2>;
	clock-frequency = <100000>;
	status = "okay";

	i2c_rtc: rtc@52 {
		compatible = "microcrystal,rv3028";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rtc_int>;
		reg = <0x52>;
		interrupt-parent = <&gpio2>;
		interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
	};
};

&flexcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&flexcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&usbotg1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg1_lpsr>;
	dr_mode = "otg";
	vbus-supply = <&reg_usbotg_vbus>;
	status = "okay";
};

&usbotg2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg2>;
	dr_mode = "host";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	no-1-8-v;
	wakeup-source;
	keep-power-in-suspend;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	no-1-8-v;
	non-removable;
	vmmc-supply = <&reg_wifi>;
	wakeup-source;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
	assigned-clock-rates = <400000000>;
	max-frequency = <200000000>;
	bus-width = <8>;
	fsl,tuning-step = <1>;
	non-removable;
	cap-mmc-highspeed;
	cap-mmc-hw-reset;
	mmc-hs200-1_8v;
	mmc-ddr-1_8v;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&iomuxc {
	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_SS0__GPIO4_IO19	0x04
			MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK	0x04
			MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI	0x04
			MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO	0x04
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x5
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x5
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x5
			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	0x5
			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	0x5
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	0x5
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x5
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x5
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x5
			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	0x5
			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	0x5
			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	0x5
			MX7D_PAD_GPIO1_IO10__ENET1_MDIO		0x7
			MX7D_PAD_GPIO1_IO11__ENET1_MDC		0x7
		>;
	};

	pinctrl_enet2: enet2grp {
		fsl,pins = <
			MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x5
			MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC	0x5
			MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0	0x5
			MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1	0x5
			MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2	0x5
			MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3	0x5
			MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0	0x5
			MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1	0x5
			MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2	0x5
			MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3	0x5
			MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x5
			MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC	0x5
			MX7D_PAD_GPIO1_IO09__GPIO1_IO9	0x08
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SCL__I2C2_SCL		0x40000004
			MX7D_PAD_I2C2_SDA__I2C2_SDA		0x40000004
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX	0x0b0b0
			MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX	0x0b0b0
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	0x0b0b0
			MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	0x0b0b0
		>;
	};

	pinctrl_lte_on: lteongrp {
		fsl,pins = <
			MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12	0x17059
		>;
	};

	pinctrl_lte_nreset: ltenresetgrp {
		fsl,pins = <
			MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21	0x17059
		>;
	};

	pinctrl_rfkill: rfkillrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA11__GPIO2_IO11	0x17059
		>;
	};

	pinctrl_rtc_int: rtcintgrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA15__GPIO2_IO15	0x17059
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x74
			MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x7c
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX	0x7c
			MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX	0x74
		>;
	};

	pinctrl_usbotg1_lpsr: usbotg1 {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC	0x04
		>;
	};

	pinctrl_usbotg1_pwr: usbotg1-pwr {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO05__USB_OTG1_PWR	0x04
		>;
	};

	pinctrl_usbotg1_pwr_gpio: usbotg1-pwr-gpio {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x04
		>;
	};

	pinctrl_usbotg2: usbotg2grp {
		fsl,pins = <
			MX7D_PAD_UART3_RTS_B__USB_OTG2_OC	0x04
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59
			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX7D_PAD_SD2_CLK__SD2_CLK		0x19
			MX7D_PAD_SD2_CMD__SD2_CMD		0x59
			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x59
			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x59
			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x59
			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x59
			MX7D_PAD_SD2_CD_B__SD2_CD_B		0x08
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x5d
			MX7D_PAD_SD3_CLK__SD3_CLK		0x1d
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5d
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5d
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5d
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5d
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5d
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5d
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5d
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5d
			MX7D_PAD_SD3_STROBE__SD3_STROBE	0x1d
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x5e
			MX7D_PAD_SD3_CLK__SD3_CLK		0x1e
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5e
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5e
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5e
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5e
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5e
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5e
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5e
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5e
			MX7D_PAD_SD3_STROBE__SD3_STROBE	0x1e
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x5f
			MX7D_PAD_SD3_CLK__SD3_CLK		0x0f
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5f
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5f
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5f
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5f
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5f
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5f
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5f
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5f
			MX7D_PAD_SD3_STROBE__SD3_STROBE	0x1f
		>;
	};

	pinctrl_wifi: wifigrp {
		fsl,pins = <
			MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30	0x04
			MX7D_PAD_SD2_RESET_B__GPIO5_IO11	0x04
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Device Tree Include file for TQ-Systems TQMa7D board with NXP i.MX7Dual SoC.
 *
 * Copyright (C) 2016 TQ-Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
 */

#include "imx7d.dtsi"
#include "imx7-tqma7.dtsi"

&cpu1 {
	cpu-supply = <&sw1a_reg>;
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Device tree file for ZII's RMU2 board
 *
 * RMU - Remote Modem Unit
 *
 * Copyright (C) 2019 Zodiac Inflight Innovations
 */

/dts-v1/;
#include <dt-bindings/thermal/thermal.h>
#include "imx7d.dtsi"

/ {
	model = "ZII RMU2 Board";
	compatible = "zii,imx7d-rmu2", "fsl,imx7d";

	chosen {
		stdout-path = &uart2;
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&pinctrl_leds_debug>;
		pinctrl-names = "default";

		led-debug {
			label = "zii:green:debug1";
			gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};
};

&cpu0 {
	cpu-supply = <&sw1a_reg>;
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii-id";
	phy-handle = <&fec1_phy>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		fec1_phy: ethernet-phy@0 {
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_enet1_phy_reset>,
				    <&pinctrl_enet1_phy_interrupt>;
			reg = <0>;
			interrupt-parent = <&gpio1>;
			interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
			reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
		};
	};
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pmic@8 {
		compatible = "fsl,pfuze3000";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
				regulator-always-on;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};

	eeprom@50 {
		compatible = "atmel,24c04";
		reg = <0x50>;
	};

	eeprom@52 {
		compatible = "atmel,24c04";
		reg = <0x52>;
	};
};

&snvs_rtc {
	status = "disabled";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	status = "okay";

	rave-sp {
		compatible = "zii,rave-sp-rdu2";
		current-speed = <1000000>;
		#address-cells = <1>;
		#size-cells = <1>;

		watchdog {
			compatible = "zii,rave-sp-watchdog";
		};

		eeprom@a3 {
			compatible = "zii,rave-sp-eeprom";
			reg = <0xa3 0x4000>;
			#address-cells = <1>;
			#size-cells = <1>;
			zii,eeprom-name = "main-eeprom";
		};
	};
};

&usbotg2 {
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	bus-width = <4>;
	no-1-8-v;
	no-sdio;
	keep-power-in-suspend;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	no-1-8-v;
	non-removable;
	no-sdio;
	no-sd;
	keep-power-in-suspend;
	status = "okay";
};

&wdog1 {
	status = "disabled";
};

&iomuxc {
	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK	0x2
			MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI	0x2
			MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO	0x2
			MX7D_PAD_ECSPI1_SS0__GPIO4_IO19         0x59
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_SD2_CD_B__ENET1_MDIO				0x3
			MX7D_PAD_SD2_WP__ENET1_MDC				0x3
			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC		0x1
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0		0x1
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1		0x1
			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2		0x1
			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3		0x1
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL		0x1
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC		0x1
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0		0x1
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1		0x1
			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2		0x1
			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3		0x1
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL		0x1
		>;
	};

	pinctrl_enet1_phy_reset: enet1phyresetgrp {
		fsl,pins = <
			MX7D_PAD_SD2_RESET_B__GPIO5_IO11	0x14

		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f
			MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f
		>;
	};

	pinctrl_leds_debug: ledsgrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA08__GPIO2_IO8		0x59
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX	0x79
			MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX	0x79
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX7D_PAD_SD2_DATA0__UART4_DCE_RX	0x79
			MX7D_PAD_SD2_DATA1__UART4_DCE_TX	0x79
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
			MX7D_PAD_SD3_RESET_B__SD3_RESET_B	0x59
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_enet1_phy_interrupt: enet1phyinterruptgrp {
		fsl,phy = <
			MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2	0x08
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Device tree file for ZII's RPU2 board
 *
 * RPU - Remote Peripheral Unit
 *
 * Copyright (C) 2019 Zodiac Inflight Innovations
 */

/dts-v1/;
#include <dt-bindings/thermal/thermal.h>
#include "imx7d.dtsi"

/ {
	model = "ZII RPU2 Board";
	compatible = "zii,imx7d-rpu2", "fsl,imx7d";

	chosen {
		stdout-path = &uart2;
	};

	cs2000_ref: oscillator {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};

	cs2000_in_dummy: dummy-oscillator {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&pinctrl_leds_debug>;
		pinctrl-names = "default";

		led-debug {
			label = "zii:green:debug1";
			gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
			      <&adc2 1>;
	};

	reg_can1_stby: regulator-can1-stby {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_flexcan1_stby>;
		regulator-name = "can1-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_can2_stby: regulator-can2-stby {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_flexcan2_stby>;
		regulator-name = "can2-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_vref_1v8: regulator-vref-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vref-1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "GEN_3V3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_5p0v_main: regulator-5p0v-main {
		compatible = "regulator-fixed";
		regulator-name = "5V_MAIN";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	sound1 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "Audio Output 1";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound1_codec>;
		simple-audio-card,frame-master = <&sound1_codec>;
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack";
		simple-audio-card,routing =
			"Headphone Jack", "HPLEFT",
			"Headphone Jack", "HPRIGHT",
			"LEFTIN", "HPL",
			"RIGHTIN", "HPR";
		simple-audio-card,aux-devs = <&hpa1>;

		simple-audio-card,cpu {
			sound-dai = <&sai1>;
		};

		sound1_codec: simple-audio-card,codec {
			sound-dai = <&codec1>;
			clocks = <&cs2000>;
		};
	};

	sound2 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "Audio Output 2";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound2_codec>;
		simple-audio-card,frame-master = <&sound2_codec>;
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack";
		simple-audio-card,routing =
			"Headphone Jack", "HPLEFT",
			"Headphone Jack", "HPRIGHT",
			"LEFTIN", "HPL",
			"RIGHTIN", "HPR";
		simple-audio-card,aux-devs = <&hpa2>;

		simple-audio-card,cpu {
			sound-dai = <&sai2>;
		};

		sound2_codec: simple-audio-card,codec {
			sound-dai = <&codec2>;
			clocks = <&cs2000>;
		};
	};

	sound3 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "Audio Output 3";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound3_codec>;
		simple-audio-card,frame-master = <&sound3_codec>;
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack";
		simple-audio-card,routing =
			"Headphone Jack", "HPLEFT",
			"Headphone Jack", "HPRIGHT",
			"LEFTIN", "HPL",
			"RIGHTIN", "HPR";
		simple-audio-card,aux-devs = <&hpa3>;

		simple-audio-card,cpu {
			sound-dai = <&sai3>;
		};

		sound3_codec: simple-audio-card,codec {
			sound-dai = <&codec3>;
			clocks = <&cs2000>;
		};
	};
};

&adc1 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&adc2 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&cpu0 {
	cpu-supply = <&sw1a_reg>;
};

&clks {
	assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <884736000>;
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii";
	status = "okay";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};

	mdio1: mdio {
		#address-cells = <1>;
		#size-cells = <0>;
		status = "okay";

		switch: switch@0 {
			compatible = "marvell,mv88e6085";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_switch>;
			reg = <0>;
			eeprom-length = <512>;
			interrupt-parent = <&gpio1>;
			interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
			interrupt-controller;
			#interrupt-cells = <2>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					label = "eth_cu_1000_1";
				};

				port@1 {
					reg = <1>;
					label = "eth_cu_1000_2";
				};

				port@2 {
					reg = <2>;
					label = "pic";

					fixed-link {
						speed = <100>;
						full-duplex;
					};
				};

				port@5 {
					reg = <5>;
					label = "cpu";
					ethernet = <&fec1>;
					phy-mode = "rgmii-id";

					fixed-link {
						speed = <1000>;
						full-duplex;
					};
				};

				port@6 {
					reg = <6>;
					label = "gigabit_proc";
					ethernet = <&fec2>;
					phy-mode = "rgmii-id";

					fixed-link {
						speed = <1000>;
						full-duplex;
					};
				};
			};
		};
	};
};

&fec2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet2>;
	assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET2_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii";
	fsl,magic-packet;
	status = "okay";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&flexcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	xceiver-supply = <&reg_can1_stby>;
	status = "okay";
};

&flexcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	xceiver-supply = <&reg_can2_stby>;
	status = "okay";
};

&gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpio1>;

	gpio-line-names = "", "", "", "", "", "", "", "",
			  "", "",
			  "usb_1_en_b",
			  "usb_2_en_b",
			  "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "",
			  "", "", "", "";
};

&gpio2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpio2>;

	gpio-line-names = "12v_out_en_1",
			  "12v_out_en_2",
			  "12v_out_en_3",
			  "28v_out_en_5",
			  "28v_out_en_1",
			  "28v_out_en_2",
			  "28v_out_en_3",
			  "28v_out_en_4",
			  "", "",
			  "usb_3_en_b",
			  "usb_4_en_b",
			  "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "",
			  "", "", "", "";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pmic: pmic@8 {
		compatible = "fsl,pfuze3000";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
				regulator-always-on;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};

	cs2000: clkgen@4e {
		compatible = "cirrus,cs2000-cp";
		reg = <0x4e>;
		#clock-cells = <0>;
		clock-names = "clk_in", "ref_clk";
		clocks = <&cs2000_in_dummy>, <&cs2000_ref>;
		assigned-clocks = <&cs2000>;
		assigned-clock-rates = <24000000>;
	};

	eeprom@50 {
		compatible = "atmel,24c04";
		reg = <0x50>;
	};

	eeprom@52 {
		compatible = "atmel,24c04";
		reg = <0x52>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	codec2: codec@18 {
		compatible = "ti,tlv320dac3100";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_codec2>;
		reg = <0x18>;
		#sound-dai-cells = <0>;
		HPVDD-supply = <&reg_3p3v>;
		SPRVDD-supply = <&reg_3p3v>;
		SPLVDD-supply = <&reg_3p3v>;
		AVDD-supply = <&reg_3p3v>;
		IOVDD-supply = <&reg_3p3v>;
		DVDD-supply = <&vgen4_reg>;
		gpio-reset = <&gpio1 6 GPIO_ACTIVE_LOW>;
	};

	hpa2: amp@60 {
		compatible = "ti,tpa6130a2";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_tpa2>;
		reg = <0x60>;
		power-gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>;
		Vdd-supply = <&reg_5p0v_main>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	codec3: codec@18 {
		compatible = "ti,tlv320dac3100";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_codec3>;
		reg = <0x18>;
		#sound-dai-cells = <0>;
		HPVDD-supply = <&reg_3p3v>;
		SPRVDD-supply = <&reg_3p3v>;
		SPLVDD-supply = <&reg_3p3v>;
		AVDD-supply = <&reg_3p3v>;
		IOVDD-supply = <&reg_3p3v>;
		DVDD-supply = <&vgen4_reg>;
		gpio-reset = <&gpio1 7 GPIO_ACTIVE_LOW>;
	};

	hpa3: amp@60 {
		compatible = "ti,tpa6130a2";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_tpa3>;
		reg = <0x60>;
		power-gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>;
		Vdd-supply = <&reg_5p0v_main>;
	};
};

&i2c4 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";

	codec1: codec@18 {
		compatible = "ti,tlv320dac3100";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_codec1>;
		reg = <0x18>;
		#sound-dai-cells = <0>;
		HPVDD-supply = <&reg_3p3v>;
		SPRVDD-supply = <&reg_3p3v>;
		SPLVDD-supply = <&reg_3p3v>;
		AVDD-supply = <&reg_3p3v>;
		IOVDD-supply = <&reg_3p3v>;
		DVDD-supply = <&vgen4_reg>;
		gpio-reset = <&gpio1 5 GPIO_ACTIVE_LOW>;
	};

	hpa1: amp@60 {
		compatible = "ti,tpa6130a2";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_tpa1>;
		reg = <0x60>;
		power-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
		Vdd-supply = <&reg_5p0v_main>;
	};
};

&sai1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai1>;
	assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
			  <&clks IMX7D_SAI1_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <0>, <36864000>;
	status = "okay";
};

&sai2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai2>;
	assigned-clocks = <&clks IMX7D_SAI2_ROOT_SRC>,
			  <&clks IMX7D_SAI2_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <0>, <36864000>;
	status = "okay";
};

&sai3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai3>;
	assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>,
			  <&clks IMX7D_SAI3_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <0>, <36864000>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	status = "okay";

	rave-sp {
		compatible = "zii,rave-sp-rdu2";
		current-speed = <1000000>;
		#address-cells = <1>;
		#size-cells = <1>;

		watchdog {
			compatible = "zii,rave-sp-watchdog";
		};

		eeprom@a3 {
			compatible = "zii,rave-sp-eeprom";
			reg = <0xa3 0x4000>;
			#address-cells = <1>;
			#size-cells = <1>;
			zii,eeprom-name = "main-eeprom";
		};
	};
};

&usbotg1 {
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&usbotg2 {
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	bus-width = <4>;
	no-1-8-v;
	no-sdio;
	keep-power-in-suspend;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	no-1-8-v;
	non-removable;
	no-sdio;
	no-sd;
	keep-power-in-suspend;
	status = "okay";
};

&wdog1 {
	status = "disabled";
};

&snvs_rtc {
	status = "disabled";
};

&iomuxc {
	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK	0x2
			MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI	0x2
			MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO	0x2
			MX7D_PAD_ECSPI1_SS0__GPIO4_IO19         0x59
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_SD2_CD_B__ENET1_MDIO				0x3
			MX7D_PAD_SD2_WP__ENET1_MDC				0x3
			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC		0x1
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0		0x1
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1		0x1
			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2		0x1
			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3		0x1
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL		0x1
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC		0x1
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0		0x1
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1		0x1
			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2		0x1
			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3		0x1
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL		0x1
		>;
	};

	pinctrl_enet2: enet2grp {
		fsl,pins = <
			MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC			0x1
			MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0			0x1
			MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1			0x1
			MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2			0x1
			MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3			0x1
			MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL			0x1
			MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC			0x1
			MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0			0x1
			MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1			0x1
			MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2			0x1
			MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3			0x1
			MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL			0x1
			MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT		0x1
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX	0x59
			MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX	0x59
		>;
	};

	pinctrl_flexcan1_stby: flexcan1stbygrp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO08__GPIO1_IO8		0x59
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	0x59
			MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	0x59
		>;
	};

	pinctrl_flexcan2_stby: flexcan2stbygrp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO09__GPIO1_IO9		0x59
		>;
	};

	pinctrl_gpio1: gpio1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO10__GPIO1_IO10		0x00
			MX7D_PAD_GPIO1_IO11__GPIO1_IO11		0x00
		>;
	};

	pinctrl_gpio2: gpio2grp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA00__GPIO2_IO0		0x00
			MX7D_PAD_EPDC_DATA01__GPIO2_IO1		0x00
			MX7D_PAD_EPDC_DATA02__GPIO2_IO2		0x00
			MX7D_PAD_EPDC_DATA03__GPIO2_IO3		0x03
			MX7D_PAD_EPDC_DATA04__GPIO2_IO4		0x03
			MX7D_PAD_EPDC_DATA05__GPIO2_IO5		0x03
			MX7D_PAD_EPDC_DATA06__GPIO2_IO6		0x03
			MX7D_PAD_EPDC_DATA07__GPIO2_IO7		0x03
			MX7D_PAD_EPDC_DATA10__GPIO2_IO10	0x00
			MX7D_PAD_EPDC_DATA11__GPIO2_IO11	0x00
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f
			MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SDA__I2C2_SDA		0x4000007f
			MX7D_PAD_I2C2_SCL__I2C2_SCL		0x4000007f
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX7D_PAD_I2C3_SDA__I2C3_SDA		0x4000007f
			MX7D_PAD_I2C3_SCL__I2C3_SCL		0x4000007f
		>;
	};

	pinctrl_i2c3_gpio: i2c3gpiogrp {
		fsl,pins = <
			MX7D_PAD_I2C3_SDA__GPIO4_IO13		0x4000007f
			MX7D_PAD_I2C3_SCL__GPIO4_IO12		0x4000007f
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX7D_PAD_I2C4_SDA__I2C4_SDA		0x4000007f
			MX7D_PAD_I2C4_SCL__I2C4_SCL		0x4000007f
		>;
	};

	pinctrl_i2c4_gpio: i2c4gpiogrp {
		fsl,pins = <
			MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17	0x4000007f
			MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16	0x4000007f
		>;
	};

	pinctrl_leds_debug: debuggrp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA08__GPIO2_IO8		0x59
		>;
	};

	pinctrl_sai1: sai1grp {
		fsl,pins = <
			MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK	0x1f
			MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC	0x1f
			MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0	0x30
		>;
	};

	pinctrl_sai2: sai2grp {
		fsl,pins = <
			MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK	0x1f
			MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC	0x1f
			MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0	0x30
		>;
	};

	pinctrl_sai3: sai3grp {
		fsl,pins = <
			MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK	0x1f
			MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC	0x1f
			MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0	0x30
		>;
	};

	pinctrl_tpa1: tpa6130-1grp {
		fsl,pins = <
			MX7D_PAD_LCD_DATA21__GPIO3_IO26		0x40000038
		>;
	};

	pinctrl_tpa2: tpa6130-2grp {
		fsl,pins = <
			MX7D_PAD_LCD_DATA22__GPIO3_IO27		0x40000038
		>;
	};

	pinctrl_tpa3: tpa6130-3grp {
		fsl,pins = <
			MX7D_PAD_LCD_DATA23__GPIO3_IO28		0x40000038
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX	0x79
			MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX	0x79
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX7D_PAD_SD2_DATA0__UART4_DCE_RX	0x79
			MX7D_PAD_SD2_DATA1__UART4_DCE_TX	0x79
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
			MX7D_PAD_SD3_RESET_B__SD3_RESET_B	0x59
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_codec1: dac1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x40000038
		>;
	};

	pinctrl_codec2: dac2grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6	0x40000038
		>;
	};

	pinctrl_codec3: dac3grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7	0x40000038
		>;
	};

	pinctrl_switch: switchgrp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2	0x08
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2015 Freescale Semiconductor, Inc.
// Copyright 2016 Toradex AG

#include "imx7s.dtsi"
#include <dt-bindings/reset/imx7-reset.h>

/ {
	aliases {
		usb0 = &usbotg1;
		usb1 = &usbotg2;
		usb2 = &usbh;
	};

	cpus {
		cpu0: cpu@0 {
			clock-frequency = <996000000>;
			operating-points-v2 = <&cpu0_opp_table>;
			#cooling-cells = <2>;
			nvmem-cells = <&fuse_grade>;
			nvmem-cell-names = "speed_grade";
		};

		cpu1: cpu@1 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <1>;
			clock-frequency = <996000000>;
			operating-points-v2 = <&cpu0_opp_table>;
			#cooling-cells = <2>;
			cpu-idle-states = <&cpu_sleep_wait>;
		};
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupt-parent = <&intc>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
	};

	cpu0_opp_table: opp-table {
		compatible = "operating-points-v2";
		opp-shared;

		opp-792000000 {
			opp-hz = /bits/ 64 <792000000>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <150000>;
			opp-supported-hw = <0xd>, <0x7>;
			opp-suspend;
		};

		opp-996000000 {
			opp-hz = /bits/ 64 <996000000>;
			opp-microvolt = <1100000>;
			clock-latency-ns = <150000>;
			opp-supported-hw = <0xc>, <0x7>;
			opp-suspend;
		};

		opp-1200000000 {
			opp-hz = /bits/ 64 <1200000000>;
			opp-microvolt = <1225000>;
			clock-latency-ns = <150000>;
			opp-supported-hw = <0x8>, <0x3>;
			opp-suspend;
		};
	};

	usbphynop2: usbphynop2 {
		compatible = "usb-nop-xceiv";
		clocks = <&clks IMX7D_USB_PHY2_CLK>;
		clock-names = "main_clk";
		#phy-cells = <0>;
	};

	soc: soc {
		etm@3007d000 {
			compatible = "arm,coresight-etm3x", "arm,primecell";
			reg = <0x3007d000 0x1000>;

			/*
			 * System will hang if added nosmp in kernel command line
			 * without arm,primecell-periphid because amba bus try to
			 * read id and core1 power off at this time.
			 */
			arm,primecell-periphid = <0xbb956>;
			cpu = <&cpu1>;
			clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
			clock-names = "apb_pclk";

			out-ports {
				port {
					etm1_out_port: endpoint {
						remote-endpoint = <&ca_funnel_in_port1>;
					};
				};
			};
		};

		intc: interrupt-controller@31001000 {
			compatible = "arm,cortex-a7-gic";
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
			#interrupt-cells = <3>;
			interrupt-controller;
			interrupt-parent = <&intc>;
			reg = <0x31001000 0x1000>,
			      <0x31002000 0x2000>,
			      <0x31004000 0x2000>,
			      <0x31006000 0x2000>;
		};

		pcie: pcie@33800000 {
			compatible = "fsl,imx7d-pcie";
			reg = <0x33800000 0x4000>,
			      <0x4ff00000 0x80000>;
			reg-names = "dbi", "config";
			#address-cells = <3>;
			#size-cells = <2>;
			device_type = "pci";
			bus-range = <0x00 0xff>;
			ranges = <0x81000000 0 0          0x4ff80000 0 0x00010000>, /* downstream I/O */
				 <0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
			num-lanes = <1>;
			interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "msi";
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 0x7>;
			/*
			 * Reference manual lists pci irqs incorrectly
			 * Real hardware ordering is same as imx6: D+MSI, C, B, A
			 */
			interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
					<0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
					<0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
					<0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>,
				 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,
				 <&clks IMX7D_PCIE_PHY_ROOT_CLK>;
			clock-names = "pcie", "pcie_bus", "pcie_phy";
			assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>,
					  <&clks IMX7D_PCIE_PHY_ROOT_SRC>;
			assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>,
						 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;

			fsl,max-link-speed = <2>;
			power-domains = <&pgc_pcie_phy>;
			resets = <&src IMX7_RESET_PCIEPHY>,
				 <&src IMX7_RESET_PCIE_CTRL_APPS_EN>,
				 <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>;
			reset-names = "pciephy", "apps", "turnoff";
			fsl,imx7d-pcie-phy = <&pcie_phy>;
			status = "disabled";
		};
	};
};

&aips2 {
	pcie_phy: pcie-phy@306d0000 {
		  compatible = "fsl,imx7d-pcie-phy";
		  reg = <0x306d0000 0x10000>;
		  status = "disabled";
	};
};

&aips3 {
	usbotg2: usb@30b20000 {
		compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
		reg = <0x30b20000 0x200>;
		interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clks IMX7D_USB_CTRL_CLK>;
		fsl,usbphy = <&usbphynop2>;
		fsl,usbmisc = <&usbmisc2 0>;
		phy-clkgate-delay-us = <400>;
		status = "disabled";
	};

	usbmisc2: usbmisc@30b20200 {
		#index-cells = <1>;
		compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
		reg = <0x30b20200 0x200>;
	};

	fec2: ethernet@30bf0000 {
		compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
		reg = <0x30bf0000 0x10000>;
		interrupt-names = "int0", "int1", "int2", "pps";
		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clks IMX7D_ENET2_IPG_ROOT_CLK>,
			<&clks IMX7D_ENET_AXI_ROOT_CLK>,
			<&clks IMX7D_ENET2_TIME_ROOT_CLK>,
			<&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
			<&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
		clock-names = "ipg", "ahb", "ptp",
			"enet_clk_ref", "enet_out";
		fsl,num-tx-queues = <3>;
		fsl,num-rx-queues = <3>;
		fsl,stop-mode = <&gpr 0x10 4>;
		status = "disabled";
	};
};

&ca_funnel_in_ports {
	#address-cells = <1>;
	#size-cells = <0>;

	port@1 {
		reg = <1>;
		ca_funnel_in_port1: endpoint {
			remote-endpoint = <&etm1_out_port>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2017-2022 Toradex
 *
 */

/dts-v1/;
#include "imx7s-colibri.dtsi"
#include "imx7-colibri-aster.dtsi"

/ {
	model = "Toradex Colibri iMX7S on Aster Carrier Board";
	compatible = "toradex,colibri-imx7s-aster",
		     "toradex,colibri-imx7s",
		     "fsl,imx7s";
};

&ad7879_ts {
	status = "okay";
};

&atmel_mxt_ts {
	status = "okay";
};

&backlight {
	status = "okay";
};

&lcdif {
	status = "okay";
};

&panel_dpi {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2016-2022 Toradex
 */

/dts-v1/;
#include "imx7s-colibri.dtsi"
#include "imx7-colibri-eval-v3.dtsi"

/ {
	model = "Toradex Colibri iMX7S on Colibri Evaluation Board V3";
	compatible = "toradex,colibri-imx7s-eval-v3",
		     "toradex,colibri-imx7s",
		     "fsl,imx7s";
};

&ad7879_ts {
	status = "okay";
};

/*
 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
 */
&atmel_mxt_ts {
	status = "disabled";
};

&backlight {
	status = "okay";
};

&lcdif {
	status = "okay";
};

&panel_dpi {
	status = "okay";
};

/* Colibri PWM<B> */
&pwm2 {
	/* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
	status = "okay";
};

/* Colibri PWM<C> */
&pwm3 {
	/* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2022 Toradex
 */

/dts-v1/;
#include "imx7s-colibri.dtsi"
#include "imx7-colibri-iris-v2.dtsi"

/ {
	model = "Toradex Colibri iMX7S on Iris V2 Carrier Board";
	compatible = "toradex,colibri-imx7s-iris-v2",
		     "toradex,colibri-imx7s",
		     "fsl,imx7s";
};

&ad7879_ts {
	status = "okay";
};

&atmel_mxt_ts {
	status = "okay";
};

&backlight {
	status = "okay";
};

&gpio2 {
	/*
	 * This switches the LVDS transceiver to VESA color mapping mode.
	 */
	lvds-color-map-hog {
		gpio-hog;
		gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */
		line-name = "LVDS_COLOR_MAP";
		output-low;
	};
};

&gpio7 {
	/*
	 * This switches the LVDS transceiver to the 24-bit RGB mode.
	 */
	lvds-rgb-mode-hog {
		gpio-hog;
		gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */
		line-name = "LVDS_RGB_MODE";
		output-low;
	};

	/*
	 * This switches the LVDS transceiver to the single-channel
	 * output mode.
	 */
	lvds-ch-mode-hog {
		gpio-hog;
		gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */
		line-name = "LVDS_CH_MODE";
		output-high;
	};

	/* This turns the LVDS transceiver on */
	lvds-power-on-hog {
		gpio-hog;
		gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */
		line-name = "LVDS_POWER_ON";
		output-high;
	};
};

&lcdif {
	status = "okay";
};

&panel_dpi {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2022 Toradex
 */

/dts-v1/;
#include "imx7s-colibri.dtsi"
#include "imx7-colibri-iris.dtsi"

/ {
	model = "Toradex Colibri iMX7S on Iris Carrier Board";
	compatible = "toradex,colibri-imx7s-iris",
		     "toradex,colibri-imx7s",
		     "fsl,imx7s";
};

&ad7879_ts {
	status = "okay";
};

/*
 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
 */
&atmel_mxt_ts {
	status = "disabled";
};

&backlight {
	status = "okay";
};

&lcdif {
	status = "okay";
};

&panel_dpi {
	status = "okay";
};

/* Colibri PWM<B> */
&pwm2 {
	/* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
	status = "okay";
};

/* Colibri PWM<C> */
&pwm3 {
	/* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2016-2022 Toradex
 */

#include "imx7s.dtsi"
#include "imx7-colibri.dtsi"

/ {
	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>;
	};
};

/* NAND */
&gpmi {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Device Tree Source for TQ-Systems TQMa7S board on MBa7 carrier board.
 *
 * Copyright (C) 2016 TQ-Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
 */

/dts-v1/;

#include "imx7s-tqma7.dtsi"
#include "imx7-mba7.dtsi"

/ {
	model = "TQ-Systems TQMa7S board on MBa7 carrier board";
	compatible = "tq,imx7s-mba7", "tq,imx7s-tqma7", "fsl,imx7s";
};


code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Device Tree Include file for TQ-Systems TQMa7S board with NXP i.MX7Solo SoC.
 *
 * Copyright (C) 2016 TQ-Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
 */

#include "imx7s.dtsi"
#include "imx7-tqma7.dtsi"


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2016 NXP Semiconductors.
 * Author: Fabio Estevam <fabio.estevam@nxp.com>
 */

/dts-v1/;

#include <dt-bindings/input/input.h>
#include "imx7s.dtsi"

/ {
	model = "Element14 Warp i.MX7 Board";
	compatible = "element14,imx7s-warp", "fsl,imx7s";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&pinctrl_gpio>;
		autorepeat;

		back {
			label = "Back";
			gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
			linux,code = <KEY_BACK>;
			wakeup-source;
		};
	};

	reg_brcm: regulator-brcm {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_brcm_reg>;
		regulator-name = "brcm_reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <200000>;
	};

	reg_bt: regulator-bt {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_bt_reg>;
		enable-active-high;
		gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
		regulator-name = "bt_reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_peri_3p15v: regulator-peri-3p15v {
		compatible = "regulator-fixed";
		regulator-name = "peri_3p15v_reg";
		regulator-min-microvolt = <3150000>;
		regulator-max-microvolt = <3150000>;
		regulator-always-on;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "imx7-sgtl5000";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&dailink_master>;
		simple-audio-card,frame-master = <&dailink_master>;
		simple-audio-card,cpu {
			sound-dai = <&sai1>;
		};

		dailink_master: simple-audio-card,codec {
			sound-dai = <&codec>;
			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		};
	};
};

&clks {
	assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <884736000>;
};

&csi {
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pmic: pfuze3000@8 {
		compatible = "fsl,pfuze3000";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* use sw1c_reg to align with pfuze100/pfuze200 */
			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-boot-on;
				regulator-always-on;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	ov2680: camera@36 {
		compatible = "ovti,ov2680";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ov2680>;
		reg = <0x36>;
		clocks = <&osc>;
		clock-names = "xvclk";
		reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
		DOVDD-supply = <&sw2_reg>;
		DVDD-supply = <&sw2_reg>;
		AVDD-supply = <&reg_peri_3p15v>;

		port {
			ov2680_to_mipi: endpoint {
				remote-endpoint = <&mipi_from_sensor>;
				clock-lanes = <0>;
				data-lanes = <1>;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&i2c4 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";

	codec: sgtl5000@a {
		#sound-dai-cells = <0>;
		reg = <0x0a>;
		compatible = "fsl,sgtl5000";
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sai1_mclk>;
		VDDA-supply = <&vgen4_reg>;
		VDDIO-supply = <&vgen4_reg>;
		VDDD-supply = <&vgen2_reg>;
	};

	mpl3115@60 {
		compatible = "fsl,mpl3115";
		reg = <0x60>;
	};
};

&mipi_csi {
	clock-frequency = <166000000>;
	status = "okay";

	ports {
		port@0 {
			reg = <0>;

			mipi_from_sensor: endpoint {
				remote-endpoint = <&ov2680_to_mipi>;
				data-lanes = <1>;
			};
		};
	};
};

&sai1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai1>;
	assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
			  <&clks IMX7D_SAI1_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <0>, <36864000>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	status = "okay";
};

&uart3  {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	uart-has-rtscts;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	fsl,dte-mode;
	status = "okay";
};

&usbotg1 {
	dr_mode = "peripheral";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	bus-width = <4>;
	keep-power-in-suspend;
	no-1-8-v;
	non-removable;
	vmmc-supply = <&reg_brcm>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
	assigned-clock-rates = <400000000>;
	bus-width = <8>;
	no-1-8-v;
	fsl,tuning-step = <2>;
	non-removable;
	status = "okay";
};

&video_mux {
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&iomuxc {
	pinctrl_brcm_reg: brcmreggrp {
		fsl,pins = <
			MX7D_PAD_SD2_WP__GPIO5_IO10	0x14 /* WL_REG_ON */
		>;
	};

	pinctrl_bt_reg: btreggrp {
		fsl,pins = <
			MX7D_PAD_SD2_DATA3__GPIO5_IO17	0x14 /* BT_REG_ON */
		>;
	};

	pinctrl_gpio: gpiogrp {
		fsl,pins = <
			MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1	0x14
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f
			MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SDA__I2C2_SDA	0x4000007f
			MX7D_PAD_I2C2_SCL__I2C2_SCL	0x4000007f
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX7D_PAD_I2C3_SDA__I2C3_SDA	0x4000007f
			MX7D_PAD_I2C3_SCL__I2C3_SCL	0x4000007f
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX7D_PAD_I2C4_SCL__I2C4_SCL	0x4000007f
			MX7D_PAD_I2C4_SDA__I2C4_SDA	0x4000007f
		>;
	};

	pinctrl_ov2680: ov2660grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3	0x14
		>;
	};

	pinctrl_sai1: sai1grp {
		fsl,pins = <
			MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0	0x1f
			MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK	0x1f
			MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC	0x1f
			MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0	0x30
		>;
	};

	pinctrl_sai1_mclk: sai1mclkgrp {
		fsl,pins = <
			MX7D_PAD_SAI1_MCLK__SAI1_MCLK           0x1f
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79
			MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x79
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX	0x79
			MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX	0x79
			MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS	0x79
			MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS	0x79
		>;
	};

	pinctrl_uart6: uart6grp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX	0x79
			MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX	0x79
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD	0x59
			MX7D_PAD_SD1_CLK__SD1_CLK	0x19
			MX7D_PAD_SD1_DATA0__SD1_DATA0	0x59
			MX7D_PAD_SD1_DATA1__SD1_DATA1	0x59
			MX7D_PAD_SD1_DATA2__SD1_DATA2	0x59
			MX7D_PAD_SD1_DATA3__SD1_DATA3	0x59
			MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* WL_HOST_WAKE */
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
			MX7D_PAD_SD3_RESET_B__SD3_RESET_B	0x19
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x5a
			MX7D_PAD_SD3_CLK__SD3_CLK		0x1a
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5a
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5a
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5a
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5a
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5a
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5a
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5a
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5a
			MX7D_PAD_SD3_RESET_B__SD3_RESET_B	0x1a
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x5b
			MX7D_PAD_SD3_CLK__SD3_CLK		0x1b
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5b
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5b
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5b
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5b
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5b
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5b
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5b
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5b
			MX7D_PAD_SD3_RESET_B__SD3_RESET_B	0x1b
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B	0x74
		>;
	};
};