code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,lms397kf04.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung LMS397KF04 display panel

description: The datasheet claims this is based around a display controller
  named DB7430 with a separate backlight controller.

maintainers:
  - Linus Walleij <linus.walleij@linaro.org>

allOf:
  - $ref: panel-common.yaml#
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
  compatible:
    const: samsung,lms397kf04

  reg: true

  reset-gpios: true

  vci-supply:
    description: regulator that supplies the VCI analog voltage
      usually around 3.0 V

  vccio-supply:
    description: regulator that supplies the VCCIO voltage usually
      around 1.8 V

  backlight: true

  spi-cpha: true

  spi-cpol: true

  spi-max-frequency:
    description: inherited as a SPI client node, the datasheet specifies
      maximum 300 ns minimum cycle which gives around 3 MHz max frequency
    maximum: 3000000

  port: true

required:
  - compatible
  - reg
  - spi-cpha
  - spi-cpol
  - port

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    spi {
      compatible = "spi-gpio";
      sck-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
      miso-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
      mosi-gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
      cs-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
      num-chipselects = <1>;
      #address-cells = <1>;
      #size-cells = <0>;
      panel@0 {
        compatible = "samsung,lms397kf04";
        spi-max-frequency = <3000000>;
        spi-cpha;
        spi-cpol;
        reg = <0>;
        vci-supply = <&lcd_3v0_reg>;
        vccio-supply = <&lcd_1v8_reg>;
        reset-gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
        backlight = <&ktd259>;

        port {
          panel_in: endpoint {
            remote-endpoint = <&display_out>;
          };
        };
      };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,s6d16d0.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung S6D16D0 4" 864x480 AMOLED panel

maintainers:
  - Linus Walleij <linus.walleij@linaro.org>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: samsung,s6d16d0

  port: true
  reg: true
  reset-gpios: true

  vdd1-supply:
    description: I/O voltage supply

required:
  - compatible
  - reg
  - vdd1-supply
  - reset-gpios

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    dsi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel@0 {
            compatible = "samsung,s6d16d0";
            reg = <0>;
            vdd1-supply = <&foo>;
            reset-gpios = <&foo_gpio 0 GPIO_ACTIVE_LOW>;

            port {
                panel_in: endpoint {
                    remote-endpoint = <&dsi_out>;
                };
            };
        };
    };

...

repo_name: angery/linux


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,s6d27a1.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung S6D27A1 display panel

description: The S6D27A1 is a 480x800 DPI display panel from Samsung Mobile
  Displays (SMD).

maintainers:
  - Markuss Broks <markuss.broks@gmail.com>

allOf:
  - $ref: panel-common.yaml#
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
  compatible:
    const: samsung,s6d27a1

  reg: true

  interrupts:
    description: provides an optional ESD (electrostatic discharge)
      interrupt that signals abnormalities in the display hardware.
      This can also be raised for other reasons like erroneous
      configuration.
    maxItems: 1

  reset-gpios: true

  vci-supply:
    description: regulator that supplies the VCI analog voltage
      usually around 3.0 V

  vccio-supply:
    description: regulator that supplies the VCCIO voltage usually
      around 1.8 V

  backlight: true

  spi-cpha: true

  spi-cpol: true

  spi-max-frequency:
    maximum: 1200000

  port: true

required:
  - compatible
  - reg
  - vci-supply
  - vccio-supply
  - spi-cpha
  - spi-cpol
  - port

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    spi {
        compatible = "spi-gpio";
        sck-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
        miso-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
        mosi-gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
        cs-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
        num-chipselects = <1>;
        #address-cells = <1>;
        #size-cells = <0>;
        panel@0 {
            compatible = "samsung,s6d27a1";
            spi-max-frequency = <1200000>;
            spi-cpha;
            spi-cpol;
            reg = <0>;
            vci-supply = <&lcd_3v0_reg>;
            vccio-supply = <&lcd_1v8_reg>;
            reset-gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
            interrupt-parent = <&gpio>;
            interrupts = <5 IRQ_TYPE_EDGE_RISING>;

            port {
                panel_in: endpoint {
                    remote-endpoint = <&display_out>;
                };
            };
        };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,s6e63m0.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung s6e63m0 AMOLED LCD panel

maintainers:
  - Jonathan Bakker <xc-racer2@live.ca>

allOf:
  - $ref: panel-common.yaml#
  - $ref: /schemas/leds/backlight/common.yaml#
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
  compatible:
    const: samsung,s6e63m0

  reg: true
  reset-gpios: true
  port: true
  default-brightness: true
  max-brightness: true

  spi-3wire: true
  spi-cpha: true
  spi-cpol: true

  vdd3-supply:
    description: VDD regulator

  vci-supply:
    description: VCI regulator

required:
  - compatible
  - reset-gpios
  - vdd3-supply
  - vci-supply

unevaluatedProperties: false

examples:
  - |
    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        display@0 {
            compatible = "samsung,s6e63m0";
            reg = <0>;
            reset-gpios = <&mp05 5 1>;
            vdd3-supply = <&ldo12_reg>;
            vci-supply = <&ldo11_reg>;
            spi-max-frequency = <1200000>;

            port {
                lcd_ep: endpoint {
                    remote-endpoint = <&fimd_ep>;
                };
            };
        };
    };

...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,s6e88a0-ams452ef01.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung AMS452EF01 AMOLED panel with S6E88A0 video mode DSI controller

maintainers:
  - Michael Srba <Michael.Srba@seznam.cz>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: samsung,s6e88a0-ams452ef01
  reg: true
  reset-gpios: true
  vdd3-supply:
    description: core voltage supply
  vci-supply:
    description: voltage supply for analog circuits

required:
  - compatible
  - reg
  - vdd3-supply
  - vci-supply
  - reset-gpios

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    dsi {
            #address-cells = <1>;
            #size-cells = <0>;
            panel@0 {
                    reg = <0>;

                    compatible = "samsung,s6e88a0-ams452ef01";

                    vdd3-supply = <&pm8916_l17>;
                    vci-supply = <&reg_vlcd_vci>;
                    reset-gpios = <&msmgpio 25 GPIO_ACTIVE_HIGH>;
            };
    };


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/samsung,s6e8aa0.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung S6E8AA0 AMOLED LCD 5.3 inch panel

maintainers:
  - Andrzej Hajda <a.hajda@samsung.com>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: samsung,s6e8aa0

  reg: true
  reset-gpios: true
  display-timings: true

  vdd3-supply:
    description: core voltage supply

  vci-supply:
    description: voltage supply for analog circuits

  power-on-delay:
    description: delay after turning regulators on [ms]
    $ref: /schemas/types.yaml#/definitions/uint32

  reset-delay:
    description: delay after reset sequence [ms]
    $ref: /schemas/types.yaml#/definitions/uint32

  init-delay:
    description: delay after initialization sequence [ms]
    $ref: /schemas/types.yaml#/definitions/uint32

  panel-width-mm:
    description: physical panel width [mm]

  panel-height-mm:
    description: physical panel height [mm]

  flip-horizontal:
    description: boolean to flip image horizontally
    type: boolean

  flip-vertical:
    description: boolean to flip image vertically
    type: boolean

required:
  - compatible
  - reg
  - vdd3-supply
  - vci-supply
  - reset-gpios
  - display-timings

additionalProperties: false

examples:
  - |
    dsi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel@0 {
            compatible = "samsung,s6e8aa0";
            reg = <0>;
            vdd3-supply = <&vcclcd_reg>;
            vci-supply = <&vlcd_reg>;
            reset-gpios = <&gpy4 5 0>;
            power-on-delay= <50>;
            reset-delay = <100>;
            init-delay = <100>;
            panel-width-mm = <58>;
            panel-height-mm = <103>;
            flip-horizontal;
            flip-vertical;

            display-timings {
                timing0: timing-0 {
                    clock-frequency = <57153600>;
                    hactive = <720>;
                    vactive = <1280>;
                    hfront-porch = <5>;
                    hback-porch = <5>;
                    hsync-len = <5>;
                    vfront-porch = <13>;
                    vback-porch = <1>;
                    vsync-len = <2>;
                };
            };
        };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/seiko,43wvf1g.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480) TFT with Touch-Panel

maintainers:
  - Marco Franchi <marco.franchi@nxp.com>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: sii,43wvf1g

  backlight: true
  port: true

  dvdd-supply:
    description: 3v3 digital regulator

  avdd-supply:
    description: 5v analog regulator

required:
  - compatible
  - dvdd-supply
  - avdd-supply

additionalProperties: false

examples:
  - |
    panel {
        compatible = "sii,43wvf1g";

        backlight = <&backlight_display>;
        dvdd-supply = <&reg_lcd_3v3>;
        avdd-supply = <&reg_lcd_5v>;
        port {
            panel_in: endpoint {
                remote-endpoint = <&display_out>;
            };
        };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sgd,gktw70sdae4se.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Solomon Goldentek Display GKTW70SDAE4SE 7" WVGA LVDS Display Panel

maintainers:
  - Neil Armstrong <neil.armstrong@linaro.org>
  - Thierry Reding <thierry.reding@gmail.com>

allOf:
  - $ref: panel-common.yaml#
  - $ref: /schemas/display/lvds.yaml/#

select:
  properties:
    compatible:
      contains:
        const: sgd,gktw70sdae4se

  required:
    - compatible

properties:
  compatible:
    items:
      - const: sgd,gktw70sdae4se
      - const: panel-lvds

  data-mapping:
    const: jeida-18

  width-mm:
    const: 153

  height-mm:
    const: 86

  panel-timing: true
  port: true

additionalProperties: false

required:
  - compatible
  - port
  - data-mapping
  - width-mm
  - height-mm
  - panel-timing

examples:
  - |+
    panel {
      compatible = "sgd,gktw70sdae4se", "panel-lvds";

      width-mm = <153>;
      height-mm = <86>;

      data-mapping = "jeida-18";

      panel-timing {
        clock-frequency = <32000000>;
        hactive = <800>;
        vactive = <480>;
        hback-porch = <39>;
        hfront-porch = <39>;
        vback-porch = <29>;
        vfront-porch = <13>;
        hsync-len = <47>;
        vsync-len = <2>;
      };

      port {
        panel_in: endpoint {
          remote-endpoint = <&lvds_encoder>;
        };
      };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sharp,ld-d5116z01b.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sharp LD-D5116Z01B 12.3" WUXGA+ eDP panel

maintainers:
  - Jeffrey Hugo <jeffrey.l.hugo@gmail.com>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: sharp,ld-d5116z01b

  power-supply: true
  backlight: true
  port: true
  no-hpd: true

additionalProperties: false

required:
  - compatible
  - power-supply

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sharp,lq101r1sx01.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sharp Microelectronics 10.1" WQXGA TFT LCD panel

maintainers:
  - Thierry Reding <treding@nvidia.com>

description: |
  This panel requires a dual-channel DSI host to operate. It supports two modes:
  - left-right: each channel drives the left or right half of the screen
  - even-odd: each channel drives the even or odd lines of the screen

  Each of the DSI channels controls a separate DSI peripheral. The peripheral
  driven by the first link (DSI-LINK1), left or even, is considered the primary
  peripheral and controls the device. The 'link2' property contains a phandle
  to the peripheral driven by the second link (DSI-LINK2, right or odd).

  Note that in video mode the DSI-LINK1 interface always provides the left/even
  pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
  is possible to program either link to drive the left/even or right/odd pixels
  but for the sake of consistency this binding assumes that the same assignment
  is chosen as for video mode.

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    oneOf:
      - items:
          - const: sharp,lq101r1sx03
          - const: sharp,lq101r1sx01
      - items:
          - const: sharp,lq101r1sx01

  reg: true
  power-supply: true
  backlight: true

  link2:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: |
      phandle to the DSI peripheral on the secondary link. Note that the
      presence of this property marks the containing node as DSI-LINK1

required:
  - compatible
  - reg

if:
  required:
    - link2
then:
  required:
    - power-supply

additionalProperties: false

examples:
  - |
    dsi0: dsi@fd922800 {
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0xfd922800 0x200>;

        panel: panel@0 {
            compatible = "sharp,lq101r1sx01";
            reg = <0>;

            link2 = <&secondary>;

            power-supply = <&power>;
            backlight = <&backlight>;
        };
    };

    dsi1: dsi@fd922a00 {
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0xfd922a00 0x200>;

        secondary: panel@0 {
            compatible = "sharp,lq101r1sx01";
            reg = <0>;
        };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sharp,lq150x1lg11.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sharp 15" LQ150X1LG11 XGA TFT LCD panel

maintainers:
  - Peter Rosin <peda@axentia.se>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: sharp,lq150x1lg11

  power-supply: true
  backlight: true

  rlud-gpios:
    maxItems: 1
    description: |
      GPIO for the RL/UD (rotate 180 degrees) pin.
      If rlud-gpios and/or sellvds-gpios are not specified,
      the RL/UD and/or SELLVDS pins are assumed to be handled
      appropriately by the hardware.

  sellvds-gpios:
    maxItems: 1
    description: |
      GPIO for the SELLVDS pin.
      If rlud-gpios and/or sellvds-gpios are not specified,
      the RL/UD and/or SELLVDS pins are assumed to be handled
      appropriately by the hardware.

required:
  - compatible
  - power-supply

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    panel {
        compatible = "sharp,lq150x1lg11";

        power-supply = <&vcc_3v3_reg>;               /* VCC */

        backlight = <&backlight>;
        rlud-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;    /* RL/UD */
        sellvds-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; /* SELLVDS */
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sharp,ls037v7dw01.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: SHARP LS037V7DW01 TFT-LCD panel

description: |
  This panel can have zero to five GPIOs to configure to change configuration
  between QVGA and VGA mode and the scan direction. As these pins can be also
  configured with external pulls, all the GPIOs are considered optional with holes
  in the array.

maintainers:
  - Tony Lindgren <tony@atomide.com>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: sharp,ls037v7dw01

  label: true
  enable-gpios: true
  reset-gpios: true
  port: true
  power-supply: true

  mode-gpios:
    minItems: 1
    maxItems: 3
    description: |
      GPIO ordered MO, LR, and UD as specified in LS037V7DW01.pdf
      This panel can have zero to three GPIOs to configure to
      change configuration between QVGA and VGA mode and the
      scan direction. As these pins can be also configured
      with external pulls, all the GPIOs are considered
      optional with holes in the array.

required:
  - compatible
  - port

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    lcd0: display {
        compatible = "sharp,ls037v7dw01";
        power-supply = <&lcd_3v3>;
        enable-gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;    /* gpio152, lcd INI */
        reset-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;     /* gpio155, lcd RESB */
        mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH        /* gpio154, lcd MO */
                      &gpio1 2 GPIO_ACTIVE_HIGH         /* gpio2, lcd LR */
                      &gpio1 3 GPIO_ACTIVE_HIGH>;       /* gpio3, lcd UD */

        port {
            lcd_in: endpoint {
                remote-endpoint = <&dpi_out>;
            };
        };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sharp,ls043t1le01.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sharp Microelectronics 4.3" qHD TFT LCD panel

maintainers:
  - Werner Johansson <werner.johansson@sonymobile.com>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: sharp,ls043t1le01-qhd

  reg: true
  backlight: true
  reset-gpios: true
  port: true

  avdd-supply:
    description: handle of the regulator that provides the supply voltage

required:
  - compatible
  - reg
  - avdd-supply

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    dsi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel@0 {
            compatible = "sharp,ls043t1le01-qhd";
            reg = <0>;
            avdd-supply = <&pm8941_l22>;
            backlight = <&pm8941_wled>;
            reset-gpios = <&pm8941_gpios 19 GPIO_ACTIVE_HIGH>;
        };
    };

...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sharp,ls060t1sx01.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sharp Microelectronics 6.0" FullHD TFT LCD panel

maintainers:
  - Dmitry Baryskov <dmitry.baryshkov@linaro.org>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: sharp,ls060t1sx01

  reg: true
  backlight: true
  reset-gpios: true
  port: true

  avdd-supply:
    description: handle of the regulator that provides the positive supply voltage
  avee-supply:
    description: handle of the regulator that provides the negative supply voltage
  vddi-supply:
    description: handle of the regulator that provides the I/O supply voltage
  vddh-supply:
    description: handle of the regulator that provides the analog supply voltage

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    dsi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel@0 {
            compatible = "sharp,ls060t1sx01";
            reg = <0>;
            avdd-supply = <&pm8941_l22>;
            backlight = <&backlight>;
            reset-gpios = <&pm8916_gpios 25 GPIO_ACTIVE_LOW>;
        };
    };

...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sitronix,st7701.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sitronix ST7701 based LCD panels

maintainers:
  - Jagan Teki <jagan@amarulasolutions.com>

description: |
  ST7701 designed for small and medium sizes of TFT LCD display, is
  capable of supporting up to 480RGBX864 in resolution. It provides
  several system interfaces like MIPI/RGB/SPI.

  Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has
  inbuilt ST7701 chip.

  Densitron DMT028VGHMCMI-1A is 480x640, 2-lane MIPI DSI LCD panel
  which has built-in ST7701 chip.

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    items:
      - enum:
          - densitron,dmt028vghmcmi-1a
          - techstar,ts8550b
      - const: sitronix,st7701

  reg:
    description: DSI virtual channel used by that screen
    maxItems: 1

  VCC-supply:
    description: analog regulator for MIPI circuit

  IOVCC-supply:
    description: I/O system regulator

  reset-gpios: true

  backlight: true

required:
  - compatible
  - reg
  - VCC-supply
  - IOVCC-supply
  - reset-gpios

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    dsi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel@0 {
            compatible = "techstar,ts8550b", "sitronix,st7701";
            reg = <0>;
            VCC-supply = <&reg_dldo2>;
            IOVCC-supply = <&reg_dldo2>;
            reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
            backlight = <&backlight>;
        };
    };


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sitronix,st7789v.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sitronix ST7789V RGB panel with SPI control bus

maintainers:
  - Maxime Ripard <mripard@kernel.org>

allOf:
  - $ref: panel-common.yaml#
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
  compatible:
    const: sitronix,st7789v

  reg: true
  reset-gpios: true
  power-supply: true
  backlight: true
  port: true

  spi-cpha: true
  spi-cpol: true

required:
  - compatible
  - reg
  - reset-gpios
  - power-supply

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel@0 {
            compatible = "sitronix,st7789v";
            reg = <0>;
            reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>;
            backlight = <&pwm_bl>;
            power-supply = <&power>;
            spi-max-frequency = <100000>;
            spi-cpol;
            spi-cpha;

            port {
                panel_input: endpoint {
                    remote-endpoint = <&tcon0_out_panel>;
                };
            };
        };
    };

...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sony,acx424akp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sony ACX424AKP/ACX424AKM 4" 480x864/480x854 AMOLED panel

description: The Sony ACX424AKP and ACX424AKM are panels built around
  the Novatek NT35560 display controller. The only difference is that
  the AKM is configured to use 10 pixels less in the Y axis than the
  AKP.

maintainers:
  - Linus Walleij <linus.walleij@linaro.org>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    enum:
      - sony,acx424akp
      - sony,acx424akm
  reg: true
  reset-gpios: true
  vddi-supply:
    description: regulator that supplies the vddi voltage
  enforce-video-mode: true

required:
  - compatible
  - reg
  - reset-gpios

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    dsi-controller@a0351000 {
        compatible = "ste,mcde-dsi";
        reg = <0xa0351000 0x1000>;
        #address-cells = <1>;
        #size-cells = <0>;

        panel@0 {
            compatible = "sony,acx424akp";
            reg = <0>;
            vddi-supply = <&foo>;
            reset-gpios = <&foo_gpio 0 GPIO_ACTIVE_LOW>;
        };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sony,acx565akm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sony ACX565AKM SDI Panel

maintainers:
  - Tomi Valkeinen <tomi.valkeinen@ti.com>

allOf:
  - $ref: panel-common.yaml#
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
  compatible:
    const: sony,acx565akm

  label: true
  reset-gpios: true
  port: true

required:
  - compatible
  - port

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel@2 {
            compatible = "sony,acx565akm";
            spi-max-frequency = <6000000>;
            reg = <2>;

            label = "lcd";
            reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */

            port {
                lcd_in: endpoint {
                    remote-endpoint = <&sdi_out>;
                };
            };
        };
    };

...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/sony,tulip-truly-nt35521.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sony Tulip Truly NT35521 5.24" 1280x720 MIPI-DSI Panel

maintainers:
  - Shawn Guo <shawn.guo@linaro.org>

description: |
  The Sony Tulip Truly NT35521 is a 5.24" 1280x720 MIPI-DSI panel, which
  can be found no Sony Xperia M4 phone.  The panel backlight is managed
  through DSI link.

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: sony,tulip-truly-nt35521

  reg: true

  positive5-supply:
    description: Positive 5V supply

  negative5-supply:
    description: Negative 5V supply

  reset-gpios: true

  enable-gpios: true

  port: true

required:
  - compatible
  - reg
  - positive5-supply
  - negative5-supply
  - reset-gpios
  - enable-gpios
  - port

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    dsi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel@0 {
            compatible = "sony,tulip-truly-nt35521";
            reg = <0>;
            positive5-supply = <&positive5_reg>;
            negative5-supply = <&negative5_reg>;
            reset-gpios = <&msmgpio 25 GPIO_ACTIVE_LOW>;
            enable-gpios = <&msmgpio 10 GPIO_ACTIVE_HIGH>;

            port {
                panel_in: endpoint {
                    remote-endpoint = <&dsi0_out>;
                };
            };
        };
    };
...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/startek,startek-kd050c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Startek Electronic Technology Co. KD050C 5.0" WVGA TFT LCD panel

maintainers:
  - Nikita Kiryanov <nikita@compulab.co.il>

allOf:
  - $ref: panel-dpi.yaml#

properties:
  compatible:
    items:
      - const: startek,startek-kd050c
      - {} # panel-dpi, but not listed here to avoid false select

  backlight: true
  enable-gpios: true
  height-mm: true
  label: true
  panel-timing: true
  port: true
  power-supply: true
  reset-gpios: true
  width-mm: true

additionalProperties: false

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/tfc,s9700rtwv43tr-01b.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TFC S9700RTWV43TR-01B 7" Three Five Corp 800x480 LCD panel with resistive touch

maintainers:
  - Jyri Sarha <jsarha@ti.com>
  - Thierry Reding <thierry.reding@gmail.com>

description: |+
  The panel is found on TI AM335x-evm.

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: tfc,s9700rtwv43tr-01b

  enable-gpios: true
  backlight: true
  port: true

additionalProperties: false

required:
  - compatible
  - power-supply

...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/ti,nspire.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments NSPIRE Display Panels

maintainers:
  - Linus Walleij <linus.walleij@linaro.org>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    enum:
      - ti,nspire-cx-lcd-panel
      - ti,nspire-classic-lcd-panel
  port: true

required:
  - compatible

additionalProperties: false

examples:
  - |
    panel {
        compatible = "ti,nspire-cx-lcd-panel";
        port {
            panel_in: endpoint {
                remote-endpoint = <&pads>;
            };
        };
    };


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/tpo,td.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Toppoly TD Panels

maintainers:
  - Marek Belisko <marek@goldelico.com>
  - H. Nikolaus Schaller <hns@goldelico.com>

allOf:
  - $ref: panel-common.yaml#
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
  compatible:
    enum:
        # Toppoly TD028TTEC1 Panel
      - tpo,td028ttec1
        # Toppoly TD043MTEA1 Panel
      - tpo,td043mtea1

  reg: true
  label: true
  reset-gpios: true
  backlight: true
  port: true

  spi-cpha: true
  spi-cpol: true

required:
  - compatible
  - port

unevaluatedProperties: false

examples:
  - |
    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel: panel@0 {
            compatible = "tpo,td043mtea1";
            reg = <0>;
            spi-max-frequency = <100000>;
            spi-cpol;
            spi-cpha;

            label = "lcd";

            reset-gpios = <&gpio7 7 0>;

            port {
                lcd_in: endpoint {
                    remote-endpoint = <&dpi_out>;
                };
            };
        };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/tpo,tpg110.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TPO TPG110 Panel

maintainers:
  - Linus Walleij <linus.walleij@linaro.org>
  - Thierry Reding <thierry.reding@gmail.com>

description: |+
  This panel driver is a component that acts as an intermediary
  between an RGB output and a variety of panels. The panel
  driver is strapped up in electronics to the desired resolution
  and other properties, and has a control interface over 3WIRE
  SPI. By talking to the TPG110 over SPI, the strapped properties
  can be discovered and the hardware is therefore mostly
  self-describing.

         +--------+
  SPI -> |  TPO   | -> physical display
  RGB -> | TPG110 |
         +--------+

  If some electrical strap or alternate resolution is desired,
  this can be set up by taking software control of the display
  over the SPI interface. The interface can also adjust
  for properties of the display such as gamma correction and
  certain electrical driving levels.

  The TPG110 does not know the physical dimensions of the panel
  connected, so this needs to be specified in the device tree.

  It requires a GPIO line for control of its reset line.

  The serial protocol has line names that resemble I2C but the
  protocol is not I2C but 3WIRE SPI.

allOf:
  - $ref: panel-common.yaml#
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - ste,nomadik-nhk15-display
          - const: tpo,tpg110
      - const: tpo,tpg110

  reg: true

  grestb-gpios:
    maxItems: 1
    description: panel reset GPIO

  spi-3wire: true

  spi-max-frequency:
    const: 3000000

required:
  - compatible
  - reg
  - grestb-gpios
  - width-mm
  - height-mm
  - spi-3wire
  - spi-max-frequency
  - port

unevaluatedProperties: false

examples:
  - |+
    spi {
      #address-cells = <1>;
      #size-cells = <0>;

      panel: display@0 {
        compatible = "tpo,tpg110";
        reg = <0>;
        spi-3wire;
        /* 320 ns min period ~= 3 MHz */
        spi-max-frequency = <3000000>;
        /* Width and height from data sheet */
        width-mm = <116>;
        height-mm = <87>;
        grestb-gpios = <&foo_gpio 5 1>;
        backlight = <&bl>;

        port {
          nomadik_clcd_panel: endpoint {
            remote-endpoint = <&foo>;
          };
        };
      };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/visionox,rm69299.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Visionox model RM69299 Panels Device Tree Bindings.

maintainers:
  - Harigovindan P <harigovi@codeaurora.org>

description: |
  This binding is for display panels using a Visionox RM692999 panel.

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: visionox,rm69299-1080p-display

  vdda-supply:
    description: |
      Phandle of the regulator that provides the vdda supply voltage.

  vdd3p3-supply:
    description: |
      Phandle of the regulator that provides the vdd3p3 supply voltage.

  port: true
  reset-gpios: true

additionalProperties: false

required:
  - compatible
  - vdda-supply
  - vdd3p3-supply
  - reset-gpios
  - port

examples:
  - |
    panel {
        compatible = "visionox,rm69299-1080p-display";

        vdda-supply = <&src_pp1800_l8c>;
        vdd3p3-supply = <&src_pp2800_l18a>;

        reset-gpios = <&pm6150l_gpio 3 0>;
        port {
            panel0_in: endpoint {
                remote-endpoint = <&dsi0_out>;
            };
        };
    };
...


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/xinpeng,xpp055c272.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Xinpeng XPP055C272 5.5in 720x1280 DSI panel

maintainers:
  - Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    const: xinpeng,xpp055c272
  reg: true
  backlight: true
  reset-gpios: true
  iovcc-supply:
    description: regulator that supplies the iovcc voltage
  vci-supply:
    description: regulator that supplies the vci voltage

required:
  - compatible
  - reg
  - backlight
  - iovcc-supply
  - vci-supply

additionalProperties: false

examples:
  - |
    dsi {
        #address-cells = <1>;
        #size-cells = <0>;

        panel@0 {
            compatible = "xinpeng,xpp055c272";
            reg = <0>;
            backlight = <&backlight>;
            iovcc-supply = <&vcc_1v8>;
            vci-supply = <&vcc3v3_lcd>;
        };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/renesas,cmm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas R-Car Color Management Module (CMM)

maintainers:
  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
  - Jacopo Mondi <jacopo+renesas@jmondi.org>

description: |+
  Renesas R-Car color management module connected to R-Car DU video channels.
  It provides image enhancement functions such as 1-D look-up tables (LUT),
  3-D look-up tables (CLU), 1D-histogram generation (HGO), and color
  space conversion (CSC).

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - renesas,r8a7795-cmm
              - renesas,r8a7796-cmm
              - renesas,r8a77965-cmm
              - renesas,r8a77990-cmm
              - renesas,r8a77995-cmm
          - const: renesas,rcar-gen3-cmm
      - items:
          - const: renesas,rcar-gen2-cmm

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  resets:
    maxItems: 1

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - clocks
  - resets
  - power-domains

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
    #include <dt-bindings/power/r8a7796-sysc.h>

    cmm0: cmm@fea40000 {
         compatible = "renesas,r8a7796-cmm",
                      "renesas,rcar-gen3-cmm";
         reg = <0xfea40000 0x1000>;
         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
         clocks = <&cpg CPG_MOD 711>;
         resets = <&cpg 711>;
    };


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/renesas,du.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas R-Car Display Unit (DU)

maintainers:
  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

description: |
  These DT bindings describe the Display Unit embedded in the Renesas R-Car
  Gen1, R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.

properties:
  compatible:
    enum:
      - renesas,du-r8a7742 # for RZ/G1H compatible DU
      - renesas,du-r8a7743 # for RZ/G1M compatible DU
      - renesas,du-r8a7744 # for RZ/G1N compatible DU
      - renesas,du-r8a7745 # for RZ/G1E compatible DU
      - renesas,du-r8a77470 # for RZ/G1C compatible DU
      - renesas,du-r8a774a1 # for RZ/G2M compatible DU
      - renesas,du-r8a774b1 # for RZ/G2N compatible DU
      - renesas,du-r8a774c0 # for RZ/G2E compatible DU
      - renesas,du-r8a774e1 # for RZ/G2H compatible DU
      - renesas,du-r8a7779 # for R-Car H1 compatible DU
      - renesas,du-r8a7790 # for R-Car H2 compatible DU
      - renesas,du-r8a7791 # for R-Car M2-W compatible DU
      - renesas,du-r8a7792 # for R-Car V2H compatible DU
      - renesas,du-r8a7793 # for R-Car M2-N compatible DU
      - renesas,du-r8a7794 # for R-Car E2 compatible DU
      - renesas,du-r8a7795 # for R-Car H3 compatible DU
      - renesas,du-r8a7796 # for R-Car M3-W compatible DU
      - renesas,du-r8a77961 # for R-Car M3-W+ compatible DU
      - renesas,du-r8a77965 # for R-Car M3-N compatible DU
      - renesas,du-r8a77970 # for R-Car V3M compatible DU
      - renesas,du-r8a77980 # for R-Car V3H compatible DU
      - renesas,du-r8a77990 # for R-Car E3 compatible DU
      - renesas,du-r8a77995 # for R-Car D3 compatible DU
      - renesas,du-r8a779a0 # for R-Car V3U compatible DU

  reg:
    maxItems: 1

  # See compatible-specific constraints below.
  clocks: true
  clock-names: true
  interrupts:
    description: Interrupt specifiers, one per DU channel
  resets: true
  reset-names: true

  power-domains:
    maxItems: 1

  ports:
    $ref: /schemas/graph.yaml#/properties/ports
    description: |
      The connections to the DU output video ports are modeled using the OF
      graph bindings specified in Documentation/devicetree/bindings/graph.txt.
      The number of ports and their assignment are model-dependent. Each port
      shall have a single endpoint.

    patternProperties:
      "^port@[0-3]$":
        $ref: /schemas/graph.yaml#/properties/port
        unevaluatedProperties: false

    required:
      - port@0
      - port@1

    unevaluatedProperties: false

  renesas,cmms:
    $ref: "/schemas/types.yaml#/definitions/phandle-array"
    items:
      maxItems: 1
    description:
      A list of phandles to the CMM instances present in the SoC, one for each
      available DU channel.

  renesas,vsps:
    $ref: "/schemas/types.yaml#/definitions/phandle-array"
    items:
      items:
        - description: phandle to VSP instance that serves the DU channel
        - description: Channel index identifying the LIF instance in that VSP
    description:
      A list of phandle and channel index tuples to the VSPs that handle the
      memory interfaces for the DU channels.

required:
  - compatible
  - reg
  - clocks
  - interrupts
  - ports

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: renesas,du-r8a7779
    then:
      properties:
        clocks:
          minItems: 1
          items:
            - description: Functional clock
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock

        clock-names:
          minItems: 1
          items:
            - const: du.0
            - pattern: '^dclkin\.[01]$'
            - pattern: '^dclkin\.[01]$'

        interrupts:
          maxItems: 1

        resets:
          maxItems: 1

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: DPAD 1
            # port@2 is TCON, not supported yet
            port@2: false
            port@3: false

          required:
            - port@0
            - port@1

      required:
        - interrupts

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a7743
              - renesas,du-r8a7744
              - renesas,du-r8a7791
              - renesas,du-r8a7793
    then:
      properties:
        clocks:
          minItems: 2
          items:
            - description: Functional clock for DU0
            - description: Functional clock for DU1
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock

        clock-names:
          minItems: 2
          items:
            - const: du.0
            - const: du.1
            - pattern: '^dclkin\.[01]$'
            - pattern: '^dclkin\.[01]$'

        interrupts:
          maxItems: 2

        resets:
          maxItems: 1

        reset-names:
          items:
            - const: du.0

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: LVDS 0
            # port@2 is TCON, not supported yet
            port@2: false
            port@3: false

          required:
            - port@0
            - port@1

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a7745
              - renesas,du-r8a7792
    then:
      properties:
        clocks:
          minItems: 2
          items:
            - description: Functional clock for DU0
            - description: Functional clock for DU1
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock

        clock-names:
          minItems: 2
          items:
            - const: du.0
            - const: du.1
            - pattern: '^dclkin\.[01]$'
            - pattern: '^dclkin\.[01]$'

        interrupts:
          maxItems: 2

        resets:
          maxItems: 1

        reset-names:
          items:
            - const: du.0

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: DPAD 1
            port@2: false
            port@3: false

          required:
            - port@0
            - port@1

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a7794
    then:
      properties:
        clocks:
          minItems: 2
          items:
            - description: Functional clock for DU0
            - description: Functional clock for DU1
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock

        clock-names:
          minItems: 2
          items:
            - const: du.0
            - const: du.1
            - pattern: '^dclkin\.[01]$'
            - pattern: '^dclkin\.[01]$'

        interrupts:
          maxItems: 2

        resets:
          maxItems: 1

        reset-names:
          items:
            - const: du.0

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: DPAD 1
            # port@2 is TCON, not supported yet
            port@2: false
            port@3: false

          required:
            - port@0
            - port@1

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a77470
    then:
      properties:
        clocks:
          minItems: 2
          items:
            - description: Functional clock for DU0
            - description: Functional clock for DU1
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock

        clock-names:
          minItems: 2
          items:
            - const: du.0
            - const: du.1
            - pattern: '^dclkin\.[01]$'
            - pattern: '^dclkin\.[01]$'

        interrupts:
          maxItems: 2

        resets:
          maxItems: 1

        reset-names:
          items:
            - const: du.0

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: DPAD 1
            port@2:
              description: LVDS 0
            # port@3 is DVENC, not supported yet
            port@3: false

          required:
            - port@0
            - port@1
            - port@2

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a7742
              - renesas,du-r8a7790
    then:
      properties:
        clocks:
          minItems: 3
          items:
            - description: Functional clock for DU0
            - description: Functional clock for DU1
            - description: Functional clock for DU2
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock
            - description: DU_DOTCLKIN2 input clock

        clock-names:
          minItems: 3
          items:
            - const: du.0
            - const: du.1
            - const: du.2
            - pattern: '^dclkin\.[012]$'
            - pattern: '^dclkin\.[012]$'
            - pattern: '^dclkin\.[012]$'

        interrupts:
          maxItems: 3

        resets:
          maxItems: 1

        reset-names:
          items:
            - const: du.0

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: LVDS 0
            port@2:
              description: LVDS 1
            # port@3 is TCON, not supported yet
            port@3: false

          required:
            - port@0
            - port@1
            - port@2

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a7795
    then:
      properties:
        clocks:
          minItems: 4
          items:
            - description: Functional clock for DU0
            - description: Functional clock for DU1
            - description: Functional clock for DU2
            - description: Functional clock for DU4
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock
            - description: DU_DOTCLKIN2 input clock
            - description: DU_DOTCLKIN3 input clock

        clock-names:
          minItems: 4
          items:
            - const: du.0
            - const: du.1
            - const: du.2
            - const: du.3
            - pattern: '^dclkin\.[0123]$'
            - pattern: '^dclkin\.[0123]$'
            - pattern: '^dclkin\.[0123]$'
            - pattern: '^dclkin\.[0123]$'

        interrupts:
          maxItems: 4

        resets:
          maxItems: 2

        reset-names:
          items:
            - const: du.0
            - const: du.2

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: HDMI 0
            port@2:
              description: HDMI 1
            port@3:
              description: LVDS 0

          required:
            - port@0
            - port@1
            - port@2
            - port@3

        renesas,cmms:
          minItems: 4

        renesas,vsps:
          minItems: 4

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names
        - renesas,vsps

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a774a1
              - renesas,du-r8a7796
              - renesas,du-r8a77961
    then:
      properties:
        clocks:
          minItems: 3
          items:
            - description: Functional clock for DU0
            - description: Functional clock for DU1
            - description: Functional clock for DU2
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock
            - description: DU_DOTCLKIN2 input clock

        clock-names:
          minItems: 3
          items:
            - const: du.0
            - const: du.1
            - const: du.2
            - pattern: '^dclkin\.[012]$'
            - pattern: '^dclkin\.[012]$'
            - pattern: '^dclkin\.[012]$'

        interrupts:
          maxItems: 3

        resets:
          maxItems: 2

        reset-names:
          items:
            - const: du.0
            - const: du.2

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: HDMI 0
            port@2:
              description: LVDS 0
            port@3: false

          required:
            - port@0
            - port@1
            - port@2

        renesas,cmms:
          minItems: 3

        renesas,vsps:
          minItems: 3

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names
        - renesas,vsps

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a774b1
              - renesas,du-r8a774e1
              - renesas,du-r8a77965
    then:
      properties:
        clocks:
          minItems: 3
          items:
            - description: Functional clock for DU0
            - description: Functional clock for DU1
            - description: Functional clock for DU3
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock
            - description: DU_DOTCLKIN3 input clock

        clock-names:
          minItems: 3
          items:
            - const: du.0
            - const: du.1
            - const: du.3
            - pattern: '^dclkin\.[013]$'
            - pattern: '^dclkin\.[013]$'
            - pattern: '^dclkin\.[013]$'

        interrupts:
          maxItems: 3

        resets:
          maxItems: 2

        reset-names:
          items:
            - const: du.0
            - const: du.3

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: HDMI 0
            port@2:
              description: LVDS 0
            port@3: false

          required:
            - port@0
            - port@1
            - port@2

        renesas,cmms:
          minItems: 3

        renesas,vsps:
          minItems: 3

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names
        - renesas,vsps

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a77970
              - renesas,du-r8a77980
    then:
      properties:
        clocks:
          minItems: 1
          items:
            - description: Functional clock for DU0
            - description: DU_DOTCLKIN0 input clock

        clock-names:
          minItems: 1
          items:
            - const: du.0
            - const: dclkin.0

        interrupts:
          maxItems: 1

        resets:
          maxItems: 1

        reset-names:
          items:
            - const: du.0

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: LVDS 0
            port@2: false
            port@3: false

          required:
            - port@0
            - port@1

        renesas,vsps:
          minItems: 1

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names
        - renesas,vsps

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a774c0
              - renesas,du-r8a77990
              - renesas,du-r8a77995
    then:
      properties:
        clocks:
          minItems: 2
          items:
            - description: Functional clock for DU0
            - description: Functional clock for DU1
            - description: DU_DOTCLKIN0 input clock
            - description: DU_DOTCLKIN1 input clock

        clock-names:
          minItems: 2
          items:
            - const: du.0
            - const: du.1
            - pattern: '^dclkin\.[01]$'
            - pattern: '^dclkin\.[01]$'

        interrupts:
          maxItems: 2

        resets:
          maxItems: 1

        reset-names:
          items:
            - const: du.0

        ports:
          properties:
            port@0:
              description: DPAD 0
            port@1:
              description: LVDS 0
            port@2:
              description: LVDS 1
            # port@3 is TCON, not supported yet
            port@3: false

          required:
            - port@0
            - port@1
            - port@2

        renesas,cmms:
          minItems: 2

        renesas,vsps:
          minItems: 2

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names
        - renesas,vsps

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,du-r8a779a0
    then:
      properties:
        clocks:
          items:
            - description: Functional clock

        clock-names:
          items:
            - const: du.0

        interrupts:
          maxItems: 2

        resets:
          maxItems: 1

        reset-names:
          items:
            - const: du.0

        ports:
          properties:
            port@0:
              description: DSI 0
            port@1:
              description: DSI 1
            port@2: false
            port@3: false

          required:
            - port@0
            - port@1

        renesas,vsps:
          minItems: 2

      required:
        - clock-names
        - interrupts
        - resets
        - reset-names
        - renesas,vsps

additionalProperties: false

examples:
  # R-Car H3 ES2.0 DU
  - |
    #include <dt-bindings/clock/renesas-cpg-mssr.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    display@feb00000 {
        compatible = "renesas,du-r8a7795";
        reg = <0xfeb00000 0x80000>;
        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&cpg CPG_MOD 724>,
                 <&cpg CPG_MOD 723>,
                 <&cpg CPG_MOD 722>,
                 <&cpg CPG_MOD 721>;
        clock-names = "du.0", "du.1", "du.2", "du.3";
        resets = <&cpg 724>, <&cpg 722>;
        reset-names = "du.0", "du.2";

        renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
        renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;
                endpoint {
                    remote-endpoint = <&adv7123_in>;
                };
            };
            port@1 {
                reg = <1>;
                endpoint {
                    remote-endpoint = <&dw_hdmi0_in>;
                };
            };
            port@2 {
                reg = <2>;
                endpoint {
                    remote-endpoint = <&dw_hdmi1_in>;
                };
            };
            port@3 {
                reg = <3>;
                endpoint {
                    remote-endpoint = <&lvds0_in>;
                };
            };
        };
    };

...


code:
Pervasive Displays RePaper branded e-ink displays

Required properties:
- compatible:		"pervasive,e1144cs021" for 1.44" display
			"pervasive,e1190cs021" for 1.9" display
			"pervasive,e2200cs021" for 2.0" display
			"pervasive,e2271cs021" for 2.7" display

- panel-on-gpios:	Timing controller power control
- discharge-gpios:	Discharge control
- reset-gpios:		RESET pin
- busy-gpios:		BUSY pin

Required property for e2271cs021:
- border-gpios:		Border control

The node for this driver must be a child node of a SPI controller, hence
all mandatory properties described in ../spi/spi-bus.txt must be specified.

Optional property:
- pervasive,thermal-zone:	name of thermometer's thermal zone

Example:

	display_temp: lm75@48 {
		compatible = "lm75b";
		reg = <0x48>;
		#thermal-sensor-cells = <0>;
	};

	thermal-zones {
		display {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&display_temp>;
		};
	};

	papirus27@0{
		compatible = "pervasive,e2271cs021";
		reg = <0>;

		spi-max-frequency = <8000000>;

		panel-on-gpios = <&gpio 23 0>;
		border-gpios = <&gpio 14 0>;
		discharge-gpios = <&gpio 15 0>;
		reset-gpios = <&gpio 24 0>;
		busy-gpios = <&gpio 25 0>;

		pervasive,thermal-zone = "display";
	};


code:
Rockchip RK3288 specific extensions to the Analogix Display Port
================================

Required properties:
- compatible: "rockchip,rk3288-dp",
	      "rockchip,rk3399-edp";

- reg: physical base address of the controller and length

- clocks: from common clock binding: handle to dp clock.
	  of memory mapped region.

- clock-names: from common clock binding:
	       Required elements: "dp" "pclk"

- resets: Must contain an entry for each entry in reset-names.
	  See ../reset/reset.txt for details.

- pinctrl-names: Names corresponding to the chip hotplug pinctrl states.
- pinctrl-0: pin-control mode. should be <&edp_hpd>

- reset-names: Must include the name "dp"

- rockchip,grf: this soc should set GRF regs, so need get grf here.

- ports: there are 2 port nodes with endpoint definitions as defined in
  Documentation/devicetree/bindings/media/video-interfaces.txt.
    Port 0: contained 2 endpoints, connecting to the output of vop.
    Port 1: contained 1 endpoint, connecting to the input of panel.

Optional property for different chips:
- clocks: from common clock binding: handle to grf_vio clock.

- clock-names: from common clock binding:
	       Required elements: "grf"

For the below properties, please refer to Analogix DP binding document:
 * Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
- phys (required)
- phy-names (required)
- hpd-gpios (optional)
- force-hpd (optional)
-------------------------------------------------------------------------------

Example:
	dp-controller: dp@ff970000 {
		compatible = "rockchip,rk3288-dp";
		reg = <0xff970000 0x4000>;
		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
		clock-names = "dp", "pclk";
		phys = <&dp_phy>;
		phy-names = "dp";

		rockchip,grf = <&grf>;
		resets = <&cru 111>;
		reset-names = "dp";

		pinctrl-names = "default";
		pinctrl-0 = <&edp_hpd>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			edp_in: port@0 {
				reg = <0>;
				#address-cells = <1>;
				#size-cells = <0>;
				edp_in_vopb: endpoint@0 {
					reg = <0>;
					remote-endpoint = <&vopb_out_edp>;
				};
				edp_in_vopl: endpoint@1 {
					reg = <1>;
					remote-endpoint = <&vopl_out_edp>;
				};
			};

			edp_out: port@1 {
				reg = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				edp_out_panel: endpoint {
					reg = <0>;
					remote-endpoint = <&panel_in_edp>
				};
			};
		};
	};

	pinctrl {
		edp {
			edp_hpd: edp-hpd {
				rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_none>;
			};
		};
	};


code:
Rockchip RK3399 specific extensions to the cdn Display Port
================================

Required properties:
- compatible: must be "rockchip,rk3399-cdn-dp"

- reg: physical base address of the controller and length

- clocks: from common clock binding: handle to dp clock.

- clock-names: from common clock binding:
	       Required elements: "core-clk" "pclk" "spdif" "grf"

- resets : a list of phandle + reset specifier pairs
- reset-names : string of reset names
		Required elements: "apb", "core", "dptx", "spdif"
- power-domains : power-domain property defined with a phandle
		  to respective power domain.
- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE>
- assigned-clock-rates : the DP core clk frequency, shall be: 100000000

- rockchip,grf: this soc should set GRF regs, so need get grf here.

- ports: contain a port nodes with endpoint definitions as defined in
	 Documentation/devicetree/bindings/media/video-interfaces.txt.
	 contained 2 endpoints, connecting to the output of vop.

- phys: from general PHY binding: the phandle for the PHY device.

- extcon: extcon specifier for the Power Delivery

- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF

-------------------------------------------------------------------------------

Example:
	cdn_dp: dp@fec00000 {
		compatible = "rockchip,rk3399-cdn-dp";
		reg = <0x0 0xfec00000 0x0 0x100000>;
		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
			 <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
		clock-names = "core-clk", "pclk", "spdif", "grf";
		assigned-clocks = <&cru SCLK_DP_CORE>;
		assigned-clock-rates = <100000000>;
		power-domains = <&power RK3399_PD_HDCP>;
		phys = <&tcphy0_dp>, <&tcphy1_dp>;
		resets = <&cru SRST_DPTX_SPDIF_REC>;
		reset-names = "spdif";
		extcon = <&fusb0>, <&fusb1>;
		rockchip,grf = <&grf>;
		#address-cells = <1>;
		#size-cells = <0>;
		#sound-dai-cells = <1>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			dp_in: port {
				#address-cells = <1>;
				#size-cells = <0>;
				dp_in_vopb: endpoint@0 {
					reg = <0>;
					remote-endpoint = <&vopb_out_dp>;
				};

				dp_in_vopl: endpoint@1 {
					reg = <1>;
					remote-endpoint = <&vopl_out_dp>;
				};
			};
		};
	};


code:
Rockchip specific extensions to the Synopsys Designware MIPI DSI
================================

Required properties:
- #address-cells: Should be <1>.
- #size-cells: Should be <0>.
- compatible: one of
	"rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi"
	"rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"
	"rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"
	"rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi"
- reg: Represent the physical address range of the controller.
- interrupts: Represent the controller's interrupt to the CPU(s).
- clocks, clock-names: Phandles to the controller's pll reference
  clock(ref) when using an internal dphy and APB clock(pclk).
  For RK3399, a phy config clock (phy_cfg) and a grf clock(grf)
  are required. As described in [1].
- rockchip,grf: this soc should set GRF regs to mux vopl/vopb.
- ports: contain a port node with endpoint definitions as defined in [2].
  For vopb,set the reg = <0> and set the reg = <1> for vopl.
- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl
- video port 1 for either a panel or subsequent encoder

Optional properties:
- phys: from general PHY binding: the phandle for the PHY device.
- phy-names: Should be "dphy" if phys references an external phy.
- #phy-cells: Defined when used as ISP phy, should be 0.
- power-domains: a phandle to mipi dsi power domain node.
- resets: list of phandle + reset specifier pairs, as described in [3].
- reset-names: string reset name, must be "apb".

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
[2] Documentation/devicetree/bindings/media/video-interfaces.txt
[3] Documentation/devicetree/bindings/reset/reset.txt

Example:
	mipi_dsi: mipi@ff960000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
		reg = <0xff960000 0x4000>;
		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPI_DSI0>;
		clock-names = "ref", "pclk";
		resets = <&cru SRST_MIPIDSI0>;
		reset-names = "apb";
		rockchip,grf = <&grf>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			mipi_in: port@0 {
				reg = <0>;
				#address-cells = <1>;
				#size-cells = <0>;

				mipi_in_vopb: endpoint@0 {
					reg = <0>;
					remote-endpoint = <&vopb_out_mipi>;
				};
				mipi_in_vopl: endpoint@1 {
					reg = <1>;
					remote-endpoint = <&vopl_out_mipi>;
				};
			};

			mipi_out: port@1 {
				reg = <1>;
				#address-cells = <1>;
				#size-cells = <0>;

				mipi_out_panel: endpoint {
					remote-endpoint = <&panel_in_mipi>;
				};
			};
		};

		panel {
			compatible ="boe,tv080wum-nl0";
			reg = <0>;

			enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&lcd_en>;
			backlight = <&backlight>;

			port {
				panel_in_mipi: endpoint {
					remote-endpoint = <&mipi_out_panel>;
				};
			};
		};
	};


code:
Rockchip specific extensions to the Innosilicon HDMI
================================

Required properties:
- compatible:
	"rockchip,rk3036-inno-hdmi";
- reg:
	Physical base address and length of the controller's registers.
- clocks, clock-names:
	Phandle to hdmi controller clock, name should be "pclk"
- interrupts:
	HDMI interrupt number
- ports:
	Contain one port node with endpoint definitions as defined in
	Documentation/devicetree/bindings/graph.txt.
- pinctrl-0, pinctrl-name:
	Switch the iomux of HPD/CEC pins to HDMI function.

Example:
hdmi: hdmi@20034000 {
	compatible = "rockchip,rk3036-inno-hdmi";
	reg = <0x20034000 0x4000>;
	interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&cru  PCLK_HDMI>;
	clock-names = "pclk";
	pinctrl-names = "default";
	pinctrl-0 = <&hdmi_ctl>;

	hdmi_in: port {
		#address-cells = <1>;
		#size-cells = <0>;
		hdmi_in_lcdc: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&lcdc_out_hdmi>;
		};
	};
};

&pinctrl {
	hdmi {
		hdmi_ctl: hdmi-ctl {
			rockchip,pins = <1 8  RK_FUNC_1 &pcfg_pull_none>,
					<1 9  RK_FUNC_1 &pcfg_pull_none>,
					<1 10 RK_FUNC_1 &pcfg_pull_none>,
					<1 11 RK_FUNC_1 &pcfg_pull_none>;
		};
	};

};


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip DWC HDMI TX Encoder

maintainers:
  - Mark Yao <markyao0591@gmail.com>

description: |
  The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
  with a companion PHY IP.

allOf:
  - $ref: ../bridge/synopsys,dw-hdmi.yaml#

properties:
  compatible:
    enum:
      - rockchip,rk3228-dw-hdmi
      - rockchip,rk3288-dw-hdmi
      - rockchip,rk3328-dw-hdmi
      - rockchip,rk3399-dw-hdmi
      - rockchip,rk3568-dw-hdmi

  reg-io-width:
    const: 4

  avdd-0v9-supply:
    description:
      A 0.9V supply that powers up the SoC internal circuitry. The actual pin name
      varies between the different SoCs and is usually HDMI_TX_AVDD_0V9 or sometimes
      HDMI_AVDD_1V0.

  avdd-1v8-supply:
    description:
      A 1.8V supply that powers up the SoC internal circuitry. The pin name on the
      SoC usually is HDMI_TX_AVDD_1V8.

  clocks:
    minItems: 2
    items:
      - {}
      - {}
      # The next three clocks are all optional, but shall be specified in this
      # order when present.
      - description: The HDMI CEC controller main clock
      - description: Power for GRF IO
      - description: External clock for some HDMI PHY (old clock name, deprecated)
      - description: External clock for some HDMI PHY (new name)

  clock-names:
    minItems: 2
    items:
      - {}
      - {}
      - enum:
          - cec
          - grf
          - vpll
          - ref
      - enum:
          - grf
          - vpll
          - ref
      - enum:
          - vpll
          - ref

  ddc-i2c-bus:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      The HDMI DDC bus can be connected to either a system I2C master or the
      functionally-reduced I2C master contained in the DWC HDMI. When connected
      to a system I2C master this property contains a phandle to that I2C
      master controller.

  phys:
    maxItems: 1
    description: The HDMI PHY

  phy-names:
    const: hdmi

  pinctrl-names:
    description:
      The unwedge pinctrl entry shall drive the DDC SDA line low. This is
      intended to work around a hardware errata that can cause the DDC I2C
      bus to be wedged.
    minItems: 1
    items:
      - const: default
      - const: unwedge

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    patternProperties:
      "^port(@0)?$":
        $ref: /schemas/graph.yaml#/properties/port
        description: Input of the DWC HDMI TX
        properties:
          endpoint:
            description: Connection to the VOP
          endpoint@0:
            description: Connection to the VOPB
          endpoint@1:
            description: Connection to the VOPL
    properties:
      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description: Output of the DWC HDMI TX

  rockchip,grf:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      phandle to the GRF to mux vopl/vopb.

required:
  - compatible
  - reg
  - reg-io-width
  - clocks
  - clock-names
  - interrupts
  - ports
  - rockchip,grf

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3288-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    hdmi: hdmi@ff980000 {
        compatible = "rockchip,rk3288-dw-hdmi";
        reg = <0xff980000 0x20000>;
        reg-io-width = <4>;
        ddc-i2c-bus = <&i2c5>;
        rockchip,grf = <&grf>;
        interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&cru  PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
        clock-names = "iahb", "isfr";

        ports {
            port {
                #address-cells = <1>;
                #size-cells = <0>;

                hdmi_in_vopb: endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&vopb_out_hdmi>;
                };
                hdmi_in_vopl: endpoint@1 {
                    reg = <1>;
                    remote-endpoint = <&vopl_out_hdmi>;
                };
            };
        };
    };

...


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip rk3066 HDMI controller

maintainers:
  - Sandy Huang <hjc@rock-chips.com>
  - Heiko Stuebner <heiko@sntech.de>

properties:
  compatible:
    const: rockchip,rk3066-hdmi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    const: hclk

  power-domains:
    maxItems: 1

  rockchip,grf:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/properties/port
        description:
          Port node with two endpoints, numbered 0 and 1,
          connected respectively to vop0 and vop1.

      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description:
          Port node with one endpoint connected to a hdmi-connector node.

    required:
      - port@0
      - port@1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - pinctrl-0
  - pinctrl-names
  - power-domains
  - rockchip,grf
  - ports

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3066a-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/pinctrl/rockchip.h>
    #include <dt-bindings/power/rk3066-power.h>
    hdmi: hdmi@10116000 {
      compatible = "rockchip,rk3066-hdmi";
      reg = <0x10116000 0x2000>;
      interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&cru HCLK_HDMI>;
      clock-names = "hclk";
      pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
      pinctrl-names = "default";
      power-domains = <&power RK3066_PD_VIO>;
      rockchip,grf = <&grf>;

      ports {
        #address-cells = <1>;
        #size-cells = <0>;
        hdmi_in: port@0 {
          reg = <0>;
          #address-cells = <1>;
          #size-cells = <0>;
          hdmi_in_vop0: endpoint@0 {
            reg = <0>;
            remote-endpoint = <&vop0_out_hdmi>;
          };
          hdmi_in_vop1: endpoint@1 {
            reg = <1>;
            remote-endpoint = <&vop1_out_hdmi>;
          };
        };
        hdmi_out: port@1 {
          reg = <1>;
          hdmi_out_con: endpoint {
            remote-endpoint = <&hdmi_con_in>;
          };
        };
      };
    };

    pinctrl {
      hdmi {
        hdmi_hpd: hdmi-hpd {
          rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
        };
        hdmii2c_xfer: hdmii2c-xfer {
          rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
                          <0 RK_PA2 1 &pcfg_pull_none>;
        };
      };
    };


code:
# SPDX-License-Identifier: (GPL-2.0-only)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip DRM master device

maintainers:
  - Sandy Huang <hjc@rock-chips.com>
  - Heiko Stuebner <heiko@sntech.de>

description: |
  The Rockchip DRM master device is a virtual device needed to list all
  vop devices or other display interface nodes that comprise the
  graphics subsystem.

properties:
  compatible:
    const: rockchip,display-subsystem

  ports:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      maxItems: 1
    description: |
      Should contain a list of phandles pointing to display interface port
      of vop devices. vop definitions as defined in
      Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml

required:
  - compatible
  - ports

additionalProperties: false

examples:
  - |
    display-subsystem {
        compatible = "rockchip,display-subsystem";
        ports = <&vopl_out>, <&vopb_out>;
    };


code:
Rockchip RK3288 LVDS interface
================================

Required properties:
- compatible: matching the soc type, one of
	- "rockchip,rk3288-lvds";
	- "rockchip,px30-lvds";

- reg: physical base address of the controller and length
	of memory mapped region.
- clocks: must include clock specifiers corresponding to entries in the
	clock-names property.
- clock-names: must contain "pclk_lvds"

- avdd1v0-supply: regulator phandle for 1.0V analog power
- avdd1v8-supply: regulator phandle for 1.8V analog power
- avdd3v3-supply: regulator phandle for 3.3V analog power

- rockchip,grf: phandle to the general register files syscon
- rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface

- phys: LVDS/DSI DPHY (px30 only)
- phy-names: name of the PHY, must be "dphy" (px30 only)

Optional properties:
- pinctrl-names: must contain a "lcdc" entry.
- pinctrl-0: pin control group to be used for this controller.

Required nodes:

The lvds has two video ports as described by
	Documentation/devicetree/bindings/media/video-interfaces.txt
Their connections are modeled using the OF graph bindings specified in
	Documentation/devicetree/bindings/graph.txt.

- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl
- video port 1 for either a panel or subsequent encoder

Example:

lvds_panel: lvds-panel {
	compatible = "auo,b101ean01";
	enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;
	data-mapping = "jeida-24";

	ports {
		panel_in_lvds: endpoint {
			remote-endpoint = <&lvds_out_panel>;
		};
	};
};

For Rockchip RK3288:

	lvds: lvds@ff96c000 {
		compatible = "rockchip,rk3288-lvds";
		rockchip,grf = <&grf>;
		reg = <0xff96c000 0x4000>;
		clocks = <&cru PCLK_LVDS_PHY>;
		clock-names = "pclk_lvds";
		pinctrl-names = "lcdc";
		pinctrl-0 = <&lcdc_ctl>;
		avdd1v0-supply = <&vdd10_lcd>;
		avdd1v8-supply = <&vcc18_lcd>;
		avdd3v3-supply = <&vcca_33>;
		rockchip,output = "rgb";
		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			lvds_in: port@0 {
				reg = <0>;

				lvds_in_vopb: endpoint@0 {
					reg = <0>;
					remote-endpoint = <&vopb_out_lvds>;
				};
				lvds_in_vopl: endpoint@1 {
					reg = <1>;
					remote-endpoint = <&vopl_out_lvds>;
				};
			};

			lvds_out: port@1 {
				reg = <1>;

				lvds_out_panel: endpoint {
					remote-endpoint = <&panel_in_lvds>;
				};
			};
		};
	};


code:
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip SoC display controller (VOP)

description:
  VOP (Video Output Processor) is the display controller for the Rockchip
  series of SoCs which transfers the image data from a video memory
  buffer to an external LCD interface.

maintainers:
  - Sandy Huang <hjc@rock-chips.com>
  - Heiko Stuebner <heiko@sntech.de>

properties:
  compatible:
    enum:
      - rockchip,px30-vop-big
      - rockchip,px30-vop-lit
      - rockchip,rk3036-vop
      - rockchip,rk3066-vop
      - rockchip,rk3126-vop
      - rockchip,rk3188-vop
      - rockchip,rk3228-vop
      - rockchip,rk3288-vop
      - rockchip,rk3328-vop
      - rockchip,rk3366-vop
      - rockchip,rk3368-vop
      - rockchip,rk3399-vop-big
      - rockchip,rk3399-vop-lit

  reg:
    minItems: 1
    items:
      - description:
          Must contain one entry corresponding to the base address and length
          of the register space.
      - description:
          Can optionally contain a second entry corresponding to
          the CRTC gamma LUT address.

  interrupts:
    maxItems: 1
    description:
      The VOP interrupt is shared by several interrupt sources, such as
      frame start (VSYNC), line flag and other status interrupts.

  clocks:
    items:
      - description: Clock for ddr buffer transfer.
      - description: Pixel clock.
      - description: Clock for the ahb bus to R/W the phy regs.

  clock-names:
    items:
      - const: aclk_vop
      - const: dclk_vop
      - const: hclk_vop

  resets:
    maxItems: 3

  reset-names:
    items:
      - const: axi
      - const: ahb
      - const: dclk

  port:
    $ref: /schemas/graph.yaml#/properties/port

  assigned-clocks:
    maxItems: 2

  assigned-clock-rates:
    maxItems: 2

  iommus:
    maxItems: 1

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets
  - reset-names
  - port

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3288-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/rk3288-power.h>
    vopb: vopb@ff930000 {
      compatible = "rockchip,rk3288-vop";
      reg = <0xff930000 0x19c>,
            <0xff931000 0x1000>;
      interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&cru ACLK_VOP0>,
               <&cru DCLK_VOP0>,
               <&cru HCLK_VOP0>;
      clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
      power-domains = <&power RK3288_PD_VIO>;
      resets = <&cru SRST_LCDC1_AXI>,
               <&cru SRST_LCDC1_AHB>,
               <&cru SRST_LCDC1_DCLK>;
      reset-names = "axi", "ahb", "dclk";
      iommus = <&vopb_mmu>;
      vopb_out: port {
        #address-cells = <1>;
        #size-cells = <0>;
        vopb_out_edp: endpoint@0 {
          reg = <0>;
          remote-endpoint=<&edp_in_vopb>;
        };
        vopb_out_hdmi: endpoint@1 {
          reg = <1>;
          remote-endpoint=<&hdmi_in_vopb>;
        };
      };
    };


code:
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip SoC display controller (VOP2)

description:
  VOP2 (Video Output Processor v2) is the display controller for the Rockchip
  series of SoCs which transfers the image data from a video memory
  buffer to an external LCD interface.

maintainers:
  - Sandy Huang <hjc@rock-chips.com>
  - Heiko Stuebner <heiko@sntech.de>

properties:
  compatible:
    enum:
      - rockchip,rk3566-vop
      - rockchip,rk3568-vop

  reg:
    items:
      - description:
          Must contain one entry corresponding to the base address and length
          of the register space.
      - description:
          Can optionally contain a second entry corresponding to
          the CRTC gamma LUT address.

  reg-names:
    items:
      - const: vop
      - const: gamma-lut

  interrupts:
    maxItems: 1
    description:
      The VOP interrupt is shared by several interrupt sources, such as
      frame start (VSYNC), line flag and other status interrupts.

  clocks:
    items:
      - description: Clock for ddr buffer transfer.
      - description: Clock for the ahb bus to R/W the phy regs.
      - description: Pixel clock for video port 0.
      - description: Pixel clock for video port 1.
      - description: Pixel clock for video port 2.

  clock-names:
    items:
      - const: aclk
      - const: hclk
      - const: dclk_vp0
      - const: dclk_vp1
      - const: dclk_vp2

  rockchip,grf:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to GRF regs used for misc control

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/properties/port
        description:
          Output endpoint of VP0

      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description:
          Output endpoint of VP1

      port@2:
        $ref: /schemas/graph.yaml#/properties/port
        description:
          Output endpoint of VP2

  iommus:
    maxItems: 1

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - reg-names
  - interrupts
  - clocks
  - clock-names
  - ports

additionalProperties: false

examples:
  - |
        #include <dt-bindings/clock/rk3568-cru.h>
        #include <dt-bindings/interrupt-controller/arm-gic.h>
        #include <dt-bindings/power/rk3568-power.h>
        bus {
            #address-cells = <2>;
            #size-cells = <2>;
            vop: vop@fe040000 {
                compatible = "rockchip,rk3568-vop";
                reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
                reg-names = "vop", "gamma-lut";
                interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru ACLK_VOP>,
                         <&cru HCLK_VOP>,
                         <&cru DCLK_VOP0>,
                         <&cru DCLK_VOP1>,
                         <&cru DCLK_VOP2>;
                clock-names = "aclk",
                              "hclk",
                              "dclk_vp0",
                              "dclk_vp1",
                              "dclk_vp2";
                power-domains = <&power RK3568_PD_VO>;
                iommus = <&vop_mmu>;
                vop_out: ports {
                    #address-cells = <1>;
                    #size-cells = <0>;
                    vp0: port@0 {
                        reg = <0>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                    };
                    vp1: port@1 {
                        reg = <1>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                    };
                    vp2: port@2 {
                        reg = <2>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                    };
                };
            };
        };


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi-ddc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos SoC HDMI DDC

maintainers:
  - Inki Dae <inki.dae@samsung.com>
  - Seung-Woo Kim <sw0312.kim@samsung.com>
  - Kyungmin Park <kyungmin.park@samsung.com>
  - Krzysztof Kozlowski <krzk@kernel.org>

properties:
  compatible:
    oneOf:
      - const: samsung,exynos4210-hdmiddc
      - const: samsung,exynos5-hdmiddc
        deprecated: true

  reg:
    maxItems: 1

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    i2c {
        #address-cells = <1>;
        #size-cells = <0>;

        ddc@50 {
            compatible = "samsung,exynos4210-hdmiddc";
            reg = <0x50>;
        };
    };


code:
# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos SoC HDMI

maintainers:
  - Inki Dae <inki.dae@samsung.com>
  - Seung-Woo Kim <sw0312.kim@samsung.com>
  - Kyungmin Park <kyungmin.park@samsung.com>
  - Krzysztof Kozlowski <krzk@kernel.org>

properties:
  compatible:
    enum:
      - samsung,exynos4210-hdmi
      - samsung,exynos4212-hdmi
      - samsung,exynos5420-hdmi
      - samsung,exynos5433-hdmi

  clocks:
    minItems: 5
    maxItems: 10

  clock-names:
    minItems: 5
    maxItems: 10

  ddc:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to the HDMI DDC node.

  hdmi-en-supply:
    description:
      Provides voltage source for DCC lines available on HDMI connector. When
      there is no power provided for DDC epprom, some TV-sets do not pulls up
      HPD (hot plug detect) line, what causes HDMI block to stay turned off.
      When provided, the regulator allows TV-set correctly signal HPD event.

  hpd-gpios:
    maxItems: 1
    description:
      A GPIO line connected to HPD

  interrupts:
    maxItems: 1

  phy:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: Phandle to the HDMI PHY node.

  ports:
    $ref: /schemas/graph.yaml#/properties/ports
    description:
      Contains a port which is connected to mic node.

  power-domains:
    maxItems: 1

  reg:
    maxItems: 1

  samsung,syscon-phandle:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to the PMU system controller node.

  samsung,sysreg-phandle:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to DISP system controller interface.

  '#sound-dai-cells':
    const: 0

  vdd-supply:
    description:
      VDD 1.0V HDMI TX.

  vdd_osc-supply:
    description:
      VDD 1.8V HDMI OSC.

  vdd_pll-supply:
    description:
      VDD 1.0V HDMI PLL.

required:
  - compatible
  - clocks
  - clock-names
  - ddc
  - hpd-gpios
  - interrupts
  - phy
  - reg
  - samsung,syscon-phandle
  - '#sound-dai-cells'
  - vdd-supply
  - vdd_osc-supply
  - vdd_pll-supply

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos5433-hdmi
    then:
      properties:
        clocks:
          items:
            - description: Gate of HDMI IP APB bus.
            - description: Gate of HDMI-PHY IP APB bus.
            - description: Gate of HDMI TMDS clock.
            - description: Gate of HDMI pixel clock.
            - description: TMDS clock generated by HDMI-PHY.
            - description: MUX used to switch between oscclk and tmds_clko,
                respectively if HDMI-PHY is off and operational.
            - description: Pixel clock generated by HDMI-PHY.
            - description: MUX used to switch between oscclk and pixel_clko,
                respectively if HDMI-PHY is off and operational.
            - description: Oscillator clock, used as parent of following *_user
                clocks in case HDMI-PHY is not operational.
            - description: Gate of HDMI SPDIF clock.
        clock-names:
          items:
            - const: hdmi_pclk
            - const: hdmi_i_pclk
            - const: i_tmds_clk
            - const: i_pixel_clk
            - const: tmds_clko
            - const: tmds_clko_user
            - const: pixel_clko
            - const: pixel_clko_user
            - const: oscclk
            - const: i_spdif_clk
      required:
        - samsung,sysreg-phandle
    else:
      properties:
        clocks:
          items:
            - description: Gate of HDMI IP bus clock.
            - description: Gate of HDMI special clock.
            - description: Pixel special clock, one of the two possible inputs
                of HDMI clock mux.
            - description: HDMI PHY clock output, one of two possible inputs of
                HDMI clock mux.
            - description: It is required by the driver to switch between the 2
                parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
                after configuration, parent is set to sclk_hdmiphy else
                sclk_pixel.
        clock-names:
          items:
            - const: hdmi
            - const: sclk_hdmi
            - const: sclk_pixel
            - const: sclk_hdmiphy
            - const: mout_hdmi

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/exynos5433.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    hdmi@13970000 {
        compatible = "samsung,exynos5433-hdmi";
        reg = <0x13970000 0x70000>;
        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&cmu_disp CLK_PCLK_HDMI>,
                 <&cmu_disp CLK_PCLK_HDMIPHY>,
                 <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO>,
                 <&cmu_disp CLK_PHYCLK_HDMI_PIXEL>,
                 <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY>,
                 <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER>,
                 <&cmu_disp CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY>,
                 <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER>,
                 <&xxti>,
                 <&cmu_disp CLK_SCLK_HDMI_SPDIF>;
        clock-names = "hdmi_pclk",
                      "hdmi_i_pclk",
                      "i_tmds_clk",
                      "i_pixel_clk",
                      "tmds_clko",
                      "tmds_clko_user",
                      "pixel_clko",
                      "pixel_clko_user",
                      "oscclk",
                      "i_spdif_clk";
        phy = <&hdmiphy>;
        ddc = <&hsi2c_11>;
        samsung,syscon-phandle = <&pmu_system_controller>;
        samsung,sysreg-phandle = <&syscon_disp>;
        #sound-dai-cells = <0>;

        hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
        vdd-supply = <&ldo6_reg>;
        vdd_osc-supply = <&ldo7_reg>;
        vdd_pll-supply = <&ldo6_reg>;

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;
                hdmi_to_tv: endpoint {
                    remote-endpoint = <&tv_to_hdmi>;
                };
            };

            port@1 {
                reg = <1>;
                hdmi_to_mhl: endpoint {
                    remote-endpoint = <&mhl_to_hdmi>;
                };
            };
        };
    };


code:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-mixer.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos SoC Mixer

maintainers:
  - Inki Dae <inki.dae@samsung.com>
  - Seung-Woo Kim <sw0312.kim@samsung.com>
  - Kyungmin Park <kyungmin.park@samsung.com>
  - Krzysztof Kozlowski <krzk@kernel.org>

description:
  Samsung Exynos SoC Mixer is responsible for mixing and blending multiple data
  inputs before passing it to an output device.  The output is passed to HDMI.

properties:
  compatible:
    oneOf:
      - enum:
          - samsung,exynos4210-mixer
          - samsung,exynos4212-mixer
          - samsung,exynos5250-mixer
          - samsung,exynos5420-mixer
      - const: samsung,exynos5-mixer
        deprecated: true

  clocks:
    minItems: 3
    items:
      - description: Gate of Mixer IP bus clock.
      - description: Gate of HDMI IP bus clock, needed together with sclk_hdmi.
      - description: HDMI Special clock, one of the two possible inputs of
          mixer mux.
      - description: Video Processor clock.
      - description: Mixer mux clock.
      - description: Mixer Special clock.

  clock-names:
    minItems: 3
    items:
      - const: mixer
      - const: hdmi
      - const: sclk_hdmi
      - const: vp
      - const: mout_mixer
      - const: sclk_mixer

  interconnects:
    maxItems: 1

  interrupts:
    maxItems: 1

  iommus:
    maxItems: 1

  power-domains:
    maxItems: 1

  reg:
    minItems: 1
    items:
      - description: Mixer memory region.
      - description: Video Processor memory region.

required:
  - compatible
  - clocks
  - clock-names
  - interrupts
  - reg

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos4210-mixer
              - samsung,exynos4212-mixer
    then:
      properties:
        clocks:
          minItems: 6
          maxItems: 6
        regs:
          minItems: 2
          maxItems: 2

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos4212-mixer
    then:
      properties:
        clocks:
          minItems: 4
          maxItems: 4
        regs:
          minItems: 2
          maxItems: 2

  - if:
      properties:
        compatible:
          contains:
            enum:
              - samsung,exynos5-mixer
              - samsung,exynos5250-mixer
              - samsung,exynos5420-mixer
    then:
      properties:
        clocks:
          minItems: 3
          maxItems: 3
        regs:
          minItems: 1
          maxItems: 1

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/exynos5250.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    mixer@14450000 {
        compatible = "samsung,exynos5250-mixer";
        reg = <0x14450000 0x10000>;
        interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&clock CLK_MIXER>,
                 <&clock CLK_HDMI>,
                 <&clock CLK_SCLK_HDMI>;
        clock-names = "mixer",
                      "hdmi",
                      "sclk_hdmi";
        iommus = <&sysmmu_tv>;
        power-domains = <&pd_disp1>;
    };