code:
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 */

#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart2;
	};

	aliases {
		mmc0 = &usdhc3;
		mmc1 = &usdhc4;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_2p5v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "2P5V";
			regulator-min-microvolt = <2500000>;
			regulator-max-microvolt = <2500000>;
			regulator-always-on;
		};

		reg_3p3v: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_otg_vbus: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 0>;
			enable-active-high;
		};

		reg_can_xcvr: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "CAN XCVR";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_can_xcvr>;
			gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
		};

		reg_1p5v: regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "1P5V";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			regulator-always-on;
		};

		reg_1p8v: regulator@5 {
			compatible = "regulator-fixed";
			reg = <5>;
			regulator-name = "1P8V";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-always-on;
		};

		reg_2p8v: regulator@6 {
			compatible = "regulator-fixed";
			reg = <6>;
			regulator-name = "2P8V";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			regulator-always-on;
		};

		reg_usb_h1_vbus: regulator@7 {
			compatible = "regulator-fixed";
			reg = <7>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usbh1>;
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	mipi_xclk: mipi_xclk {
		compatible = "pwm-clock";
		#clock-cells = <0>;
		clock-frequency = <22000000>;
		clock-output-names = "mipi_pwm3";
		pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */
		status = "okay";
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		power {
			label = "Power Button";
			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			wakeup-source;
		};

		menu {
			label = "Menu";
			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_MENU>;
		};

		home {
			label = "Home";
			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_HOME>;
		};

		back {
			label = "Back";
			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_BACK>;
		};

		volume-up {
			label = "Volume Up";
			gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEUP>;
		};

		volume-down {
			label = "Volume Down";
			gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEDOWN>;
		};
	};

	sound {
		compatible = "fsl,imx6q-sabrelite-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx6q-sabrelite-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <4>;
	};

	backlight_lcd: backlight-lcd {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	backlight_lvds: backlight-lvds {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_3p3v>;
		status = "okay";
	};

	lcd_display: disp0 {
		compatible = "fsl,imx-parallel-display";
		#address-cells = <1>;
		#size-cells = <0>;
		interface-pix-fmt = "bgr666";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_j15>;
		status = "okay";

		port@0 {
			reg = <0>;

			lcd_display_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			lcd_display_out: endpoint {
				remote-endpoint = <&lcd_panel_in>;
			};
		};
	};

	panel-lcd {
		compatible = "okaya,rs800480t-7x0gp";
		backlight = <&backlight_lcd>;

		port {
			lcd_panel_in: endpoint {
				remote-endpoint = <&lcd_display_out>;
			};
		};
	};

	panel-lvds0 {
		compatible = "hannstar,hsd100pxn1";
		backlight = <&backlight_lvds>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};
};

&ipu1_csi0_from_ipu1_csi0_mux {
	bus-width = <8>;
	data-shift = <12>; /* Lines 19:12 used */
	hsync-active = <1>;
	vync-active = <1>;
};

&ipu1_csi0_mux_from_parallel_sensor {
	remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
};

&ipu1_csi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ipu1_csi0>;
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	xceiver-supply = <&reg_can_xcvr>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi1 {
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash: flash@0 {
		compatible = "sst,sst25vf016b", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-handle = <&ethphy>;
	phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy {
			compatible = "ethernet-phy-ieee802.3-c22";
			txen-skew-ps = <0>;
			txc-skew-ps = <3000>;
			rxdv-skew-ps = <0>;
			rxc-skew-ps = <3000>;
			rxd0-skew-ps = <0>;
			rxd1-skew-ps = <0>;
			rxd2-skew-ps = <0>;
			rxd3-skew-ps = <0>;
			txd0-skew-ps = <0>;
			txd1-skew-ps = <0>;
			txd2-skew-ps = <0>;
			txd3-skew-ps = <0>;
		};
	};
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	ov5640: camera@40 {
		compatible = "ovti,ov5640";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ov5640>;
		reg = <0x40>;
		clocks = <&mipi_xclk>;
		clock-names = "xclk";
		DOVDD-supply = <&reg_1p8v>;
		AVDD-supply = <&reg_2p8v>;
		DVDD-supply = <&reg_1p5v>;
		reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */
		powerdown-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */

		port {
			ov5640_to_mipi_csi2: endpoint {
				remote-endpoint = <&mipi_csi2_in>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};

	ov5642: camera@42 {
		compatible = "ovti,ov5642";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ov5642>;
		clocks = <&clks IMX6QDL_CLK_CKO2>;
		clock-names = "xclk";
		reg = <0x42>;
		reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
		powerdown-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
		gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
		status = "disabled";

		port {
			ov5642_to_ipu1_csi0_mux: endpoint {
				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
				bus-width = <8>;
				hsync-active = <1>;
				vsync-active = <1>;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6q-sabrelite {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				/* SGTL5000 sys_mclk */
				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
			>;
		};

		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
				MX6QDL_PAD_SD2_DAT3__AUD4_TXC		0x130b0
				MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0
				MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0
			>;
		};

		pinctrl_can1: can1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0
				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
			>;
		};

		pinctrl_can_xcvr: can-xcvrgrp {
			fsl,pins = <
				/* Flexcan XCVR enable */
				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
				MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1	/* CS */
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				/* Phy reset */
				MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x000b0
			>;
		};

		pinctrl_gpio_keys: gpio-keysgrp {
			fsl,pins = <
				/* Power Button */
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0
				/* Menu Button */
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
				/* Home Button */
				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0
				/* Back Button */
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0
				/* Volume Up Button */
				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0
				/* Volume Down Button */
				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_ipu1_csi0: ipu1csi0grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0
				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0
				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0
				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0
				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0
				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0
				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0
				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0
				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0
				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0
				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0
				MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0
			>;
		};

		pinctrl_j15: j15grp {
			fsl,pins = <
				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
			>;
		};

		pinctrl_ov5640: ov5640grp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_D5__GPIO2_IO05   0x000b0
				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0
			>;
		};

		pinctrl_ov5642: ov5642grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
				MX6QDL_PAD_GPIO_6__GPIO1_IO06   0x1b0b0
				MX6QDL_PAD_GPIO_8__GPIO1_IO08   0x130b0
				MX6QDL_PAD_GPIO_3__CCM_CLKO2    0x000b0
			>;
		};

		pinctrl_pwm1: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
			>;
		};

		pinctrl_pwm3: pwm3grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
			>;
		};

		pinctrl_pwm4: pwm4grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbh1: usbh1grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x030b0
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
				MX6QDL_PAD_KEY_COL4__USB_OTG_OC	0x1b0b0
				/* power enable, high active */
				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0	/* CD */
				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0	/* WP */
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
				MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0	/* CD */
			>;
		};
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&lcd_display_in>;
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		status = "okay";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};
};

&pcie {
	status = "okay";
};

&pwm1 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm3 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&pwm4 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&mipi_csi {
	status = "okay";

	port@0 {
		reg = <0>;

		mipi_csi2_in: endpoint {
			remote-endpoint = <&ov5640_to_mipi_csi2>;
			clock-lanes = <0>;
			data-lanes = <1 2>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.

#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart1;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&swbst_reg>;
	};

	reg_usb_h1_vbus: regulator-usb-h1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&swbst_reg>;
	};

	reg_audio: regulator-audio {
		compatible = "regulator-fixed";
		regulator-name = "wm8962-supply";
		gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_pcie: regulator-pcie {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pcie_reg>;
		regulator-name = "MPCIE_3V3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_sensors: regulator-sensors {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sensors_reg>;
		regulator-name = "sensors-supply";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		power {
			label = "Power Button";
			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
			wakeup-source;
			linux,code = <KEY_POWER>;
		};

		volume-up {
			label = "Volume Up";
			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
			wakeup-source;
			linux,code = <KEY_VOLUMEUP>;
		};

		volume-down {
			label = "Volume Down";
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
			wakeup-source;
			linux,code = <KEY_VOLUMEDOWN>;
		};
	};

	sound {
		compatible = "fsl,imx6q-sabresd-wm8962",
			   "fsl,imx-audio-wm8962";
		model = "wm8962-audio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_hp>;
		ssi-controller = <&ssi2>;
		audio-codec = <&codec>;
		audio-asrc = <&asrc>;
		audio-routing =
			"Headphone Jack", "HPOUTL",
			"Headphone Jack", "HPOUTR",
			"Ext Spk", "SPKOUTL",
			"Ext Spk", "SPKOUTR",
			"AMIC", "MICBIAS",
			"IN3R", "AMIC",
			"DMIC", "MICBIAS",
			"DMICDAT", "DMIC";
		mux-int-port = <2>;
		mux-ext-port = <3>;
		hp-det-gpio = <&gpio7 8 GPIO_ACTIVE_LOW>;
		mic-det-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
	};

	backlight_lvds: backlight-lvds {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		status = "okay";
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		red {
			gpios = <&gpio1 2 0>;
			default-state = "on";
		};
	};

	panel {
		compatible = "hannstar,hsd100pxn1";
		backlight = <&backlight_lvds>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};
};

&ipu1_csi0_from_ipu1_csi0_mux {
	bus-width = <8>;
	data-shift = <12>; /* Lines 19:12 used */
	hsync-active = <1>;
	vsync-active = <1>;
};

&ipu1_csi0_mux_from_parallel_sensor {
	remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
};

&ipu1_csi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ipu1_csi0>;
};

&mipi_csi {
	status = "okay";

	port@0 {
		reg = <0>;

		mipi_csi2_in: endpoint {
			remote-endpoint = <&ov5640_to_mipi_csi2>;
			clock-lanes = <0>;
			data-lanes = <1 2>;
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi1 {
	cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p32", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-handle = <&phy>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		phy: ethernet-phy@1 {
			reg = <1>;
			qca,clk-out-frequency = <125000000>;
			reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
			reset-assert-us = <10000>;
		};
	};
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hdmi_cec>;
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	codec: wm8962@1a {
		compatible = "wlf,wm8962";
		reg = <0x1a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		DCVDD-supply = <&reg_audio>;
		DBVDD-supply = <&reg_audio>;
		AVDD-supply = <&reg_audio>;
		CPVDD-supply = <&reg_audio>;
		MICVDD-supply = <&reg_audio>;
		PLLVDD-supply = <&reg_audio>;
		SPKVDD1-supply = <&reg_audio>;
		SPKVDD2-supply = <&reg_audio>;
		gpio-cfg = <
			0x0000 /* 0:Default */
			0x0000 /* 1:Default */
			0x0013 /* 2:FN_DMICCLK */
			0x0000 /* 3:Default */
			0x8014 /* 4:FN_DMICCDAT */
			0x0000 /* 5:Default */
		>;
	};

	accelerometer@1c {
		compatible = "fsl,mma8451";
		reg = <0x1c>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c1_mma8451_int>;
		interrupt-parent = <&gpio1>;
		interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
		vdd-supply = <&reg_sensors>;
		vddio-supply = <&reg_sensors>;
	};

	ov5642: camera@3c {
		compatible = "ovti,ov5642";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ov5642>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		clock-names = "xclk";
		reg = <0x3c>;
		DOVDD-supply = <&vgen4_reg>; /* 1.8v */
		AVDD-supply = <&vgen3_reg>;  /* 2.8v, rev C board is VGEN3
						rev B board is VGEN5 */
		DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
		powerdown-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
		status = "disabled";

		port {
			ov5642_to_ipu1_csi0_mux: endpoint {
				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
				bus-width = <8>;
				hsync-active = <1>;
				vsync-active = <1>;
			};
		};
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	touchscreen@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c2_egalax_int>;
		interrupt-parent = <&gpio6>;
		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
		wakeup-gpios = <&gpio6 8 GPIO_ACTIVE_LOW>;
	};

	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ov5640>;
		reg = <0x3c>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		clock-names = "xclk";
		DOVDD-supply = <&vgen4_reg>; /* 1.8v */
		AVDD-supply = <&vgen3_reg>;  /* 2.8v, rev C board is VGEN3
						rev B board is VGEN5 */
		DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
		powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;

		port {
			ov5640_to_mipi_csi2: endpoint {
				remote-endpoint = <&mipi_csi2_in>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};

	pmic: pfuze100@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	egalax_ts@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio6>;
		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
		wakeup-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
	};

	magnetometer@e {
		compatible = "fsl,mag3110";
		reg = <0x0e>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c3_mag3110_int>;
		interrupt-parent = <&gpio3>;
		interrupts = <16 IRQ_TYPE_EDGE_RISING>;
		vdd-supply = <&reg_sensors>;
		vddio-supply = <&reg_sensors>;
	};

	light-sensor@44 {
		compatible = "isil,isl29023";
		reg = <0x44>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c3_isl29023_int>;
		interrupt-parent = <&gpio3>;
		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
		vcc-supply = <&reg_sensors>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6qdl-sabresd {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x1b0b0
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
			>;
		};

		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	0x100b1
				MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	0x100b1
				MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	0x100b1
				MX6QDL_PAD_KEY_ROW1__GPIO4_IO09		0x1b0b0
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			>;
		};

		pinctrl_gpio_keys: gpio_keysgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1b0b0
				MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x1b0b0
			>;
		};

		pinctrl_hdmi_cec: hdmicecgrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	0x1f8b0
			>;
		};

		pinctrl_hp: hpgrp {
			fsl,pins = <
				MX6QDL_PAD_SD3_RST__GPIO7_IO08          0x1b0b0
				MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x1b0b0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1
			>;
		};

		pinctrl_i2c1_mma8451_int: i2c1mma8451intgrp {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__GPIO1_IO18		0xb0b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c2_egalax_int: i2c2egalaxintgrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x1b0b0
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3_isl29023_int: i2c3isl29023intgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0xb0b1
			>;
		};

		pinctrl_i2c3_mag3110_int: i2c3mag3110intgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D16__GPIO3_IO16		0xb0b1
			>;
		};

		pinctrl_ipu1_csi0: ipu1csi0grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0
				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0
				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0
				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0
				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0
				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0
				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0
				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0
				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0
				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0
				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0
			>;
		};

		pinctrl_ov5640: ov5640grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0
				MX6QDL_PAD_SD1_CLK__GPIO1_IO20  0x1b0b0
			>;
		};

		pinctrl_ov5642: ov5642grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
				MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
			>;
		};

		pinctrl_pcie: pciegrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x1b0b0
			>;
		};

		pinctrl_pcie_reg: pciereggrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D19__GPIO3_IO19	0x1b0b0
			>;
		};

		pinctrl_pwm1: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1
			>;
		};

		pinctrl_sensors_reg: sensorsreggrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB3__GPIO2_IO31		0x1b0b0
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
				MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059
				MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059
				MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059
				MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
			>;
		};

		pinctrl_wdog: wdoggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__WDOG2_B		0x1b0b0
			>;
		};
	};

	gpio_leds {
		pinctrl_gpio_leds: gpioledsgrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
			>;
		};
	};
};

&ldb {
	status = "okay";

	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
	vpcie-supply = <&reg_pcie>;
	status = "okay";
};

&pwm1 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&reg_arm {
       vin-supply = <&sw1a_reg>;
};

&reg_pu {
       vin-supply = <&sw1c_reg>;
};

&reg_soc {
       vin-supply = <&sw1c_reg>;
};

&reg_vdd1p1 {
	vin-supply = <&vgen5_reg>;
};

&reg_vdd2p5 {
	vin-supply = <&vgen5_reg>;
};

&snvs_poweroff {
	status = "okay";
};

&snvs_pwrkey {
	status = "okay";
};

&ssi2 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <8>;
	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <8>;
	non-removable;
	no-1-8-v;
	status = "okay";
};

&wdog1 {
	status = "disabled";
};

&wdog2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

repo_name: angery/linux


code:
/*
 * Copyright (C) 2017 Milo Kim <woogyom.kim@gmail.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart1;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		power {
			gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
			label = "Power Button";
			linux,code = <KEY_POWER>;
			wakeup-source;
		};
	};

	panel {
		compatible = "avic,tm097tdh02", "hannstar,hsd100pxn1";
		backlight = <&panel_bl>;
		power-supply = <&reg_3p3v>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};

	panel_bl: backlight {
		compatible = "pwm-backlight";
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <4>;
		power-supply = <&reg_3p3v>;
		pwms = <&pwm1 0 10000>;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&fec {
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		reg = <0>;
		status = "okay";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};
};

&pwm1 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

/* SD card */
&usdhc3 {
	bus-width = <4>;
	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
	no-1-8-v;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sd>;
	status = "okay";
};

/* eMMC */
&usdhc4 {
	bus-width = <8>;
	keep-power-in-suspend;
	no-1-8-v;
	non-removable;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_emmc>;
	status = "okay";
};

&iomuxc {
	pinctrl_emmc: emmcgrp {
		fsl,pins = <
			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			/* PHY reset */
			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0
		>;
	};

	pinctrl_gpio_keys: gpiokeysgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_DA7__GPIO3_IO07		0x1b0b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1
		>;
	};

	pinctrl_sd: sdgrp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			/* CD pin */
			MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b1
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>

/ {
	touchscreen {
		compatible = "resistive-adc-touch";
		io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>, <&adc_ts 5>;
		io-channel-names = "y", "z1", "z2", "x";
		touchscreen-min-pressure = <65000>;
		touchscreen-inverted-y;
		touchscreen-swapped-x-y;
		touchscreen-x-plate-ohms = <300>;
		touchscreen-y-plate-ohms = <800>;
	};
};

&ecspi4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi4>;
	cs-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
	status = "okay";

	adc_ts: adc@0 {
		compatible = "ti,tsc2046e-adc";
		reg = <0>;
		pinctrl-0 = <&pinctrl_touch>;
		pinctrl-names ="default";
		spi-max-frequency = <1000000>;
		interrupts-extended = <&gpio3 19 IRQ_TYPE_LEVEL_LOW>;
		#io-channel-cells = <1>;

		#address-cells = <1>;
		#size-cells = <0>;

		channel@1 {
			reg = <1>;
			settling-time-us = <700>;
			oversampling-ratio = <5>;
		};

		channel@3 {
			reg = <3>;
			settling-time-us = <700>;
			oversampling-ratio = <5>;
		};

		channel@4 {
			reg = <4>;
			settling-time-us = <700>;
			oversampling-ratio = <5>;
		};

		channel@5 {
			reg = <5>;
			settling-time-us = <700>;
			oversampling-ratio = <5>;
		};
	};
};

&iomuxc {
	pinctrl_ecspi4: ecspi4grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D28__ECSPI4_MOSI			0x100b1
			MX6QDL_PAD_EIM_D22__ECSPI4_MISO			0x000b1
			MX6QDL_PAD_EIM_D21__ECSPI4_SCLK			0x000b1
			/* *no* external pull up */
			MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x40000058
		>;
	};

	pinctrl_touch: touchgrp {
		fsl,pins = <
			/* external pull up */
			MX6QDL_PAD_EIM_D19__GPIO3_IO19			0x10040
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>

/ {
	chosen {
		stdout-path = &uart2;
	};

	aliases {
		can0 = &can1;
		can1 = &can2;
		mdio-gpio0 = &mdio;
		nand = &gpmi;
		rtc0 = &i2c_rtc;
		rtc1 = &snvs;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&adc 0>, /* 24V */
		              <&adc 1>; /* temperature */
	};

	leds {
		compatible = "gpio-leds";

		led-0 {
			label = "D1";
			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
			function = LED_FUNCTION_STATUS;
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led-1 {
			label = "D2";
			gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-2 {
			label = "D3";
			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
	};

	mdio: mdio {
		compatible = "microchip,mdio-smi0";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_mdio>;
		#address-cells = <1>;
		#size-cells = <0>;
		gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>,
			<&gpio1 22 GPIO_ACTIVE_HIGH>;

		switch@0 {
			compatible = "microchip,ksz8873";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_switch>;
			interrupt-parent = <&gpio3>;
			interrupt = <30 IRQ_TYPE_LEVEL_HIGH>;
			reset-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
			reg = <0>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				ports@0 {
					reg = <0>;
					phy-mode = "internal";
					label = "lan1";
				};

				ports@1 {
					reg = <1>;
					phy-mode = "internal";
					label = "lan2";
				};

				ports@2 {
					reg = <2>;
					label = "cpu";
					ethernet = <&fec>;
					phy-mode = "rmii";

					fixed-link {
						speed = <100>;
						full-duplex;
					};
				};
			};
		};

	};

	clk50m_phy: phy-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <50000000>;
	};

	reg_3v3: regulator-3v3 {
		compatible = "regulator-fixed";
		vin-supply = <&reg_5v0>;
		regulator-name = "3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_5v0: regulator-5v0 {
		compatible = "regulator-fixed";
		regulator-name = "5v0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	reg_24v0: regulator-24v0 {
		compatible = "regulator-fixed";
		regulator-name = "24v0";
		regulator-min-microvolt = <24000000>;
		regulator-max-microvolt = <24000000>;
	};

	reg_can1_stby: regulator-can1-stby {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_can1_stby>;
		regulator-name = "can1-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio3 31 GPIO_ACTIVE_LOW>;
	};

	reg_can2_stby: regulator-can2-stby {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_can2_stby>;
		regulator-name = "can2-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio4 11 GPIO_ACTIVE_LOW>;
	};

	reg_tft_vcom: regulator-tft-vcom {
		compatible = "pwm-regulator";
		pwms = <&pwm3 0 20000 0>;
		regulator-name = "tft_vcom";
		regulator-min-microvolt = <3600000>;
		regulator-max-microvolt = <3600000>;
		regulator-always-on;
		voltage-table = <3600000 26>;
	};

	reg_vcc_mmc: regulator-vcc-mmc {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_vcc_mmc>;
		vin-supply = <&reg_3v3>;
		regulator-name = "mmc_vcc_supply";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
		gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		startup-delay-us = <100>;
	};

	reg_vcc_mmc_io: regulator-vcc-mmc-io {
		compatible = "regulator-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_vcc_mmc_io>;
		vin-supply = <&reg_5v0>;
		regulator-name = "mmc_io_supply";
		regulator-type = "voltage";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		states = <1800000 0x1>, <3300000 0x0>;
		startup-delay-us = <100>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	xceiver-supply = <&reg_can1_stby>;
	status = "okay";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
	xceiver-supply = <&reg_can2_stby>;
	status = "okay";
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		spi-max-frequency = <54000000>;
		reg = <0>;
	};
};

&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
	status = "okay";

	adc: adc@0 {
		compatible = "microchip,mcp3002";
		reg = <0>;
		vref-supply = <&reg_3v3>;
		spi-max-frequency = <1000000>;
		#io-channel-cells = <1>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	clocks = <&clks IMX6QDL_CLK_ENET>,
		 <&clks IMX6QDL_CLK_ENET>,
		 <&clk50m_phy>;
	clock-names = "ipg", "ahb", "ptp";
	phy-mode = "rmii";
	phy-supply = <&reg_3v3>;
	status = "okay";

	fixed-link {
		speed = <100>;
		full-duplex;
	};
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	nand-on-flash-bbt;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	clock-frequency = <400000>;
	status = "okay";

	i2c_rtc: rtc@51 {
		compatible = "nxp,pcf85063";
		reg = <0x51>;
		quartz-load-femtofarads = <12500>;
	};
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	#pwm-cells = <2>;
	status = "okay";
};

&pwm3 {
	/* used for LCD contrast control */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_5v0>;
	disable-over-current;
	status = "okay";
};

/* no usbh2 */
&usbphynop1 {
	status = "disabled";
};

/* no usbh3 */
&usbphynop2 {
	status = "disabled";
};

&usbotg {
	vbus-supply = <&reg_5v0>;
	disable-over-current;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	cap-power-off-card;
	full-pwr-cycle;
	bus-width = <4>;
	max-frequency = <50000000>;
	cap-sd-highspeed;
	sd-uhs-sdr12;
	sd-uhs-sdr25;
	sd-uhs-sdr50;
	sd-uhs-ddr50;
	mmc-ddr-1_8v;
	vmmc-supply = <&reg_vcc_mmc>;
	vqmmc-supply = <&reg_vcc_mmc_io>;
	status = "okay";
};

&iomuxc {
	pinctrl_can1: can1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__FLEXCAN1_TX			0x3008
			MX6QDL_PAD_GPIO_8__FLEXCAN1_RX			0x1b000
		>;
	};

	pinctrl_can1_stby: can1stbygrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D31__GPIO3_IO31			0x13008
		>;
	};

	pinctrl_can2: can2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX		0x3008
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX		0x1b000
		>;
	};

	pinctrl_can2_stby: can2stbygrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11			0x13008
		>;
	};

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO			0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI			0xb1
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK			0xb1
			/* *no* external pull up */
			MX6QDL_PAD_EIM_D24__GPIO3_IO24			0x58
		>;
	};

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_OE__ECSPI2_MISO			0x100b1
			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI			0xb1
			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK			0xb1
			/* external pull up */
			MX6QDL_PAD_EIM_RW__GPIO2_IO26			0x58
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			/* RMII 50 MHz */
			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN		0x100f5
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN		0x100f5
			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0		0x100c0
			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1		0x100c0
			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0		0x100f5
			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1		0x100f5
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK		0x1b0b0
			MX6QDL_PAD_GPIO_5__GPIO1_IO05			0x58
			/* GPIO for "link active" */
			MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24		0x3038
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE			0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE			0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B		0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B		0xb0b1
			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B		0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B			0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B			0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00		0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01		0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02		0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03		0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04		0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05		0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06		0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07		0xb0b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			/* external 10 k pull up */
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x40010878
			/* external 10 k pull up */
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x40010878
		>;
	};

	pinctrl_mdio: mdiogrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__GPIO1_IO22		0x100b1
			MX6QDL_PAD_ENET_MDC__GPIO1_IO31			0xb1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__PWM2_OUT			0x58
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT1__PWM3_OUT			0x58
		>;
	};

	pinctrl_switch: switchgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D30__GPIO3_IO30			0xb0
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D26__UART2_TX_DATA		0x1b0b1
			MX6QDL_PAD_EIM_D27__UART2_RX_DATA		0x1b0b1
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			/* SoC internal pull up required */
			MX6QDL_PAD_SD3_CMD__SD3_CMD			0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK			0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x17059
			/* SoC internal pull up required */
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01			0x1b040
			/* SoC internal pull up required */
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00			0x1b040
		>;
	};

	pinctrl_vcc_mmc: vccmmcgrp {
		fsl,pins = <
			MX6QDL_PAD_SD3_RST__GPIO7_IO08			0x58
		>;
	};

	pinctrl_vcc_mmc_io: vccmmciogrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_18__GPIO7_IO13			0x58
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2021 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>

/ {
	backlight: backlight {
		compatible = "pwm-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_backlight>;
		enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
		pwms = <&pwm2 0 20000 0>;
		brightness-levels = <0 255>;
		num-interpolated-steps = <17>;
		default-brightness-level = <8>;
		power-supply = <&reg_24v0>;
	};

	display {
		#address-cells = <1>;
		#size-cells = <0>;

		compatible = "fsl,imx-parallel-display";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ipu1>;

		port@0 {
			reg = <0>;

			display0_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			display0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};

	panel {
		compatible = "logictechno,lttd800480070-l2rt";
		backlight = <&backlight>;
		power-supply = <&reg_3v3>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&display0_out>;
			};
		};
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&display0_in>;
};

&iomuxc {
	pinctrl_backlight: backlightgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_TD3__GPIO6_IO23		0x58
		>;
	};

	pinctrl_ipu1: ipu1grp {
		fsl,pins = <
			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x10
			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x10
			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x10
			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x10
			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x10
			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x10
			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x10
			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x10
			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x10
			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x10
			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x10
			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x10
			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x10
			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x10
			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x10
			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x10
			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x10
			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x10
			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x10
			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x10
			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x10
			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x10
			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	0x10
			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	0x10
			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	0x10
			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	0x10
			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	0x10
			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	0x10
		>;
	};
};


code:
/*
 * Copyright (C) 2021 Russell King <rmk@armlinux.org.uk>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */
#include <dt-bindings/leds/common.h>

/ {
	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_solidsense_leds>;

		/* Red/Green LED1 - next to WiFi SMA */
		led-11 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_INDICATOR;
			function-enumerator = <0>;
			gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
		};

		led-12 {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_INDICATOR;
			function-enumerator = <0>;
			gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
		};

		/* Red/Green LED2 - next to GPS SMA */
		led-21 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_INDICATOR;
			function-enumerator = <1>;
			gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
		};

		led-22 {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_INDICATOR;
			function-enumerator = <1>;
			gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
		};
	};
};

&audio {
	status = "disabled";
};

&ecspi2 {
	status = "disabled";
};

&i2c3 {
	status = "disabled";
};

&iomuxc {
	pinctrl-0 = <&pinctrl_hog>, <&pinctrl_solidsense_hog>;

	solidsense {
		pinctrl_solidsense_hog: solidsense-hog {
			fsl,pins = <
				/* Nordic RESET_N */
				MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x400130b1
				/* Nordic Chip 1 SWDIO - GPIO 125 */
				MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x400130b1
				/* Nordic Chip 1 SWDCLK - GPIO 59 */
				/* already claimed in the HB2 hogs */
				/* MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1 */
				/* Nordic Chip 2 SWDIO - GPIO 81 */
				MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x400130b1
				/* Nordic Chip 2 SWCLK - GPIO 82 */
				MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x400130b1
			>;
		};

		pinctrl_solidsense_leds: solidsense-leds {
			fsl,pins = <
				/* Red LED 1 - GPIO 58 */
				MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x400130b1
				/* Green LED 1 - GPIO 55 */
				MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x400130b1
				/* Red LED 2 - GPIO 57 */
				MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x400130b1
				/* Green LED 2 - GPIO 56 */
				MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x400130b1
			>;
		};

		pinctrl_solidsense_uart2: solidsense-uart2 {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_solidsense_uart3: solidsense-uart3 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
			>;
		};
	};
};

&pwm1 {
	status = "disabled";
};

&sgtl5000 {
	status = "disabled";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_solidsense_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_solidsense_uart3>;
	status = "okay";
};


code:
/*
 * Copyright (C) 2013,2014 Russell King
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */
#include <dt-bindings/gpio/gpio.h>
/ {
	clk_brcm: brcm-clock {
		compatible = "gpio-gate-clock";
		#clock-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
		enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
	};

	reg_brcm: brcm-reg {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio3 19 0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
		regulator-name = "brcm_reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <200000>;
	};

	usdhc1_pwrseq: usdhc1_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
			      <&gpio6 0 GPIO_ACTIVE_LOW>;
		clocks = <&clk_brcm>;
		clock-names = "ext_clock";
	};
};

&iomuxc {
	microsom {
		pinctrl_microsom_brcm_bt: microsom-brcm-bt {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070
				MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x40013070
				MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070
			>;
		};

		pinctrl_microsom_brcm_osc: microsom-brcm-osc {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x40013070
			>;
		};

		pinctrl_microsom_brcm_reg: microsom-brcm-reg {
			fsl,pins = <
				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x40013070
			>;
		};

		pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
			fsl,pins = <
				MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0
				MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x40013070
				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070
				MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x40013070
			>;
		};

		pinctrl_microsom_uart4: microsom-uart4 {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
			>;
		};

		pinctrl_microsom_usdhc1: microsom-usdhc1 {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059
				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
			>;
		};
	};
};

/* UART4 - Connected to optional BRCM Wifi/BT/FM */
&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
	uart-has-rtscts;
	status = "okay";
};

/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
	bus-width = <4>;
	mmc-pwrseq = <&usdhc1_pwrseq>;
	keep-power-in-suspend;
	no-1-8-v;
	non-removable;
	vmmc-supply = <&reg_brcm>;
	status = "okay";
};


code:
/*
 * Copyright (C) 2013,2014 Russell King
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

&iomuxc {
	microsom {
		pinctrl_microsom_usdhc3: microsom-usdhc3 {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
				MX6QDL_PAD_SD3_RST__SD3_RESET  0x17059
			>;
		};
	};
};

/* USDHC3 - eMMC */
&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_microsom_usdhc3>;
	bus-width = <8>;
	non-removable;
	vmmc-supply = <&vcc_3v3>;
	status = "okay";
};


code:
/*
 * Copyright (C) 2013,2014 Russell King
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */
#include <dt-bindings/gpio/gpio.h>

/ {
	nvcc_sd1: regulator-nvcc-sd1 {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-name = "nvcc_sd1";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		vin-supply = <&vcc_3v3>;
	};

	clk_ti_wifi: ti-wifi-clock {
		/* This is a hack around the kernel - using "fixed clock"
		 * results in the "pinctrl" properties being ignored, and
		 * the clock not being output.  Instead, use a gated clock
		 * and the unrouted WL_XTAL_PU gpio.
		 */
		compatible = "gpio-gate-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_microsom_ti_clk>;
		enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
	};

	pwrseq_ti_wifi: ti-wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_microsom_ti_wifi_en>;
		reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
		post-power-on-delay-ms = <200>;
		clocks = <&clk_ti_wifi>;
		clock-names = "ext_clock";
	};
};

&iomuxc {
	microsom {
		pinctrl_microsom_ti_bt: microsom-ti-bt {
			fsl,pins = <
				/* BT_EN_SOC */
				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070
			>;
		};

		pinctrl_microsom_ti_clk: microsom-ti-clk {
			fsl,pins = <
				/* EXT_32K */
				MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0
				/* WL_XTAL_PU (unrouted) */
				MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
			>;
		};

		pinctrl_microsom_ti_wifi_en: microsom-ti-wifi-en {
			fsl,pins = <
				/* WLAN_EN_SOC */
				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070
			>;
		};

		pinctrl_microsom_ti_wifi_irq: microsom-ti-wifi-irq {
			fsl,pins = <
				/* WLAN_IRQ */
				MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070
			>;
		};

		pinctrl_microsom_uart4: microsom-uart4 {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
			>;
		};

		pinctrl_microsom_usdhc1: microsom-usdhc1 {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059
				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
			>;
		};
	};
};

/* UART4 - Connected to optional TI Wi-Fi/BT/FM */
&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_microsom_uart4>;
	uart-has-rtscts;
	status = "okay";

	bluetooth {
		compatible = "ti,wl1837-st";
		clocks = <&clk_ti_wifi>;
		clock-names = "ext_clock";
		enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_microsom_ti_bt>;
	};
};

/* USDHC1 - Connected to optional TI Wi-Fi/BT/FM */
&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_microsom_usdhc1>;
	bus-width = <4>;
	keep-power-in-suspend;
	mmc-pwrseq = <&pwrseq_ti_wifi>;
	cap-power-off-card;
	non-removable;
	vmmc-supply = <&vcc_3v3>;
	/* vqmmc-supply = <&nvcc_sd1>; - MMC layer doesn't like it! */
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	wlcore@2 {
		compatible = "ti,wl1837";
		reg = <2>;
		interrupts-extended = <&gpio6 4 IRQ_TYPE_LEVEL_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_microsom_ti_wifi_irq>;
	};
};


code:
/*
 * Copyright (C) 2013,2014 Russell King
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */
#include <dt-bindings/gpio/gpio.h>

/ {
	vcc_3v3: regulator-vcc-3v3 {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-name = "vcc_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
	phy-mode = "rgmii-id";

	/*
	 * The PHY seems to require a long-enough reset duration to avoid
	 * some rare issues where the PHY gets stuck in an inconsistent and
	 * non-functional state at boot-up. 10ms proved to be fine .
	 */
	phy-reset-duration = <10>;
	phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		/*
		 * The PHY can appear at either address 0 or 4 due to the
		 * configuration (LED) pin not being pulled sufficiently.
		 */
		ethernet-phy@0 {
			reg = <0>;
			qca,clk-out-frequency = <125000000>;
			qca,smarteee-tw-us-1g = <24>;
		};

		ethernet-phy@4 {
			reg = <4>;
			qca,clk-out-frequency = <125000000>;
			qca,smarteee-tw-us-1g = <24>;
		};

		/*
		 * ADIN1300 (som rev 1.9 or later) is always at address 1. It
		 * will be enabled automatically by U-Boot if detected.
		 */
		ethernet-phy@1 {
			reg = <1>;
			adi,phy-output-clock = "125mhz-free-running";
			status = "disabled";
		};
	};
};

&iomuxc {
	microsom {
		pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				/* AR8035 reset */
				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x130b0
				/* AR8035 interrupt */
				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x1b0b0
				/* GPIO16 -> AR8035 25MHz */
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x13030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1
				/* AR8035 pin strapping: IO voltage: pull up */
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				/* AR8035 pin strapping: PHYADDR#0: pull down */
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030
				/* AR8035 pin strapping: PHYADDR#1: pull down */
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030
				/* AR8035 pin strapping: MODE#1: pull up */
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				/* AR8035 pin strapping: MODE#3: pull up */
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				/* AR8035 pin strapping: MODE#0: pull down */
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030

				/*
				 * As the RMII pins are also connected to RGMII
				 * so that an AR8030 can be placed, set these
				 * to high-z with the same pulls as above.
				 * Use the GPIO settings to avoid changing the
				 * input select registers.
				 */
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x03000
				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x03000
				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x03000
			>;
		};

		pinctrl_microsom_uart1: microsom-uart1 {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
			>;
		};
	};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_microsom_uart1>;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Sascha Hauer, Pengutronix
 * Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "supply-3p3v";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	status = "okay";

	m25p80: flash@0 {
		compatible = "jedec,spi-nor";
		spi-max-frequency = <50000000>;
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
		m25p,fast-read;
	};
};

&iomuxc {
	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			/* HYS, SPEED = MED, 100k up, DSE = 011, SRE_FAST */
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b099
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0xb099
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0xb099
			 /* eCSPI1 SS1 */
			MX6QDL_PAD_EIM_D19__GPIO3_IO19 0xb099
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b899
			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b899
		>;
	};

	pinctrl_i2c1_recovery: i2c1recoverygrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b899
			MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b899
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b899
			MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899
		>;
	};

	pinctrl_i2c3_recovery: i2c3recoverygrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b899
			MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b899
		>;
	};

	pinctrl_pmic: pmicgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b099 /* PMIC irq */
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
		>;
	};
};

&pmic {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pmic>;
	interrupt-parent = <&gpio6>;
	interrupts = <10 IRQ_TYPE_LEVEL_LOW>;

	regulators {
		reg_vddcore: sw1ab {
			regulator-min-microvolt = <300000>;
			regulator-max-microvolt = <1875000>;
			regulator-always-on;
		};

		reg_vddsoc: sw1c {
			regulator-min-microvolt = <300000>;
			regulator-max-microvolt = <1875000>;
			regulator-always-on;
		};

		reg_gen_3v3: sw2 {
			regulator-min-microvolt = <800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_ddr_1v5a: sw3a {
			regulator-min-microvolt = <400000>;
			regulator-max-microvolt = <1975000>;
			regulator-always-on;
		};

		reg_ddr_1v5b: sw3b {
			regulator-min-microvolt = <400000>;
			regulator-max-microvolt = <1975000>;
			regulator-always-on;
		};

		sw4_reg: sw4 {
			regulator-min-microvolt = <800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_5v_600mA: swbst {
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5150000>;
			regulator-always-on;
		};

		reg_snvs_3v: vsnvs {
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <3000000>;
			regulator-always-on;
		};

		reg_vrefddr: vrefddr {
			regulator-boot-on;
			regulator-always-on;
		};

		reg_vgen1_1v5: vgen1 {
			regulator-min-microvolt = <800000>;
			regulator-max-microvolt = <1550000>;
			/* not used */
		};

		reg_vgen2_1v2_eth: vgen2 {
			regulator-min-microvolt = <800000>;
			regulator-max-microvolt = <1550000>;
			regulator-always-on;
		};

		reg_vgen3_2v8: vgen3 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_vgen4_1v8: vgen4 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_vgen5_1v8_eth: vgen5 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_vgen6_3v3: vgen6 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

/* eMMC */
&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	vmmc-supply = <&reg_3p3v>;
	non-removable;
	disable-wp;
	no-sd;
	no-sdio;
	bus-width = <8>;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	mmccard: mmccard@0 {
		reg = <0>;
		compatible = "mmc-card";
		broken-hpi;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Sascha Hauer, Pengutronix
 * Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
 */

#include <dt-bindings/gpio/gpio.h>

&fec {
	/delete-property/ interrupts;
	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
	fsl,err006687-workaround-present;
};

&i2c1 {
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c1>;
	pinctrl-1 = <&pinctrl_i2c1_recovery>;
	scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	clock-frequency = <100000>;
	status = "okay";

	pmic: pmic@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;
	};

	sensor@48 {
		compatible = "national,lm75";
		reg = <0x48>;
	};

	eeprom@50 {
		compatible = "st,24c64", "atmel,24c64";
		reg = <0x50>;
		pagesize = <32>;
		vcc-supply = <&reg_3p3v>;
	};
};

&iomuxc {
	/*
	 * This pinmuxing is required for the ERR006687 workaround. Board
	 * DTS files that enable the FEC controller with
	 * fsl,err006687-workaround-present must include this group.
	 */
	pinctrl_enet_fix: enetfixgrp {
		fsl,pins = <
			/* ENET ping patch */
			MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Sascha Hauer, Pengutronix
 * Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
 */

#include <dt-bindings/gpio/gpio.h>

&i2c3 {
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c3>;
	pinctrl-1 = <&pinctrl_i2c3_recovery>;
	scl-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	clock-frequency = <100000>;
	status = "okay";

	pmic: pmic@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;
	};

	sensor@48 {
		compatible = "national,lm75";
		reg = <0x48>;
	};

	eeprom@50 {
		compatible = "st,24c64", "atmel,24c64";
		reg = <0x50>;
		pagesize = <32>;
		vcc-supply = <&reg_3p3v>;
	};
};


code:
/*
 * Copyright 2015 Technologic Systems
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	aliases {
		ethernet0 = &fec;
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_leds1>;
		compatible = "gpio-leds";

		green-led {
			label = "green-led";
			gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		red-led {
			label = "red-led";
			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3p3v";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	status = "okay";
};

&ecspi1 {
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	n25q064: flash@0 {
		compatible = "micron,n25q064", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <20000000>;
	};
};

&ecspi2 {
	cs-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c1>;
	pinctrl-1 = <&pinctrl_i2c1_gpio>;
	scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
	sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
	status = "okay";

	isl12022: rtc@6f {
		compatible = "isil,isl12022";
		reg = <0x6f>;
	};

	gpio8: gpio@28 {
		compatible = "technologic,ts4900-gpio";
		reg = <0x28>;
		#gpio-cells = <2>;
		gpio-controller;
		ngpio = <32>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c2>;
	pinctrl-1 = <&pinctrl_i2c2_gpio>;
	scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
	sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x100b1 /* Onboard flash CS1# */
		>;
	};

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK	0x100b1
			MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI	0x100b1
			MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO	0x100b1
			MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29	0x100b1 /* Offboard CS0# */
			MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02	0x100b1 /* FPGA CS1# */
			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x1b0b1 /* FPGA_RESET# */
			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x1b0b1 /* FPGA_DONE */
			MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M	0x10    /* FPGA 24MHZ */
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b1 /* FPGA_IRQ */
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x4001b0a8
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b1
			MX6QDL_PAD_DI0_PIN4__GPIO4_IO20		0x1b0b1 /* ETH_PHY_RESET */
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x1b0b1
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x1b0b1
		>;
	};

	pinctrl_hog: hoggrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A17__GPIO2_IO21		0x1b0b1 /* OFF_BD_RESET# */
			MX6QDL_PAD_EIM_A16__GPIO2_IO22		0x1b0b1 /* EN_USB_5V# */
			MX6QDL_PAD_EIM_A19__GPIO2_IO19		0x1b0b1 /* EN_LCD_3.3V */
			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0 /* Audio CLK */
			MX6QDL_PAD_GPIO_5__GPIO1_IO05		0x1b0b1 /* DIO_1 */
			MX6QDL_PAD_GPIO_6__GPIO1_IO06		0x1b0b1 /* DIO_2 */
			MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x1b0b1 /* DIO_3 */
			MX6QDL_PAD_GPIO_16__GPIO7_IO11		0x1b0b1 /* DIO_4 */
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b1 /* DIO_5 */
			MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b1 /* DIO_7 */
			MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19	0x1b0b1 /* DIO_8 */
			MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18	0x1b0b1 /* DIO_9 */
			MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30	0x1b0b1 /* DIO_0 */
			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x1b0b1 /* DIO_6 */
			MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03	0x1b0b1 /* CPU_DIO_A */
			MX6QDL_PAD_SD4_DAT7__GPIO2_IO15		0x1b0b1 /* DIO_2 */
			MX6QDL_PAD_SD3_RST__GPIO7_IO08		0x1b0b1 /* CPU_DIO_B */
			MX6QDL_PAD_EIM_LBA__GPIO2_IO27		0x1b0b1 /* BUS_ALE# */
			MX6QDL_PAD_EIM_OE__GPIO2_IO25		0x1b0b1 /* DIO_15 */
			MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x1b0b1 /* BUS_DIR */
			MX6QDL_PAD_EIM_CS0__GPIO2_IO23		0x1b0b1 /* BUS_CS# */
			MX6QDL_PAD_EIM_A18__GPIO2_IO20		0x1b0b1 /* DIO_14 */
			MX6QDL_PAD_EIM_A20__GPIO2_IO18		0x1b0b1 /* DIO_16 */
			MX6QDL_PAD_EIM_A21__GPIO2_IO17		0x1b0b1 /* DIO_12 */
			MX6QDL_PAD_EIM_A22__GPIO2_IO16		0x1b0b1 /* DIO_18 */
			MX6QDL_PAD_EIM_A23__GPIO6_IO06		0x1b0b1 /* DIO_19 */
			MX6QDL_PAD_EIM_A24__GPIO5_IO04		0x1b0b1 /* DIO_20 */
			MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x1b0b1 /* BUS_BHE# */
			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0x1b0b1 /* DIO_13 */
			MX6QDL_PAD_EIM_WAIT__GPIO5_IO00		0x1b0b1 /* EIM_WAIT# */
			MX6QDL_PAD_EIM_EB1__GPIO2_IO29		0x1b0b1 /* DIO_10 */
			MX6QDL_PAD_EIM_DA0__GPIO3_IO00		0x1b0b1 /* MUX_AD_00 */
			MX6QDL_PAD_EIM_DA1__GPIO3_IO01		0x1b0b1 /* MUX_AD_01 */
			MX6QDL_PAD_EIM_DA2__GPIO3_IO02		0x1b0b1 /* MUX_AD_02 */
			MX6QDL_PAD_EIM_DA3__GPIO3_IO03		0x1b0b1 /* MUX_AD_03 */
			MX6QDL_PAD_EIM_DA4__GPIO3_IO04		0x1b0b1 /* MUX_AD_04 */
			MX6QDL_PAD_EIM_DA5__GPIO3_IO05		0x1b0b1 /* MUX_AD_05 */
			MX6QDL_PAD_EIM_DA6__GPIO3_IO06		0x1b0b1 /* MUX_AD_06 */
			MX6QDL_PAD_EIM_DA7__GPIO3_IO07		0x1b0b1 /* MUX_AD_07 */
			MX6QDL_PAD_EIM_DA8__GPIO3_IO08		0x1b0b1 /* MUX_AD_08 */
			MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0x1b0b1 /* MUX_AD_09 */
			MX6QDL_PAD_EIM_DA10__GPIO3_IO10		0x1b0b1 /* MUX_AD_10 */
			MX6QDL_PAD_EIM_DA11__GPIO3_IO11		0x1b0b1 /* MUX_AD_11 */
			MX6QDL_PAD_EIM_DA12__GPIO3_IO12		0x1b0b1 /* MUX_AD_12 */
			MX6QDL_PAD_EIM_DA13__GPIO3_IO13		0x1b0b1 /* MUX_AD_13 */
			MX6QDL_PAD_EIM_DA14__GPIO3_IO14		0x1b0b1 /* MUX_AD_14 */
			MX6QDL_PAD_EIM_DA15__GPIO3_IO15		0x1b0b1 /* MUX_AD_15 */
			MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16	0x1b0b1 /* LCD_CLK */
			MX6QDL_PAD_DI0_PIN15__GPIO4_IO17	0x1b0b1 /* DE */
			MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x1b0b1 /* Hsync */
			MX6QDL_PAD_DI0_PIN3__GPIO4_IO19		0x1b0b1 /* Vsync */
			MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21	0x1b0b1
			MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22	0x1b0b1
			MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23	0x1b0b1
			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x1b0b1
			MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25	0x1b0b1
			MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26	0x1b0b1
			MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27	0x1b0b1
			MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28	0x1b0b1
			MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29	0x1b0b1
			MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30	0x1b0b1
			MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31	0x1b0b1
			MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x1b0b1
			MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06	0x1b0b1
			MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07	0x1b0b1
			MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08	0x1b0b1
			MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09	0x1b0b1
			MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10	0x1b0b1
			MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11	0x1b0b1
			MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x1b0b1
			MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	0x1b0b1
			MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x1b0b1
			MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x1b0b1
			MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16	0x1b0b1
			MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x1b0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c1_gpio: i2c1gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__GPIO3_IO21		0x4001b8b1
			MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c2_gpio: i2c2gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		0x4001b8b1
		>;
	};

	pinctrl_leds1: leds1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b1 /* RED_LED# */
			MX6QDL_PAD_EIM_CS1__GPIO2_IO24		0x1b0b1 /* GREEN_LED# */
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_GPIO_8__UART2_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	0x1b0b1
			MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17059
			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x10059
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17059
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17059
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17059
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17059
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x17059 /* WIFI IRQ */
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
			MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0x1b0b1 /* EN_SD_POWER# */
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
		>;
	};
};

&pcie {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	uart-has-rtscts;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

/* SD */
&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	vmmc-supply = <&reg_3p3v>;
	bus-width = <4>;
	fsl,wp-controller;
	status = "okay";
};

/* eMMC */
&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	vmmc-supply = <&reg_3p3v>;
	bus-width = <4>;
	non-removable;
	status = "okay";
};