code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP24xx clock data
 *
 * Copyright (C) 2014 Texas Instruments, Inc.
 */
&scm_clocks {
	mcbsp1_mux_fck: mcbsp1_mux_fck@4 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_96m_ck>, <&mcbsp_clks>;
		ti,bit-shift = <2>;
		reg = <0x4>;
	};

	mcbsp1_fck: mcbsp1_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&mcbsp1_gate_fck>, <&mcbsp1_mux_fck>;
	};

	mcbsp2_mux_fck: mcbsp2_mux_fck@4 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_96m_ck>, <&mcbsp_clks>;
		ti,bit-shift = <6>;
		reg = <0x4>;
	};

	mcbsp2_fck: mcbsp2_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&mcbsp2_gate_fck>, <&mcbsp2_mux_fck>;
	};
};

&prcm_clocks {
	func_32k_ck: func_32k_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
	};

	secure_32k_ck: secure_32k_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
	};

	virt_12m_ck: virt_12m_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <12000000>;
	};

	virt_13m_ck: virt_13m_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <13000000>;
	};

	virt_19200000_ck: virt_19200000_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <19200000>;
	};

	virt_26m_ck: virt_26m_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <26000000>;
	};

	aplls_clkin_ck: aplls_clkin_ck@540 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clocks = <&virt_19200000_ck>, <&virt_26m_ck>, <&virt_13m_ck>, <&virt_12m_ck>;
		ti,bit-shift = <23>;
		reg = <0x0540>;
	};

	aplls_clkin_x2_ck: aplls_clkin_x2_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&aplls_clkin_ck>;
		clock-mult = <2>;
		clock-div = <1>;
	};

	osc_ck: osc_ck@60 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clocks = <&aplls_clkin_ck>, <&aplls_clkin_x2_ck>;
		ti,bit-shift = <6>;
		reg = <0x0060>;
		ti,index-starts-at-one;
	};

	sys_ck: sys_ck@60 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clocks = <&osc_ck>;
		ti,bit-shift = <6>;
		ti,max-div = <3>;
		reg = <0x0060>;
		ti,index-starts-at-one;
	};

	alt_ck: alt_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <54000000>;
	};

	mcbsp_clks: mcbsp_clks {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <0x0>;
	};

	dpll_ck: dpll_ck@500 {
		#clock-cells = <0>;
		compatible = "ti,omap2-dpll-core-clock";
		clocks = <&sys_ck>, <&sys_ck>;
		reg = <0x0500>, <0x0540>;
	};

	apll96_ck: apll96_ck@500 {
		#clock-cells = <0>;
		compatible = "ti,omap2-apll-clock";
		clocks = <&sys_ck>;
		ti,bit-shift = <2>;
		ti,idlest-shift = <8>;
		ti,clock-frequency = <96000000>;
		reg = <0x0500>, <0x0530>, <0x0520>;
	};

	apll54_ck: apll54_ck@500 {
		#clock-cells = <0>;
		compatible = "ti,omap2-apll-clock";
		clocks = <&sys_ck>;
		ti,bit-shift = <6>;
		ti,idlest-shift = <9>;
		ti,clock-frequency = <54000000>;
		reg = <0x0500>, <0x0530>, <0x0520>;
	};

	func_54m_ck: func_54m_ck@540 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clocks = <&apll54_ck>, <&alt_ck>;
		ti,bit-shift = <5>;
		reg = <0x0540>;
	};

	core_ck: core_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&dpll_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	func_96m_ck: func_96m_ck@540 {
		#clock-cells = <0>;
	};

	apll96_d2_ck: apll96_d2_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&apll96_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	func_48m_ck: func_48m_ck@540 {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clocks = <&apll96_d2_ck>, <&alt_ck>;
		ti,bit-shift = <3>;
		reg = <0x0540>;
	};

	func_12m_ck: func_12m_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&func_48m_ck>;
		clock-mult = <1>;
		clock-div = <4>;
	};

	sys_clkout_src_gate: sys_clkout_src_gate@70 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clocks = <&core_ck>;
		ti,bit-shift = <7>;
		reg = <0x0070>;
	};

	sys_clkout_src_mux: sys_clkout_src_mux@70 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&core_ck>, <&sys_ck>, <&func_96m_ck>, <&func_54m_ck>;
		reg = <0x0070>;
	};

	sys_clkout_src: sys_clkout_src {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&sys_clkout_src_gate>, <&sys_clkout_src_mux>;
	};

	sys_clkout: sys_clkout@70 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clocks = <&sys_clkout_src>;
		ti,bit-shift = <3>;
		ti,max-div = <64>;
		reg = <0x0070>;
		ti,index-power-of-two;
	};

	emul_ck: emul_ck@78 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clocks = <&func_54m_ck>;
		ti,bit-shift = <0>;
		reg = <0x0078>;
	};

	mpu_ck: mpu_ck@140 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clocks = <&core_ck>;
		ti,max-div = <31>;
		reg = <0x0140>;
		ti,index-starts-at-one;
	};

	dsp_gate_fck: dsp_gate_fck@800 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&core_ck>;
		ti,bit-shift = <0>;
		reg = <0x0800>;
	};

	dsp_div_fck: dsp_div_fck@840 {
		#clock-cells = <0>;
		compatible = "ti,composite-divider-clock";
		clocks = <&core_ck>;
		reg = <0x0840>;
	};

	dsp_fck: dsp_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&dsp_gate_fck>, <&dsp_div_fck>;
	};

	core_l3_ck: core_l3_ck@240 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clocks = <&core_ck>;
		ti,max-div = <31>;
		reg = <0x0240>;
		ti,index-starts-at-one;
	};

	gfx_3d_gate_fck: gfx_3d_gate_fck@300 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&core_l3_ck>;
		ti,bit-shift = <2>;
		reg = <0x0300>;
	};

	gfx_3d_div_fck: gfx_3d_div_fck@340 {
		#clock-cells = <0>;
		compatible = "ti,composite-divider-clock";
		clocks = <&core_l3_ck>;
		ti,max-div = <4>;
		reg = <0x0340>;
		ti,index-starts-at-one;
	};

	gfx_3d_fck: gfx_3d_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gfx_3d_gate_fck>, <&gfx_3d_div_fck>;
	};

	gfx_2d_gate_fck: gfx_2d_gate_fck@300 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&core_l3_ck>;
		ti,bit-shift = <1>;
		reg = <0x0300>;
	};

	gfx_2d_div_fck: gfx_2d_div_fck@340 {
		#clock-cells = <0>;
		compatible = "ti,composite-divider-clock";
		clocks = <&core_l3_ck>;
		ti,max-div = <4>;
		reg = <0x0340>;
		ti,index-starts-at-one;
	};

	gfx_2d_fck: gfx_2d_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gfx_2d_gate_fck>, <&gfx_2d_div_fck>;
	};

	gfx_ick: gfx_ick@310 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&core_l3_ck>;
		ti,bit-shift = <0>;
		reg = <0x0310>;
	};

	l4_ck: l4_ck@240 {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		clocks = <&core_l3_ck>;
		ti,bit-shift = <5>;
		ti,max-div = <3>;
		reg = <0x0240>;
		ti,index-starts-at-one;
	};

	dss_ick: dss_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-no-wait-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <0>;
		reg = <0x0210>;
	};

	dss1_gate_fck: dss1_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clocks = <&core_ck>;
		ti,bit-shift = <0>;
		reg = <0x0200>;
	};

	core_d2_ck: core_d2_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_ck>;
		clock-mult = <1>;
		clock-div = <2>;
	};

	core_d3_ck: core_d3_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_ck>;
		clock-mult = <1>;
		clock-div = <3>;
	};

	core_d4_ck: core_d4_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_ck>;
		clock-mult = <1>;
		clock-div = <4>;
	};

	core_d5_ck: core_d5_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_ck>;
		clock-mult = <1>;
		clock-div = <5>;
	};

	core_d6_ck: core_d6_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_ck>;
		clock-mult = <1>;
		clock-div = <6>;
	};

	dummy_ck: dummy_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <0>;
	};

	core_d8_ck: core_d8_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_ck>;
		clock-mult = <1>;
		clock-div = <8>;
	};

	core_d9_ck: core_d9_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_ck>;
		clock-mult = <1>;
		clock-div = <9>;
	};

	core_d12_ck: core_d12_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_ck>;
		clock-mult = <1>;
		clock-div = <12>;
	};

	core_d16_ck: core_d16_ck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_ck>;
		clock-mult = <1>;
		clock-div = <16>;
	};

	dss1_mux_fck: dss1_mux_fck@240 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&sys_ck>, <&core_ck>, <&core_d2_ck>, <&core_d3_ck>, <&core_d4_ck>, <&core_d5_ck>, <&core_d6_ck>, <&core_d8_ck>, <&core_d9_ck>, <&core_d12_ck>, <&core_d16_ck>;
		ti,bit-shift = <8>;
		reg = <0x0240>;
	};

	dss1_fck: dss1_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&dss1_gate_fck>, <&dss1_mux_fck>;
	};

	dss2_gate_fck: dss2_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-no-wait-gate-clock";
		clocks = <&func_48m_ck>;
		ti,bit-shift = <1>;
		reg = <0x0200>;
	};

	dss2_mux_fck: dss2_mux_fck@240 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&sys_ck>, <&func_48m_ck>;
		ti,bit-shift = <13>;
		reg = <0x0240>;
	};

	dss2_fck: dss2_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&dss2_gate_fck>, <&dss2_mux_fck>;
	};

	dss_54m_fck: dss_54m_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_54m_ck>;
		ti,bit-shift = <2>;
		reg = <0x0200>;
	};

	ssi_ssr_sst_gate_fck: ssi_ssr_sst_gate_fck@204 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&core_ck>;
		ti,bit-shift = <1>;
		reg = <0x0204>;
	};

	ssi_ssr_sst_div_fck: ssi_ssr_sst_div_fck@240 {
		#clock-cells = <0>;
		compatible = "ti,composite-divider-clock";
		clocks = <&core_ck>;
		ti,bit-shift = <20>;
		reg = <0x0240>;
	};

	ssi_ssr_sst_fck: ssi_ssr_sst_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&ssi_ssr_sst_gate_fck>, <&ssi_ssr_sst_div_fck>;
	};

	usb_l4_gate_ick: usb_l4_gate_ick@214 {
		#clock-cells = <0>;
		compatible = "ti,composite-interface-clock";
		clocks = <&core_l3_ck>;
		ti,bit-shift = <0>;
		reg = <0x0214>;
	};

	usb_l4_div_ick: usb_l4_div_ick@240 {
		#clock-cells = <0>;
		compatible = "ti,composite-divider-clock";
		clocks = <&core_l3_ck>;
		ti,bit-shift = <25>;
		reg = <0x0240>;
		ti,dividers = <0>, <1>, <2>, <0>, <4>;
	};

	usb_l4_ick: usb_l4_ick {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&usb_l4_gate_ick>, <&usb_l4_div_ick>;
	};

	ssi_l4_ick: ssi_l4_ick@214 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <1>;
		reg = <0x0214>;
	};

	gpt1_ick: gpt1_ick@410 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&sys_ck>;
		ti,bit-shift = <0>;
		reg = <0x0410>;
	};

	gpt1_gate_fck: gpt1_gate_fck@400 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <0>;
		reg = <0x0400>;
	};

	gpt1_mux_fck: gpt1_mux_fck@440 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		reg = <0x0440>;
	};

	gpt1_fck: gpt1_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt1_gate_fck>, <&gpt1_mux_fck>;
	};

	gpt2_ick: gpt2_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <4>;
		reg = <0x0210>;
	};

	gpt2_gate_fck: gpt2_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <4>;
		reg = <0x0200>;
	};

	gpt2_mux_fck: gpt2_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <2>;
		reg = <0x0244>;
	};

	gpt2_fck: gpt2_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt2_gate_fck>, <&gpt2_mux_fck>;
	};

	gpt3_ick: gpt3_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <5>;
		reg = <0x0210>;
	};

	gpt3_gate_fck: gpt3_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <5>;
		reg = <0x0200>;
	};

	gpt3_mux_fck: gpt3_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <4>;
		reg = <0x0244>;
	};

	gpt3_fck: gpt3_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt3_gate_fck>, <&gpt3_mux_fck>;
	};

	gpt4_ick: gpt4_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <6>;
		reg = <0x0210>;
	};

	gpt4_gate_fck: gpt4_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <6>;
		reg = <0x0200>;
	};

	gpt4_mux_fck: gpt4_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <6>;
		reg = <0x0244>;
	};

	gpt4_fck: gpt4_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt4_gate_fck>, <&gpt4_mux_fck>;
	};

	gpt5_ick: gpt5_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <7>;
		reg = <0x0210>;
	};

	gpt5_gate_fck: gpt5_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <7>;
		reg = <0x0200>;
	};

	gpt5_mux_fck: gpt5_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <8>;
		reg = <0x0244>;
	};

	gpt5_fck: gpt5_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt5_gate_fck>, <&gpt5_mux_fck>;
	};

	gpt6_ick: gpt6_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <8>;
		reg = <0x0210>;
	};

	gpt6_gate_fck: gpt6_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <8>;
		reg = <0x0200>;
	};

	gpt6_mux_fck: gpt6_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <10>;
		reg = <0x0244>;
	};

	gpt6_fck: gpt6_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt6_gate_fck>, <&gpt6_mux_fck>;
	};

	gpt7_ick: gpt7_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <9>;
		reg = <0x0210>;
	};

	gpt7_gate_fck: gpt7_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <9>;
		reg = <0x0200>;
	};

	gpt7_mux_fck: gpt7_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <12>;
		reg = <0x0244>;
	};

	gpt7_fck: gpt7_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt7_gate_fck>, <&gpt7_mux_fck>;
	};

	gpt8_ick: gpt8_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <10>;
		reg = <0x0210>;
	};

	gpt8_gate_fck: gpt8_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <10>;
		reg = <0x0200>;
	};

	gpt8_mux_fck: gpt8_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <14>;
		reg = <0x0244>;
	};

	gpt8_fck: gpt8_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt8_gate_fck>, <&gpt8_mux_fck>;
	};

	gpt9_ick: gpt9_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <11>;
		reg = <0x0210>;
	};

	gpt9_gate_fck: gpt9_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <11>;
		reg = <0x0200>;
	};

	gpt9_mux_fck: gpt9_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <16>;
		reg = <0x0244>;
	};

	gpt9_fck: gpt9_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt9_gate_fck>, <&gpt9_mux_fck>;
	};

	gpt10_ick: gpt10_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <12>;
		reg = <0x0210>;
	};

	gpt10_gate_fck: gpt10_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <12>;
		reg = <0x0200>;
	};

	gpt10_mux_fck: gpt10_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <18>;
		reg = <0x0244>;
	};

	gpt10_fck: gpt10_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt10_gate_fck>, <&gpt10_mux_fck>;
	};

	gpt11_ick: gpt11_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <13>;
		reg = <0x0210>;
	};

	gpt11_gate_fck: gpt11_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <13>;
		reg = <0x0200>;
	};

	gpt11_mux_fck: gpt11_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <20>;
		reg = <0x0244>;
	};

	gpt11_fck: gpt11_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt11_gate_fck>, <&gpt11_mux_fck>;
	};

	gpt12_ick: gpt12_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <14>;
		reg = <0x0210>;
	};

	gpt12_gate_fck: gpt12_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <14>;
		reg = <0x0200>;
	};

	gpt12_mux_fck: gpt12_mux_fck@244 {
		#clock-cells = <0>;
		compatible = "ti,composite-mux-clock";
		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
		ti,bit-shift = <22>;
		reg = <0x0244>;
	};

	gpt12_fck: gpt12_fck {
		#clock-cells = <0>;
		compatible = "ti,composite-clock";
		clocks = <&gpt12_gate_fck>, <&gpt12_mux_fck>;
	};

	mcbsp1_ick: mcbsp1_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <15>;
		reg = <0x0210>;
	};

	mcbsp1_gate_fck: mcbsp1_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&mcbsp_clks>;
		ti,bit-shift = <15>;
		reg = <0x0200>;
	};

	mcbsp2_ick: mcbsp2_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <16>;
		reg = <0x0210>;
	};

	mcbsp2_gate_fck: mcbsp2_gate_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,composite-gate-clock";
		clocks = <&mcbsp_clks>;
		ti,bit-shift = <16>;
		reg = <0x0200>;
	};

	mcspi1_ick: mcspi1_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <17>;
		reg = <0x0210>;
	};

	mcspi1_fck: mcspi1_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_48m_ck>;
		ti,bit-shift = <17>;
		reg = <0x0200>;
	};

	mcspi2_ick: mcspi2_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <18>;
		reg = <0x0210>;
	};

	mcspi2_fck: mcspi2_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_48m_ck>;
		ti,bit-shift = <18>;
		reg = <0x0200>;
	};

	uart1_ick: uart1_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <21>;
		reg = <0x0210>;
	};

	uart1_fck: uart1_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_48m_ck>;
		ti,bit-shift = <21>;
		reg = <0x0200>;
	};

	uart2_ick: uart2_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <22>;
		reg = <0x0210>;
	};

	uart2_fck: uart2_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_48m_ck>;
		ti,bit-shift = <22>;
		reg = <0x0200>;
	};

	uart3_ick: uart3_ick@214 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <2>;
		reg = <0x0214>;
	};

	uart3_fck: uart3_fck@204 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_48m_ck>;
		ti,bit-shift = <2>;
		reg = <0x0204>;
	};

	gpios_ick: gpios_ick@410 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&sys_ck>;
		ti,bit-shift = <2>;
		reg = <0x0410>;
	};

	gpios_fck: gpios_fck@400 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <2>;
		reg = <0x0400>;
	};

	mpu_wdt_ick: mpu_wdt_ick@410 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&sys_ck>;
		ti,bit-shift = <3>;
		reg = <0x0410>;
	};

	mpu_wdt_fck: mpu_wdt_fck@400 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <3>;
		reg = <0x0400>;
	};

	sync_32k_ick: sync_32k_ick@410 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&sys_ck>;
		ti,bit-shift = <1>;
		reg = <0x0410>;
	};

	wdt1_ick: wdt1_ick@410 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&sys_ck>;
		ti,bit-shift = <4>;
		reg = <0x0410>;
	};

	omapctrl_ick: omapctrl_ick@410 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&sys_ck>;
		ti,bit-shift = <5>;
		reg = <0x0410>;
	};

	cam_fck: cam_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,gate-clock";
		clocks = <&func_96m_ck>;
		ti,bit-shift = <31>;
		reg = <0x0200>;
	};

	cam_ick: cam_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-no-wait-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <31>;
		reg = <0x0210>;
	};

	mailboxes_ick: mailboxes_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <30>;
		reg = <0x0210>;
	};

	wdt4_ick: wdt4_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <29>;
		reg = <0x0210>;
	};

	wdt4_fck: wdt4_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_32k_ck>;
		ti,bit-shift = <29>;
		reg = <0x0200>;
	};

	mspro_ick: mspro_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <27>;
		reg = <0x0210>;
	};

	mspro_fck: mspro_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_96m_ck>;
		ti,bit-shift = <27>;
		reg = <0x0200>;
	};

	fac_ick: fac_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <25>;
		reg = <0x0210>;
	};

	fac_fck: fac_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_12m_ck>;
		ti,bit-shift = <25>;
		reg = <0x0200>;
	};

	hdq_ick: hdq_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <23>;
		reg = <0x0210>;
	};

	hdq_fck: hdq_fck@200 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_12m_ck>;
		ti,bit-shift = <23>;
		reg = <0x0200>;
	};

	i2c1_ick: i2c1_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <19>;
		reg = <0x0210>;
	};

	i2c2_ick: i2c2_ick@210 {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <20>;
		reg = <0x0210>;
	};

	gpmc_fck: gpmc_fck@238 {
		#clock-cells = <0>;
		compatible = "ti,fixed-factor-clock";
		clocks = <&core_l3_ck>;
		ti,clock-div = <1>;
		ti,autoidle-shift = <1>;
		reg = <0x0238>;
		ti,clock-mult = <1>;
	};

	sdma_fck: sdma_fck {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&core_l3_ck>;
		clock-mult = <1>;
		clock-div = <1>;
	};

	sdma_ick: sdma_ick@238 {
		#clock-cells = <0>;
		compatible = "ti,fixed-factor-clock";
		clocks = <&core_l3_ck>;
		ti,clock-div = <1>;
		ti,autoidle-shift = <0>;
		reg = <0x0238>;
		ti,clock-mult = <1>;
	};

	sdrc_ick: sdrc_ick@238 {
		#clock-cells = <0>;
		compatible = "ti,fixed-factor-clock";
		clocks = <&core_l3_ck>;
		ti,clock-div = <1>;
		ti,autoidle-shift = <2>;
		reg = <0x0238>;
		ti,clock-mult = <1>;
	};

	des_ick: des_ick@21c {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <0>;
		reg = <0x021c>;
	};

	sha_ick: sha_ick@21c {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <1>;
		reg = <0x021c>;
	};

	rng_ick: rng_ick@21c {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <2>;
		reg = <0x021c>;
	};

	aes_ick: aes_ick@21c {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <3>;
		reg = <0x021c>;
	};

	pka_ick: pka_ick@21c {
		#clock-cells = <0>;
		compatible = "ti,omap3-interface-clock";
		clocks = <&l4_ck>;
		ti,bit-shift = <4>;
		reg = <0x021c>;
	};

	usb_fck: usb_fck@204 {
		#clock-cells = <0>;
		compatible = "ti,wait-gate-clock";
		clocks = <&func_48m_ck>;
		ti,bit-shift = <0>;
		reg = <0x0204>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;

#include "omap3-beagle.dts"

/ {
	model = "TI OMAP3 BeagleBoard A to B4";
	compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
};

/*
 * Workaround for capacitor C70 issue, see "Boards revision A and < B5"
 * section at https://elinux.org/BeagleBoard_Community
 */

/* Unusable as clocksource because of unreliable oscillator */
&counter32k {
	status = "disabled";
};

/* Unusable as clockevent because of unreliable oscillator, allow to idle */
&timer1_target {
	/delete-property/ti,no-reset-on-init;
	/delete-property/ti,no-idle;
	timer@0 {
		/delete-property/ti,timer-alwon;
	};
};

/* Preferred always-on timer for clocksource */
&timer12_target {
	ti,no-reset-on-init;
	ti,no-idle;
	timer@0 {
		/* Always clocked by secure_32k_fck */
	};
};

/* Preferred timer for clockevent */
&timer2_target {
	ti,no-reset-on-init;
	ti,no-idle;
	timer@0 {
		assigned-clocks = <&gpt2_fck>;
		assigned-clock-parents = <&sys_ck>;
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
 */

#include "omap3-beagle-xm.dts"

/ {
	/* HS USB Port 2 Power enable was inverted with the xM C */
	hsusb2_power: hsusb2_power_reg {
		enable-active-high;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap36xx.dtsi"

/ {
	model = "TI OMAP3 BeagleBoard xM";
	compatible = "ti,omap3-beagle-xm", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	aliases {
		display0 = &dvi0;
		display1 = &tv0;
		ethernet = &ethernet;
	};

	/* fixed 26MHz oscillator */
	hfclk_26m: oscillator {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <26000000>;
	};

	led-controller-1 {
		compatible = "gpio-leds";

		led-1 {
			label = "beagleboard::usr0";
			gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
			linux,default-trigger = "heartbeat";
		};

		led-2 {
			label = "beagleboard::usr1";
			gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
			linux,default-trigger = "mmc0";
		};
	};

	led-controller-2 {
		compatible = "pwm-leds";

		led-3 {
			label = "beagleboard::pmu_stat";
			pwms = <&twl_pwmled 1 7812500>;
			max-brightness = <127>;
		};
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "omap3beagle";

		ti,mcbsp = <&mcbsp2>;
	};

	gpio_keys {
		compatible = "gpio-keys";

		user {
			label = "user";
			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
			linux,code = <0x114>;
			wakeup-source;
		};

	};

	/* HS USB Port 2 Power */
	hsusb2_power: hsusb2_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb2_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;	/* GPIO LEDA */
		startup-delay-us = <70000>;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
		vcc-supply = <&hsusb2_power>;
		#phy-cells = <0>;
	};

	tfp410: encoder0 {
		compatible = "ti,tfp410";
		powerdown-gpios = <&twl_gpio 2 GPIO_ACTIVE_LOW>;

		/* XXX pinctrl from twl */

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector0 {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c3>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};

	tv0: connector1 {
		compatible = "svideo-connector";
		label = "tv";

		port {
			tv_connector_in: endpoint {
				remote-endpoint = <&venc_out>;
			};
		};
	};

	etb@5401b000 {
		compatible = "arm,coresight-etb10", "arm,primecell";
		reg = <0x5401b000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		in-ports {
			port {
				etb_in: endpoint {
					remote-endpoint = <&etm_out>;
				};
			};
		};
	};

	etm@54010000 {
		compatible = "arm,coresight-etm3x", "arm,primecell";
		reg = <0x54010000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		out-ports {
			port {
				etm_out: endpoint {
					remote-endpoint = <&etb_in>;
				};
			};
		};
	};
};

&omap3_pmx_wkup {
	gpio1_pins: pinmux_gpio1_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a0e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */
		>;
	};

	dss_dpi_pins2: pinmux_dss_dpi_pins1 {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3)   /* sys_boot0.dss_data18 */
			OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3)   /* sys_boot1.dss_data19 */
			OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3)   /* sys_boot3.dss_data20 */
			OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3)   /* sys_boot4.dss_data21 */
			OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3)   /* sys_boot5.dss_data22 */
			OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3)   /* sys_boot6.dss_data23 */
		>;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_pins
	>;

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
		>;
	};

	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	dss_dpi_pins1: pinmux_dss_dpi_pins2 {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */

			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */

			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3)   /* dss_data18.dss_data0 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3)   /* dss_data19.dss_data1 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3)   /* dss_data20.dss_data2 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3)   /* dss_data21.dss_data3 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3)   /* dss_data22.dss_data4 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3)   /* dss_data23.dss_data5 */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_2_pins
	>;

	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		clocks = <&hfclk_26m>;
		clock-names = "fck";

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};

		twl_power: power {
			compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
			ti,use_poweroff;
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c2 {
	clock-frequency = <400000>;
};

&i2c3 {
	clock-frequency = <100000>;
};

&mmc1 {
	vmmc-supply = <&vmmc1>;
	vqmmc-supply = <&vsim>;
	bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&twl_gpio {
	ti,use-leds;
	/* pullups: BIT(1) */
	ti,pullups = <0x000002>;
	/*
	 * pulldowns:
	 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	 * BIT(15), BIT(16), BIT(17)
	 */
	ti,pulldowns = <0x03a1c4>;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

&uart3 {
	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

&gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio1_pins>;
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;

	#address-cells = <1>;
	#size-cells = <0>;

	hub@2 {
		compatible = "usb424,9514";
		reg = <2>;
		#address-cells = <1>;
		#size-cells = <0>;

		ethernet: ethernet@1 {
			compatible = "usb424,ec00";
			reg = <1>;
		};
	};
};

&vaux2 {
	regulator-name = "usb_1v8";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};

&mcbsp2 {
	status = "okay";
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <
		&dss_dpi_pins1
		&dss_dpi_pins2
	>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};

&venc {
	status = "okay";

	vdda-supply = <&vdac>;

	port {
		venc_out: endpoint {
			remote-endpoint = <&tv_connector_in>;
			ti,channels = <2>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap34xx.dtsi"

/ {
	model = "TI OMAP3 BeagleBoard";
	compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3";

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	aliases {
		display0 = &dvi0;
		display1 = &tv0;
	};

	leds {
		compatible = "gpio-leds";
		led-pmu-stat {
			label = "beagleboard::pmu_stat";
			gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
		};

		led-heartbeat {
			label = "beagleboard::usr0";
			gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
			linux,default-trigger = "heartbeat";
		};

		led-mmc {
			label = "beagleboard::usr1";
			gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
			linux,default-trigger = "mmc0";
		};
	};

	/* HS USB Port 2 Power */
	hsusb2_power: hsusb2_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb2_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;	/* GPIO LEDA */
		startup-delay-us = <70000>;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;	/* gpio_147 */
		vcc-supply = <&hsusb2_power>;
		#phy-cells = <0>;
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "omap3beagle";

		ti,mcbsp = <&mcbsp2>;
	};

	gpio_keys {
		compatible = "gpio-keys";

		user {
			label = "user";
			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
			linux,code = <0x114>;
			wakeup-source;
		};

	};

	tfp410: encoder0 {
		compatible = "ti,tfp410";
		powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;	/* gpio_170 */

		pinctrl-names = "default";
		pinctrl-0 = <&tfp410_pins>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector0 {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c3>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};

	tv0: connector1 {
		compatible = "svideo-connector";
		label = "tv";

		port {
			tv_connector_in: endpoint {
				remote-endpoint = <&venc_out>;
			};
		};
	};

	etb@540000000 {
		compatible = "arm,coresight-etb10", "arm,primecell";
		reg = <0x5401b000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		in-ports {
			port {
				etb_in: endpoint {
					remote-endpoint = <&etm_out>;
				};
			};
		};
	};

	etm@54010000 {
		compatible = "arm,coresight-etm3x", "arm,primecell";
		reg = <0x54010000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		out-ports {
			port {
				etm_out: endpoint {
					remote-endpoint = <&etb_in>;
				};
			};
		};
	};
};

&omap3_pmx_wkup {
	gpio1_pins: pinmux_gpio1_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
		>;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_pins
	>;

	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	tfp410_pins: pinmux_tfp410_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4)	/* hdq_sio.gpio_170 */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_2_pins
	>;

	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c3 {
	clock-frequency = <100000>;
};

&mmc1 {
	vmmc-supply = <&vmmc1>;
	vqmmc-supply = <&vsim>;
	bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};

&twl_gpio {
	ti,use-leds;
	/* pullups: BIT(1) */
	ti,pullups = <0x000002>;
	/*
	 * pulldowns:
	 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	 * BIT(15), BIT(16), BIT(17)
	 */
	ti,pulldowns = <0x03a1c4>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
};

&gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio1_pins>;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

&vaux2 {
	regulator-name = "vdd_ehci";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};

&mcbsp2 {
	status = "okay";
};

/* Needed to power the DPI pins */
&vpll2 {
	regulator-always-on;
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_dpi_pins>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};

&venc {
	status = "okay";

	vdda-supply = <&vdac>;

	port {
		venc_out: endpoint {
			remote-endpoint = <&tv_connector_in>;
			ti,channels = <2>;
		};
	};
};

&gpmc {
	status = "okay";
	ranges = <0 0 0x30000000 0x1000000>;	/* CS0 space, 16MB */

	/* Chip select 0 */
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>;		/* NAND I/O window, 4 bytes */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		ti,nand-ecc-opt = "ham1";
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		nand-bus-width = <16>;
		#address-cells = <1>;
		#size-cells = <1>;

		gpmc,device-width = <2>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <36>;
		gpmc,cs-wr-off-ns = <36>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <24>;
		gpmc,adv-wr-off-ns = <36>;
		gpmc,oe-on-ns = <6>;
		gpmc,oe-off-ns = <48>;
		gpmc,we-on-ns = <6>;
		gpmc,we-off-ns = <30>;
		gpmc,rd-cycle-ns = <72>;
		gpmc,wr-cycle-ns = <72>;
		gpmc,access-ns = <54>;
		gpmc,wr-access-ns = <30>;

		partition@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x80000 0x1e0000>;
		};
		partition@1c0000 {
			label = "U-Boot Env";
			reg = <0x260000 0x20000>;
		};
		partition@280000 {
			label = "Kernel";
			reg = <0x280000 0x400000>;
		};
		partition@780000 {
			label = "Filesystem";
			reg = <0x680000 0xf980000>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Support for CompuLab CM-T3517
 */
/dts-v1/;

#include "am3517.dtsi"
#include "omap3-cm-t3x.dtsi"

/ {
	model = "CompuLab CM-T3517";
	compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";

	vmmc: regulator-vmmc {
		compatible = "regulator-fixed";
		regulator-name = "vmmc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	wl12xx_vmmc2: wl12xx_vmmc2 {
		compatible = "regulator-fixed";
		regulator-name = "vw1271";
		pinctrl-names = "default";
		pinctrl-0 = <
				&wl12xx_wkup_pins
				&wl12xx_core_pins
			    >;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
		startup-delay-us = <20000>;
		enable-active-high;
	};

	wl12xx_vaux2: wl12xx_vaux2 {
		compatible = "regulator-fixed";
		regulator-name = "vwl1271_vaux2";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};
};

&omap3_pmx_wkup {

	wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4)	/* sys_boot2.gpio_4 */
			OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4)	/* sys_boot4.gpio_6 */
		>;
	};
};

&omap3_pmx_core {

	phy1_reset_pins: pinmux_hsusb1_phy_reset_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4)	/* uart2_tx.gpio_146 */
		>;
	};

	phy2_reset_pins: pinmux_hsusb2_phy_reset_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4)	/* uart2_rx.gpio_147 */
		>;
	};

	otg_drv_vbus: pinmux_otg_drv_vbus {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
		>;
	};

	wl12xx_core_pins: pinmux_wl12xx_core_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4)	/* gpmc_ncs5.gpio_56 */
			OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4)	/* uart2_rts.gpio_145 */
		>;
	};

	usb_hub_pins: pinmux_usb_hub_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4)	/* mcbsp4_clkx.gpio_152 - USB HUB RST */
		>;
	};
};

&hsusb1_phy {
	pinctrl-names = "default";
	pinctrl-0 = <&phy1_reset_pins>;
	reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
};

&hsusb2_phy {
	pinctrl-names = "default";
	pinctrl-0 = <&phy2_reset_pins>;
	reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
};

&davinci_emac {
	status = "okay";
};

&davinci_mdio {
	status = "okay";
};

&am35x_otg_hs {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&otg_drv_vbus>;
};

&mmc1 {
	vmmc-supply = <&vmmc>;
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	vmmc-supply = <&wl12xx_vmmc2>;
	vqmmc-supply = <&wl12xx_vaux2>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio5>;
		interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 145 */
		ref-clock-frequency = <38400000>;
	};
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <
		&dss_dpi_pins_common
		&dss_dpi_pins_cm_t35x
	>;
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Support for CompuLab CM-T3530
 */
/dts-v1/;

#include "omap34xx.dtsi"
#include "omap3-cm-t3x30.dtsi"

/ {
	model = "CompuLab CM-T3530";
	compatible = "compulab,omap3-cm-t3530", "ti,omap3430", "ti,omap34xx", "ti,omap3";

	/* Regulator to trigger the reset signal of the Wifi module */
	mmc2_sdio_reset: regulator-mmc2-sdio-reset {
		compatible = "regulator-fixed";
		regulator-name = "regulator-mmc2-sdio-reset";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&omap3_pmx_core {
	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat3.sdmmc2_dat3 */
			OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1)		/* sdmmc2_dat4.sdmmc2_dir_dat0 */
			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1)		/* sdmmc2_dat5.sdmmc2_dir_dat1 */
			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1)		/* sdmmc2_dat6.sdmmc2_dir_cmd */
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1)		/* sdmmc2_dat7.sdmmc2_clkin */
		>;
	};
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	vmmc-supply = <&mmc2_sdio_reset>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <
		&dss_dpi_pins_common
		&dss_dpi_pins_cm_t35x
	>;
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Support for CompuLab CM-T3730
 */
/dts-v1/;

#include "omap36xx.dtsi"
#include "omap3-cm-t3x30.dtsi"

/ {
	model = "CompuLab CM-T3730";
	compatible = "compulab,omap3-cm-t3730", "ti,omap3630", "ti,omap36xx", "ti,omap3";

	wl12xx_vmmc2: wl12xx_vmmc2 {
		compatible = "regulator-fixed";
		regulator-name = "vw1271";
		pinctrl-names = "default";
		pinctrl-0 = <&wl12xx_gpio>;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;   /* gpio73 */
		startup-delay-us = <20000>;
		enable-active-high;
	};

	wl12xx_vaux2: wl12xx_vaux2 {
		compatible = "regulator-fixed";
		regulator-name = "vwl1271_vaux2";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		vin-supply = <&vaux2>;
	};
};

&omap3_pmx_wkup {
	dss_dpi_pins_cm_t3730: pinmux_dss_dpi_pins_cm_t3730 {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a08, PIN_OUTPUT | MUX_MODE3)   /* sys_boot0.dss_data18 */
			OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3)   /* sys_boot1.dss_data19 */
			OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3)   /* sys_boot3.dss_data20 */
			OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3)   /* sys_boot4.dss_data21 */
			OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3)   /* sys_boot5.dss_data22 */
			OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3)   /* sys_boot6.dss_data23 */
		>;
	};
};

&omap3_pmx_core {

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
		>;
	};

	wl12xx_gpio: pinmux_wl12xx_gpio {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)	/* dss_data3.gpio_73 */
			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4)	/* sdmmc2_dat4.gpio_136 */
		>;
	};
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	vmmc-supply = <&wl12xx_vmmc2>;
	vqmmc-supply = <&wl12xx_vaux2>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio5>;
		interrupts = <8 IRQ_TYPE_EDGE_RISING>; /* gpio 136 */
		ref-clock-frequency = <38400000>;
	};
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <
		&dss_dpi_pins_common
		&dss_dpi_pins_cm_t3730
	>;
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Common support for CompuLab CM-T3x CoMs
 */

/ {

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&green_led_pins>;
		ledb {
			label = "cm-t3x:green";
			gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>;  /* gpio186 */
			linux,default-trigger = "heartbeat";
		};
	};

	/* HS USB Port 1 Power */
	hsusb1_power: hsusb1_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb1_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <70000>;
	};

	/* HS USB Port 2 Power */
	hsusb2_power: hsusb2_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb2_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		startup-delay-us = <70000>;
	};

	/* HS USB Host PHY on PORT 1 */
	hsusb1_phy: hsusb1_phy {
		compatible = "usb-nop-xceiv";
		vcc-supply = <&hsusb1_power>;
		#phy-cells = <0>;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		vcc-supply = <&hsusb2_power>;
		#phy-cells = <0>;
	};

	ads7846reg: ads7846-reg {
		compatible = "regulator-fixed";
		regulator-name = "ads7846-reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	tv0: svideo-connector {
		compatible = "svideo-connector";
		label = "tv";

		port {
			tv_connector_in: endpoint {
				remote-endpoint = <&venc_out>;
			};
		};
	};
};

&omap3_pmx_core {

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT  | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};

	green_led_pins: pinmux_green_led_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4)	/* sys_clkout2.gpio_186 */
		>;
	};

	dss_dpi_pins_common: pinmux_dss_dpi_pins_common {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */

			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
		>;
	};

	dss_dpi_pins_cm_t35x: pinmux_dss_dpi_pins_cm_t35x {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
		>;
	};

	ads7846_pins: pinmux_ads7846_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20ba, PIN_INPUT_PULLUP | MUX_MODE4)	/* gpmc_ncs6.gpio_57 */
		>;
	};

	mcspi1_pins: pinmux_mcspi1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)	/* mcspi1_clk */
			OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0)	/* mcspi1_simo */
			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0)	/* mcspi1_somi */
			OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx */
			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)	/* mcbsp2_clkx */
			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)	/* mcbsp2_dr */
			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)	/* mcbsp2_dx */
		>;
	};
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	bus-width = <4>;
};

&mmc3 {
	status = "disabled";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <400000>;

	at24@50 {
		compatible = "atmel,24c02";
		pagesize = <16>;
		reg = <0x50>;
	};
};

&i2c3 {
	clock-frequency = <400000>;
};

&usbhshost {
	port1-mode = "ehci-phy";
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <&hsusb1_phy &hsusb2_phy>;
};

&mcspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi1_pins>;

	/* touch controller */
	ads7846@0 {
		pinctrl-names = "default";
		pinctrl-0 = <&ads7846_pins>;

		compatible = "ti,ads7846";
		vcc-supply = <&ads7846reg>;

		reg = <0>;			/* CS0 */
		spi-max-frequency = <1500000>;

		interrupt-parent = <&gpio2>;
		interrupts = <25 0>;		/* gpio_57 */
		pendown-gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;

		ti,x-min = /bits/ 16 <0x0>;
		ti,x-max = /bits/ 16 <0x0fff>;
		ti,y-min = /bits/ 16 <0x0>;
		ti,y-max = /bits/ 16 <0x0fff>;

		ti,x-plate-ohms = /bits/ 16 <180>;
		ti,pressure-max = /bits/ 16 <255>;

		ti,debounce-max = /bits/ 16 <30>;
		ti,debounce-tol = /bits/ 16 <10>;
		ti,debounce-rep = /bits/ 16 <1>;

		wakeup-source;
	};
};

&venc {
	status = "okay";

	port {
		venc_out: endpoint {
			remote-endpoint = <&tv_connector_in>;
			ti,channels = <2>;
		};
	};
};

&mcbsp2 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
};

&gpmc {
	ranges = <0 0 0x30000000 0x01000000>;	/* CS0: 16MB for NAND */

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		nand-bus-width = <8>;
		gpmc,device-width = <1>;
		ti,nand-ecc-opt = "sw";

		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <120>;
		gpmc,cs-wr-off-ns = <120>;

		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <120>;
		gpmc,adv-wr-off-ns = <120>;

		gpmc,we-on-ns = <6>;
		gpmc,we-off-ns = <90>;

		gpmc,oe-on-ns = <6>;
		gpmc,oe-off-ns = <90>;

		gpmc,page-burst-access-ns = <6>;
		gpmc,access-ns = <72>;
		gpmc,cycle2cycle-delay-ns = <60>;

		gpmc,rd-cycle-ns = <120>;
		gpmc,wr-cycle-ns = <120>;
		gpmc,wr-access-ns = <186>;
		gpmc,wr-data-mux-bus-ns = <90>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "xloader";
			reg = <0 0x80000>;
		};
		partition@80000 {
			label = "uboot";
			reg = <0x80000 0x1e0000>;
		};
		partition@260000 {
			label = "uboot environment";
			reg = <0x260000 0x40000>;
		};
		partition@2a0000 {
			label = "linux";
			reg = <0x2a0000 0x400000>;
		};
		partition@6a0000 {
			label = "rootfs";
			reg = <0x6a0000 0x1f880000>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0
/*
 * Common support for CompuLab CM-T3x30 CoMs
 */

#include "omap3-cm-t3x.dtsi"

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "cm-t35";

		ti,mcbsp = <&mcbsp2>;
	};
};

&omap3_pmx_core {

	smsc1_pins: pinmux_smsc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0)	/* gpmc_ncs5.gpmc_ncs5 */
			OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4)	/* uart3_cts_rctx.gpio_163 */
		>;
	};

 	hsusb0_pins: pinmux_hsusb0_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0)		/* hsusb0_clk.hsusb0_clk */
			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)		/* hsusb0_stp.hsusb0_stp */
			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_dir.hsusb0_dir */
			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_nxt.hsusb0_nxt */
			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data0.hsusb2_data0 */
			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data1.hsusb0_data1 */
			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data2.hsusb0_data2 */
			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data3 */
			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data4 */
			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data5 */
			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data6 */
			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* hsusb0_data7.hsusb0_data7 */
		>;
	};
};

#include "omap-gpmc-smsc911x.dtsi"

&gpmc {
	ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
		 <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */

	smsc1: ethernet@gpmc {
		compatible = "smsc,lan9221", "smsc,lan9115";
		pinctrl-names = "default";
		pinctrl-0 = <&smsc1_pins>;
		interrupt-parent = <&gpio6>;
		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
		reg = <5 0 0xff>;
	};
};

&i2c1 {
	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
#include <dt-bindings/input/input.h>

&venc {
	vdda-supply = <&vdac>;
};

&mmc1 {
	vmmc-supply = <&vmmc1>;
};

&twl_gpio {
	ti,use-leds;
	/* pullups: BIT(0) */
	ti,pullups = <0x000001>;
};

&twl_keypad {
	linux,keymap = <
				MATRIX_KEY(0x00, 0x01, KEY_A)
				MATRIX_KEY(0x00, 0x02, KEY_B)
				MATRIX_KEY(0x00, 0x03, KEY_LEFT)

				MATRIX_KEY(0x01, 0x01, KEY_UP)
				MATRIX_KEY(0x01, 0x02, KEY_ENTER)
				MATRIX_KEY(0x01, 0x03, KEY_DOWN)

				MATRIX_KEY(0x02, 0x01, KEY_RIGHT)
				MATRIX_KEY(0x02, 0x02, KEY_C)
				MATRIX_KEY(0x02, 0x03, KEY_D)
			>;
};

&hsusb1_phy {
	reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>;
};

&hsusb2_phy {
	reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
};

&usb_otg_hs {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb0_pins>;
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree Source for OMAP3 SoC CPU thermal
 *
 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
 */

#include <dt-bindings/thermal/thermal.h>

cpu_thermal: cpu-thermal {
	polling-delay-passive = <250>; /* milliseconds */
	polling-delay = <1000>; /* milliseconds */
	coefficients = <0 20000>;

			/* sensor       ID */
	thermal-sensors = <&bandgap     0>;

	cpu_trips: trips {
		cpu_alert0: cpu_alert {
			temperature = <80000>; /* millicelsius */
			hysteresis = <2000>; /* millicelsius */
			type = "passive";
		};
		cpu_crit: cpu_crit {
			temperature = <90000>; /* millicelsius */
			hysteresis = <2000>; /* millicelsius */
			type = "critical";
		};
	};

	cpu_cooling_maps: cooling-maps {
		map0 {
			trip = <&cpu_alert0>;
			cooling-device =
				<&cpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Author: Anil Kumar <anilk4.v@gmail.com>
 */

#include <dt-bindings/input/input.h>

#include "omap34xx.dtsi"
/ {
	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>;	/* 256 MB */
	};

	leds {
		compatible = "gpio-leds";

		led-heartbeat {
			label = "devkit8000::led1";
			gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>;	/* 186 -> LED1 */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led-mmc {
			label = "devkit8000::led2";
			gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;	/* 163 -> LED2 */
			default-state = "on";
			linux,default-trigger = "none";
		};

		led-usr {
			label = "devkit8000::led3";
			gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;	/* 164 -> LED3 */
			default-state = "on";
			linux,default-trigger = "usr";
		};

		led-pmu-stat {
			label = "devkit8000::pmu_stat";
			gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
		};
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "devkit8000";

		ti,mcbsp = <&mcbsp2>;
		ti,audio-routing =
			"Ext Spk", "PREDRIVEL",
			"Ext Spk", "PREDRIVER",
			"MAINMIC", "Main Mic",
			"Main Mic", "Mic Bias 1";
	};

	gpio_keys {
		compatible = "gpio-keys";

		user {
			label = "user";
			gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
			linux,code = <BTN_EXTRA>;
			wakeup-source;
		};
	};

	tfp410: encoder0 {
		compatible = "ti,tfp410";
		powerdown-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint {
					remote-endpoint = <&dpi_dvi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector0 {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c2>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};

	tv0: connector1 {
		compatible = "svideo-connector";
		label = "tv";

		port {
			tv_connector_in: endpoint {
				remote-endpoint = <&venc_out>;
			};
		};
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>;	/* SYS_NIRQ cascaded to intc */

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

&i2c2 {
	clock-frequency = <400000>;
};

&i2c3 {
	status = "disabled";
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&mmc1 {
	vmmc-supply = <&vmmc1>;
	vqmmc-supply = <&vsim>;
	bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

/* Unusable as clockevent because if unreliable oscillator, allow to idle */
&timer1_target {
	/delete-property/ti,no-reset-on-init;
	/delete-property/ti,no-idle;
	timer@0 {
		/delete-property/ti,timer-alwon;
	};
};

/* Preferred timer for clockevent */
&timer12_target {
	ti,no-reset-on-init;
	ti,no-idle;
	timer@0 {
		/* Always clocked by secure_32k_fck */
	};
};

&twl_gpio {
	ti,use-leds;
	/*
	 * pulldowns:
	 * BIT(1), BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	 * BIT(15), BIT(16), BIT(17)
	 */
	ti,pulldowns = <0x03a1c6>;
};

&twl_keypad {
	linux,keymap = <MATRIX_KEY(0, 0, KEY_1)
			MATRIX_KEY(1, 0, KEY_2)
			MATRIX_KEY(2, 0, KEY_3)
			MATRIX_KEY(0, 1, KEY_4)
			MATRIX_KEY(1, 1, KEY_5)
			MATRIX_KEY(2, 1, KEY_6)
			MATRIX_KEY(3, 1, KEY_F5)
			MATRIX_KEY(0, 2, KEY_7)
			MATRIX_KEY(1, 2, KEY_8)
			MATRIX_KEY(2, 2, KEY_9)
			MATRIX_KEY(3, 2, KEY_F6)
			MATRIX_KEY(0, 3, KEY_F7)
			MATRIX_KEY(1, 3, KEY_0)
			MATRIX_KEY(2, 3, KEY_F8)
			MATRIX_KEY(4, 5, KEY_RESERVED)
			MATRIX_KEY(4, 4, KEY_VOLUMEUP)
			MATRIX_KEY(5, 5, KEY_VOLUMEDOWN)
			>;
};

&wdt2 {
	status = "disabled";
};

&mcbsp2 {
	status = "okay";
};

&gpmc {
	ranges = <0 0 0x30000000 0x1000000	/* CS0: 16MB for NAND */
		  6 0 0x2c000000 0x1000000>;	/* CS6: 16MB for DM9000 */

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		ti,nand-ecc-opt = "sw";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;

		x-loader@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};

		bootloaders@80000 {
			label = "U-Boot";
			reg = <0x80000 0x1e0000>;
		};

		bootloaders_env@260000 {
			label = "U-Boot Env";
			reg = <0x260000 0x20000>;
		};

		kernel@280000 {
			label = "Kernel";
			reg = <0x280000 0x400000>;
		};

		filesystem@680000 {
			label = "File System";
			reg = <0x680000 0xf980000>;
		};
	};

	ethernet@6,0 {
		compatible = "davicom,dm9000";
		reg =  <6 0x000 2
			6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */
		bank-width = <2>;
		interrupt-parent = <&gpio1>;
		interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
		davicom,no-eeprom;

		gpmc,mux-add-data = <0>;
		gpmc,device-width = <1>;
		gpmc,wait-pin = <0>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-diffcsen;

		gpmc,cs-on-ns = <6>;
		gpmc,cs-rd-off-ns = <180>;
		gpmc,cs-wr-off-ns = <180>;
		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <18>;
		gpmc,adv-wr-off-ns = <48>;
		gpmc,oe-on-ns = <54>;
		gpmc,oe-off-ns = <168>;
		gpmc,we-on-ns = <54>;
		gpmc,we-off-ns = <168>;
		gpmc,rd-cycle-ns = <186>;
		gpmc,wr-cycle-ns = <186>;
		gpmc,access-ns = <144>;
		gpmc,page-burst-access-ns = <24>;
		gpmc,bus-turnaround-ns = <90>;
		gpmc,cycle2cycle-delay-ns = <90>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,wr-access-ns = <0>;
	};
};

&omap3_pmx_core {
	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
		>;
	};
};

&vpll1 {
	/* Needed for DSS */
	regulator-name = "vdds_dsi";

	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_dpi_pins>;

	vdds_dsi-supply = <&vpll1>;
	vdda_dac-supply = <&vdac>;

	port {
		#address-cells = <1>;
		#size-cells = <0>;
		dpi_dvi_out: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};

		endpoint@1 {
			reg = <1>;
		};
	};
};

&venc {
	status = "okay";

	vdda-supply = <&vdac>;

	port {
		venc_out: endpoint {
			remote-endpoint = <&tv_connector_in>;
			ti,channels = <2>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Author: Anthoine Bourgeois <anthoine.bourgois@gmail.com>
 */

#include "omap3-devkit8000-common.dtsi"
/ {
	aliases {
		display0 = &lcd0;
		display1 = &dvi0;
		display2 = &tv0;
	};

	lcd0: display {
		compatible = "panel-dpi";
		label = "lcd";

		enable-gpios = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_lcd_out>;
			};
		};
	};
};

&dss {
	port {
		#address-cells = <1>;
		#size-cells = <0>;
		dpi_lcd_out: endpoint@1 {
			reg = <1>;
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};

&vio {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
};

&mcspi2 {

	/* touch controller */
	ads7846@0 {
		compatible = "ti,ads7846";
		vcc-supply = <&vio>;

		reg = <0>;			/* CS0 */
		spi-max-frequency = <1500000>;

		interrupt-parent = <&gpio1>;
		interrupts = <27 0>;		/* gpio_27 */
		pendown-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;

		ti,x-min = /bits/ 16 <0x0>;
		ti,x-max = /bits/ 16 <0x0fff>;
		ti,y-min = /bits/ 16 <0x0>;
		ti,y-max = /bits/ 16 <0x0fff>;
		ti,x-plate-ohms = /bits/ 16 <180>;
		ti,pressure-max = /bits/ 16 <255>;
		ti,debounce-max = /bits/ 16 <10>;
		ti,debounce-tol = /bits/ 16 <5>;
		ti,debounce-rep = /bits/ 16 <1>;
		ti,keep-vref-on = <1>;
		ti,settle-delay-usec = /bits/ 16 <150>;

		wakeup-source;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Author: Anthoine Bourgeois <anthoine.bourgois@gmail.com>
 */
/dts-v1/;

/*
 * 4.3'' LCD panel sold with devkit8000 board
 */

#include "omap3-devkit8000-lcd-common.dtsi"
/ {
	model = "TimLL OMAP3 Devkit8000 with 4.3'' LCD panel";
	compatible = "timll,omap3-devkit8000", "ti,omap3430", "ti,omap3";

	lcd0: display {
		panel-timing {
			clock-frequency = <10164705>;
			hactive = <480>;
			vactive = <272>;
			hfront-porch = <2>;
			hback-porch = <2>;
			hsync-len = <41>;
			vback-porch = <2>;
			vfront-porch = <2>;
			vsync-len = <10>;

			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Author: Anthoine Bourgeois <anthoine.bourgois@gmail.com>
 */
/dts-v1/;

/*
 * 7.0'' LCD panel sold with some devkit8000 board
 */

#include "omap3-devkit8000-lcd-common.dtsi"
/ {
	model = "TimLL OMAP3 Devkit8000 with 7.0'' LCD panel";
	compatible = "timll,omap3-devkit8000", "ti,omap3430", "ti,omap3";

	lcd0: display {
		panel-timing {
			clock-frequency = <40000000>;
			hactive = <800>;
			vactive = <480>;
			hfront-porch = <1>;
			hback-porch = <1>;
			hsync-len = <48>;
			vback-porch = <25>;
			vfront-porch = <12>;
			vsync-len = <3>;

			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Author: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
 */
/dts-v1/;

#include "omap3-devkit8000-common.dtsi"
/ {
	model = "TimLL OMAP3 Devkit8000";
	compatible = "timll,omap3-devkit8000", "ti,omap3430", "ti,omap3";

	aliases {
		display1 = &dvi0;
		display2 = &tv0;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2019 André Hentschel <nerv@dawncrow.de>
 */
/dts-v1/;

#include "dm3725.dtsi"

#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	model = "Amazon Echo (first generation)";
	compatible = "amazon,omap3-echo", "ti,omap3630", "ti,omap3";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0xc600000>; /* 198 MB */
	};

	vcc5v: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vcc5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};

	vcc3v3: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	vcc1v8: fixedregulator2 {
		compatible = "regulator-fixed";
		regulator-name = "vcc1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	sdio_pwrseq: sdio-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
		post-power-on-delay-ms = <40>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		pinctrl-names = "default";
		pinctrl-0 = <&button_pins>;

		mute-button {
			label = "mute";
			linux,code = <KEY_MUTE>;
			gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;	/* GPIO_70 */
			wakeup-source;
		};

		help-button {
			label = "help";
			linux,code = <KEY_HELP>;
			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;	/* GPIO_72 */
			wakeup-source;
		};
	};

	rotary: rotary-encoder {
		compatible = "rotary-encoder";
		gpios = <
			&gpio3  5 GPIO_ACTIVE_HIGH /* GPIO_69 */
			&gpio3 12 GPIO_ACTIVE_HIGH /* GPIO_76 */
		>;
		linux,axis = <REL_X>;
		rotary-encoder,relative-axis;
	};

	speaker_amp: speaker-amplifier {
		compatible = "simple-audio-amplifier";
		enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;	/* gpio_129 */
		sound-name-prefix = "Speaker Amp";
		VCC-supply = <&vcc1v8>;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "Misto Speaker";
		simple-audio-card,widgets =
			"Speaker", "Speaker";
		simple-audio-card,routing =
			"Speaker Amp INL", "HPL",
			"Speaker Amp INR", "HPR",
			"Speaker", "Speaker Amp OUTL",
			"Speaker", "Speaker Amp OUTR";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_master>;
		simple-audio-card,frame-master = <&sound_master>;
		simple-audio-card,aux-devs = <&speaker_amp>;

		simple-audio-card,cpu {
			sound-dai = <&mcbsp2>;
		};

		sound_master: simple-audio-card,codec {
			sound-dai = <&codec0>;
			system-clock-frequency = <19200000>;
		};
	};
};

&i2c1 {
	clock-frequency = <400000>;

	tps: tps@2d {
		reg = <0x2d>;
	};
};

&mcbsp2 {
	status = "okay";
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
};

&i2c2 {
	clock-frequency = <400000>;

	lp5523A: lp5523A@32 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "national,lp5523";
		label = "q1";
		reg = <0x32>;
		clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
		enable-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; /* GPIO_109 */

		multi-led@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;
			color = <LED_COLOR_ID_RGB>;

			led@0 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x0>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@1 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x1>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@6 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x6>;
				color = <LED_COLOR_ID_RED>;
			};
		};
		multi-led@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;
			color = <LED_COLOR_ID_RGB>;

			led@2 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x2>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@3 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x3>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@7 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x7>;
				color = <LED_COLOR_ID_RED>;
			};
		};
		multi-led@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2>;
			color = <LED_COLOR_ID_RGB>;

			led@4 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x4>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@5 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x5>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@8 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x8>;
				color = <LED_COLOR_ID_RED>;
			};
		};
	};

	lp5523B: lp5523B@33 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "national,lp5523";
		label = "q3";
		reg = <0x33>;
		clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */

		multi-led@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;
			color = <LED_COLOR_ID_RGB>;

			led@0 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x0>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@1 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x1>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@6 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x6>;
				color = <LED_COLOR_ID_RED>;
			};
		};
		multi-led@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;
			color = <LED_COLOR_ID_RGB>;

			led@2 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x2>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@3 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x3>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@7 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x7>;
				color = <LED_COLOR_ID_RED>;
			};
		};
		multi-led@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2>;
			color = <LED_COLOR_ID_RGB>;

			led@4 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x4>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@5 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x5>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@8 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x8>;
				color = <LED_COLOR_ID_RED>;
			};
		};
	};

	lp5523C: lp5523C@34 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "national,lp5523";
		label = "q4";
		reg = <0x34>;
		clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */

		multi-led@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;
			color = <LED_COLOR_ID_RGB>;

			led@0 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x0>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@1 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x1>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@6 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x6>;
				color = <LED_COLOR_ID_RED>;
			};
		};
		multi-led@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;
			color = <LED_COLOR_ID_RGB>;

			led@2 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x2>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@3 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x3>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@7 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x7>;
				color = <LED_COLOR_ID_RED>;
			};
		};
		multi-led@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2>;
			color = <LED_COLOR_ID_RGB>;

			led@4 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x4>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@5 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x5>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@8 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x8>;
				color = <LED_COLOR_ID_RED>;
			};
		};
	};

	lp5523D: lp552D@35 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "national,lp5523";
		label = "q2";
		reg = <0x35>;
		clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */

		multi-led@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;
			color = <LED_COLOR_ID_RGB>;

			led@0 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x0>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@1 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x1>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@6 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x6>;
				color = <LED_COLOR_ID_RED>;
			};
		};
		multi-led@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;
			color = <LED_COLOR_ID_RGB>;

			led@2 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x2>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@3 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x3>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@7 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x7>;
				color = <LED_COLOR_ID_RED>;
			};
		};
		multi-led@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2>;
			color = <LED_COLOR_ID_RGB>;

			led@4 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x4>;
				color = <LED_COLOR_ID_GREEN>;
			};

			led@5 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x5>;
				color = <LED_COLOR_ID_BLUE>;
			};

			led@8 {
				led-cur = /bits/ 8 <12>;
				max-cur = /bits/ 8 <15>;
				reg = <0x8>;
				color = <LED_COLOR_ID_RED>;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <400000>;

	codec0: codec@18 {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic32x4";
		reg = <0x18>;
		clocks = <&sys_clkout1>;
		clock-names = "mclk";
		ldoin-supply = <&vcc1v8>;
		iov-supply = <&vcc1v8>;
		reset-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;	/* gpio_74 */
	};
};

#include "tps65910.dtsi"

&omap3_pmx_core {
	tps_pins: pinmux_tps_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21e0, PIN_INPUT_PULLUP | PIN_OFF_INPUT_PULLUP | PIN_OFF_OUTPUT_LOW | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */
		>;
	};

	button_pins: pinmux_button_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20dc, PIN_INPUT | MUX_MODE4)	/* dss_data0.gpio_70 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4)	/* dss_data2.gpio_72 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)	/* dss_data4.gpio_74 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* dss_data15.gpio_85 */
			OMAP3_CORE1_IOPAD(0x2a1a, PIN_OUTPUT | MUX_MODE0)	/* sys_clkout1.sys_clkout1 */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_clk.sdmmc1_clk */
			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_cmd.sdmmc1_cmd */
			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat0.sdmmc1_dat0 */
			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat1.sdmmc1_dat1 */
			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat2.sdmmc1_dat2 */
			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat3.sdmmc2_dat3 */
			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat4.sdmmc2_dat4 */
			OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat5.sdmmc2_dat5 */
			OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat6.sdmmc2_dat6 */
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat7.sdmmc2_dat7 */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx.mcbsp2_fsx */
			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)	/* mcbsp2_clkx.mcbsp2_clkx */
			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)	/* mcbsp2_dr.mcbsp2.dr */
			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)	/* mcbsp2_dx.mcbsp2_dx */
		>;
	};
};

&omap3_pmx_core2 {
	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_clk.sdmmc3_clk */
			OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_ctl.sdmmc3_cmd */
			OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d3.sdmmc3_dat3 */
			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d4.sdmmc3_dat0 */
			OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d5.sdmmc3_dat1 */
			OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d6.sdmmc3_dat2 */
		>;
	};
};

&mmc1 {
	status = "okay";
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&vmmc_reg>;
};

&mmc2 {
	status = "okay";
	bus-width = <8>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	vmmc-supply = <&vmmc_reg>;
};

&mmc3 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc3_pins>;
	non-removable;
	disable-wp;
	mmc-pwrseq = <&sdio_pwrseq>;
	vmmc-supply = <&vcc3v3>;
	vqmmc-supply = <&vcc1v8>;
	atheros@0 {
		compatible = "atheros,ath6kl";
		reg = <0>;
		bus-width = <4>;
	};
};

&tps {
	pinctrl-names = "default";
	pinctrl-0 = <&tps_pins>;

	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
	interrupt-parent = <&intc>;

	ti,en-ck32k-xtal;
	ti,system-power-controller;

	vcc1-supply = <&vcc5v>;
	vcc2-supply = <&vcc5v>;
	vcc3-supply = <&vcc5v>;
	vcc4-supply = <&vcc5v>;
	vcc5-supply = <&vcc5v>;
	vcc6-supply = <&vcc5v>;
	vcc7-supply = <&vcc5v>;
	vccio-supply = <&vcc5v>;

	regulators {

		vio_reg: regulator@1 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <600000>;
			regulator-max-microvolt = <1500000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			regulator-name = "vdd_dsp";
			regulator-min-microvolt = <600000>;
			regulator-max-microvolt = <1500000>;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-name = "vdd_core";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <2700000>;
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1800000>;
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <2500000>;
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-min-microvolt = <1100000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <2850000>;
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3000000>;
			regulator-always-on;
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
 */
/dts-v1/;

#include "omap36xx.dtsi"
#include "omap3-evm-common.dtsi"
#include "omap3-evm-processor-common.dtsi"

/ {
	model = "TI OMAP37XX EVM (TMDSEVM3730)";
	compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_2_pins>;

	ehci_phy_pins: pinmux_ehci_phy_pins {
		pinctrl-single,pins = <

		/* EHCI PHY reset GPIO etk_d7.gpio_21 */
		OMAP3630_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)

		/* EHCI VBUS etk_d8.gpio_22 */
		OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
		>;
	};

	/* Used by OHCI and EHCI. OHCI won't work without external phy */
	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <

		/* etk_d10.hsusb2_clk */
		OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)

		/* etk_d11.hsusb2_stp */
		OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)

		/* etk_d12.hsusb2_dir */
		OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* etk_d13.hsusb2_nxt */
		OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* etk_d14.hsusb2_data0 */
		OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)

		/* etk_d15.hsusb2_data1 */
		OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
		>;
	};
};

&gpmc {
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		linux,mtd-name = "hynix,h8kds0un0mer-4em";
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		ti,nand-ecc-opt = "bch8";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x80000 0x1c0000>;
		};
		partition@1c0000 {
			label = "Environment";
			reg = <0x240000 0x40000>;
		};
		partition@280000 {
			label = "Kernel";
			reg = <0x280000 0x500000>;
		};
		partition@780000 {
			label = "Filesystem";
			reg = <0x780000 0x1f880000>;
		};
	};
};