code:
/*
 * Copyright 2021 - Dillon Min <dillon.minfei@gmail.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 *
 * For art-pi board resources, you can refer to link:
 * 	https://art-pi.gitee.io/website/
 */

/dts-v1/;
#include "stm32h750.dtsi"
#include "stm32h7-pinctrl.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "RT-Thread STM32H750i-ART-PI board";
	compatible = "st,stm32h750i-art-pi", "st,stm32h750";

	chosen {
		bootargs = "root=/dev/ram";
		stdout-path = "serial0:2000000n8";
	};

	memory@c0000000 {
		device_type = "memory";
		reg = <0xc0000000 0x2000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		linux,cma {
			compatible = "shared-dma-pool";
			no-map;
			size = <0x100000>;
			linux,dma-default;
		};
	};

	aliases {
		serial0 = &uart4;
		serial1 = &usart3;
	};

	leds {
		compatible = "gpio-leds";
		led-red {
			gpios = <&gpioi 8 0>;
		};
		led-green {
			gpios = <&gpioc 15 0>;
			linux,default-trigger = "heartbeat";
		};
	};

	v3v3: regulator-v3v3 {
		compatible = "regulator-fixed";
		regulator-name = "v3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	wlan_pwr: regulator-wlan {
		compatible = "regulator-fixed";

		regulator-name = "wl-reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;

		gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&clk_hse {
	clock-frequency = <25000000>;
};

&dma1 {
	status = "okay";
};

&dma2 {
	status = "okay";
};

&mac {
	status = "disabled";
	pinctrl-0 = <&ethernet_rmii>;
	pinctrl-names = "default";
	phy-mode = "rmii";
	phy-handle = <&phy0>;

	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		phy0: ethernet-phy@0 {
			reg = <0>;
		};
	};
};

&sdmmc1 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_b4_pins_a>;
	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
	broken-cd;
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&v3v3>;
	status = "okay";
};

&sdmmc2 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc2_b4_pins_a>;
	pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
	broken-cd;
	non-removable;
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&wlan_pwr>;
	status = "okay";

	#address-cells = <1>;
	#size-cells = <0>;
	brcmf: bcrmf@1 {
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
	};
};

&spi1 {
	status = "okay";
	pinctrl-0 = <&spi1_pins>;
	pinctrl-names = "default";
	cs-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;
	dmas = <&dmamux1 37 0x400 0x05>,
	       <&dmamux1 38 0x400 0x05>;
	dma-names = "rx", "tx";

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "winbond,w25q128", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <80000000>;

		partition@0 {
			label = "root filesystem";
			reg = <0 0x1000000>;
		};
	};
};

&usart2 {
	pinctrl-0 = <&usart2_pins>;
	pinctrl-names = "default";
	status = "disabled";
};

&usart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&usart3_pins>;
	dmas = <&dmamux1 45 0x400 0x05>,
	       <&dmamux1 46 0x400 0x05>;
	dma-names = "rx", "tx";
	st,hw-flow-ctrl;
	status = "okay";

	bluetooth {
		compatible = "brcm,bcm43438-bt";
		host-wakeup-gpios = <&gpioc 0 GPIO_ACTIVE_HIGH>;
		device-wakeup-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
		shutdown-gpios = <&gpioi 11 GPIO_ACTIVE_HIGH>;
		max-speed = <115200>;
	};
};

&uart4 {
	pinctrl-0 = <&uart4_pins>;
	pinctrl-names = "default";
	status = "okay";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
 */
#include <dt-bindings/pinctrl/stm32-pinfunc.h>

&pinctrl {
	adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
		pins {
			pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
				 <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
		};
	};

	i2c1_pins_a: i2c1-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
				 <STM32_PINMUX('E', 8, AF5)>; /* I2C1_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c1_sleep_pins_a: i2c1-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
				 <STM32_PINMUX('E', 8, ANALOG)>; /* I2C1_SDA */
		};
	};

	i2c5_pins_a: i2c5-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
				 <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c5_sleep_pins_a: i2c5-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
				 <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */
		};
	};

	mcp23017_pins_a: mcp23017-0 {
		pins {
			pinmux = <STM32_PINMUX('G', 12, GPIO)>;
			bias-pull-up;
		};
	};

	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
		pins {
			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
				 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
				 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
			slew-rate = <1>;
			drive-push-pull;
			bias-disable;
		};
	};

	sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
		pins1 {
			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
				 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
			slew-rate = <1>;
			drive-push-pull;
			bias-disable;
		};
		pins2 {
			pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
			slew-rate = <1>;
			drive-open-drain;
			bias-disable;
		};
	};

	sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
				 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
				 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
				 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
				 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
				 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
		};
	};

	sdmmc1_clk_pins_a: sdmmc1-clk-0 {
		pins {
			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
			slew-rate = <1>;
			drive-push-pull;
			bias-disable;
		};
	};

	sdmmc2_b4_pins_a: sdmmc2-b4-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
				 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
				 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
				 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
				 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
			slew-rate = <1>;
			drive-push-pull;
			bias-pull-up;
		};
	};

	sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
		pins1 {
			pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
				 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
				 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
				 <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
			slew-rate = <1>;
			drive-push-pull;
			bias-pull-up;
		};
		pins2 {
			pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
			slew-rate = <1>;
			drive-open-drain;
			bias-pull-up;
		};
	};

	sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
				 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
				 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
				 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
				 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
				 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
		};
	};

	sdmmc2_clk_pins_a: sdmmc2-clk-0 {
		pins {
			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
			slew-rate = <1>;
			drive-push-pull;
			bias-pull-up;
		};
	};

	spi5_pins_a: spi5-0 {
		pins1 {
			pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */
				 <STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};

		pins2 {
			pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */
			bias-disable;
		};
	};

	spi5_sleep_pins_a: spi5-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */
				 <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */
				 <STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */
		};
	};

	stm32g0_intn_pins_a: stm32g0-intn-0 {
		pins {
			pinmux = <STM32_PINMUX('I', 2, GPIO)>;
			bias-pull-up;
		};
	};

	uart4_pins_a: uart4-0 {
		pins1 {
			pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
			bias-disable;
		};
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
 */
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp13-clks.h>
#include <dt-bindings/reset/stm32mp13-resets.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0>;
		};
	};

	arm-pmu {
		compatible = "arm,cortex-a7-pmu";
		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>;
		interrupt-parent = <&intc>;
	};

	firmware {
		optee {
			method = "smc";
			compatible = "linaro,optee-tz";
		};

		scmi: scmi {
			compatible = "linaro,scmi-optee";
			#address-cells = <1>;
			#size-cells = <0>;
			linaro,optee-channel-id = <0>;
			shmem = <&scmi_shm>;

			scmi_clk: protocol@14 {
				reg = <0x14>;
				#clock-cells = <1>;
			};

			scmi_reset: protocol@16 {
				reg = <0x16>;
				#reset-cells = <1>;
			};
		};
	};

	intc: interrupt-controller@a0021000 {
		compatible = "arm,cortex-a7-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0xa0021000 0x1000>,
		      <0xa0022000 0x2000>;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
		interrupt-parent = <&intc>;
		always-on;
	};

	/* PWR 1v1, 1v8 and 3v3 regulators defined as fixed, waiting for SCMI */
	reg11: reg11 {
		compatible = "regulator-fixed";
		regulator-name = "reg11";
		regulator-min-microvolt = <1100000>;
		regulator-max-microvolt = <1100000>;
	};

	reg18: reg18 {
		compatible = "regulator-fixed";
		regulator-name = "reg18";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	usb33: usb33 {
		compatible = "regulator-fixed";
		regulator-name = "usb33";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		interrupt-parent = <&intc>;
		ranges;

		scmi_sram: sram@2ffff000 {
			compatible = "mmio-sram";
			reg = <0x2ffff000 0x1000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x2ffff000 0x1000>;

			scmi_shm: scmi-sram@0 {
				compatible = "arm,scmi-shmem";
				reg = <0 0x80>;
			};
		};

		spi2: spi@4000b000 {
			compatible = "st,stm32h7-spi";
			reg = <0x4000b000 0x400>;
			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI2_K>;
			resets = <&rcc SPI2_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 39 0x400 0x01>,
			       <&dmamux1 40 0x400 0x01>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		spi3: spi@4000c000 {
			compatible = "st,stm32h7-spi";
			reg = <0x4000c000 0x400>;
			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI3_K>;
			resets = <&rcc SPI3_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 61 0x400 0x01>,
			       <&dmamux1 62 0x400 0x01>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		uart4: serial@40010000 {
			compatible = "st,stm32h7-uart";
			reg = <0x40010000 0x400>;
			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc UART4_K>;
			resets = <&rcc UART4_R>;
			status = "disabled";
		};

		i2c1: i2c@40012000 {
			compatible = "st,stm32mp13-i2c";
			reg = <0x40012000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C1_K>;
			resets = <&rcc I2C1_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 33 0x400 0x1>,
			       <&dmamux1 34 0x400 0x1>;
			dma-names = "rx", "tx";
			st,syscfg-fmp = <&syscfg 0x4 0x1>;
			i2c-analog-filter;
			status = "disabled";
		};

		i2c2: i2c@40013000 {
			compatible = "st,stm32mp13-i2c";
			reg = <0x40013000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C2_K>;
			resets = <&rcc I2C2_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 35 0x400 0x1>,
			       <&dmamux1 36 0x400 0x1>;
			dma-names = "rx", "tx";
			st,syscfg-fmp = <&syscfg 0x4 0x2>;
			i2c-analog-filter;
			status = "disabled";
		};

		spi1: spi@44004000 {
			compatible = "st,stm32h7-spi";
			reg = <0x44004000 0x400>;
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI1_K>;
			resets = <&rcc SPI1_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 37 0x400 0x01>,
			       <&dmamux1 38 0x400 0x01>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		dma1: dma-controller@48000000 {
			compatible = "st,stm32-dma";
			reg = <0x48000000 0x400>;
			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc DMA1>;
			resets = <&rcc DMA1_R>;
			#dma-cells = <4>;
			st,mem2mem;
			dma-requests = <8>;
		};

		dma2: dma-controller@48001000 {
			compatible = "st,stm32-dma";
			reg = <0x48001000 0x400>;
			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc DMA2>;
			resets = <&rcc DMA2_R>;
			#dma-cells = <4>;
			st,mem2mem;
			dma-requests = <8>;
		};

		dmamux1: dma-router@48002000 {
			compatible = "st,stm32h7-dmamux";
			reg = <0x48002000 0x40>;
			clocks = <&rcc DMAMUX1>;
			resets = <&rcc DMAMUX1_R>;
			#dma-cells = <3>;
			dma-masters = <&dma1 &dma2>;
			dma-requests = <128>;
			dma-channels = <16>;
		};

		adc_2: adc@48004000 {
			compatible = "st,stm32mp13-adc-core";
			reg = <0x48004000 0x400>;
			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc ADC2>, <&rcc ADC2_K>;
			clock-names = "bus", "adc";
			interrupt-controller;
			#interrupt-cells = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			adc2: adc@0 {
				compatible = "st,stm32mp13-adc";
				#io-channel-cells = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x0>;
				interrupt-parent = <&adc_2>;
				interrupts = <0>;
				dmas = <&dmamux1 10 0x400 0x80000001>;
				dma-names = "rx";
				status = "disabled";

				channel@13 {
					reg = <13>;
					label = "vrefint";
				};
				channel@14 {
					reg = <14>;
					label = "vddcore";
				};
				channel@16 {
					reg = <16>;
					label = "vddcpu";
				};
				channel@17 {
					reg = <17>;
					label = "vddq_ddr";
				};
			};
		};

		usbotg_hs: usb@49000000 {
			compatible = "st,stm32mp15-hsotg", "snps,dwc2";
			reg = <0x49000000 0x40000>;
			clocks = <&rcc USBO_K>;
			clock-names = "otg";
			resets = <&rcc USBO_R>;
			reset-names = "dwc2";
			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
			g-rx-fifo-size = <512>;
			g-np-tx-fifo-size = <32>;
			g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
			dr_mode = "otg";
			otg-rev = <0x200>;
			usb33d-supply = <&usb33>;
			status = "disabled";
		};

		spi4: spi@4c002000 {
			compatible = "st,stm32h7-spi";
			reg = <0x4c002000 0x400>;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI4_K>;
			resets = <&rcc SPI4_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 83 0x400 0x01>,
			       <&dmamux1 84 0x400 0x01>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		spi5: spi@4c003000 {
			compatible = "st,stm32h7-spi";
			reg = <0x4c003000 0x400>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SPI5_K>;
			resets = <&rcc SPI5_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 85 0x400 0x01>,
			       <&dmamux1 86 0x400 0x01>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		i2c3: i2c@4c004000 {
			compatible = "st,stm32mp13-i2c";
			reg = <0x4c004000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C3_K>;
			resets = <&rcc I2C3_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 73 0x400 0x1>,
			       <&dmamux1 74 0x400 0x1>;
			dma-names = "rx", "tx";
			st,syscfg-fmp = <&syscfg 0x4 0x4>;
			i2c-analog-filter;
			status = "disabled";
		};

		i2c4: i2c@4c005000 {
			compatible = "st,stm32mp13-i2c";
			reg = <0x4c005000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C4_K>;
			resets = <&rcc I2C4_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 75 0x400 0x1>,
			       <&dmamux1 76 0x400 0x1>;
			dma-names = "rx", "tx";
			st,syscfg-fmp = <&syscfg 0x4 0x8>;
			i2c-analog-filter;
			status = "disabled";
		};

		i2c5: i2c@4c006000 {
			compatible = "st,stm32mp13-i2c";
			reg = <0x4c006000 0x400>;
			interrupt-names = "event", "error";
			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc I2C5_K>;
			resets = <&rcc I2C5_R>;
			#address-cells = <1>;
			#size-cells = <0>;
			dmas = <&dmamux1 115 0x400 0x1>,
			       <&dmamux1 116 0x400 0x1>;
			dma-names = "rx", "tx";
			st,syscfg-fmp = <&syscfg 0x4 0x10>;
			i2c-analog-filter;
			status = "disabled";
		};

		rcc: rcc@50000000 {
			compatible = "st,stm32mp13-rcc", "syscon";
			reg = <0x50000000 0x1000>;
			#clock-cells = <1>;
			#reset-cells = <1>;
			clock-names = "hse", "hsi", "csi", "lse", "lsi";
			clocks = <&scmi_clk CK_SCMI_HSE>,
				 <&scmi_clk CK_SCMI_HSI>,
				 <&scmi_clk CK_SCMI_CSI>,
				 <&scmi_clk CK_SCMI_LSE>,
				 <&scmi_clk CK_SCMI_LSI>;
		};

		exti: interrupt-controller@5000d000 {
			compatible = "st,stm32mp13-exti", "syscon";
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x5000d000 0x400>;
		};

		syscfg: syscon@50020000 {
			compatible = "st,stm32mp157-syscfg", "syscon";
			reg = <0x50020000 0x400>;
			clocks = <&rcc SYSCFG>;
		};

		mdma: dma-controller@58000000 {
			compatible = "st,stm32h7-mdma";
			reg = <0x58000000 0x1000>;
			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc MDMA>;
			#dma-cells = <5>;
			dma-channels = <32>;
			dma-requests = <48>;
		};

		sdmmc1: mmc@58005000 {
			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
			arm,primecell-periphid = <0x20253180>;
			reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SDMMC1_K>;
			clock-names = "apb_pclk";
			resets = <&rcc SDMMC1_R>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			max-frequency = <130000000>;
			status = "disabled";
		};

		sdmmc2: mmc@58007000 {
			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
			arm,primecell-periphid = <0x20253180>;
			reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc SDMMC2_K>;
			clock-names = "apb_pclk";
			resets = <&rcc SDMMC2_R>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			max-frequency = <130000000>;
			status = "disabled";
		};

		usbh_ohci: usb@5800c000 {
			compatible = "generic-ohci";
			reg = <0x5800c000 0x1000>;
			clocks = <&usbphyc>, <&rcc USBH>;
			resets = <&rcc USBH_R>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		usbh_ehci: usb@5800d000 {
			compatible = "generic-ehci";
			reg = <0x5800d000 0x1000>;
			clocks = <&usbphyc>, <&rcc USBH>;
			resets = <&rcc USBH_R>;
			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
			companion = <&usbh_ohci>;
			status = "disabled";
		};

		iwdg2: watchdog@5a002000 {
			compatible = "st,stm32mp1-iwdg";
			reg = <0x5a002000 0x400>;
			clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
			clock-names = "pclk", "lsi";
			status = "disabled";
		};

		usbphyc: usbphyc@5a006000 {
			#address-cells = <1>;
			#size-cells = <0>;
			#clock-cells = <0>;
			compatible = "st,stm32mp1-usbphyc";
			reg = <0x5a006000 0x1000>;
			clocks = <&rcc USBPHY_K>;
			resets = <&rcc USBPHY_R>;
			vdda1v1-supply = <&reg11>;
			vdda1v8-supply = <&reg18>;
			status = "disabled";

			usbphyc_port0: usb-phy@0 {
				#phy-cells = <0>;
				reg = <0>;
			};

			usbphyc_port1: usb-phy@1 {
				#phy-cells = <1>;
				reg = <1>;
			};
		};

		rtc: rtc@5c004000 {
			compatible = "st,stm32mp1-rtc";
			reg = <0x5c004000 0x400>;
			interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&scmi_clk CK_SCMI_RTCAPB>,
				 <&scmi_clk CK_SCMI_RTC>;
			clock-names = "pclk", "rtc_ck";
			status = "disabled";
		};

		bsec: efuse@5c005000 {
			compatible = "st,stm32mp15-bsec";
			reg = <0x5c005000 0x400>;
			#address-cells = <1>;
			#size-cells = <1>;

			part_number_otp: part_number_otp@4 {
				reg = <0x4 0x2>;
			};
			ts_cal1: calib@5c {
				reg = <0x5c 0x2>;
			};
			ts_cal2: calib@5e {
				reg = <0x5e 0x2>;
			};
		};

		/*
		 * Break node order to solve dependency probe issue between
		 * pinctrl and exti.
		 */
		pinctrl: pinctrl@50002000 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "st,stm32mp135-pinctrl";
			ranges = <0 0x50002000 0x8400>;
			interrupt-parent = <&exti>;
			st,syscfg = <&exti 0x60 0xff>;
			pins-are-numbered;

			gpioa: gpio@50002000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x0 0x400>;
				clocks = <&rcc GPIOA>;
				st,bank-name = "GPIOA";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 0 16>;
			};

			gpiob: gpio@50003000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x1000 0x400>;
				clocks = <&rcc GPIOB>;
				st,bank-name = "GPIOB";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 16 16>;
			};

			gpioc: gpio@50004000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x2000 0x400>;
				clocks = <&rcc GPIOC>;
				st,bank-name = "GPIOC";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 32 16>;
			};

			gpiod: gpio@50005000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x3000 0x400>;
				clocks = <&rcc GPIOD>;
				st,bank-name = "GPIOD";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 48 16>;
			};

			gpioe: gpio@50006000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x4000 0x400>;
				clocks = <&rcc GPIOE>;
				st,bank-name = "GPIOE";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 64 16>;
			};

			gpiof: gpio@50007000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x5000 0x400>;
				clocks = <&rcc GPIOF>;
				st,bank-name = "GPIOF";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 80 16>;
			};

			gpiog: gpio@50008000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x6000 0x400>;
				clocks = <&rcc GPIOG>;
				st,bank-name = "GPIOG";
				ngpios = <16>;
				gpio-ranges = <&pinctrl 0 96 16>;
			};

			gpioh: gpio@50009000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x7000 0x400>;
				clocks = <&rcc GPIOH>;
				st,bank-name = "GPIOH";
				ngpios = <15>;
				gpio-ranges = <&pinctrl 0 112 15>;
			};

			gpioi: gpio@5000a000 {
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg = <0x8000 0x400>;
				clocks = <&rcc GPIOI>;
				st,bank-name = "GPIOI";
				ngpios = <8>;
				gpio-ranges = <&pinctrl 0 128 8>;
			};
		};
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
 */

#include "stm32mp131.dtsi"

/ {
	soc {
		m_can1: can@4400e000 {
			compatible = "bosch,m_can";
			reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
			reg-names = "m_can", "message_ram";
			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "int0", "int1";
			clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
			clock-names = "hclk", "cclk";
			bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
			status = "disabled";
		};

		m_can2: can@4400f000 {
			compatible = "bosch,m_can";
			reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
			reg-names = "m_can", "message_ram";
			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "int0", "int1";
			clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
			clock-names = "hclk", "cclk";
			bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
			status = "disabled";
		};

		adc_1: adc@48003000 {
			compatible = "st,stm32mp13-adc-core";
			reg = <0x48003000 0x400>;
			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc ADC1>, <&rcc ADC1_K>;
			clock-names = "bus", "adc";
			interrupt-controller;
			#interrupt-cells = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			adc1: adc@0 {
				compatible = "st,stm32mp13-adc";
				#io-channel-cells = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x0>;
				interrupt-parent = <&adc_1>;
				interrupts = <0>;
				dmas = <&dmamux1 9 0x400 0x80000001>;
				dma-names = "rx";
				status = "disabled";

				channel@18 {
					reg = <18>;
					label = "vrefint";
				};
			};
		};
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
 */

#include "stm32mp133.dtsi"

/ {
	soc {
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "stm32mp135.dtsi"
#include "stm32mp13xf.dtsi"
#include "stm32mp13-pinctrl.dtsi"

/ {
	model = "STMicroelectronics STM32MP135F-DK Discovery Board";
	compatible = "st,stm32mp135f-dk", "st,stm32mp135";

	aliases {
		serial0 = &uart4;
	};

	memory@c0000000 {
		device_type = "memory";
		reg = <0xc0000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		optee@dd000000 {
			reg = <0xdd000000 0x3000000>;
			no-map;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-pa13 {
			label = "User-PA13";
			linux,code = <BTN_1>;
			gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led-blue {
			function = LED_FUNCTION_HEARTBEAT;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};
	};

	v3v3_sw: v3v3-sw {
		compatible = "regulator-fixed";
		regulator-name = "v3v3_sw";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	vdd_adc: vdd-adc {
		compatible = "regulator-fixed";
		regulator-name = "vdd_adc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	vdd_sd: vdd-sd {
		compatible = "regulator-fixed";
		regulator-name = "vdd_sd";
		regulator-min-microvolt = <2900000>;
		regulator-max-microvolt = <2900000>;
		regulator-always-on;
	};

	vdd_usb: vdd-usb {
		compatible = "regulator-fixed";
		regulator-name = "vdd_usb";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};
};

&adc_1 {
	pinctrl-names = "default";
	pinctrl-0 = <&adc1_usb_cc_pins_a>;
	vdda-supply = <&vdd_adc>;
	vref-supply = <&vdd_adc>;
	status = "okay";
	adc1: adc@0 {
		status = "okay";
		/*
		 * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in6 & in12.
		 * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
		 * 5 * (5.1 + 47kOhms) * 5pF => 1.3us.
		 * Use arbitrary margin here (e.g. 5us).
		 */
		channel@6 {
			reg = <6>;
			st,min-sample-time-ns = <5000>;
		};
		channel@12 {
			reg = <12>;
			st,min-sample-time-ns = <5000>;
		};
	};
};

&i2c1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c1_pins_a>;
	pinctrl-1 = <&i2c1_sleep_pins_a>;
	i2c-scl-rising-time-ns = <96>;
	i2c-scl-falling-time-ns = <3>;
	clock-frequency = <1000000>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;

	mcp23017: pinctrl@21 {
		compatible = "microchip,mcp23017";
		reg = <0x21>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpiog>;
		pinctrl-names = "default";
		pinctrl-0 = <&mcp23017_pins_a>;
		interrupt-controller;
		#interrupt-cells = <2>;
		microchip,irq-mirror;
	};

	typec@53 {
		compatible = "st,stm32g0-typec";
		reg = <0x53>;
		/* Alert pin on PI2 */
		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
		interrupt-parent = <&gpioi>;
		/* Internal pull-up on PI2 */
		pinctrl-names = "default";
		pinctrl-0 = <&stm32g0_intn_pins_a>;
		firmware-name = "stm32g0-ucsi.mp135f-dk.fw";
		connector {
			compatible = "usb-c-connector";
			label = "USB-C";

			port {
				con_usb_c_g0_ep: endpoint {
					remote-endpoint = <&usbotg_hs_ep>;
				};
			};
		};
	};
};

&i2c5 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c5_pins_a>;
	pinctrl-1 = <&i2c5_sleep_pins_a>;
	i2c-scl-rising-time-ns = <170>;
	i2c-scl-falling-time-ns = <5>;
	clock-frequency = <400000>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;
};

&iwdg2 {
	timeout-sec = <32>;
	status = "okay";
};

&rtc {
	status = "okay";
};

&sdmmc1 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
	cd-gpios = <&gpioh 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
	disable-wp;
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&vdd_sd>;
	status = "okay";
};

&spi5 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&spi5_pins_a>;
	pinctrl-1 = <&spi5_sleep_pins_a>;
	status = "disabled";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins_a>;
	status = "okay";
};

&usbh_ehci {
	phys = <&usbphyc_port0>;
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;
	/* onboard HUB */
	hub@1 {
		compatible = "usb424,2514";
		reg = <1>;
		vdd-supply = <&v3v3_sw>;
	};
};

&usbotg_hs {
	phys = <&usbphyc_port1 0>;
	phy-names = "usb2-phy";
	usb-role-switch;
	status = "okay";
	port {
		usbotg_hs_ep: endpoint {
			remote-endpoint = <&con_usb_c_g0_ep>;
		};
	};
};

&usbphyc {
	status = "okay";
};

&usbphyc_port0 {
	phy-supply = <&vdd_usb>;
	st,current-boost-microamp = <1000>;
	st,decrease-hs-slew-rate;
	st,tune-hs-dc-level = <2>;
	st,enable-hs-rftime-reduction;
	st,trim-hs-current = <11>;
	st,trim-hs-impedance = <2>;
	st,tune-squelch-level = <1>;
	st,enable-hs-rx-gain-eq;
	st,no-hs-ftime-ctrl;
	st,no-lsfs-sc;
};

&usbphyc_port1 {
	phy-supply = <&vdd_usb>;
	st,current-boost-microamp = <1000>;
	st,decrease-hs-slew-rate;
	st,tune-hs-dc-level = <2>;
	st,enable-hs-rftime-reduction;
	st,trim-hs-current = <11>;
	st,trim-hs-impedance = <2>;
	st,tune-squelch-level = <1>;
	st,enable-hs-rx-gain-eq;
	st,no-hs-ftime-ctrl;
	st,no-lsfs-sc;
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
 */

/ {
	soc {
		cryp: crypto@54002000 {
			compatible = "st,stm32mp1-cryp";
			reg = <0x54002000 0x400>;
			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc CRYP1>;
			resets = <&rcc CRYP1_R>;
			status = "disabled";
		};
	};
};