code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
 *                    applies to AT91SAM9G45, AT91SAM9M10,
 *                    AT91SAM9G46, AT91SAM9M11 SoC
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
 */

#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/mfd/at91-usart.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "Atmel AT91SAM9G45 family SoC";
	compatible = "atmel,at91sam9g45";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		ssc0 = &ssc0;
		ssc1 = &ssc1;
		pwm0 = &pwm0;
	};
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	memory@70000000 {
		device_type = "memory";
		reg = <0x70000000 0x10000000>;
	};

	clocks {
		slow_xtal: slow_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};

		main_xtal: main_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};

		adc_op_clk: adc_op_clk{
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <300000>;
		};
	};

	sram: sram@300000 {
		compatible = "mmio-sram";
		reg = <0x00300000 0x10000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x00300000 0x10000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <31>;
			};

			ramc0: ramc@ffffe400 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe400 0x200>;
				clocks = <&pmc PMC_TYPE_SYSTEM 2>;
				clock-names = "ddrck";
			};

			ramc1: ramc@ffffe600 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe600 0x200>;
				clocks = <&pmc PMC_TYPE_SYSTEM 2>;
				clock-names = "ddrck";
			};

			smc: smc@ffffe800 {
				compatible = "atmel,at91sam9260-smc", "syscon";
				reg = <0xffffe800 0x200>;
			};

			matrix: matrix@ffffea00 {
				compatible = "atmel,at91sam9g45-matrix", "syscon";
				reg = <0xffffea00 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91sam9g45-pmc", "syscon";
				reg = <0xfffffc00 0x100>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				#clock-cells = <2>;
				clocks = <&clk32k>, <&main_xtal>;
				clock-names = "slow_clk", "main_xtal";
			};

			reset-controller@fffffd00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffd00 0x10>;
				clocks = <&clk32k>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
			};

			shdwc@fffffd10 {
				compatible = "atmel,at91sam9rl-shdwc";
				reg = <0xfffffd10 0x10>;
				clocks = <&clk32k>;
			};

			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xfff7c000 0x100>;
				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
			};

			tcb1: timer@fffd4000 {
				compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xfffd4000 0x100>;
				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
				#dma-cells = <2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
				clock-names = "dma_clk";
			};

			pinctrl@fffff200 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff200 0xfffff200 0xa00>;

				atmel,mux-mask = <
				      /*    A         B     */
				       0xffffffff 0xffc003ff  /* pioA */
				       0xffffffff 0x800f8f00  /* pioB */
				       0xffffffff 0x00000e00  /* pioC */
				       0xffffffff 0xff0c1381  /* pioD */
				       0xffffffff 0x81ffff81  /* pioE */
				      >;

				/* shared pinctrl settings */
				ac97 {
					pinctrl_ac97: ac97-0 {
						atmel,pins =
							<AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* AC97RX */
							 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* AC97TX */
							 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* AC97FS */
							 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* AC97CK */
					};
				};

				adc0 {
					pinctrl_adc0_adtrg: adc0_adtrg {
						atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
					pinctrl_adc0_ad0: adc0_ad0 {
						atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
					pinctrl_adc0_ad1: adc0_ad1 {
						atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
					pinctrl_adc0_ad2: adc0_ad2 {
						atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
					pinctrl_adc0_ad3: adc0_ad3 {
						atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
					pinctrl_adc0_ad4: adc0_ad4 {
						atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
					pinctrl_adc0_ad5: adc0_ad5 {
						atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
					pinctrl_adc0_ad6: adc0_ad6 {
						atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
					pinctrl_adc0_ad7: adc0_ad7 {
						atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
				};

				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				i2c0 {
					pinctrl_i2c0: i2c0-0 {
						atmel,pins =
							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA21 periph A TWCK0 */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA20 periph A TWD0 */
					};
				};

				i2c1 {
					pinctrl_i2c1: i2c1-0 {
						atmel,pins =
							<AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB11 periph A TWCK1 */
							 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB10 periph A TWD1 */
					};
				};

				isi {
					pinctrl_isi_data_0_7: isi-0-data-0-7 {
						atmel,pins =
							<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */
							AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */
							AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */
							AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */
							AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */
							AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */
							AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */
							AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */
							AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */
							AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
							AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
					};

					pinctrl_isi_data_8_9: isi-0-data-8-9 {
						atmel,pins =
							<AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */
							AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */
					};

					pinctrl_isi_data_10_11: isi-0-data-10-11 {
						atmel,pins =
							<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
							AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB17 periph B */
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB15 periph B */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
							<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD16 periph A */
					};

					pinctrl_usart1_cts: usart1_cts-0 {
						atmel,pins =
							<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD17 periph A */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
							<AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC9 periph B */
					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
							<AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC11 periph B */
					};
				};

				usart3 {
					pinctrl_usart3: usart3-0 {
						atmel,pins =
							<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
							<AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA23 periph B */
					};

					pinctrl_usart3_cts: usart3_cts-0 {
						atmel,pins =
							<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA24 periph B */
					};
				};

				nand {
					pinctrl_nand_rb: nand-rb-0 {
						atmel,pins =
							<AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_nand_cs: nand-cs-0 {
						atmel,pins =
							 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};
				};

				macb {
					pinctrl_macb_rmii: macb_rmii-0 {
						atmel,pins =
							<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA10 periph A */
							 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A */
							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A */
							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA13 periph A */
							 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA14 periph A */
							 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA15 periph A */
							 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA16 periph A */
							 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA17 periph A */
							 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA18 periph A */
							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA19 periph A */
					};

					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
						atmel,pins =
							<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA6 periph B */
							 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA7 periph B */
							 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA8 periph B */
							 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA9 periph B */
							 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA29 periph B */
							 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA30 periph B */
					};
				};

				mmc0 {
					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA0 periph A */
							 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
							 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA2 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA3 periph A with pullup */
							 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA4 periph A with pullup */
							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA5 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
						atmel,pins =
							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA6 periph A with pullup */
							 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA8 periph A with pullup */
							 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA9 periph A with pullup */
					};
				};

				mmc1 {
					pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA31 periph A */
							 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA22 periph A with pullup */
							 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA23 periph A with pullup */
					};

					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA24 periph A with pullup */
							 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA25 periph A with pullup */
							 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA26 periph A with pullup */
					};

					pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
						atmel,pins =
							<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA27 periph A with pullup */
							 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA28 periph A with pullup */
							 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA29 periph A with pullup */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA30 periph A with pullup */
					};
				};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD0 periph A */
							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD1 periph A */
							 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD2 periph A */
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD3 periph A */
							 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD4 periph A */
							 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD5 periph A */
					};
				};

				ssc1 {
					pinctrl_ssc1_tx: ssc1_tx-0 {
						atmel,pins =
							<AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD10 periph A */
							 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD11 periph A */
							 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD12 periph A */
					};

					pinctrl_ssc1_rx: ssc1_rx-0 {
						atmel,pins =
							<AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD13 periph A */
							 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD14 periph A */
							 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD15 periph A */
					};
				};

				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB0 periph A SPI0_MISO pin */
							 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB1 periph A SPI0_MOSI pin */
							 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB2 periph A SPI0_SPCK pin */
					};
				};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
							<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB14 periph A SPI1_MISO pin */
							 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB15 periph A SPI1_MOSI pin */
							 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB16 periph A SPI1_SPCK pin */
					};
				};

				tcb0 {
					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
						atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
						atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
						atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
						atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
						atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
						atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
						atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
						atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
						atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				tcb1 {
					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
						atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
						atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
						atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
						atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
						atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
						atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
						atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
						atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
						atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				fb {
					pinctrl_fb: fb-0 {
						atmel,pins =
							<AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE0 periph A */
							 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE2 periph A */
							 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE3 periph A */
							 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE4 periph A */
							 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE5 periph A */
							 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE6 periph A */
							 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE7 periph A */
							 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE8 periph A */
							 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE9 periph A */
							 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE10 periph A */
							 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE11 periph A */
							 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE12 periph A */
							 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE13 periph A */
							 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE14 periph A */
							 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE15 periph A */
							 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE16 periph A */
							 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE17 periph A */
							 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE18 periph A */
							 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE19 periph A */
							 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE20 periph A */
							 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE21 periph A */
							 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE22 periph A */
							 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE23 periph A */
							 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE24 periph A */
							 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE25 periph A */
							 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE26 periph A */
							 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE27 periph A */
							 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE28 periph A */
							 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE29 periph A */
							 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PE30 periph A */
					};
				};

				pioA: gpio@fffff200 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff200 0x200>;
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
				};

				pioB: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
				};

				pioC: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
				};

				pioD: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
				};

				pioE: gpio@fffffa00 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
				};
			};

			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				reg = <0xffffee00 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
				clock-names = "usart";
				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
				clock-names = "usart";
				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
				clock-names = "usart";
				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
				clock-names = "usart";
				status = "disabled";
			};

			usart3: serial@fff98000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff98000 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart3>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
				clock-names = "usart";
				status = "disabled";
			};

			macb0: ethernet@fffbc000 {
				compatible = "cdns,at91sam9260-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb_rmii>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_PERIPHERAL 25>;
				clock-names = "hclk", "pclk";
				status = "disabled";
			};

			trng@fffcc000 {
				compatible = "atmel,at91sam9g45-trng";
				reg = <0xfffcc000 0x100>;
				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
			};

			i2c0: i2c@fff84000 {
				compatible = "atmel,at91sam9g10-i2c";
				reg = <0xfff84000 0x100>;
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c0>;
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
				status = "disabled";
			};

			i2c1: i2c@fff88000 {
				compatible = "atmel,at91sam9g10-i2c";
				reg = <0xfff88000 0x100>;
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c1>;
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
				status = "disabled";
			};

			ssc0: ssc@fff9c000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xfff9c000 0x4000>;
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
				clock-names = "pclk";
				status = "disabled";
			};

			ssc1: ssc@fffa0000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xfffa0000 0x4000>;
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
				clock-names = "pclk";
				status = "disabled";
			};

			ac97: sound@fffac000 {
				compatible = "atmel,at91sam9263-ac97c";
				reg = <0xfffac000 0x4000>;
				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ac97>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
				clock-names = "ac97_clk";
				status = "disabled";
			};

			adc0: adc@fffb0000 {
				compatible = "atmel,at91sam9g45-adc";
				reg = <0xfffb0000 0x100>;
				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
				clock-names = "adc_clk", "adc_op_clk";
				atmel,adc-channels-used = <0xff>;
				atmel,adc-vref = <3300>;
				atmel,adc-startup-time = <40>;
			};

			isi@fffb4000 {
				compatible = "atmel,at91sam9g45-isi";
				reg = <0xfffb4000 0x4000>;
				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
				clock-names = "isi_clk";
				status = "disabled";
				port {
					#address-cells = <1>;
					#size-cells = <0>;
				};
			};

			pwm0: pwm@fffb8000 {
				compatible = "atmel,at91sam9rl-pwm";
				reg = <0xfffb8000 0x300>;
				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
				#pwm-cells = <3>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
				status = "disabled";
			};

			mmc0: mmc@fff80000 {
				compatible = "atmel,hsmci";
				reg = <0xfff80000 0x600>;
				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
				dma-names = "rxtx";
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
				clock-names = "mci_clk";
				status = "disabled";
			};

			mmc1: mmc@fffd0000 {
				compatible = "atmel,hsmci";
				reg = <0xfffd0000 0x600>;
				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
				dma-names = "rxtx";
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
				clock-names = "mci_clk";
				status = "disabled";
			};

			watchdog@fffffd40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffd40 0x10>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				atmel,watchdog-type = "hardware";
				atmel,reset-type = "all";
				atmel,dbg-halt;
				status = "disabled";
			};

			spi0: spi@fffa4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffa4000 0x200>;
				interrupts = <14 4 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
				clock-names = "spi_clk";
				status = "disabled";
			};

			spi1: spi@fffa8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffa8000 0x200>;
				interrupts = <15 4 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
				clock-names = "spi_clk";
				status = "disabled";
			};

			usb2: gadget@fff78000 {
				compatible = "atmel,at91sam9g45-udc";
				reg = <0x00600000 0x80000
				       0xfff78000 0x400>;
				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
				clock-names = "pclk", "hclk";
				status = "disabled";
			};

			clk32k: sckc@fffffd50 {
				compatible = "atmel,at91sam9x5-sckc";
				reg = <0xfffffd50 0x4>;
				clocks = <&slow_xtal>;
				#clock-cells = <0>;
			};

			rtc@fffffd20 {
				compatible = "atmel,at91sam9260-rtt";
				reg = <0xfffffd20 0x10>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "disabled";
			};

			rtc@fffffdb0 {
				compatible = "atmel,at91rm9200-rtc";
				reg = <0xfffffdb0 0x30>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "disabled";
			};

			gpbr: syscon@fffffd60 {
				compatible = "atmel,at91sam9260-gpbr", "syscon";
				reg = <0xfffffd60 0x10>;
				status = "disabled";
			};
		};

		fb0: fb@500000 {
			compatible = "atmel,at91sam9g45-lcdc";
			reg = <0x00500000 0x1000>;
			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_fb>;
			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
			clock-names = "hclk", "lcdc_clk";
			status = "disabled";
		};

		usb0: ohci@700000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00700000 0x100000>;
			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
			clock-names = "ohci_clk", "hclk", "uhpck";
			status = "disabled";
		};

		usb1: ehci@800000 {
			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
			reg = <0x00800000 0x100000>;
			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
			clock-names = "usb_clk", "ehci_clk";
			status = "disabled";
		};

		ebi: ebi@10000000 {
			compatible = "atmel,at91sam9g45-ebi";
			#address-cells = <2>;
			#size-cells = <1>;
			atmel,smc = <&smc>;
			atmel,matrix = <&matrix>;
			reg = <0x10000000 0x80000000>;
			ranges = <0x0 0x0 0x10000000 0x10000000
				  0x1 0x0 0x20000000 0x10000000
				  0x2 0x0 0x30000000 0x10000000
				  0x3 0x0 0x40000000 0x10000000
				  0x4 0x0 0x50000000 0x10000000
				  0x5 0x0 0x60000000 0x10000000>;
			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
			status = "disabled";

			nand_controller: nand-controller {
				compatible = "atmel,at91sam9g45-nand-controller";
				#address-cells = <2>;
				#size-cells = <1>;
				ranges;
				status = "disabled";
			};
		};
	};

	i2c-gpio-0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
			 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <5>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
 */
/dts-v1/;
#include "at91sam9g45.dtsi"
#include <dt-bindings/pwm/pwm.h>

/ {
	model = "Atmel AT91SAM9M10G45-EK";
	compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";

	chosen {
		bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2";
		stdout-path = "serial0:115200n8";
	};

	memory@70000000 {
		reg = <0x70000000 0x4000000>;
	};

	clocks {
		slow_xtal {
		      clock-frequency = <32768>;
		};

		main_xtal {
		      clock-frequency = <12000000>;
		};
	};

	ahb {
		apb {
			dbgu: serial@ffffee00 {
				status = "okay";
			};

			tcb0: timer@fff7c000 {
				timer@0 {
					compatible = "atmel,tcb-timer";
					reg = <0>, <1>;
				};

				timer@2 {
					compatible = "atmel,tcb-timer";
					reg = <2>;
				};
			};

			usart1: serial@fff90000 {
				pinctrl-0 =
					<&pinctrl_usart1
					 &pinctrl_usart1_rts
					 &pinctrl_usart1_cts>;
				status = "okay";
			};

			macb0: ethernet@fffbc000 {
				phy-mode = "rmii";
				status = "okay";
			};

			i2c0: i2c@fff84000 {
				status = "okay";
				ov2640: camera@30 {
					compatible = "ovti,ov2640";
					reg = <0x30>;
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
					resetb-gpios = <&pioD 12 GPIO_ACTIVE_LOW>;
					pwdn-gpios = <&pioD 13 GPIO_ACTIVE_HIGH>;
					clocks = <&pmc PMC_TYPE_SYSTEM 9>;
					clock-names = "xvclk";
					assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>;
					assigned-clock-rates = <25000000>;

					port {
						ov2640_0: endpoint {
							remote-endpoint = <&isi_0>;
							bus-width = <8>;
						};
					};
				};
			};

			i2c1: i2c@fff88000 {
				status = "okay";
			};

			watchdog@fffffd40 {
				status = "okay";
			};

			mmc0: mmc@fff80000 {
				pinctrl-0 = <
					&pinctrl_board_mmc0
					&pinctrl_mmc0_slot0_clk_cmd_dat0
					&pinctrl_mmc0_slot0_dat1_3>;
				pinctrl-names = "default";
				status = "okay";
				slot@0 {
					reg = <0>;
					bus-width = <4>;
					cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>;
				};
			};

			mmc1: mmc@fffd0000 {
				pinctrl-0 = <
					&pinctrl_board_mmc1
					&pinctrl_mmc1_slot0_clk_cmd_dat0
					&pinctrl_mmc1_slot0_dat1_3>;
				pinctrl-names = "default";
				status = "okay";
				slot@0 {
					reg = <0>;
					bus-width = <4>;
					cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>;
					wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
				};
			};

			pinctrl@fffff200 {
				camera_sensor {
					pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 {
						atmel,pins =
							<AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_sensor_reset: sensor_reset-0 {
						atmel,pins =
							<AT91_PIOD 12 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};

					pinctrl_sensor_power: sensor_power-0 {
						atmel,pins =
							<AT91_PIOD 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
				};
				mmc0 {
					pinctrl_board_mmc0: mmc0-board {
						atmel,pins =
							<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PD10 gpio CD pin pull up and deglitch */
					};
				};

				mmc1 {
					pinctrl_board_mmc1: mmc1-board {
						atmel,pins =
							<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH	/* PD11 gpio CD pin pull up and deglitch */
							 AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PD29 gpio WP pin pull up */
					};
				};

				pwm0 {
					pinctrl_pwm_leds: pwm-led {
						atmel,pins =
							<AT91_PIOD 0  AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PD0 periph B */
							 AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PD31 periph B */
					};
				};
			};

			spi0: spi@fffa4000{
				status = "okay";
				cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
				flash@0 {
					compatible = "atmel,at45", "atmel,dataflash";
					spi-max-frequency = <13000000>;
					reg = <0>;
				};
			};

			usb2: gadget@fff78000 {
				atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
				status = "okay";
			};

			ac97: sound@fffac000 {
				status = "okay";
			};

			adc0: adc@fffb0000 {
				pinctrl-names = "default";
				pinctrl-0 = <
					&pinctrl_adc0_ad0
					&pinctrl_adc0_ad1
					&pinctrl_adc0_ad2
					&pinctrl_adc0_ad3
					&pinctrl_adc0_ad4
					&pinctrl_adc0_ad5
					&pinctrl_adc0_ad6
					&pinctrl_adc0_ad7>;
				atmel,adc-ts-wires = <4>;
				status = "okay";
			};

			isi@fffb4000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_isi_data_0_7>;
				status = "okay";
				port {
					isi_0: endpoint {
						remote-endpoint = <&ov2640_0>;
						bus-width = <8>;
						vsync-active = <1>;
						hsync-active = <1>;
					};
				};
			};

			pwm0: pwm@fffb8000 {
				status = "okay";

				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_pwm_leds>;
			};

			rtc@fffffd20 {
				atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
				status = "okay";
			};

			gpbr: syscon@fffffd60 {
				status = "okay";
			};

			rtc@fffffdb0 {
				status = "okay";
			};
		};

		fb0: fb@500000 {
			display = <&display0>;
			status = "okay";

			display0: panel {
				bits-per-pixel = <32>;
				atmel,lcdcon-backlight;
				atmel,dmacon = <0x1>;
				atmel,lcdcon2 = <0x80008002>;
				atmel,guard-time = <9>;
				atmel,lcd-wiring-mode = "RGB";

				display-timings {
					native-mode = <&timing0>;
					timing0: timing0 {
						clock-frequency = <9000000>;
						hactive = <480>;
						vactive = <272>;
						hback-porch = <1>;
						hfront-porch = <1>;
						vback-porch = <40>;
						vfront-porch = <1>;
						hsync-len = <45>;
						vsync-len = <1>;
					};
				};
			};
		};

		ebi: ebi@10000000 {
			status = "okay";

			nand_controller: nand-controller {
				status = "okay";
				pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
				pinctrl-names = "default";

				nand@3 {
					reg = <0x3 0x0 0x800000>;
					rb-gpios = <&pioC 8 GPIO_ACTIVE_HIGH>;
					cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
					nand-bus-width = <8>;
					nand-ecc-mode = "soft";
					nand-on-flash-bbt;
					label = "atmel_nand";

					partitions {
						compatible = "fixed-partitions";
						#address-cells = <1>;
						#size-cells = <1>;

						boot@0 {
							label = "bootstrap/uboot/kernel";
							reg = <0x0 0x400000>;
						};

						rootfs@400000 {
							label = "rootfs";
							reg = <0x400000 0x3C00000>;
						};

						data@4000000 {
							label = "data";
							reg = <0x4000000 0xC000000>;
						};
					};
				};
			};
		};

		usb0: ohci@700000 {
			status = "okay";
			num-ports = <2>;
			atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
					   &pioD 3 GPIO_ACTIVE_LOW>;
		};

		usb1: ehci@800000 {
			status = "okay";
		};
	};

	led-controller-1 {
		compatible = "gpio-leds";

		led-1 {
			label = "d8";
			gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	led-controller-2 {
		compatible = "pwm-leds";

		led-2 {
			label = "d6";
			pwms = <&pwm0 3 5000 PWM_POLARITY_INVERTED>;
			max-brightness = <255>;
			linux,default-trigger = "nand-disk";
		};

		led-3 {
			label = "d7";
			pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>;
			max-brightness = <255>;
			linux,default-trigger = "mmc0";
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		button-left-click {
			label = "left_click";
			gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
			linux,code = <272>;
			wakeup-source;
		};

		button-right-click {
			label = "right_click";
			gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
			linux,code = <273>;
			wakeup-source;
		};

		button-left {
			label = "Joystick Left";
			gpios = <&pioB 14 GPIO_ACTIVE_LOW>;
			linux,code = <105>;
		};

		button-right {
			label = "Joystick Right";
			gpios = <&pioB 15 GPIO_ACTIVE_LOW>;
			linux,code = <106>;
		};

		button-up {
			label = "Joystick Up";
			gpios = <&pioB 16 GPIO_ACTIVE_LOW>;
			linux,code = <103>;
		};

		button-down {
			label = "Joystick Down";
			gpios = <&pioB 17 GPIO_ACTIVE_LOW>;
			linux,code = <108>;
		};

		button-enter {
			label = "Joystick Press";
			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
			linux,code = <28>;
		};
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Hong Xu <hong.xu@atmel.com>
 */

#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/mfd/at91-usart.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "Atmel AT91SAM9N12 SoC";
	compatible = "atmel,at91sam9n12";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		ssc0 = &ssc0;
		pwm0 = &pwm0;
	};
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	memory@20000000 {
		device_type = "memory";
		reg = <0x20000000 0x10000000>;
	};

	clocks {
		slow_xtal: slow_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};

		main_xtal: main_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};
	};

	sram: sram@300000 {
		compatible = "mmio-sram";
		reg = <0x00300000 0x8000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x00300000 0x8000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <31>;
			};

			matrix: matrix@ffffde00 {
				compatible = "atmel,at91sam9n12-matrix", "syscon";
				reg = <0xffffde00 0x100>;
			};

			pmecc: ecc-engine@ffffe000 {
				compatible = "atmel,at91sam9g45-pmecc";
				reg = <0xffffe000 0x600>,
				      <0xffffe600 0x200>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
				clocks = <&pmc PMC_TYPE_SYSTEM 2>;
				clock-names = "ddrck";
			};

			smc: smc@ffffea00 {
				compatible = "atmel,at91sam9260-smc", "syscon";
				reg = <0xffffea00 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91sam9n12-pmc", "syscon";
				reg = <0xfffffc00 0x200>;
				#clock-cells = <2>;
				clocks = <&clk32k>, <&main_xtal>;
				clock-names = "slow_clk", "main_xtal";
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
			};

			reset-controller@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
				clocks = <&clk32k>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
				clocks = <&clk32k>;
			};

			sckc@fffffe50 {
				compatible = "atmel,at91sam9x5-sckc";
				reg = <0xfffffe50 0x4>;

				slow_osc: slow_osc {
					compatible = "atmel,at91sam9x5-clk-slow-osc";
					#clock-cells = <0>;
					clocks = <&slow_xtal>;
				};

				slow_rc_osc: slow_rc_osc {
					compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
					#clock-cells = <0>;
					clock-frequency = <32768>;
					clock-accuracy = <50000000>;
				};

				clk32k: slck {
					compatible = "atmel,at91sam9x5-clk-slow";
					#clock-cells = <0>;
					clocks = <&slow_rc_osc>, <&slow_osc>;
				};
			};

			mmc0: mmc@f0008000 {
				compatible = "atmel,hsmci";
				reg = <0xf0008000 0x600>;
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
				dma-names = "rxtx";
				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
				clock-names = "mci_clk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xf8008000 0x100>;
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
				clock-names = "t0_clk", "slow_clk";
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xf800c000 0x100>;
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
				clock-names = "t0_clk", "slow_clk";
			};

			hlcdc: hlcdc@f8038000 {
				compatible = "atmel,at91sam9n12-hlcdc";
				reg = <0xf8038000 0x2000>;
				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
				clock-names = "periph_clk", "sys_clk", "slow_clk";
				status = "disabled";

				hlcdc-display-controller {
					compatible = "atmel,hlcdc-display-controller";
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						#address-cells = <1>;
						#size-cells = <0>;
						reg = <0>;
					};
				};

				hlcdc_pwm: hlcdc-pwm {
					compatible = "atmel,hlcdc-pwm";
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_lcd_pwm>;
					#pwm-cells = <3>;
				};
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
				#dma-cells = <2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
				clock-names = "dma_clk";
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				atmel,mux-mask = <
				      /*    A         B          C     */
				       0xffffffff 0xffe07983 0x00000000  /* pioA */
				       0x00040000 0x00047e0f 0x00000000  /* pioB */
				       0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
				       0x003fffff 0x003f8000 0x00000000  /* pioD */
				      >;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				lcd {
					pinctrl_lcd_base: lcd-base-0 {
						atmel,pins =
							<AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDVSYNC */
							 AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDHSYNC */
							 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDDISP */
							 AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDDEN */
							 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* LCDPCK */
					};

					pinctrl_lcd_pwm: lcd-pwm-0 {
						atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* LCDPWM */
					};

					pinctrl_lcd_rgb888: lcd-rgb-3 {
						atmel,pins =
							<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD0 pin */
							 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD1 pin */
							 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD2 pin */
							 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD3 pin */
							 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD4 pin */
							 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD5 pin */
							 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD6 pin */
							 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD7 pin */
							 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD8 pin */
							 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD9 pin */
							 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD10 pin */
							 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD11 pin */
							 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD12 pin */
							 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD13 pin */
							 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD14 pin */
							 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD15 pin */
							 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD16 pin */
							 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD17 pin */
							 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD18 pin */
							 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD19 pin */
							 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD20 pin */
							 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD21 pin */
							 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE	/* LCDD22 pin */
							 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* LCDD23 pin */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
							 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA0 periph A */
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA2 periph A */
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA3 periph A */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA6 periph A with pullup */
							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA5 periph A */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA8 periph A with pullup */
							 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA7 periph A */
					};

					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB0 periph B */
					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
							<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB1 periph B */
					};
				};

				usart3 {
					pinctrl_usart3: usart3-0 {
						atmel,pins =
							<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PC23 periph B with pullup */
							 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC22 periph B */
					};

					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC24 periph B */
					};

					pinctrl_usart3_cts: usart3_cts-0 {
						atmel,pins =
							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC25 periph B */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP	/* PC9 periph C with pullup */
							 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC8 periph C */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
							 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
					};
				};

				nand {
					pinctrl_nand_rb: nand-rb-0 {
						atmel,pins =
							<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_nand_cs: nand-cs-0 {
						atmel,pins =
							 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};
				};

				mmc0 {
					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA17 periph A */
							 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
							 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA15 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
						atmel,pins =
							<AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA11 periph B with pullup */
							 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA12 periph B with pullup */
							 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA13 periph B with pullup */
							 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA14 periph B with pullup */
					};
				};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA24 periph B */
							 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA25 periph B */
							 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA26 periph B */
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA29 periph B */
					};
				};

				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A SPI0_MISO pin */
							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A SPI0_MOSI pin */
							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA13 periph A SPI0_SPCK pin */
					};
				};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
							<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA21 periph B SPI1_MISO pin */
							 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA22 periph B SPI1_MOSI pin */
							 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA23 periph B SPI1_SPCK pin */
					};
				};

				i2c0 {
					pinctrl_i2c0: i2c0-0 {
						atmel,pins =
							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
							 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				i2c1 {
					pinctrl_i2c1: i2c1-0 {
						atmel,pins =
							<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
							 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};
				};

				tcb0 {
					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
						atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
						atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
						atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
						atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
						atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
						atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
						atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
						atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
						atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				tcb1 {
					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
						atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
						atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
						atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
						atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
						atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
						atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
						atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
				};
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
				clock-names = "usart";
				status = "disabled";
			};

			ssc0: ssc@f0010000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xf0010000 0x4000>;
				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
				dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
				       <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
				dma-names = "tx", "rx";
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
				clock-names = "pclk";
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x4000>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
				clock-names = "usart";
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x4000>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
				clock-names = "usart";
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x4000>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
				clock-names = "usart";
				status = "disabled";
			};

			usart3: serial@f8028000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8028000 0x4000>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart3>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
				clock-names = "usart";
				status = "disabled";
			};

			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
				       <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
				dma-names = "tx", "rx";
				#address-cells = <1>;
				#size-cells = <0>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
				       <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
				dma-names = "tx", "rx";
				#address-cells = <1>;
				#size-cells = <0>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c1>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
				status = "disabled";
			};

			spi0: spi@f0000000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xf0000000 0x100>;
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
				       <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
				dma-names = "tx", "rx";
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
				clock-names = "spi_clk";
				status = "disabled";
			};

			spi1: spi@f0004000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xf0004000 0x100>;
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
				       <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
				dma-names = "tx", "rx";
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
				clock-names = "spi_clk";
				status = "disabled";
			};

			watchdog@fffffe40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffe40 0x10>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				atmel,watchdog-type = "hardware";
				atmel,reset-type = "all";
				atmel,dbg-halt;
				status = "disabled";
			};

			rtc@fffffeb0 {
				compatible = "atmel,at91rm9200-rtc";
				reg = <0xfffffeb0 0x40>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "disabled";
			};

			pwm0: pwm@f8034000 {
				compatible = "atmel,at91sam9rl-pwm";
				reg = <0xf8034000 0x300>;
				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
				#pwm-cells = <3>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
				status = "disabled";
			};

			usb1: gadget@f803c000 {
				compatible = "atmel,at91sam9260-udc";
				reg = <0xf803c000 0x4000>;
				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 7>;
				clock-names = "pclk", "hclk";
				status = "disabled";
			};
		};

		usb0: ohci@500000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00500000 0x00100000>;
			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
			clock-names = "ohci_clk", "hclk", "uhpck";
			status = "disabled";
		};

		ebi: ebi@10000000 {
			compatible = "atmel,at91sam9x5-ebi";
			#address-cells = <2>;
			#size-cells = <1>;
			atmel,smc = <&smc>;
			atmel,matrix = <&matrix>;
			reg = <0x10000000 0x60000000>;
			ranges = <0x0 0x0 0x10000000 0x10000000
				  0x1 0x0 0x20000000 0x10000000
				  0x2 0x0 0x30000000 0x10000000
				  0x3 0x0 0x40000000 0x10000000
				  0x4 0x0 0x50000000 0x10000000
				  0x5 0x0 0x60000000 0x10000000>;
			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
			status = "disabled";

			nand_controller: nand-controller {
				compatible = "atmel,at91sam9g45-nand-controller";
				ecc-engine = <&pmecc>;
				#address-cells = <2>;
				#size-cells = <1>;
				ranges;
				status = "disabled";
			};
		};
	};

	i2c-gpio-0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
			 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Hong Xu <hong.xu@atmel.com>
 */
/dts-v1/;
#include "at91sam9n12.dtsi"

/ {
	model = "Atmel AT91SAM9N12-EK";
	compatible = "atmel,at91sam9n12ek", "atmel,at91sam9n12", "atmel,at91sam9";

	chosen {
		bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2";
		stdout-path = "serial0:115200n8";
	};

	memory@20000000 {
		reg = <0x20000000 0x8000000>;
	};

	clocks {
		slow_xtal {
			clock-frequency = <32768>;
		};

		main_xtal {
			clock-frequency = <16000000>;
		};
	};

	ahb {
		apb {
			dbgu: serial@fffff200 {
				status = "okay";
			};

			ssc0: ssc@f0010000 {
				status = "okay";
			};

			tcb0: timer@f8008000 {
				timer@0 {
					compatible = "atmel,tcb-timer";
					reg = <0>;
				};

				timer@1 {
					compatible = "atmel,tcb-timer";
					reg = <1>;
				};
			};

			i2c0: i2c@f8010000 {
				status = "okay";

				wm8904: codec@1a {
					compatible = "wlf,wm8904";
					reg = <0x1a>;
					clocks = <&pmc PMC_TYPE_SYSTEM 8>;
					clock-names = "mclk";
				};

				qt1070: keyboard@1b {
					compatible = "qt1070";
					reg = <0x1b>;
					interrupt-parent = <&pioA>;
					interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_qt1070_irq>;
				};
			};

			mmc0: mmc@f0008000 {
				pinctrl-0 = <
					&pinctrl_board_mmc0
					&pinctrl_mmc0_slot0_clk_cmd_dat0
					&pinctrl_mmc0_slot0_dat1_3>;
				status = "okay";
				slot@0 {
					reg = <0>;
					bus-width = <4>;
					cd-gpios = <&pioA 7 GPIO_ACTIVE_HIGH>;
				};
			};

			pinctrl@fffff400 {
				mmc0 {
					pinctrl_board_mmc0: mmc0-board {
						atmel,pins =
							<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PA7 gpio CD pin pull up and deglitch */
					};
				};

				qt1070 {
					pinctrl_qt1070_irq: qt1070_irq {
						atmel,pins =
							<AT91_PIOA 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
					};
				};

				sound {
					pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
						atmel,pins =
							<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				usb1 {
					pinctrl_usb1_vbus_sense: usb1_vbus_sense {
						atmel,pins =
							<AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;	/* PB16 gpio usb vbus sense, no pull up and deglitch */
					};
				};
			};

			spi0: spi@f0000000 {
				status = "okay";
				cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
				flash@0 {
					compatible = "atmel,at25df321a";
					spi-max-frequency = <50000000>;
					reg = <0>;
				};
			};

			hlcdc: hlcdc@f8038000 {
				status = "okay";

				hlcdc-display-controller {
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;

					port@0 {
						hlcdc_panel_output: endpoint@0 {
							reg = <0>;
							remote-endpoint = <&panel_input>;
						};
					};
				};
			};

			usb1: gadget@f803c000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usb1_vbus_sense>;
				atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
				status = "okay";
			};

			watchdog@fffffe40 {
				status = "okay";
			};

			rtc@fffffeb0 {
				status = "okay";
			};
		};

		ebi: ebi@10000000 {
			status = "okay";

			nand_controller: nand-controller {
				status = "okay";
				pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
				pinctrl-names = "default";

				nand@3 {
					reg = <0x3 0x0 0x800000>;
					rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
					cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
					nand-bus-width = <8>;
					nand-ecc-mode = "soft";
					nand-ecc-strength = <2>;
					nand-ecc-step-size = <512>;
					nand-on-flash-bbt;
					label = "atmel_nand";
				};
			};
		};

		usb0: ohci@500000 {
			num-ports = <1>;
			atmel,vbus-gpio = <&pioB 7 GPIO_ACTIVE_LOW>;
			status = "okay";
		};
	};

	backlight: backlight {
		compatible = "pwm-backlight";
		pwms = <&hlcdc_pwm 0 50000 0>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
		power-supply = <&bl_reg>;
		status = "okay";
	};

	bl_reg: backlight_regulator {
		compatible = "regulator-fixed";
		regulator-name = "backlight-power-supply";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		status = "okay";
	};

	leds {
		compatible = "gpio-leds";

		d8 {
			label = "d8";
			gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "mmc0";
		};

		d9 {
			label = "d9";
			gpios = <&pioB 5 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "nand-disk";
		};

		d10 {
			label = "d10";
			gpios = <&pioB 6 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		button-enter {
			label = "Enter";
			gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
			linux,code = <28>;
			wakeup-source;
		};
	};

	panel: panel {
		compatible = "qiaodian,qd43003c0-40";
		backlight = <&backlight>;
		power-supply = <&panel_reg>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "okay";

		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			panel_input: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&hlcdc_panel_output>;
			};
		};
	};

	panel_reg: panel_regulator {
		compatible = "regulator-fixed";
		regulator-name = "panel-power-supply";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		status = "okay";
	};

	sound {
		compatible = "atmel,asoc-wm8904";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pck0_as_audio_mck>;

		atmel,model = "wm8904 @ AT91SAM9N12";
		atmel,audio-routing =
			"Headphone Jack", "HPOUTL",
			"Headphone Jack", "HPOUTR",
			"IN2L", "Line In Jack",
			"IN2R", "Line In Jack",
			"Mic", "MICBIAS",
			"IN1L", "Mic";

		atmel,ssc-controller = <&ssc0>;
		atmel,audio-codec = <&wm8904>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
 *
 *  Copyright (C) 2014 Microchip
 *  Alexandre Belloni <alexandre.belloni@free-electrons.com>
 */

#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/mfd/at91-usart.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "Atmel AT91SAM9RL family SoC";
	compatible = "atmel,at91sam9rl", "atmel,at91sam9";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		ssc0 = &ssc0;
		ssc1 = &ssc1;
		pwm0 = &pwm0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	memory@20000000 {
		device_type = "memory";
		reg = <0x20000000 0x04000000>;
	};

	clocks {
		slow_xtal: slow_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};

		main_xtal: main_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};

		adc_op_clk: adc_op_clk{
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <1000000>;
		};
	};

	sram: sram@300000 {
		compatible = "mmio-sram";
		reg = <0x00300000 0x10000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0x00300000 0x10000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		fb0: fb@500000 {
			compatible = "atmel,at91sam9rl-lcdc";
			reg = <0x00500000 0x1000>;
			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_fb>;
			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
			clock-names = "hclk", "lcdc_clk";
			status = "disabled";
		};

		ebi: ebi@10000000 {
			compatible = "atmel,at91sam9rl-ebi";
			#address-cells = <2>;
			#size-cells = <1>;
			atmel,smc = <&smc>;
			atmel,matrix = <&matrix>;
			reg = <0x10000000 0x80000000>;
			ranges = <0x0 0x0 0x10000000 0x10000000
				  0x1 0x0 0x20000000 0x10000000
				  0x2 0x0 0x30000000 0x10000000
				  0x3 0x0 0x40000000 0x10000000
				  0x4 0x0 0x50000000 0x10000000
				  0x5 0x0 0x60000000 0x10000000>;
			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
			status = "disabled";

			nand_controller: nand-controller {
				compatible = "atmel,at91sam9g45-nand-controller";
				#address-cells = <2>;
				#size-cells = <1>;
				ranges;
				status = "disabled";
			};
		};

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			tcb0: timer@fffa0000 {
				compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xfffa0000 0x100>;
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
					     <17 IRQ_TYPE_LEVEL_HIGH 0>,
					     <18 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
			};

			mmc0: mmc@fffa4000 {
				compatible = "atmel,hsmci";
				reg = <0xfffa4000 0x600>;
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				pinctrl-names = "default";
				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
				clock-names = "mci_clk";
				status = "disabled";
			};

			i2c0: i2c@fffa8000 {
				compatible = "atmel,at91sam9260-i2c";
				reg = <0xfffa8000 0x100>;
				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
				status = "disabled";
			};

			i2c1: i2c@fffac000 {
				compatible = "atmel,at91sam9260-i2c";
				reg = <0xfffac000 0x100>;
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			usart0: serial@fffb0000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb0000 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
				clock-names = "usart";
				status = "disabled";
			};

			usart1: serial@fffb4000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb4000 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
				clock-names = "usart";
				status = "disabled";
			};

			usart2: serial@fffb8000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb8000 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
				clock-names = "usart";
				status = "disabled";
			};

			usart3: serial@fffbc000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffbc000 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart3>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
				clock-names = "usart";
				status = "disabled";
			};

			ssc0: ssc@fffc0000 {
				compatible = "atmel,at91sam9rl-ssc";
				reg = <0xfffc0000 0x4000>;
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				status = "disabled";
			};

			ssc1: ssc@fffc4000 {
				compatible = "atmel,at91sam9rl-ssc";
				reg = <0xfffc4000 0x4000>;
				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
				status = "disabled";
			};

			pwm0: pwm@fffc8000 {
				compatible = "atmel,at91sam9rl-pwm";
				reg = <0xfffc8000 0x300>;
				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
				#pwm-cells = <3>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
				clock-names = "pwm_clk";
				status = "disabled";
			};

			spi0: spi@fffcc000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffcc000 0x200>;
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
				clock-names = "spi_clk";
				status = "disabled";
			};

			adc0: adc@fffd0000 {
				compatible = "atmel,at91sam9rl-adc";
				reg = <0xfffd0000 0x100>;
				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
				clock-names = "adc_clk", "adc_op_clk";
				atmel,adc-use-external-triggers;
				atmel,adc-channels-used = <0x3f>;
				atmel,adc-vref = <3300>;
				atmel,adc-startup-time = <40>;
			};

			usb0: gadget@fffd4000 {
				compatible = "atmel,at91sam9rl-udc";
				reg = <0x00600000 0x100000>,
				      <0xfffd4000 0x4000>;
				interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
				clock-names = "pclk", "hclk";
				status = "disabled";
			};

			dma0: dma-controller@ffffe600 {
				compatible = "atmel,at91sam9rl-dma";
				reg = <0xffffe600 0x200>;
				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
				#dma-cells = <2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
				clock-names = "dma_clk";
			};

			ramc0: ramc@ffffea00 {
				compatible = "atmel,at91sam9260-sdramc";
				reg = <0xffffea00 0x200>;
			};

			smc: smc@ffffec00 {
				compatible = "atmel,at91sam9260-smc", "syscon";
				reg = <0xffffec00 0x200>;
			};

			matrix: matrix@ffffee00 {
				compatible = "atmel,at91sam9rl-matrix", "syscon";
				reg = <0xffffee00 0x200>;
			};

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <31>;
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
				clock-names = "usart";
				status = "disabled";
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				atmel,mux-mask =
					/*    A         B     */
					<0xffffffff 0xe05c6738>,  /* pioA */
					<0xffffffff 0x0000c780>,  /* pioB */
					<0xffffffff 0xe3ffff0e>,  /* pioC */
					<0x003fffff 0x0001ff3c>;  /* pioD */

				/* shared pinctrl settings */
				adc0 {
					pinctrl_adc0_ts: adc0_ts-0 {
						atmel,pins =
							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_adc0_ad0: adc0_ad0-0 {
						atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_adc0_ad1: adc0_ad1-0 {
						atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_adc0_ad2: adc0_ad2-0 {
						atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_adc0_ad3: adc0_ad3-0 {
						atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_adc0_ad4: adc0_ad4-0 {
						atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_adc0_ad5: adc0_ad5-0 {
						atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_adc0_adtrg: adc0_adtrg-0 {
						atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				ebi {
					pinctrl_ebi_addr_nand: ebi-addr-0 {
						atmel,pins =
							<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				fb {
					pinctrl_fb: fb-0 {
						atmel,pins =
							<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				i2c_gpio0 {
					pinctrl_i2c_gpio0: i2c_gpio0-0 {
						atmel,pins =
							<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
							<AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
					};
				};

				i2c_gpio1 {
					pinctrl_i2c_gpio1: i2c_gpio1-0 {
						atmel,pins =
							<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
							<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
					};
				};

				mmc0 {
					pinctrl_mmc0_clk: mmc0_clk-0 {
						atmel,pins =
							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};
				};

				nand {
					pinctrl_nand_rb: nand-rb-0 {
						atmel,pins =
							<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_nand_cs: nand-cs-0 {
						atmel,pins =
							<AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_nand_oe_we: nand-oe-we-0 {
						atmel,pins =
							<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				pwm0 {
					pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
						atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
						atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
						atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
						atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
						atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
						atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
						atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
						atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
						atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
							<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				ssc1 {
					pinctrl_ssc1_tx: ssc1_tx-0 {
						atmel,pins =
							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_ssc1_rx: ssc1_rx-0 {
						atmel,pins =
							<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				tcb0 {
					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
						atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
						atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
						atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
						atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
						atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
						atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
						atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
						atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
						atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
						atmel,pins =
							<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart0_dcd: usart0_dcd-0 {
						atmel,pins =
							<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart0_ri: usart0_ri-0 {
						atmel,pins =
							<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart0_sck: usart0_sck-0 {
						atmel,pins =
							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_usart1_cts: usart1_cts-0 {
						atmel,pins =
							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_usart1_sck: usart1_sck-0 {
						atmel,pins =
							<AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart2_sck: usart2_sck-0 {
						atmel,pins =
							<AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				usart3 {
					pinctrl_usart3: usart3-0 {
						atmel,pins =
							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
							<AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_usart3_cts: usart3_cts-0 {
						atmel,pins =
							<AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_usart3_sck: usart3_sck-0 {
						atmel,pins =
							<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
				};
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91sam9rl-pmc", "syscon";
				reg = <0xfffffc00 0x100>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				#clock-cells = <2>;
				clocks = <&clk32k>, <&main_xtal>;
				clock-names = "slow_clk", "main_xtal";
			};

			reset-controller@fffffd00 {
				compatible = "atmel,at91sam9260-rstc";
				reg = <0xfffffd00 0x10>;
				clocks = <&clk32k>;
			};

			shdwc@fffffd10 {
				compatible = "atmel,at91sam9260-shdwc";
				reg = <0xfffffd10 0x10>;
				clocks = <&clk32k>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
			};

			watchdog@fffffd40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffd40 0x10>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "disabled";
			};

			clk32k: sckc@fffffd50 {
				compatible = "atmel,at91sam9x5-sckc";
				reg = <0xfffffd50 0x4>;
				clocks = <&slow_xtal>;
				#clock-cells = <0>;
			};

			rtc@fffffd20 {
				compatible = "atmel,at91sam9260-rtt";
				reg = <0xfffffd20 0x10>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "disabled";
			};

			gpbr: syscon@fffffd60 {
				compatible = "atmel,at91sam9260-gpbr", "syscon";
				reg = <0xfffffd60 0x10>;
				status = "disabled";
			};

			rtc@fffffe00 {
				compatible = "atmel,at91rm9200-rtc";
				reg = <0xfffffe00 0x40>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "disabled";
			};

		};
	};

	i2c-gpio-0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
			<&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio0>;
		status = "disabled";
	};

	i2c-gpio-1 {
		compatible = "i2c-gpio";
		gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
			<&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio1>;
		status = "disabled";
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board
 *
 *  Copyright (C) 2014 Microchip
 *  Alexandre Belloni <alexandre.belloni@free-electrons.com>
 */
/dts-v1/;
#include "at91sam9rl.dtsi"

/ {
	model = "Atmel at91sam9rlek";
	compatible = "atmel,at91sam9rlek", "atmel,at91sam9rl", "atmel,at91sam9";

	chosen {
		bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
		stdout-path = "serial0:115200n8";
	};

	memory@20000000 {
		reg = <0x20000000 0x4000000>;
	};

	clocks {
		slow_xtal {
			clock-frequency = <32768>;
		};

		main_xtal {
			clock-frequency = <12000000>;
		};
	};

	ahb {
		fb0: fb@500000 {
			display = <&display0>;
			status = "okay";

			display0: panel {
				bits-per-pixel = <16>;
				atmel,lcdcon-backlight;
				atmel,dmacon = <0x1>;
				atmel,lcdcon2 = <0x80008002>;
				atmel,guard-time = <1>;
				atmel,lcd-wiring-mode = "RGB";

				display-timings {
					native-mode = <&timing0>;
					timing0: timing0 {
						clock-frequency = <4965000>;
						hactive = <240>;
						vactive = <320>;
						hback-porch = <1>;
						hfront-porch = <33>;
						vback-porch = <1>;
						vfront-porch = <0>;
						hsync-len = <5>;
						vsync-len = <1>;
						hsync-active = <1>;
						vsync-active = <1>;
					};
				};
			};
		};

		ebi: ebi@10000000 {
			pinctrl-0 = <&pinctrl_ebi_addr_nand>;
			pinctrl-names = "default";
			status = "okay";

			nand_controller: nand-controller {
				status = "okay";
				pinctrl-0 = <&pinctrl_nand_oe_we
					     &pinctrl_nand_cs
					     &pinctrl_nand_rb>;
				pinctrl-names = "default";

				nand@3 {
					reg = <0x3 0x0 0x800000>;
					rb-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
					cs-gpios = <&pioB 6 GPIO_ACTIVE_HIGH>;
					nand-bus-width = <8>;
					nand-ecc-mode = "soft";
					nand-on-flash-bbt;
					label = "atmel_nand";

					partitions {
						compatible = "fixed-partitions";
						#address-cells = <1>;
						#size-cells = <1>;

						at91bootstrap@0 {
							label = "at91bootstrap";
							reg = <0x0 0x40000>;
						};

						bootloader@40000 {
							label = "bootloader";
							reg = <0x40000 0x80000>;
						};

						bootloaderenv@c0000 {
							label = "bootloader env";
							reg = <0xc0000 0xc0000>;
						};

						dtb@180000 {
							label = "device tree";
							reg = <0x180000 0x80000>;
						};

						kernel@200000 {
							label = "kernel";
							reg = <0x200000 0x600000>;
						};

						rootfs@800000 {
							label = "rootfs";
							reg = <0x800000 0x0f800000>;
						};
					};
				};
			};
		};

		apb {
			tcb0: timer@fffa0000 {
				timer@0 {
					compatible = "atmel,tcb-timer";
					reg = <0>, <1>;
				};

				timer@2 {
					compatible = "atmel,tcb-timer";
					reg = <2>;
				};
			};

			mmc0: mmc@fffa4000 {
				pinctrl-0 = <
					&pinctrl_board_mmc0
					&pinctrl_mmc0_clk
					&pinctrl_mmc0_slot0_cmd_dat0
					&pinctrl_mmc0_slot0_dat1_3>;
				status = "okay";
				slot@0 {
					reg = <0>;
					bus-width = <4>;
					cd-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
				};
			};

			usart0: serial@fffb0000 {
				pinctrl-0 = <
					&pinctrl_usart0
					&pinctrl_usart0_rts
					&pinctrl_usart0_cts>;
				status = "okay";
			};

			adc0: adc@fffd0000 {
				pinctrl-names = "default";
				pinctrl-0 = <
					&pinctrl_adc0_ad0
					&pinctrl_adc0_ad1
					&pinctrl_adc0_ad2
					&pinctrl_adc0_ad3
					&pinctrl_adc0_ad4
					&pinctrl_adc0_ad5
					&pinctrl_adc0_adtrg>;
				atmel,adc-ts-wires = <4>;
				status = "okay";
			};

			usb0: gadget@fffd4000 {
				atmel,vbus-gpio = <&pioA 8 GPIO_ACTIVE_HIGH>;
				status = "okay";
			};

			spi0: spi@fffcc000 {
				status = "okay";
				cs-gpios = <&pioA 28 0>, <0>, <0>, <0>;
				flash@0 {
					compatible = "atmel,at45", "atmel,dataflash";
					spi-max-frequency = <15000000>;
					reg = <0>;
				};
			};

			pwm0: pwm@fffc8000 {
				status = "okay";

				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_pwm0_pwm1_2>,
					<&pinctrl_pwm0_pwm2_2>;
			};

			dbgu: serial@fffff200 {
				status = "okay";
			};

			pinctrl@fffff400 {
				mmc0 {
					pinctrl_board_mmc0: mmc0-board {
						atmel,pins =
							<AT91_PIOA 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
					};
				};
			};

			watchdog@fffffd40 {
				status = "okay";
			};

			rtc@fffffd20 {
				atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
			};

			rtc@fffffe00 {
				status = "okay";
			};
		};
	};

	led-controller-1 {
		compatible = "pwm-leds";

		led-1 {
			label = "ds1";
			pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>;
			max-brightness = <255>;
		};

		led-2 {
			label = "ds2";
			pwms = <&pwm0 2 5000 PWM_POLARITY_INVERTED>;
			max-brightness = <255>;
		};
	};

	led-controller-2 {
		compatible = "gpio-leds";

		led-3 {
			label = "ds3";
			gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		button-right-click {
			label = "right_click";
			gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
			linux,code = <273>;
			wakeup-source;
		};

		button-left-click {
			label = "left_click";
			gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
			linux,code = <272>;
			wakeup-source;
		};
	};

	i2c-gpio-0 {
		status = "okay";
	};

	i2c-gpio-1 {
		status = "okay";
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * at91sam9x25.dtsi - Device Tree Include file for AT91SAM9X25 SoC
 *
 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 */

#include "at91sam9x5.dtsi"
#include "at91sam9x5_usart3.dtsi"
#include "at91sam9x5_macb0.dtsi"
#include "at91sam9x5_macb1.dtsi"
#include "at91sam9x5_can.dtsi"

/ {
	model = "Atmel AT91SAM9X25 SoC";
	compatible = "atmel,at91sam9x25", "atmel,at91sam9x5";

	ahb {
		apb {
			pinctrl@fffff400 {
				atmel,mux-mask = <
				      /*    A         B          C     */
				       0xffffffff 0xffe03fff 0xc000001c  /* pioA */
				       0x0007ffff 0x00047e3f 0x00000000  /* pioB */
				       0x80000000 0xfffd0000 0xb83fffff  /* pioC */
				       0x003fffff 0x003f8000 0x00000000  /* pioD */
				      >;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91sam9x25-pmc", "atmel,at91sam9x5-pmc", "syscon";
			};
		};
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
 */
/dts-v1/;
#include "at91sam9x25.dtsi"
#include "at91sam9x5ek.dtsi"

/ {
	model = "Atmel AT91SAM9X25-EK";
	compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
};

&can1 {
	status = "okay";
};

&macb0 {
	phy-mode = "rmii";
	status = "okay";
};

&macb1 {
	phy-mode = "rmii";
	status = "okay";
};

&pwm0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_pwm0_1>;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * at91sam9x35.dtsi - Device Tree Include file for AT91SAM9X35 SoC
 *
 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 */

#include "at91sam9x5.dtsi"
#include "at91sam9x5_lcd.dtsi"
#include "at91sam9x5_macb0.dtsi"
#include "at91sam9x5_can.dtsi"

/ {
	model = "Atmel AT91SAM9X35 SoC";
	compatible = "atmel,at91sam9x35", "atmel,at91sam9x5";

	ahb {
		apb {
			pinctrl@fffff400 {
				atmel,mux-mask = <
				      /*    A         B          C     */
				       0xffffffff 0xffe03fff 0xc000000c  /* pioA */
				       0x000406ff 0x00047e3f 0x00000000  /* pioB */
				       0xfdffffff 0x00000000 0xb83fffff  /* pioC */
				       0x003fffff 0x003f8000 0x00000000  /* pioD */
				      >;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91sam9x35-pmc", "atmel,at91sam9x5-pmc", "syscon";
			};
		};
	};
};