code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2018 PHYTEC Messtechnik
 * Author: Christian Hemp <c.hemp@phytec.de>
 */

/ {
	display: display0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,imx-parallel-display";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_disp0>;
		interface-pix-fmt = "rgb24";
		status = "disabled";

		port@0 {
			reg = <0>;

			display0_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			display0_out: endpoint {
				remote-endpoint = <&peb_panel_lcd_in>;
			};
		};
	};

	panel-lcd {
		compatible = "edt,etm0700g0edh6";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_disp0_pwr>;
		power-supply = <&reg_display>;
		enable-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		backlight = <&backlight>;
		status = "disabled";

		port {
			peb_panel_lcd_in: endpoint {
				remote-endpoint = <&display0_out>;
			};
		};
	};

	reg_display: regulator-peb-display {
		compatible = "regulator-fixed";
		regulator-name = "peb-display";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&i2c1 {
	edt_ft5x06: touchscreen@38 {
		compatible = "edt,edt-ft5406";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_edt_ft5x06>;
		reg = <0x38>;
		interrupt-parent = <&gpio3>;
		interrupts = <2 IRQ_TYPE_NONE>;
		status = "disabled";
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&display0_in>;
};

&iomuxc {
	pinctrl_disp0: disp0grp {
		fsl,pins = <
			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x10
			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x10
			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x10
			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x1b080
			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x10
			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x10
			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x10
			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x10
			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x10
			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x10
			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x10
			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x10
			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x10
			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x10
			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x10
			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x10
			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x10
			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x10
			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x10
			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x10
			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x10
			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x10
			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	0x10
			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	0x10
			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	0x10
			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	0x10
			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	0x10
			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	0x10
		>;
	};

	pinctrl_disp0_pwr: disp0pwrgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D22__GPIO3_IO22			0x1b0b0
		>;
	};

	pinctrl_edt_ft5x06: edtft5x06grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_DA2__GPIO3_IO02			0xb0b1
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2018 PHYTEC Messtechnik
 * Author: Christian Hemp <c.hemp@phytec.de>
 */

#include <dt-bindings/input/input.h>

/ {
	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;
		status = "disabled";

		power {
			label = "Power Button";
			gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WAKEUP>;
			wakeup-source;
		};

		sleep {
			label = "Sleep Button";
			gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_SLEEP>;
		};
	};

	user_leds: user-leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_user_leds>;
		status = "disabled";

		user-led1 {
			gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "gpio";
			default-state = "on";
		};

		user-led2 {
			gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "gpio";
			default-state = "on";
		};

		user-led3 {
			gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "gpio";
			default-state = "on";
		};
	};
};

&iomuxc {
	pinctrl_gpio_keys: gpiokeysgrp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT6__GPIO6_IO18		0x1b0b0
			MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28	0x1b0b0
		>;
	};

	pinctrl_user_leds: userledsgrp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x1b0b0
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0
			MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29	0x1b0b0
		>;
	};
};

repo_name: angery/linux


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2021 PHYTEC Messtechnik GmbH
 * Author: Yunus Bas <y.bas@phytec.de>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	reg_wl_en: regulator-wl-en {
		compatible = "regulator-fixed";
		regulator-name = "wlan_en";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wl>;
		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		startup-delay-us = <100>;
		status = "disabled";
	};
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3_bt>;
	uart-has-rtscts;

	bluetooth {
		compatible = "brcm,bcm43438-bt";
		shutdown-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
		device-wakeup-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
		host-wakeup-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
		status = "disabled";
	};
};

&usdhc3 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3_wl>;
	vmmc-supply = <&reg_wl_en>;
	bus-width = <4>;
	non-removable;
	no-1-8-v;
	status = "disabled";

	brmcf: wifi@1 {
		compatible = "brcm,bcm4329-fmac";
		reg = <1>;
	};
};

&iomuxc {
	pinctrl_uart3_bt: uart3grp-bt {
		fsl,pins = <
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1
			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0xb0b1	/* BT ENABLE */
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0xb0b1	/* DEV WAKEUP */
			MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0xb0b1  /* HOST WAKEUP */
		>;
	};

	pinctrl_usdhc3_wl: usdhc3grp-wl {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
		>;
	};

	pinctrl_wl: wlgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A25__GPIO5_IO02      0xb0b1	/* WLAN ENABLE */
		>;
	};
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2018 PHYTEC Messtechnik GmbH
 * Author: Christian Hemp <c.hemp@phytec.de>
 */

/ {
	aliases {
		rtc0 = &i2c_rtc;
	};

	backlight: backlight {
		compatible = "pwm-backlight";
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		power-supply = <&reg_backlight>;
		pwms = <&pwm1 0 5000000>;
		status = "okay";
	};

	gpio_leds: leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpioleds>;
		status = "disabled";

		red {
			label = "phyboard-mira:red";
			gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
		};

		green {
			label = "phyboard-mira:green";
			gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
		};

		blue {
			label = "phyboard-mira:blue";
			gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc0";
		};
	};

	reg_backlight: regulator-backlight {
		compatible = "regulator-fixed";
		regulator-name = "backlight_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_en_switch: regulator-en-switch {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_en_switch>;
		regulator-name = "Enable Switch";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
		gpio = <&gpio3 4 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
	};

	reg_flexcan1: regulator-flexcan1 {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_flexcan1_en>;
		regulator-name = "flexcan1-reg";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_panel: regulator-panel {
		compatible = "regulator-fixed";
		regulator-name = "panel-power-supply";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
	};

	reg_pcie: regulator-pcie {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pcie_reg>;
		regulator-name = "mPCIe_1V5";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio3 0 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_h1_vbus: usb-h1-vbus {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbh1_vbus>;
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usbotg_vbus: usbotg-vbus {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbotg_vbus>;
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	panel {
		compatible = "auo,g104sn02";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_panel_en>;
		power-supply = <&reg_panel>;
		enable-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
		backlight = <&backlight>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	xceiver-supply = <&reg_flexcan1>;
	status = "disabled";
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hdmicec>;
	ddc-i2c-bus = <&i2c2>;
	status = "disabled";
};

&i2c1 {
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c1>;
	pinctrl-1 = <&pinctrl_i2c1_gpio>;
	scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	clock-frequency = <400000>;
	status = "disabled";

	stmpe: touchctrl@44 {
		compatible = "st,stmpe811";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_stmpe>;
		reg = <0x44>;
		interrupt-parent = <&gpio7>;
		interrupts = <12 IRQ_TYPE_NONE>;
		status = "disabled";

		stmpe_touchscreen {
			compatible = "st,stmpe-ts";
			st,sample-time = <4>;
			st,mod-12b = <1>;
			st,ref-sel = <0>;
			st,adc-freq = <1>;
			st,ave-ctrl = <1>;
			st,touch-det-delay = <2>;
			st,settling = <2>;
			st,fraction-z = <7>;
			st,i-drive = <1>;
		};
	};

	i2c_rtc: rtc@68 {
		compatible = "microcrystal,rv4162";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rtc_int>;
		reg = <0x68>;
		interrupt-parent = <&gpio7>;
		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};
};

&i2c2 {
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c2>;
	pinctrl-1 = <&pinctrl_i2c2_gpio>;
	scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	clock-frequency = <100000>;
	status = "disabled";
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "disabled";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio2 25 GPIO_ACTIVE_LOW>;
	vpcie-supply = <&reg_pcie>;
	status = "disabled";
};

&pwm1 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	uart-has-rtscts;
	status = "disabled";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	disable-over-current;
	status = "disabled";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	vbus-supply = <&reg_usbotg_vbus>;
	disable-over-current;
	status = "disabled";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio6 31 GPIO_ACTIVE_LOW>;
	no-1-8-v;
	disable-wp;
	status = "disabled";
};

&iomuxc {
	pinctrl_panel_en: panelen1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0xb0b1
		>;
	};

	pinctrl_en_switch: enswitchgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_DA4__GPIO3_IO04		0xb0b1
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0
			MX6QDL_PAD_GPIO_8__FLEXCAN1_RX		0x1b0b0
		>;
	};

	pinctrl_flexcan1_en: flexcan1engrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A18__GPIO2_IO20		0xb0b1
		>;
	};

	pinctrl_gpioleds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22	0x1b0b0
			MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23	0x1b0b0
			MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24	0x1b0b0
		>;
	};

	pinctrl_hdmicec: hdmicecgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	0x1f8b0
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c1_gpio: i2c1gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__GPIO3_IO21		0x4001b8b1
			MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
		>;
	};

	pinctrl_i2c2_gpio: i2c2gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		0x4001b8b1
			MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x4001b8b1
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_OE__GPIO2_IO25		0xb0b1
		>;
	};

	pinctrl_pcie_reg: pciereggrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_DA0__GPIO3_IO00		0xb0b1
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__PWM1_OUT		0x1b0b1
		>;
	};

	pinctrl_rtc_int: rtcintgrp {
		fsl,pins = <
			MX6QDL_PAD_SD3_RST__GPIO7_IO08		0x1b0b0
		>;
	};

	pinctrl_stmpe: stmpegrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b0
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_EB3__UART3_CTS_B		0x1b0b1
			MX6QDL_PAD_EIM_D23__UART3_RTS_B		0x1b0b1
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbh1_vbus: usbh1vbusgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A20__GPIO2_IO18		0xb0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
		>;
	};

	pinctrl_usbotg_vbus: usbotgvbusgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A19__GPIO2_IO19		0xb0b1
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x170f9
			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x100f9
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x170f9
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x170f9
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x170f9
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x170f9
			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0xb0b1  /* CD */
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
 */

#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	chosen {
		stdout-path = &uart4;
	};

	regulators {
		sound_1v8: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "i2s-audio-1v8";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};

		sound_3v3: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "i2s-audio-3v3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
		};
	};

	tlv320_mclk: oscillator {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <19200000>;
		clock-output-names = "tlv320-mclk";
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "OnboardTLV320AIC3007";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&dailink_master>;
		simple-audio-card,frame-master = <&dailink_master>;
		simple-audio-card,widgets =
			"Microphone", "Mic Jack",
			"Line", "Line In",
			"Line", "Line Out",
			"Speaker", "Speaker",
			"Headphone", "Headphone Jack";
		simple-audio-card,routing =
			"Line Out", "LLOUT",
			"Line Out", "RLOUT",
			"Speaker", "SPOP",
			"Speaker", "SPOM",
			"Headphone Jack", "HPLOUT",
			"Headphone Jack", "HPROUT",
			"MIC3L", "Mic Jack",
			"MIC3R", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"LINE1L", "Line In",
			"LINE1R", "Line In";

		simple-audio-card,cpu {
			sound-dai = <&ssi2>;
		};

		dailink_master: simple-audio-card,codec {
			sound-dai = <&codec>;
			clocks = <&tlv320_mclk>;
		};
	};

};

&audmux {
	status = "okay";

	ssi2 {
		fsl,audmux-port = <1>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_SYN |
			IMX_AUDMUX_V2_PTCR_TFSDIR |
			IMX_AUDMUX_V2_PTCR_TFSEL(4) |
			IMX_AUDMUX_V2_PTCR_TCLKDIR |
			IMX_AUDMUX_V2_PTCR_TCSEL(4))
			IMX_AUDMUX_V2_PDCR_RXDSEL(4)
		>;
	};

	pins5 {
		fsl,audmux-port = <4>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(1)
		>;
	};
};

&can1 {
	status = "okay";
};

&fec {
	status = "okay";
};

&hdmi {
	status = "okay";
};

&i2c2 {
	status = "okay";

	codec: tlv320@18 {
		compatible = "ti,tlv320aic3007";
		#sound-dai-cells = <0>;
		reg = <0x18>;
		ai3x-micbias-vg = <2>;

		AVDD-supply = <&sound_3v3>;
		IOVDD-supply = <&sound_3v3>;
		DRVDD-supply = <&sound_3v3>;
		DVDD-supply = <&sound_1v8>;
	};

	stmpe@41 {
		compatible = "st,stmpe811";
		reg = <0x41>;
	};

	rtc@51 {
		compatible = "epson,rtc8564";
		reg = <0x51>;
	};

	adc@64 {
		compatible = "maxim,max1037";
		reg = <0x64>;
	};
};

&i2c3 {
	status = "okay";
};

&pcie {
	status = "okay";
};

&ssi2 {
	status = "okay";
};

&uart3 {
	status = "okay";
};

&uart4 {
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&usbotg {
	status = "okay";
	dr_mode = "peripheral";
};

&usdhc2 {
	status = "okay";
};

&usdhc3 {
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
 */

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Phytec phyFLEX-i.MX6 Quad";
	compatible = "phytec,imx6q-pfla02", "fsl,imx6q";

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x80000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usb_otg_vbus: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio4 15 0>;
			enable-active-high;
		};

		reg_usb_h1_vbus: regulator@1 {
			compatible = "regulator-fixed";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usbh1_vbus>;
			reg = <1>;
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio1 0 0>;
			enable-active-high;
		};
	};

	gpio_leds: leds {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_leds>;
		compatible = "gpio-leds";

		led_green: green {
			label = "phyflex:green";
			gpios = <&gpio1 30 0>;
		};

		led_red: red {
			label = "phyflex:red";
			gpios = <&gpio2 31 0>;
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "disabled";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "disabled";
};

&ecspi3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	status = "okay";
	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;

	som_flash: flash@0 {
		compatible = "m25p80", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-handle = <&ethphy>;
	phy-mode = "rgmii";
	phy-reset-duration = <10>; /* in msecs */
	phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
	phy-supply = <&vdd_eth_io_reg>;
	status = "disabled";

	fec_mdio: mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
			txc-skew-ps = <1680>;
			rxc-skew-ps = <1860>;
		};
	};
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	nand-on-flash-bbt;
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	som_eeprom: eeprom@50 {
		compatible = "catalyst,24c32", "atmel,24c32";
		pagesize = <32>;
		reg = <0x50>;
	};

	pmic@58 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pmic>;
		compatible = "dlg,da9063";
		reg = <0x58>;
		interrupt-parent = <&gpio2>;
		interrupts = <9 IRQ_TYPE_LEVEL_LOW>; /* active-low GPIO2_9 */
		interrupt-controller;

		regulators {
			vddcore_reg: bcore1 {
				regulator-min-microvolt = <730000>;
				regulator-max-microvolt = <1380000>;
				regulator-always-on;
			};

			vddsoc_reg: bcore2 {
				regulator-min-microvolt = <730000>;
				regulator-max-microvolt = <1380000>;
				regulator-always-on;
			};

			vdd_ddr3_reg: bpro {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1500000>;
				regulator-always-on;
			};

			vdd_3v3_reg: bperi {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vdd_buckmem_reg: bmem {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vdd_eth_reg: bio {
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-always-on;
			};

			vdd_eth_io_reg: ldo4 {
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
				regulator-always-on;
			};

			vdd_mx6_snvs_reg: ldo5 {
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
			};

			vdd_3v3_pmic_io_reg: ldo6 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vdd_sd0_reg: ldo9 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
			};

			vdd_sd1_reg: ldo10 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
			};

			vdd_mx6_high_reg: ldo11 {
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
			};
		};

		da9063_rtc: rtc {
			compatible = "dlg,da9063-rtc";
		};

		da9063_wdog: watchdog {
			compatible = "dlg,da9063-watchdog";
		};

		onkey {
			compatible = "dlg,da9063-onkey";
			status = "disabled";
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	clock-frequency = <100000>;
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	clock-frequency = <100000>;
};

&iomuxc {
	imx6q-phytec-pfla02 {
		pinctrl_ecspi3: ecspi3grp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
				MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
				MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
				MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x80000000 /* CS0 */
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
				MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x80000000 /* Reset GPIO */
			>;
		};

		pinctrl_flexcan1: flexcan1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0
			>;
		};

		pinctrl_gpmi_nand: gpminandgrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_leds: ledsgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x80000000 /* Green LED */
				MX6QDL_PAD_EIM_EB3__GPIO2_IO31		0x80000000 /* Red LED */
			>;
		};

		pinctrl_pcie: pciegrp {
			fsl,pins = <MX6QDL_PAD_DI0_PIN15__GPIO4_IO17  0x80000000>;
		};

		pinctrl_pmic: pmicgrp {
			fsl,pins = <MX6QDL_PAD_SD4_DAT1__GPIO2_IO09	0x80000000>; /* PMIC interrupt */
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1
				MX6QDL_PAD_EIM_D30__UART3_CTS_B		0x1b0b1
			>;
		};

		pinctrl_uart4: uart4grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbh1_vbus: usbh1vbusgrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
				MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0
				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x80000000
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			>;
		};

		pinctrl_usdhc3_cdwp: usdhc3cdwp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
			>;
		};

		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT16__AUD5_TXC	0x130b0
				MX6QDL_PAD_DISP0_DAT17__AUD5_TXD	0x110b0
				MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS	0x130b0
				MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0
			>;
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio4 17 GPIO_ACTIVE_LOW>;
	status = "disabled";
};

&reg_arm {
	vin-supply = <&vddcore_reg>;
};

&reg_pu {
	vin-supply = <&vddsoc_reg>;
};

&reg_soc {
	vin-supply = <&vddsoc_reg>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	uart-has-rtscts;
	status = "disabled";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "disabled";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "disabled";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "disabled";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&vdd_sd1_reg>;
	status = "disabled";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3
		     &pinctrl_usdhc3_cdwp>;
	cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&vdd_sd0_reg>;
	status = "disabled";
};


code:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2018 PHYTEC Messtechnik GmbH
 * Author: Christian Hemp <c.hemp@phytec.de>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/dlg,da9063-regulator.h>

/ {
	aliases {
		rtc1 = &da9062_rtc;
		rtc2 = &snvs_rtc;
	};

	/*
	 * Set the minimum memory size here and
	 * let the bootloader set the real size.
	 */
	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x8000000>;
	};

	gpio_leds_som: somleds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpioleds_som>;

		som-led-green {
			label = "phycore:green";
			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	status = "okay";

	m25p80: flash@0 {
		compatible = "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
		status = "disabled";
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-handle = <&ethphy>;
	phy-mode = "rgmii";
	phy-supply = <&vdd_eth_io>;
	phy-reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
	status = "disabled";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy@3 {
			reg = <3>;
			txc-skew-ps = <1680>;
			rxc-skew-ps = <1860>;
		};
	};
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	nand-on-flash-bbt;
	status = "disabled";
};

&i2c3 {
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c3>;
	pinctrl-1 = <&pinctrl_i2c3_gpio>;
	scl-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	clock-frequency = <400000>;
	status = "okay";

	eeprom@50 {
		compatible = "st,24c32", "atmel,24c32";
		pagesize = <32>;
		reg = <0x50>;
	};

	pmic: pmic@58 {
		compatible = "dlg,da9062";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pmic>;
		reg = <0x58>;
		interrupt-parent = <&gpio1>;
		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		gpio-controller;
		#gpio-cells = <2>;

		da9062_rtc: rtc {
			compatible = "dlg,da9062-rtc";
		};

		da9062_onkey: onkey {
			compatible = "dlg,da9062-onkey";
		};

		watchdog {
			compatible = "dlg,da9062-watchdog";
			dlg,use-sw-pm;
		};

		thermal {
			compatible = "dlg,da9062-thermal";
			status = "disabled";
		};

		gpio {
			compatible = "dlg,da9062-gpio";
			status = "disabled";
		};

		regulators {
			vdd_arm: buck1 {
				regulator-name = "vdd_arm";
				regulator-min-microvolt = <925000>;
				regulator-max-microvolt = <1380000>;
				regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
				regulator-always-on;
			};

			vdd_soc: buck2 {
				regulator-name = "vdd_soc";
				regulator-min-microvolt = <1150000>;
				regulator-max-microvolt = <1380000>;
				regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
				regulator-always-on;
			};

			vdd_ddr3_1p5: buck3 {
				regulator-name = "vdd_ddr3";
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1500000>;
				regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
				regulator-always-on;
			};

			vdd_eth_1p2: buck4 {
				regulator-name = "vdd_eth";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
				regulator-always-on;
			};

			vdd_snvs: ldo1 {
				regulator-name = "vdd_snvs";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
			};

			vdd_high: ldo2 {
				regulator-name = "vdd_high";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
			};

			vdd_eth_io: ldo3 {
				regulator-name = "vdd_eth_io";
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
			};

			vdd_emmc_1p8: ldo4 {
				regulator-name = "vdd_emmc";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};
		};
	};
};

&reg_arm {
	vin-supply = <&vdd_arm>;
};

&reg_pu {
	vin-supply = <&vdd_soc>;
};

&reg_soc {
	vin-supply = <&vdd_soc>;
};

&snvs_poweroff {
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <8>;
	non-removable;
	status = "disabled";
};

&iomuxc {
	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
			MX6QDL_PAD_SD2_DAT1__GPIO1_IO14		0x1b0b0
		>;
	};

	pinctrl_gpioleds_som: gpioledssomgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
			MX6QDL_PAD_NANDF_CS2__NAND_CE2_B	0xb0b1
			MX6QDL_PAD_NANDF_CS3__NAND_CE3_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
			MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
		>;
	};

	pinctrl_i2c3_gpio: i2c3gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_6__GPIO1_IO06	0x4001b8b1
			MX6QDL_PAD_GPIO_5__GPIO1_IO05	0x4001b8b1
		>;
	};

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x1b0b0
		>;
	};

	pinctrl_pmic: pmicgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0
		>;
	};

	pinctrl_usdhc4: usdhc4grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2017 NXP

#include "imx6qdl-pico.dtsi"

/ {
	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led {
			label = "gpio-led";
			gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;
		};
	};

};

&i2c1 {
	mpl3115@60 {
		compatible = "fsl,mpl3115";
		reg = <0x60>;
	};
};

&i2c2 {
	io-expander@25 {
		compatible = "nxp,pca9554";
		reg = <0x25>;
		gpio-controller;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
	};

};

&iomuxc {
	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x1b0b0
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2017 NXP

#include "imx6qdl-pico.dtsi"

/ {
	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led {
			label = "gpio-led";
			gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;
		};
	};

};

&i2c2 {
	status = "okay";

	adc081c: adc@50 {
		compatible = "ti,adc081c";
		reg = <0x50>;
		vref-supply = <&reg_3p3v>;
	};
};

&iomuxc {
	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x1b0b0
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT

#include "imx6qdl-pico.dtsi"

/ {
	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led {
			label = "gpio-led";
			gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;
		};
	};

};

&i2c1 {
	adc@52 {
		compatible = "ti,adc081c";
		reg = <0x52>;
		vref-supply = <&reg_2p5v>;
	};
};

&i2c2 {
	io-expander@25 {
		compatible = "nxp,pca9554";
		reg = <0x25>;
		gpio-controller;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
	};
};

&i2c3 {
	rtc@68 {
		compatible = "dallas,ds1337";
		reg = <0x68>;
	};
};

&pcie {
	status = "okay";
};

&iomuxc {
	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x1b0b0
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2017 NXP

#include "imx6qdl-pico.dtsi"

/ {
	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led {
			label = "gpio-led";
			gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
		};
	};

};

&hdmi {
	status = "disabled";
};

&iomuxc {
	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18	0x1b0b0
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0 OR MIT
//
// Copyright 2018 Technexion Ltd.
//
// Author: Wig Cheng <wig.cheng@technexion.com>
//	   Richard Hu <richard.hu@technexion.com>
//	   Tapani Utriainen <tapani@technexion.com>

#include <dt-bindings/gpio/gpio.h>

/ {
	chosen {
		stdout-path = &uart1;
	};

	reg_2p5v: regulator-2p5v {
		compatible = "regulator-fixed";
		regulator-name = "2P5V";
		regulator-min-microvolt = <2500000>;
		regulator-max-microvolt = <2500000>;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "1P8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
	};

	reg_1p5v: regulator-1p5v {
		compatible = "regulator-fixed";
		regulator-name = "1P5V";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		regulator-always-on;
	};

	reg_2p8v: regulator-2p8v {
		compatible = "regulator-fixed";
		regulator-name = "2P8V";
		regulator-min-microvolt = <2800000>;
		regulator-max-microvolt = <2800000>;
		regulator-always-on;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbotg_vbus>;
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
	};

	codec_osc: clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};

	sound {
		compatible = "fsl,imx-audio-sgtl5000";
		model = "imx6-pico-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&sgtl5000>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <3>;
	};

	backlight: backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 50000 0>;
		brightness-levels = <0 36 72 108 144 180 216 255>;
		default-brightness-level = <6>;
		status = "okay";
	};

	reg_lcd_3v3: regulator-lcd-3v3 {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_lcd>;
		regulator-name = "lcd-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	lcd_display: disp0 {
		compatible = "fsl,imx-parallel-display";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ipu1>;
		status = "okay";

		port@0 {
			reg = <0>;

			lcd_display_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			lcd_display_out: endpoint {
				remote-endpoint = <&lcd_panel_in>;
			};
		};
	};

	panel {
		compatible = "vxt,vl050-8048nt-c01";
		backlight = <&backlight>;
		power-supply = <&reg_lcd_3v3>;

		port {
			lcd_panel_in: endpoint {
				remote-endpoint = <&lcd_display_out>;
			};
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	cs-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
	phy-handle = <&phy>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		phy: ethernet-phy@1 {
			reg = <1>;
			qca,clk-out-frequency = <125000000>;
		};
	};
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	sgtl5000: audio-codec@a {
		#sound-dai-cells = <0>;
		reg = <0x0a>;
		compatible = "fsl,sgtl5000";
		clocks = <&codec_osc>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_1p8v>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	touchscreen@38 {
		compatible = "edt,edt-ft5x06";
		reg = <0x38>;
		interrupt-parent = <&gpio5>;
		interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
		reset-gpios = <&gpio5 27 GPIO_ACTIVE_LOW>;
		touchscreen-size-x = <800>;
		touchscreen-size-y = <480>;
		wakeup-source;
	};

	camera@3c {
		compatible = "ovti,ov5645";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ov5645>;
		reg = <0x3c>;
		clocks = <&clks IMX6QDL_CLK_CKO2>;
		clock-frequency = <24000000>;
		vdddo-supply = <&reg_1p8v>;
		vdda-supply = <&reg_2p8v>;
		vddd-supply = <&reg_1p5v>;
		enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;

		port {
			ov5645_to_mipi_csi2: endpoint {
				remote-endpoint = <&mipi_csi2_in>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&ipu1_di0_disp0 {
	remote-endpoint = <&lcd_display_in>;
};

&mipi_csi {
	status = "okay";

	port@0 {
		reg = <0>;

		mipi_csi2_in: endpoint {
			remote-endpoint = <&ov5645_to_mipi_csi2>;
			clock-lanes = <0>;
			data-lanes = <1 2>;
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie_reset>;
	reset-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>;
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	status = "okay";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&pwm4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {  /* Bluetooth module */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	uart-has-rtscts;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	uart-has-rtscts;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	dr_mode = "otg";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	bus-width = <8>;
	cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&usdhc2 {  /* Wifi/BT  */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	no-1-8-v;
	keep-power-in-suspend;
	non-removable;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	no-1-8-v;
	non-removable;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_hog: hoggrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19	0x4001b0b5 /* PICO_P24 */
			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x4001b0b5 /* PICO_P26 */
			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x4001b0b5 /* PICO_P28 */
			MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x4001b0b5 /* PICO_P30 */
			MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x4001b0b5 /* PICO_P32 */
			MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x4001b0b5 /* PICO_P34 */
			MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30	0x4001b0b5 /* PICO_P42 */
			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x4001b0b5 /* PICO_P44 */
			MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x4001b0b5 /* PICO_P48 */
		>;
	};

	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
		>;
	};

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
			MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x000f0b0
		>;
	};

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_OE__ECSPI2_MISO		0x1b0b1
			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI		0x1b0b1
			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK		0x1b0b1
			MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x000f0b0
			MX6QDL_PAD_EIM_LBA__GPIO2_IO27		0x000f0b0
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1f0b1
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x1b0b0
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x1b0b0
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_ipu1: ipu1grp {
		fsl,pins = <
			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x10
			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x10
			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x10
			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x10
			MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04		0x10
			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x10
			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x10
			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x10
			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x10
			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x10
			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x10
			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x10
			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x10
			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x10
			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x10
			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x10
			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x10
			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x10
			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x10
			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x10
			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x10
			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x10
			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x10
			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	0x10
			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	0x10
			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	0x10
			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	0x10
			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	0x10
			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	0x10
		>;
	};

	pinctrl_ov5645: ov5645grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_6__GPIO1_IO06		0x0b0b0
			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0b0b0
			MX6QDL_PAD_GPIO_3__CCM_CLKO2		0x000b0
		>;
	};

	pinctrl_pcie_reset: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x130b0
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__PWM1_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4: pwm4grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT2__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_reg_lcd: reglcdgrp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11		0x1b0b0
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	0x1b0b1
			MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	0x1b0b1
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
			MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
		>;
	};

	pinctrl_usbotg_vbus: usbotgvbusgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17071
			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x17071
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17071
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17071
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17071
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17071
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0xb0b1
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2014 Protonic Holland
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart4;
	};

	reg_3v3: regulator-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_usb_h1_vbus: regulator-h1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "h1-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	reg_usb_otg_vbus: regulator-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "otg-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&can1 {
	pinctrl-names = "default";
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	temperature-sensor@70 {
		compatible = "ti,tmp103";
		reg = <0x70>;
	};
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	phy_type = "utmi";
	dr_mode = "host";
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	phy_type = "utmi";
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	non-removable;
	no-1-8-v;
	no-sd;
	no-sdio;
	status = "okay";
};

&iomuxc {
	pinctrl_can1: can1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b008
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b008
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001f8b1
			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001f8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x170f9
			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x100f9
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x170f9
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x170f9
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x170f9
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x170f9
			MX6QDL_PAD_GPIO_1__GPIO1_IO01		0x1b0b0
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17099
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10099
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17099
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17099
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17099
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17099
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17099
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17099
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17099
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17099
			MX6QDL_PAD_SD3_RST__SD3_RESET		0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__USB_OTG_OC	0x1b0b0
			MX6QDL_PAD_EIM_D22__GPIO3_IO22	0x1b0b0
		>;
	};
};


code:
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright 2014 FEDEVEL, Inc.
 *
 * Author: Robert Nelson <robertcnelson@gmail.com>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart1;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_3p3v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usbh1_vbus: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			pinctrl-names = "default";
			regulator-name = "usbh1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		reg_usb_otg_vbus: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			pinctrl-names = "default";
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_led>;

		led0: usr {
			label = "usr";
			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
			default-state = "off";
			linux,default-trigger = "heartbeat";
		};
	};

	sound {
		compatible = "fsl,imx6-rex-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx6-rex-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <3>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&ecspi2 {
	cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	status = "okay";
};

&ecspi3 {
	cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&reg_3p3v>;
		VDDIO-supply = <&reg_3p3v>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pca9535: gpio-expander@27 {
		compatible = "nxp,pca9535";
		reg = <0x27>;
		gpio-controller;
		#gpio-cells = <2>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pca9535>;
		interrupt-parent = <&gpio6>;
		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	eeprom@57 {
		compatible = "atmel,24c02";
		reg = <0x57>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6qdl-rex {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				/* SGTL5000 sys_mclk */
				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x030b0
			>;
		};

		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
			>;
		};

		pinctrl_ecspi2: ecspi2grp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
				MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
				MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
				/* CS */
				MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26	0x000b1
			>;
		};

		pinctrl_ecspi3: ecspi3grp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO	0x100b1
				MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI	0x100b1
				MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK	0x100b1
				/* CS */
				MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x000b1
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
				/* Phy reset */
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x000b0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_led: ledgrp {
			fsl,pins = <
				/* user led */
				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000
			>;
		};

		pinctrl_pca9535: pca9535grp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x17059
		   >;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbh1: usbh1grp {
			fsl,pins = <
				/* power enable, high active */
				MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x10b0
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
				MX6QDL_PAD_EIM_D21__USB_OTG_OC		0x1b0b0
				/* power enable, high active */
				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x10b0
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
				/* CD */
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0
				/* WP */
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1f0b0
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				/* CD */
				MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0
				/* WP */
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1f0b0
			>;
		};
	};
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usbh1_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh1>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <4>;
	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};


code:
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart4;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x80000000>;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		user {
			label = "debug";
			gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		home {
			label = "Home";
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_HOME>;
			wakeup-source;
		};

		back {
			label = "Back";
			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_BACK>;
			wakeup-source;
		};

		program {
			label = "Program";
			gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_PROGRAM>;
			wakeup-source;
		};

		volume-up {
			label = "Volume Up";
			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEUP>;
			wakeup-source;
		};

		volume-down {
			label = "Volume Down";
			gpios = <&gpio5 14 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_VOLUMEDOWN>;
			wakeup-source;
		};
	};

	clocks {
		codec_osc: anaclk2 {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <24576000>;
		};
	};

	reg_audio: regulator-audio {
		compatible = "regulator-fixed";
		regulator-name = "cs42888_supply";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_usb_h1_vbus: regulator-usb-h1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&max7310_b 7 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_otg_vbus: regulator-usb-otg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&max7310_c 1 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_can_en: regulator-can-en {
		compatible = "regulator-fixed";
		regulator-name = "can-en";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&max7310_b 6 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_can_stby: regulator-can-stby {
		compatible = "regulator-fixed";
		regulator-name = "can-stby";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&reg_can_en>;
	};

	sound-cs42888 {
		compatible = "fsl,imx6-sabreauto-cs42888",
			"fsl,imx-audio-cs42888";
		model = "imx-cs42888";
		audio-cpu = <&esai>;
		audio-asrc = <&asrc>;
		audio-codec = <&codec>;
		audio-routing =
			"Line Out Jack", "AOUT1L",
			"Line Out Jack", "AOUT1R",
			"Line Out Jack", "AOUT2L",
			"Line Out Jack", "AOUT2R",
			"Line Out Jack", "AOUT3L",
			"Line Out Jack", "AOUT3R",
			"Line Out Jack", "AOUT4L",
			"Line Out Jack", "AOUT4R",
			"AIN1L", "Line In Jack",
			"AIN1R", "Line In Jack",
			"AIN2L", "Line In Jack",
			"AIN2R", "Line In Jack";
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif",
			   "fsl,imx-sabreauto-spdif";
		model = "imx-spdif";
		spdif-controller = <&spdif>;
		spdif-in;
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm3 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		status = "okay";
	};

	i2cmux {
		compatible = "i2c-mux-gpio";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c3mux>;
		mux-gpios = <&gpio5 4 0>;
		i2c-parent = <&i2c3>;
		idle-state = <0>;

		i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;

			adv7180: camera@21 {
				compatible = "adi,adv7180";
				reg = <0x21>;
				powerdown-gpios = <&max7310_b 2 GPIO_ACTIVE_LOW>;
				interrupt-parent = <&gpio1>;
				interrupts = <27 IRQ_TYPE_LEVEL_LOW>;

				port {
					adv7180_to_ipu1_csi0_mux: endpoint {
						remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
						bus-width = <8>;
					};
				};
			};

			max7310_a: gpio@30 {
				compatible = "maxim,max7310";
				reg = <0x30>;
				gpio-controller;
				#gpio-cells = <2>;
			};

			max7310_b: gpio@32 {
				compatible = "maxim,max7310";
				reg = <0x32>;
				gpio-controller;
				#gpio-cells = <2>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_max7310>;
				reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
			};

			max7310_c: gpio@34 {
				compatible = "maxim,max7310";
				reg = <0x34>;
				gpio-controller;
				#gpio-cells = <2>;
			};

			light-sensor@44 {
				compatible = "isil,isl29023";
				reg = <0x44>;
				interrupt-parent = <&gpio5>;
				interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
			};

			magnetometer@e {
				compatible = "fsl,mag3110";
				reg = <0x0e>;
				interrupt-parent = <&gpio2>;
				interrupts = <29 IRQ_TYPE_EDGE_RISING>;
			};

			accelerometer@1c {
				compatible = "fsl,mma8451";
				reg = <0x1c>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_mma8451_int>;
				interrupt-parent = <&gpio6>;
				interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
			};
		};
	};
};

&ipu1_csi0_from_ipu1_csi0_mux {
	bus-width = <8>;
};

&ipu1_csi0_mux_from_parallel_sensor {
	remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
	bus-width = <8>;
};

&ipu1_csi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ipu1_csi0>;
};

&clks {
	assigned-clocks = <&clks IMX6QDL_PLL4_BYPASS_SRC>,
			  <&clks IMX6QDL_PLL4_BYPASS>,
			  <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
			  <&clks IMX6QDL_CLK_PLL4_POST_DIV>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_LVDS2_IN>,
				 <&clks IMX6QDL_PLL4_BYPASS_SRC>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
	assigned-clock-rates = <0>, <0>, <0>, <0>, <24576000>;
};

&ecspi1 {
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
	status = "disabled"; /* pin conflict with WEIM NOR */

	flash: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p32", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&esai {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esai>;
	assigned-clocks = <&clks IMX6QDL_CLK_ESAI_SEL>,
			  <&clks IMX6QDL_CLK_ESAI_EXTAL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
	assigned-clock-rates = <0>, <24576000>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	/delete-property/ interrupts;
	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
	fsl,err006687-workaround-present;
	fsl,magic-packet;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	xceiver-supply = <&reg_can_stby>;
	status = "disabled"; /* pin conflict with fec */
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	xceiver-supply = <&reg_can_stby>;
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hdmi_cec>;
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic: pfuze100@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};

	codec: cs42888@48 {
		compatible = "cirrus,cs42888";
		reg = <0x48>;
		clocks = <&codec_osc>;
		clock-names = "mclk";
		VA-supply = <&reg_audio>;
		VD-supply = <&reg_audio>;
		VLS-supply = <&reg_audio>;
		VLC-supply = <&reg_audio>;
	};

	touchscreen@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_egalax_int>;
		interrupt-parent = <&gpio2>;
		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
		wakeup-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
	};
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6qdl-sabreauto {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
				MX6QDL_PAD_SD2_DAT2__GPIO1_IO13  0x80000000
				MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
			>;
		};

		pinctrl_ecspi1_cs: ecspi1cs {
			fsl,pins = <
				MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
			>;
		};

		pinctrl_egalax_int: egalax-intgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0xb0b1
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL1__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_KEY_COL2__ENET_MDC		0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
			>;
		};

		pinctrl_esai: esaigrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030
				MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS    0x1b030
				MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030
				MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3     0x1b030
				MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1  0x1b030
				MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0   0x1b030
				MX6QDL_PAD_GPIO_17__ESAI_TX0        0x1b030
				MX6QDL_PAD_NANDF_CS3__ESAI_TX1      0x1b030
				MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK   0x1b030
				MX6QDL_PAD_GPIO_9__ESAI_RX_FS       0x1b030
			>;
		};

		pinctrl_flexcan1: flexcan1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x17059
				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x17059
			>;
		};

		pinctrl_flexcan2: flexcan2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x17059
				MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x17059
			>;
		};

		pinctrl_gpio_keys: gpiokeysgrp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__GPIO1_IO11		0x1b0b0
				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x1b0b0
				MX6QDL_PAD_SD4_DAT4__GPIO2_IO12		0x1b0b0
				MX6QDL_PAD_SD4_DAT7__GPIO2_IO15		0x1b0b0
				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x1b0b0
			>;
		};

		pinctrl_gpio_leds: gpioledsgrp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x80000000
			>;
		};

		pinctrl_gpmi_nand: gpminandgrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
			>;
		};

		pinctrl_hdmi_cec: hdmicecgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	0x1f8b0
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB2__I2C2_SCL	0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_3__I2C3_SCL  0x4001b8b1
				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
			>;
		};

		pinctrl_i2c3mux: i2c3muxgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x0b0b1
			>;
		};

		pinctrl_ipu1_csi0: ipu1csi0grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12  0x1b0b0
				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13  0x1b0b0
				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14  0x1b0b0
				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15  0x1b0b0
				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16  0x1b0b0
				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17  0x1b0b0
				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18  0x1b0b0
				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19  0x1b0b0
				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC    0x1b0b0
				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC   0x1b0b0
			>;
		};

		pinctrl_max7310: max7310grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0
			>;
		};

		pinctrl_mma8451_int: mma8451intgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0xb0b1
			>;
		};

		pinctrl_pwm3: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
			>;
		};

		pinctrl_gpt_input_capture0: gptinputcapture0grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1	0x1b0b0
			>;
		};

		pinctrl_gpt_input_capture1: gptinputcapture1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2	0x1b0b0
			>;
		};

		pinctrl_spdif: spdifgrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0
			>;
		};

		pinctrl_uart4: uart4grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
			>;
		};

		pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170b9
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170b9
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170b9
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170b9
			>;
		};

		pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170f9
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170f9
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170f9
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170f9
			>;
		};

		pinctrl_weim_cs0: weimcs0grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_CS0__EIM_CS0_B		0xb0b1
			>;
		};

		pinctrl_weim_nor: weimnorgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_OE__EIM_OE_B		0xb0b1
				MX6QDL_PAD_EIM_RW__EIM_RW		0xb0b1
				MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B		0xb060
				MX6QDL_PAD_EIM_D16__EIM_DATA16		0x1b0b0
				MX6QDL_PAD_EIM_D17__EIM_DATA17		0x1b0b0
				MX6QDL_PAD_EIM_D18__EIM_DATA18		0x1b0b0
				MX6QDL_PAD_EIM_D19__EIM_DATA19		0x1b0b0
				MX6QDL_PAD_EIM_D20__EIM_DATA20		0x1b0b0
				MX6QDL_PAD_EIM_D21__EIM_DATA21		0x1b0b0
				MX6QDL_PAD_EIM_D22__EIM_DATA22		0x1b0b0
				MX6QDL_PAD_EIM_D23__EIM_DATA23		0x1b0b0
				MX6QDL_PAD_EIM_D24__EIM_DATA24		0x1b0b0
				MX6QDL_PAD_EIM_D25__EIM_DATA25		0x1b0b0
				MX6QDL_PAD_EIM_D26__EIM_DATA26		0x1b0b0
				MX6QDL_PAD_EIM_D27__EIM_DATA27		0x1b0b0
				MX6QDL_PAD_EIM_D28__EIM_DATA28		0x1b0b0
				MX6QDL_PAD_EIM_D29__EIM_DATA29		0x1b0b0
				MX6QDL_PAD_EIM_D30__EIM_DATA30		0x1b0b0
				MX6QDL_PAD_EIM_D31__EIM_DATA31		0x1b0b0
				MX6QDL_PAD_EIM_A23__EIM_ADDR23		0xb0b1
				MX6QDL_PAD_EIM_A22__EIM_ADDR22		0xb0b1
				MX6QDL_PAD_EIM_A21__EIM_ADDR21		0xb0b1
				MX6QDL_PAD_EIM_A20__EIM_ADDR20		0xb0b1
				MX6QDL_PAD_EIM_A19__EIM_ADDR19		0xb0b1
				MX6QDL_PAD_EIM_A18__EIM_ADDR18		0xb0b1
				MX6QDL_PAD_EIM_A17__EIM_ADDR17		0xb0b1
				MX6QDL_PAD_EIM_A16__EIM_ADDR16		0xb0b1
				MX6QDL_PAD_EIM_DA15__EIM_AD15		0xb0b1
				MX6QDL_PAD_EIM_DA14__EIM_AD14		0xb0b1
				MX6QDL_PAD_EIM_DA13__EIM_AD13		0xb0b1
				MX6QDL_PAD_EIM_DA12__EIM_AD12		0xb0b1
				MX6QDL_PAD_EIM_DA11__EIM_AD11		0xb0b1
				MX6QDL_PAD_EIM_DA10__EIM_AD10		0xb0b1
				MX6QDL_PAD_EIM_DA9__EIM_AD09		0xb0b1
				MX6QDL_PAD_EIM_DA8__EIM_AD08		0xb0b1
				MX6QDL_PAD_EIM_DA7__EIM_AD07		0xb0b1
				MX6QDL_PAD_EIM_DA6__EIM_AD06		0xb0b1
				MX6QDL_PAD_EIM_DA5__EIM_AD05		0xb0b1
				MX6QDL_PAD_EIM_DA4__EIM_AD04		0xb0b1
				MX6QDL_PAD_EIM_DA3__EIM_AD03		0xb0b1
				MX6QDL_PAD_EIM_DA2__EIM_AD02		0xb0b1
				MX6QDL_PAD_EIM_DA1__EIM_AD01		0xb0b1
				MX6QDL_PAD_EIM_DA0__EIM_AD00		0xb0b1
			>;
		};
	};
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		display-timings {
			native-mode = <&timing0>;
			timing0: hsd100pxn1 {
				clock-frequency = <65000000>;
				hactive = <1024>;
				vactive = <768>;
				hback-porch = <220>;
				hfront-porch = <40>;
				vback-porch = <21>;
				vfront-porch = <7>;
				hsync-len = <60>;
				vsync-len = <10>;
			};
		};
	};
};

&pwm3 {
	#pwm-cells = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&pcie {
	status = "okay";
};

&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	cd-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&weim {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>;
	ranges = <0 0 0x08000000 0x08000000>;
	status = "disabled"; /* pin conflict with SPI NOR */

	nor@0,0 {
		compatible = "cfi-flash";
		reg = <0 0 0x02000000>;
		#address-cells = <1>;
		#size-cells = <1>;
		bank-width = <2>;
		fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
				0x0000c000 0x1404a38e 0x00000000>;
	};
};