# Digital System Design with SystemVerilog: Combinational Logic Design

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## 2.3 Combinational Logic Design

The values of the output variables of combinational logic are dependent only on the input values and are independent of previous input values or states. Sequential logic, on the other hand, has outputs that depend on the previous states of the system. The design of sequential systems is described in Chapter 6.

The major design objective is usually to minimize the cost of the hardware needed to implement a logic function. That cost can usually be expressed in terms of the number of gates, although for technologies such as programmable logic, there are other limitations, such as the number of terms that may be implemented. Other design objectives may include testability (discussed in detail in Chapter 12) and reliability.

Before describing the logic design process, some terms have to be defined. In these definitions, it is assumed that we are designing a piece of combinational logic with a number of input variables and a single output.

A minterm is a Boolean AND function containing exactly one instance of each input variable or its inverse. A maxterm is a Boolean OR function with exactly one instance of each variable or its inverse. For a combinational logic circuit with n input variables, there are 2 n possible minterms and 2 n possible maxterms. If the logic function is true at row i of the standard truth table, that minterm exists and is designated by mi . If the logic function is false at row i of the standard truth table, that maxterm exists and is designated by Mi . For example, Table 2.7 defines a logic function. The final column shows the minterms and maxterms for the function.

#### Table 2.7. Minterms and Maxterms

 A B C Z 0 0 0 1 m 0 0 0 1 1 m 1 0 1 0 0 M 2 0 1 1 0 M 3 1 0 0 0 M 4 1 0 1 1 m 5 1 1 0 0 M 6 1 1 1 1 m 7

The logic function may be described by the logic OR of its minterms:

 Z = m 0 + m 1 + m 5 + m 7

A function expressed as a logical OR of distinct minterms is in sum of products form.

Each variable is inverted if there is a corresponding 0 in the truth table and not inverted if there is a 1.

Similarly, the logic function may be described by the logical AND of its max-terms.

 Z = M 2 · M 3 · M 4 · M 6

A function expressed as a logical AND of distinct maxterms is in product of sums form.

Each variable is inverted if there is a corresponding 1 in the truth table and not inverted if there is a 0.

An implicant is a term that covers at least one true value and no false values of a function. For example, the function is shown in Table 2.8.

#### Table 2.8. Truth Table for

 A B Z 0 0 1 0 1 0 1 0 1 1 1 1

The implicants of this function are A · B, A, , , . The non-implicants are , B, .

A prime implicant is an implicant that covers one or more minterms of a function, such that the minterms are not all covered by another single implicant. In the example above, A, are prime implicants. The other implicants are all covered by one of the prime implicants. An essential prime implicant is a prime implicant that covers an implicant not covered by any other prime implicant. Thus, A, are essential prime implicants.

### 2.3.1 Logic Minimization

The function of a combinational logic circuit can be described by one or more Boolean expressions. These expressions can be derived from the specification of the system. It is very likely, however, that these expressions are not initially stated in their simplest form. Therefore, if these expressions were directly implemented as logic gates, the amount of hardware required would not be minimal. Therefore, we seek to simplify the Boolean expressions and hence minimize the number of gates needed. Another way of stating this is to say that we are trying to find the set of prime implicants of a function that is necessary to fully describe the function.

In principle, it is possible to simplify Boolean expressions by applying the various rules of Boolean algebra described in Section 2.1. It does not take long, however, to realize that this approach is slow and error prone. Other techniques have to be employed. The technique described here, Karnaugh maps, is a graphical method, although it is effectively limited to problems with six or fewer variables. The Quine-McCluskey algorithm is a tabular method, which is not limited in the number of variables and is well suited to tackling problems with more than one output. Quine-McCluskey can be performed by hand, but it is generally less easy than the Karnaugh map method. It is better implemented as a computer program. Logic minimization belongs, however, to the NP-complete class of problems. This means that as the number of variables increases, the time to find a solution increases exponentially. Therefore, heuristic methods have been developed that find acceptable, but possibly less than optimal, solutions. The Espresso program implements heuristic methods that reduce to the Quine-McCluskey algorithm for small problems. Espresso has been used in a number of logic synthesis systems. Therefore, the approach adopted here is to use Karnaugh maps for small problems with a single output and up to six inputs. In general, it makes sense to use an EDA program to solve larger problems.

The Karnaugh map (or K-map, for short) method generates a solution in sumof-products or product-of-sums form. Such a solution can be implemented directly as two-level AND-OR or OR-AND logic (ignoring the cost of generating the inverse values of inputs). AND-OR logic is equivalent to NAND-NAND logic, and OR-AND logic is equivalent to NOR-NOR logic. Sometimes, a cheaper solution (in terms of the number of gates) can be found by factorizing the two-level, minimized expression to generate more levels of logic—two-level minimization must be performed before any such factorization. Again, we shall assume that if such factorization is to be performed, it will be done using an EDA program, such as SIS.

### 2.3.2 Karnaugh Maps

A Karnaugh map is effectively another way to write a truth table. For example, the Karnaugh map of a general two-input truth table is shown in Figure 2.3.

Similarly, three- and four-input Karnaugh maps are shown in Figures 2.4 and 2.5, respectively. Note that along the top edge of the three-variable Karnaugh map and along both edges of the four-variable map, only one variable changes at a time—the sequence is 00, 01, 11, 10, not the normal binary counting sequence. Hence, for example, the columns in which A is true are adjacent. Therefore, the left and right edges, and the top and bottom in the four-variable map, are also adjacent—B is false in the leftmost and rightmost columns. The three variable map is therefore really a tube, and the four-variable map is a torus, as shown in Figure 2.5. Of course, the maps are drawn as squares for convenience!

A five-variable Karnaugh map is drawn as 2 four-variable maps, one representing the truth table when the fifth variable, E, is false, and the other when E is true. Squares at the same coordinates on both maps are considered to be adjacent. Similarly, a six-variable Karnaugh map is drawn as 4 four-variable maps corresponding to , , , and E · F, respectively. For this to work, the Karnaugh maps have to be arranged in the pattern as the entries in the two-variable map. Hence, squares at the same location in adjacent maps can be considered adjacent. In practice, therefore, it is not feasible to consider Karnaugh maps with more than six variables.

Implicants can be read from Karnaugh maps by circling groups of 1, 2, 4, 8, . . . 2n true values. For example, the function can be expressed as shown in Table 2.9.

#### Table 2.9. Truth Table for

 A B Z 0 0 1 0 1 1 1 0 0 1 1 0

The corresponding Karnaugh map is shown in Figure 2.6. We can now circle the two adjacent 1s as shown. This grouping represents the function because it lies in the column A = 0, and because within the grouping, B takes both 0 and 1 values and hence we do not care about its value. Therefore, by grouping patterns of 1s, logic functions can be minimized. Examples of three- and four-variable Karnaugh maps are shown in Figures 2.7 and 2.8. In both cases, by considering that the edges of the Karnaugh maps are adjacent, groupings can be made that include 1s at two or four edges.

The rules for reading prime implicants from a Karnaugh map are as follows.

• Circle the largest possible groups.
• Avoid circles inside circles (see the definition of a prime implicant).
• Circle 1s and read the sum of products for Z.
• Circle 0s and read the sum of products for .
• Circle 0s and read the product of sums for Z.
• Circle 1s and read the product of sums for .

Diagonal pairs, as shown in Figure 2.9, correspond to XOR functions.

The Karnaugh map of Figure 2.10 has three prime implicants circled. The function can be read as . The vertical grouping, shown with a dashed line, covers 1s covered by the other groupings. This grouping is therefore redundant and can be omitted. Hence, the function can be read as .

Assuming that all the prime implicants have been correctly identified, the minimal form of the function can be read by selecting all the essential prime implicants (i.e., those circles that circle 1s—or 0s—not circled by any other group), together with sufficient other prime implicants needed to cover all the 1s (or 0s). Redundant groupings can be ignored, but under some circumstances it may be desirable to include them.

Incompletely specified functions have "don't cares" in the truth tables. These don't cares correspond to input combinations that will not (or should not) occur. For example, consider the truth table of Figure 2.11.

The don't care entries can be included or excluded from groups as convenient, in order to get the largest possible groupings, and hence the smallest number of implicants. In the example, we could treat the don't care as a 0 and read , or treat the don't care as a 1 and read .

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